#
# This software is Copyright (c) 2018-2019 Denis Burykin
# [denis_burykin yahoo com], [denis-burykin2014 yandex ru]
# and it is hereby released to the general public under the following terms:
# Redistribution and use in source and binary forms, with or without
# modification, are permitted.
#


// ===========================================================
// Nodes - left side
AREA_GROUP "node6" RANGE=SLICE_X38Y147:SLICE_X43Y152;
INST "pkt_comm/bcast_net/node[6].r*" AREA_GROUP="node6";
INST "pkt_comm/units[0].unit_io_regs/stage[6].r*" AREA_GROUP="node6";
INST "pkt_comm/units[1].unit_io_regs/stage[6].r*" AREA_GROUP="node6";

AREA_GROUP "node5" RANGE=SLICE_X38Y129:SLICE_X43Y133;
INST "pkt_comm/bcast_net/node[5].r*" AREA_GROUP="node5";
INST "pkt_comm/units[0].unit_io_regs/stage[5].r*" AREA_GROUP="node5";
INST "pkt_comm/units[1].unit_io_regs/stage[5].r*" AREA_GROUP="node5";
INST "pkt_comm/units[2].unit_io_regs/stage[5].r*" AREA_GROUP="node5";
INST "pkt_comm/units[3].unit_io_regs/stage[5].r*" AREA_GROUP="node5";

AREA_GROUP "node4" RANGE=SLICE_X38Y98:SLICE_X43Y104;
INST "pkt_comm/bcast_net/node[4].r*" AREA_GROUP="node4";
INST "pkt_comm/units[0].unit_io_regs/stage[4].r*" AREA_GROUP="node4";
INST "pkt_comm/units[1].unit_io_regs/stage[4].r*" AREA_GROUP="node4";
INST "pkt_comm/units[2].unit_io_regs/stage[4].r*" AREA_GROUP="node4";
INST "pkt_comm/units[3].unit_io_regs/stage[4].r*" AREA_GROUP="node4";
INST "pkt_comm/units[4].unit_io_regs/stage[4].r*" AREA_GROUP="node4";
INST "pkt_comm/units[5].unit_io_regs/stage[4].r*" AREA_GROUP="node4";

AREA_GROUP "node3" RANGE=SLICE_X38Y68:SLICE_X43Y74;
INST "pkt_comm/bcast_net/node[3].r*" AREA_GROUP="node3";
INST "pkt_comm/units[0].unit_io_regs/stage[3].r*" AREA_GROUP="node3";
INST "pkt_comm/units[1].unit_io_regs/stage[3].r*" AREA_GROUP="node3";
INST "pkt_comm/units[2].unit_io_regs/stage[3].r*" AREA_GROUP="node3";
INST "pkt_comm/units[3].unit_io_regs/stage[3].r*" AREA_GROUP="node3";
INST "pkt_comm/units[4].unit_io_regs/stage[3].r*" AREA_GROUP="node3";
INST "pkt_comm/units[5].unit_io_regs/stage[3].r*" AREA_GROUP="node3";
INST "pkt_comm/units[6].unit_io_regs/stage[3].r*" AREA_GROUP="node3";
INST "pkt_comm/units[7].unit_io_regs/stage[3].r*" AREA_GROUP="node3";

AREA_GROUP "node2" RANGE=SLICE_X34Y38:SLICE_X43Y46;
INST "pkt_comm/bcast_net/node[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[0].unit_io_regs/stage[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[1].unit_io_regs/stage[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[2].unit_io_regs/stage[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[3].unit_io_regs/stage[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[4].unit_io_regs/stage[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[5].unit_io_regs/stage[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[6].unit_io_regs/stage[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[7].unit_io_regs/stage[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[8].unit_io_regs/stage[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[9].unit_io_regs/stage[2].r*" AREA_GROUP="node2";
INST "pkt_comm/units[10].unit_io_regs/stage[2].r*" AREA_GROUP="node2";


####### Right side #######

AREA_GROUP "node10" RANGE=SLICE_X88Y147:SLICE_X109Y151;
INST "pkt_comm/bcast_net/node[10].r*" AREA_GROUP="node10";
INST "pkt_comm/units[11].unit_io_regs/stage[4].r*" AREA_GROUP="node10";
INST "pkt_comm/units[12].unit_io_regs/stage[4].r*" AREA_GROUP="node10";
INST "pkt_comm/units[13].unit_io_regs/stage[4].r*" AREA_GROUP="node10";

AREA_GROUP "node9" RANGE=SLICE_X94Y112:SLICE_X109Y117;
INST "pkt_comm/bcast_net/node[9].r*" AREA_GROUP="node9";
INST "pkt_comm/units[11].unit_io_regs/stage[3].r*" AREA_GROUP="node9";
INST "pkt_comm/units[12].unit_io_regs/stage[3].r*" AREA_GROUP="node9";
INST "pkt_comm/units[13].unit_io_regs/stage[3].r*" AREA_GROUP="node9";
INST "pkt_comm/units[14].unit_io_regs/stage[3].r*" AREA_GROUP="node9";
INST "pkt_comm/units[15].unit_io_regs/stage[3].r*" AREA_GROUP="node9";

AREA_GROUP "node8" RANGE=SLICE_X94Y82:SLICE_X111Y85;
INST "pkt_comm/bcast_net/node[8].r*" AREA_GROUP="node8";
INST "pkt_comm/units[11].unit_io_regs/stage[2].r*" AREA_GROUP="node8";
INST "pkt_comm/units[12].unit_io_regs/stage[2].r*" AREA_GROUP="node8";
INST "pkt_comm/units[13].unit_io_regs/stage[2].r*" AREA_GROUP="node8";
INST "pkt_comm/units[14].unit_io_regs/stage[2].r*" AREA_GROUP="node8";
INST "pkt_comm/units[15].unit_io_regs/stage[2].r*" AREA_GROUP="node8";
INST "pkt_comm/units[16].unit_io_regs/stage[2].r*" AREA_GROUP="node8";
INST "pkt_comm/units[17].unit_io_regs/stage[2].r*" AREA_GROUP="node8";

AREA_GROUP "node7" RANGE=SLICE_X104Y40:SLICE_X111Y51;
INST "pkt_comm/bcast_net/node[7].r*" AREA_GROUP="node7";
INST "pkt_comm/units[11].unit_io_regs/stage[1].r*" AREA_GROUP="node7";
INST "pkt_comm/units[12].unit_io_regs/stage[1].r*" AREA_GROUP="node7";
INST "pkt_comm/units[13].unit_io_regs/stage[1].r*" AREA_GROUP="node7";
INST "pkt_comm/units[14].unit_io_regs/stage[1].r*" AREA_GROUP="node7";
INST "pkt_comm/units[15].unit_io_regs/stage[1].r*" AREA_GROUP="node7";
INST "pkt_comm/units[16].unit_io_regs/stage[1].r*" AREA_GROUP="node7";
INST "pkt_comm/units[17].unit_io_regs/stage[1].r*" AREA_GROUP="node7";
INST "pkt_comm/units[18].unit_io_regs/stage[1].r*" AREA_GROUP="node7";
INST "pkt_comm/units[19].unit_io_regs/stage[1].r*" AREA_GROUP="node7";
INST "pkt_comm/units[20].unit_io_regs/stage[1].r*" AREA_GROUP="node7";


// ===========================================================
// Units - left side
// Unit 0
AREA_GROUP "u0_0" RANGE=SLICE_X0Y181:SLICE_X20Y189,SLICE_X12Y190:SLICE_X21Y191;
AREA_GROUP "u0_0" RANGE=RAMB8_X0Y90:RAMB8_X0Y93;
INST "pkt_comm/units[0].unit/cores[0].core" AREA_GROUP="u0_0";

AREA_GROUP "u0_1" RANGE=SLICE_X0Y172:SLICE_X20Y180,SLICE_X0Y171:SLICE_X9Y171; # 21x9=756 + 10x1
AREA_GROUP "u0_1" RANGE=RAMB8_X0Y86:RAMB8_X0Y89;
INST "pkt_comm/units[0].unit/cores[1].core" AREA_GROUP="u0_1";

AREA_GROUP "u0_2" RANGE=SLICE_X0Y162:SLICE_X20Y170,SLICE_X10Y171:SLICE_X20Y171;
AREA_GROUP "u0_2" RANGE=RAMB8_X0Y82:RAMB8_X0Y85;
INST "pkt_comm/units[0].unit/cores[2].core" AREA_GROUP="u0_2";

AREA_GROUP "c0" RANGE=SLICE_X21Y176:SLICE_X33Y191,SLICE_X21Y170:SLICE_X39Y175;
AREA_GROUP "c0" RANGE=RAMB8_X1Y86:RAMB8_X1Y95;
AREA_GROUP "c0" RANGE=RAMB16_X1Y86:RAMB16_X1Y94;
INST "pkt_comm/units[0].unit/ctrl" AREA_GROUP="c0";

// Unit 1
AREA_GROUP "u1_0" RANGE=SLICE_X0Y153:SLICE_X21Y161,SLICE_X0Y152:SLICE_X10Y152;
AREA_GROUP "u1_0" RANGE=RAMB8_X0Y76:RAMB8_X0Y81;
INST "pkt_comm/units[1].unit/cores[0].core" AREA_GROUP="u1_0";

AREA_GROUP "u1_1" RANGE=SLICE_X0Y143:SLICE_X21Y151,SLICE_X11Y152:SLICE_X20Y152;
AREA_GROUP "u1_1" RANGE=RAMB8_X0Y72:RAMB8_X0Y75;
INST "pkt_comm/units[1].unit/cores[1].core" AREA_GROUP="u1_1";

AREA_GROUP "u1_2" RANGE=SLICE_X42Y151:SLICE_X63Y159; # RAMB X2
AREA_GROUP "u1_2" RANGE=RAMB8_X2Y76:RAMB8_X2Y79;
INST "pkt_comm/units[1].unit/cores[2].core" AREA_GROUP="u1_2";

AREA_GROUP "c1" RANGE=SLICE_X22Y160:SLICE_X39Y169,SLICE_X22Y153:SLICE_X41Y159;
AREA_GROUP "c1" RANGE=RAMB8_X1Y78:RAMB8_X1Y85;
AREA_GROUP "c1" RANGE=RAMB16_X1Y78:RAMB16_X1Y84;
INST "pkt_comm/units[1].unit/ctrl" AREA_GROUP="c1";

// Unit 2
AREA_GROUP "u2_0" RANGE=SLICE_X0Y134:SLICE_X21Y142,SLICE_X0Y133:SLICE_X9Y133;
AREA_GROUP "u2_0" RANGE=RAMB8_X0Y68:RAMB8_X0Y71;
INST "pkt_comm/units[2].unit/cores[0].core" AREA_GROUP="u2_0";

AREA_GROUP "u2_1" RANGE=SLICE_X42Y142:SLICE_X63Y150; # RAMB X2
AREA_GROUP "u2_1" RANGE=RAMB8_X2Y72:RAMB8_X2Y75;
INST "pkt_comm/units[2].unit/cores[1].core" AREA_GROUP="u2_1";

AREA_GROUP "u2_2" RANGE=SLICE_X42Y133:SLICE_X63Y141; # RAMB X2
AREA_GROUP "u2_2" RANGE=RAMB8_X2Y66:RAMB8_X2Y71;
INST "pkt_comm/units[2].unit/cores[2].core" AREA_GROUP="u2_2";

AREA_GROUP "c2" RANGE=SLICE_X22Y136:SLICE_X41Y150;
AREA_GROUP "c2" RANGE=RAMB8_X1Y68:RAMB8_X1Y75;
AREA_GROUP "c2" RANGE=RAMB16_X1Y68:RAMB16_X1Y74;
INST "pkt_comm/units[2].unit/ctrl" AREA_GROUP="c2";

// Unit 3
AREA_GROUP "u3_0" RANGE=SLICE_X0Y124:SLICE_X21Y132,SLICE_X10Y133:SLICE_X21Y133;
AREA_GROUP "u3_0" RANGE=RAMB8_X0Y62:RAMB8_X0Y65;
INST "pkt_comm/units[3].unit/cores[0].core" AREA_GROUP="u3_0";

AREA_GROUP "u3_1" RANGE=SLICE_X0Y115:SLICE_X21Y123,SLICE_X0Y114:SLICE_X9Y114;
AREA_GROUP "u3_1" RANGE=RAMB8_X0Y58:RAMB8_X0Y61;
INST "pkt_comm/units[3].unit/cores[1].core" AREA_GROUP="u3_1";

AREA_GROUP "u3_2" RANGE=SLICE_X42Y124:SLICE_X63Y132; # RAMB X2
AREA_GROUP "u3_2" RANGE=RAMB8_X2Y62:RAMB8_X2Y65;
INST "pkt_comm/units[3].unit/cores[2].core" AREA_GROUP="u3_2";

AREA_GROUP "c3" RANGE=SLICE_X22Y119:SLICE_X39Y133,SLICE_X40Y119:SLICE_X41Y129;
AREA_GROUP "c3" RANGE=RAMB8_X1Y60:RAMB8_X1Y67;
AREA_GROUP "c3" RANGE=RAMB16_X1Y60:RAMB16_X1Y66;
INST "pkt_comm/units[3].unit/ctrl" AREA_GROUP="c3";

// Unit 4
AREA_GROUP "u4_0" RANGE=SLICE_X0Y105:SLICE_X21Y113,SLICE_X10Y114:SLICE_X21Y114;
AREA_GROUP "u4_0" RANGE=RAMB8_X0Y52:RAMB8_X0Y57;
INST "pkt_comm/units[4].unit/cores[0].core" AREA_GROUP="u4_0";

AREA_GROUP "u4_1" RANGE=SLICE_X42Y115:SLICE_X63Y123; # RAMB X2
AREA_GROUP "u4_1" RANGE=RAMB8_X2Y58:RAMB8_X2Y61;
INST "pkt_comm/units[4].unit/cores[1].core" AREA_GROUP="u4_1";

AREA_GROUP "u4_2" RANGE=SLICE_X42Y106:SLICE_X63Y114; # RAMB X2
AREA_GROUP "u4_2" RANGE=RAMB8_X2Y54:RAMB8_X2Y57;
INST "pkt_comm/units[4].unit/cores[2].core" AREA_GROUP="u4_2";

AREA_GROUP "c4" RANGE=SLICE_X22Y104:SLICE_X41Y118;
AREA_GROUP "c4" RANGE=RAMB8_X1Y52:RAMB8_X1Y59;
AREA_GROUP "c4" RANGE=RAMB16_X1Y52:RAMB16_X1Y58;
INST "pkt_comm/units[4].unit/ctrl" AREA_GROUP="c4";

// Unit 5
AREA_GROUP "u5_0" RANGE=SLICE_X0Y96:SLICE_X21Y104,SLICE_X0Y95:SLICE_X9Y95;
AREA_GROUP "u5_0" RANGE=RAMB8_X0Y48:RAMB8_X0Y51;
INST "pkt_comm/units[5].unit/cores[0].core" AREA_GROUP="u5_0";

AREA_GROUP "u5_1" RANGE=SLICE_X42Y97:SLICE_X63Y105; # RAMB X2
AREA_GROUP "u5_1" RANGE=RAMB8_X2Y48:RAMB8_X2Y53;
INST "pkt_comm/units[5].unit/cores[1].core" AREA_GROUP="u5_1";

AREA_GROUP "u5_2" RANGE=SLICE_X42Y88:SLICE_X63Y96; # RAMB X2
AREA_GROUP "u5_2" RANGE=RAMB8_X2Y44:RAMB8_X2Y47;
INST "pkt_comm/units[5].unit/cores[2].core" AREA_GROUP="u5_2";

AREA_GROUP "c5" RANGE=SLICE_X22Y89:SLICE_X39Y103,SLICE_X40Y89:SLICE_X41Y98;
AREA_GROUP "c5" RANGE=RAMB8_X1Y44:RAMB8_X1Y51;
AREA_GROUP "c5" RANGE=RAMB16_X1Y44:RAMB16_X1Y50;
INST "pkt_comm/units[5].unit/ctrl" AREA_GROUP="c5";

// Unit 6
AREA_GROUP "u6_0" RANGE=SLICE_X0Y86:SLICE_X21Y94,SLICE_X10Y95:SLICE_X21Y95;
AREA_GROUP "u6_0" RANGE=RAMB8_X0Y44:RAMB8_X0Y47;
INST "pkt_comm/units[6].unit/cores[0].core" AREA_GROUP="u6_0";

AREA_GROUP "u6_1" RANGE=SLICE_X0Y77:SLICE_X21Y85,SLICE_X0Y76:SLICE_X9Y76;
AREA_GROUP "u6_1" RANGE=RAMB8_X0Y38:RAMB8_X0Y43;
INST "pkt_comm/units[6].unit/cores[1].core" AREA_GROUP="u6_1";

AREA_GROUP "u6_2" RANGE=SLICE_X42Y79:SLICE_X63Y87; # RAMB X2
AREA_GROUP "u6_2" RANGE=RAMB8_X2Y40:RAMB8_X2Y43;
INST "pkt_comm/units[6].unit/cores[2].core" AREA_GROUP="u6_2";

AREA_GROUP "c6" RANGE=SLICE_X22Y74:SLICE_X41Y88;
AREA_GROUP "c6" RANGE=RAMB8_X1Y38:RAMB8_X1Y43;
AREA_GROUP "c6" RANGE=RAMB16_X1Y38:RAMB16_X1Y42;
INST "pkt_comm/units[6].unit/ctrl" AREA_GROUP="c6";

// Unit 7
AREA_GROUP "u7_0" RANGE=SLICE_X0Y67:SLICE_X21Y75,SLICE_X10Y76:SLICE_X21Y76;
AREA_GROUP "u7_0" RANGE=RAMB8_X0Y34:RAMB8_X0Y37;
INST "pkt_comm/units[7].unit/cores[0].core" AREA_GROUP="u7_0";

AREA_GROUP "u7_1" RANGE=SLICE_X42Y70:SLICE_X63Y78; # RAMB X2
AREA_GROUP "u7_1" RANGE=RAMB8_X2Y36:RAMB8_X2Y39;
INST "pkt_comm/units[7].unit/cores[1].core" AREA_GROUP="u7_1";

AREA_GROUP "u7_2" RANGE=SLICE_X42Y61:SLICE_X63Y69; # RAMB X2
AREA_GROUP "u7_2" RANGE=RAMB8_X2Y30:RAMB8_X2Y35;
INST "pkt_comm/units[7].unit/cores[2].core" AREA_GROUP="u7_2";

AREA_GROUP "c7" RANGE=SLICE_X22Y59:SLICE_X39Y73,SLICE_X40Y59:SLICE_X41Y68;
AREA_GROUP "c7" RANGE=RAMB8_X1Y30:RAMB8_X1Y37;
AREA_GROUP "c7" RANGE=RAMB16_X1Y30:RAMB16_X1Y36;
INST "pkt_comm/units[7].unit/ctrl" AREA_GROUP="c7";

// Unit 8
AREA_GROUP "u8_0" RANGE=SLICE_X0Y58:SLICE_X21Y66,SLICE_X0Y57:SLICE_X9Y57;
AREA_GROUP "u8_0" RANGE=RAMB8_X0Y28:RAMB8_X0Y33;
INST "pkt_comm/units[8].unit/cores[0].core" AREA_GROUP="u8_0";

AREA_GROUP "u8_1" RANGE=SLICE_X0Y48:SLICE_X21Y56,SLICE_X10Y57:SLICE_X21Y57;
AREA_GROUP "u8_1" RANGE=RAMB8_X0Y24:RAMB8_X0Y27;
INST "pkt_comm/units[8].unit/cores[1].core" AREA_GROUP="u8_1";

AREA_GROUP "u8_2" RANGE=SLICE_X42Y52:SLICE_X63Y60; # RAMB X2
AREA_GROUP "u8_2" RANGE=RAMB8_X2Y26:RAMB8_X2Y29;
INST "pkt_comm/units[8].unit/cores[2].core" AREA_GROUP="u8_2";

AREA_GROUP "c8" RANGE=SLICE_X22Y44:SLICE_X39Y58,SLICE_X40Y46:SLICE_X41Y53;
AREA_GROUP "c8" RANGE=RAMB8_X1Y22:RAMB8_X1Y29;
AREA_GROUP "c8" RANGE=RAMB16_X1Y22:RAMB16_X1Y28;
INST "pkt_comm/units[8].unit/ctrl" AREA_GROUP="c8";

// Unit 9
AREA_GROUP "u9_0" RANGE=SLICE_X0Y39:SLICE_X21Y47,SLICE_X0Y38:SLICE_X9Y38;
AREA_GROUP "u9_0" RANGE=RAMB8_X0Y20:RAMB8_X0Y23;
INST "pkt_comm/units[9].unit/cores[0].core" AREA_GROUP="u9_0";

AREA_GROUP "u9_1" RANGE=SLICE_X0Y29:SLICE_X21Y37,SLICE_X10Y38:SLICE_X21Y38;
AREA_GROUP "u9_1" RANGE=RAMB8_X0Y14:RAMB8_X0Y19;
INST "pkt_comm/units[9].unit/cores[1].core" AREA_GROUP="u9_1";

AREA_GROUP "u9_2" RANGE=SLICE_X42Y43:SLICE_X63Y51,SLICE_X40Y45:SLICE_X41Y45; # RAMB X2
AREA_GROUP "u9_2" RANGE=RAMB8_X2Y22:RAMB8_X2Y25;
INST "pkt_comm/units[9].unit/cores[2].core" AREA_GROUP="u9_2";

AREA_GROUP "c9" RANGE=SLICE_X22Y29:SLICE_X39Y43,SLICE_X40Y29:SLICE_X41Y38;
AREA_GROUP "c9" RANGE=RAMB8_X1Y14:RAMB8_X1Y21;
AREA_GROUP "c9" RANGE=RAMB16_X1Y14:RAMB16_X1Y20;
INST "pkt_comm/units[9].unit/ctrl" AREA_GROUP="c9";

// Unit 10
AREA_GROUP "u10_0" RANGE=SLICE_X0Y20:SLICE_X23Y28;
AREA_GROUP "u10_0" RANGE=RAMB8_X0Y10:RAMB8_X0Y13;
INST "pkt_comm/units[10].unit/cores[0].core" AREA_GROUP="u10_0";

AREA_GROUP "u10_1" RANGE=SLICE_X0Y11:SLICE_X23Y19;
AREA_GROUP "u10_1" RANGE=RAMB8_X0Y6:RAMB8_X0Y9;
INST "pkt_comm/units[10].unit/cores[1].core" AREA_GROUP="u10_1";

AREA_GROUP "u10_2" RANGE=SLICE_X0Y2:SLICE_X23Y10,SLICE_X12Y0:SLICE_X21Y1;
AREA_GROUP "u10_2" RANGE=RAMB8_X0Y2:RAMB8_X0Y5;
INST "pkt_comm/units[10].unit/cores[2].core" AREA_GROUP="u10_2";

AREA_GROUP "c10" RANGE=SLICE_X24Y2:SLICE_X41Y28;
AREA_GROUP "c10" RANGE=RAMB8_X1Y2:RAMB8_X1Y15;
AREA_GROUP "c10" RANGE=RAMB16_X1Y2:RAMB16_X1Y14;
INST "pkt_comm/units[10].unit/ctrl" AREA_GROUP="c10";

####### Right side #######

// Unit 11
AREA_GROUP "u11_0" RANGE=SLICE_X106Y181:SLICE_X127Y189,SLICE_X108Y190:SLICE_X115Y191;
AREA_GROUP "u11_0" RANGE=RAMB8_X5Y90:RAMB8_X5Y93;
INST "pkt_comm/units[11].unit/cores[0].core" AREA_GROUP="u11_0";

AREA_GROUP "u11_1" RANGE=SLICE_X106Y172:SLICE_X127Y180;
AREA_GROUP "u11_1" RANGE=RAMB8_X5Y86:RAMB8_X5Y89;
INST "pkt_comm/units[11].unit/cores[1].core" AREA_GROUP="u11_1";

AREA_GROUP "u11_2" RANGE=SLICE_X64Y168:SLICE_X87Y175;
AREA_GROUP "u11_2" RANGE=RAMB8_X3Y84:RAMB8_X3Y87; # RAMB X3
INST "pkt_comm/units[11].unit/cores[2].core" AREA_GROUP="u11_2";

AREA_GROUP "c11" RANGE=SLICE_X88Y166:SLICE_X105Y189,SLICE_X98Y190:SLICE_X98Y191;
AREA_GROUP "c11" RANGE=RAMB8_X4Y84:RAMB8_X4Y93;
AREA_GROUP "c11" RANGE=RAMB16_X4Y84:RAMB16_X4Y92;
INST "pkt_comm/units[11].unit/ctrl" AREA_GROUP="c11";

// Unit 12
AREA_GROUP "u12_0" RANGE=SLICE_X64Y160:SLICE_X87Y167;
AREA_GROUP "u12_0" RANGE=RAMB8_X3Y80:RAMB8_X3Y83; # RAMB X3
INST "pkt_comm/units[12].unit/cores[0].core" AREA_GROUP="u12_0";

AREA_GROUP "u12_1" RANGE=SLICE_X64Y152:SLICE_X87Y159;
AREA_GROUP "u12_1" RANGE=RAMB8_X3Y76:RAMB8_X3Y79; # RAMB X3
INST "pkt_comm/units[12].unit/cores[1].core" AREA_GROUP="u12_1";

AREA_GROUP "u12_2" RANGE=SLICE_X64Y144:SLICE_X87Y151;
AREA_GROUP "u12_2" RANGE=RAMB8_X3Y72:RAMB8_X3Y75; # RAMB X3
INST "pkt_comm/units[12].unit/cores[2].core" AREA_GROUP="u12_2";

AREA_GROUP "c12" RANGE=SLICE_X88Y150:SLICE_X105Y165,SLICE_X88Y149:SLICE_X97Y149;
AREA_GROUP "c12" RANGE=RAMB8_X4Y76:RAMB8_X4Y83; # RAMB X4
AREA_GROUP "c12" RANGE=RAMB16_X4Y76:RAMB16_X4Y82;
INST "pkt_comm/units[12].unit/ctrl" AREA_GROUP="c12";

// Unit 13
AREA_GROUP "u13_0" RANGE=SLICE_X106Y163:SLICE_X127Y171,SLICE_X118Y162:SLICE_X127Y162;
AREA_GROUP "u13_0" RANGE=RAMB8_X5Y82:RAMB8_X5Y85;
INST "pkt_comm/units[13].unit/cores[0].core" AREA_GROUP="u13_0";

AREA_GROUP "u13_1" RANGE=SLICE_X88Y139:SLICE_X107Y148;
AREA_GROUP "u13_1" RANGE=RAMB8_X4Y70:RAMB8_X4Y73; # RAMB X4
INST "pkt_comm/units[13].unit/cores[1].core" AREA_GROUP="u13_1";

AREA_GROUP "u13_2" RANGE=SLICE_X108Y139:SLICE_X127Y148;
AREA_GROUP "u13_2" RANGE=RAMB8_X5Y70:RAMB8_X5Y73;
INST "pkt_comm/units[13].unit/cores[2].core" AREA_GROUP="u13_2";

AREA_GROUP "c13" RANGE=SLICE_X106Y149:SLICE_X127Y161,SLICE_X106Y162:SLICE_X117Y162;
AREA_GROUP "c13" RANGE=RAMB8_X5Y76:RAMB8_X5Y81; # RAMB X5
AREA_GROUP "c13" RANGE=RAMB16_X5Y76:RAMB16_X5Y80;
INST "pkt_comm/units[13].unit/ctrl" AREA_GROUP="c13";

// Unit 14
AREA_GROUP "u14_0" RANGE=SLICE_X64Y136:SLICE_X87Y143;
AREA_GROUP "u14_0" RANGE=RAMB8_X3Y68:RAMB8_X3Y71; # RAMB X3
INST "pkt_comm/units[14].unit/cores[0].core" AREA_GROUP="u14_0";

AREA_GROUP "u14_1" RANGE=SLICE_X64Y128:SLICE_X87Y135;
AREA_GROUP "u14_1" RANGE=RAMB8_X3Y64:RAMB8_X3Y67; # RAMB X3
INST "pkt_comm/units[14].unit/cores[1].core" AREA_GROUP="u14_1";

AREA_GROUP "u14_2" RANGE=SLICE_X64Y120:SLICE_X87Y127;
AREA_GROUP "u14_2" RANGE=RAMB8_X3Y60:RAMB8_X3Y63; # RAMB X3
INST "pkt_comm/units[14].unit/cores[2].core" AREA_GROUP="u14_2";

AREA_GROUP "c14" RANGE=SLICE_X88Y124:SLICE_X107Y138;
AREA_GROUP "c14" RANGE=RAMB8_X4Y62:RAMB8_X4Y69; # RAMB X4
AREA_GROUP "c14" RANGE=RAMB16_X4Y62:RAMB16_X4Y68;
INST "pkt_comm/units[14].unit/ctrl" AREA_GROUP="c14";

// Unit 15
AREA_GROUP "u15_0" RANGE=SLICE_X108Y129:SLICE_X127Y138;
AREA_GROUP "u15_0" RANGE=RAMB8_X5Y64:RAMB8_X5Y69;
INST "pkt_comm/units[15].unit/cores[0].core" AREA_GROUP="u15_0";

AREA_GROUP "u15_1" RANGE=SLICE_X88Y115:SLICE_X107Y123,SLICE_X88Y114:SLICE_X103Y114;
AREA_GROUP "u15_1" RANGE=RAMB8_X4Y58:RAMB8_X4Y61; # RAMB X4
INST "pkt_comm/units[15].unit/cores[1].core" AREA_GROUP="u15_1";

AREA_GROUP "u15_2" RANGE=SLICE_X108Y105:SLICE_X127Y113,SLICE_X118Y104:SLICE_X127Y104;
AREA_GROUP "u15_2" RANGE=RAMB8_X5Y52:RAMB8_X5Y57;
INST "pkt_comm/units[15].unit/cores[2].core" AREA_GROUP="u15_2";

AREA_GROUP "c15" RANGE=SLICE_X108Y114:SLICE_X127Y128;
AREA_GROUP "c15" RANGE=RAMB8_X5Y58:RAMB8_X5Y63; # RAMB X5
AREA_GROUP "c15" RANGE=RAMB8_X5Y58:RAMB8_X5Y62;
INST "pkt_comm/units[15].unit/ctrl" AREA_GROUP="c15";

// Unit 16
AREA_GROUP "u16_0" RANGE=SLICE_X64Y112:SLICE_X87Y119;
AREA_GROUP "u16_0" RANGE=RAMB8_X3Y56:RAMB8_X3Y59; # RAMB X3
INST "pkt_comm/units[16].unit/cores[0].core" AREA_GROUP="u16_0";

AREA_GROUP "u16_1" RANGE=SLICE_X64Y104:SLICE_X87Y111;
AREA_GROUP "u16_1" RANGE=RAMB8_X3Y52:RAMB8_X3Y55; # RAMB X3
INST "pkt_comm/units[16].unit/cores[1].core" AREA_GROUP="u16_1";

AREA_GROUP "u16_2" RANGE=SLICE_X64Y96:SLICE_X87Y103;
AREA_GROUP "u16_2" RANGE=RAMB8_X3Y48:RAMB8_X3Y51; # RAMB X3
INST "pkt_comm/units[16].unit/cores[2].core" AREA_GROUP="u16_2";

AREA_GROUP "c16" RANGE=SLICE_X88Y99:SLICE_X107Y113;
AREA_GROUP "c16" RANGE=RAMB8_X4Y50:RAMB8_X4Y57; # RAMB X4
AREA_GROUP "c16" RANGE=RAMB16_X4Y50:RAMB16_X4Y56;
INST "pkt_comm/units[16].unit/ctrl" AREA_GROUP="c16";

// Unit 17
AREA_GROUP "u17_0" RANGE=SLICE_X108Y95:SLICE_X127Y103,SLICE_X108Y104:SLICE_X117Y104;
AREA_GROUP "u17_0" RANGE=RAMB8_X5Y48:RAMB8_X5Y51;
INST "pkt_comm/units[17].unit/cores[0].core" AREA_GROUP="u17_0";

AREA_GROUP "u17_1" RANGE=SLICE_X64Y88:SLICE_X87Y95;
AREA_GROUP "u17_1" RANGE=RAMB8_X3Y44:RAMB8_X3Y47; # RAMB X3
INST "pkt_comm/units[17].unit/cores[1].core" AREA_GROUP="u17_1";

AREA_GROUP "u17_2" RANGE=SLICE_X108Y86:SLICE_X127Y94,SLICE_X118Y85:SLICE_X127Y85;
AREA_GROUP "u17_2" RANGE=RAMB8_X5Y42:RAMB8_X5Y47;
INST "pkt_comm/units[17].unit/cores[2].core" AREA_GROUP="u17_2";

AREA_GROUP "c17" RANGE=SLICE_X88Y85:SLICE_X107Y98,SLICE_X88Y84:SLICE_X95Y84;
AREA_GROUP "c17" RANGE=RAMB8_X4Y42:RAMB8_X4Y49; # RAMB X4
AREA_GROUP "c17" RANGE=RAMB16_X4Y42:RAMB16_X4Y48;
INST "pkt_comm/units[17].unit/ctrl" AREA_GROUP="c17";

// Unit 18
AREA_GROUP "u18_0" RANGE=SLICE_X64Y80:SLICE_X87Y87;
AREA_GROUP "u18_0" RANGE=RAMB8_X3Y40:RAMB8_X3Y43; # RAMB X3
INST "pkt_comm/units[18].unit/cores[0].core" AREA_GROUP="u18_0";

AREA_GROUP "u18_1" RANGE=SLICE_X64Y72:SLICE_X87Y79;
AREA_GROUP "u18_1" RANGE=RAMB8_X3Y36:RAMB8_X3Y39; # RAMB X3
INST "pkt_comm/units[18].unit/cores[1].core" AREA_GROUP="u18_1";

AREA_GROUP "u18_2" RANGE=SLICE_X64Y64:SLICE_X87Y71;
AREA_GROUP "u18_2" RANGE=RAMB8_X3Y32:RAMB8_X3Y35; # RAMB X3
INST "pkt_comm/units[18].unit/cores[2].core" AREA_GROUP="u18_2";

AREA_GROUP "c18" RANGE=SLICE_X88Y69:SLICE_X107Y82,SLICE_X88Y83:SLICE_X101Y83;
AREA_GROUP "c18" RANGE=RAMB8_X4Y34:RAMB8_X4Y41;
AREA_GROUP "c18" RANGE=RAMB16_X4Y34:RAMB16_X4Y40;
INST "pkt_comm/units[18].unit/ctrl" AREA_GROUP="c18";

// Unit 19
AREA_GROUP "u19_0" RANGE=SLICE_X108Y76:SLICE_X127Y84,SLICE_X112Y85:SLICE_X117Y85;
AREA_GROUP "u19_0" RANGE=RAMB8_X5Y38:RAMB8_X5Y41;
INST "pkt_comm/units[19].unit/cores[0].core" AREA_GROUP="u19_0";

AREA_GROUP "u19_1" RANGE=SLICE_X88Y60:SLICE_X107Y68,SLICE_X88Y59:SLICE_X101Y59;
AREA_GROUP "u19_1" RANGE=RAMB8_X4Y30:RAMB8_X4Y33; # RAMB X4
INST "pkt_comm/units[19].unit/cores[1].core" AREA_GROUP="u19_1";

AREA_GROUP "u19_2" RANGE=SLICE_X108Y51:SLICE_X127Y60;
AREA_GROUP "u19_2" RANGE=RAMB8_X5Y26:RAMB8_X5Y29;
INST "pkt_comm/units[19].unit/cores[2].core" AREA_GROUP="u19_2";

AREA_GROUP "c19" RANGE=SLICE_X108Y61:SLICE_X127Y75;
AREA_GROUP "c19" RANGE=RAMB8_X5Y30:RAMB8_X5Y37; # RAMB X5
AREA_GROUP "c19" RANGE=RAMB16_X5Y30:RAMB16_X5Y36;
INST "pkt_comm/units[19].unit/ctrl" AREA_GROUP="c19";

// Unit 20
AREA_GROUP "u20_0" RANGE=SLICE_X64Y56:SLICE_X87Y63;
AREA_GROUP "u20_0" RANGE=RAMB8_X3Y28:RAMB8_X3Y31; # RAMB X3
INST "pkt_comm/units[20].unit/cores[0].core" AREA_GROUP="u20_0";

AREA_GROUP "u20_1" RANGE=SLICE_X64Y48:SLICE_X87Y55;
AREA_GROUP "u20_1" RANGE=RAMB8_X3Y24:RAMB8_X3Y27; # RAMB X3
INST "pkt_comm/units[20].unit/cores[1].core" AREA_GROUP="u20_1";

AREA_GROUP "u20_2" RANGE=SLICE_X108Y42:SLICE_X127Y50,SLICE_X112Y41:SLICE_X127Y41;
AREA_GROUP "u20_2" RANGE=RAMB8_X5Y20:RAMB8_X5Y23;
INST "pkt_comm/units[20].unit/cores[2].core" AREA_GROUP="u20_2";

AREA_GROUP "c20" RANGE=SLICE_X88Y44:SLICE_X105Y49,SLICE_X88Y50:SLICE_X107Y58;
AREA_GROUP "c20" RANGE=RAMB8_X4Y22:RAMB8_X4Y29;
AREA_GROUP "c20" RANGE=RAMB16_X4Y22:RAMB16_X4Y28;
INST "pkt_comm/units[20].unit/ctrl" AREA_GROUP="c20";

// Unit 21
AREA_GROUP "u21_0" RANGE=SLICE_X64Y40:SLICE_X87Y47;
AREA_GROUP "u21_0" RANGE=RAMB8_X3Y20:RAMB8_X3Y23; # RAMB X3
INST "pkt_comm/units[21].unit/cores[0].core" AREA_GROUP="u21_0";

AREA_GROUP "u21_1" RANGE=SLICE_X64Y32:SLICE_X87Y39;
AREA_GROUP "u21_1" RANGE=RAMB8_X3Y16:RAMB8_X3Y19; # RAMB X3
INST "pkt_comm/units[21].unit/cores[1].core" AREA_GROUP="u21_1";

AREA_GROUP "u21_2" RANGE=SLICE_X108Y31:SLICE_X127Y40;
AREA_GROUP "u21_2" RANGE=RAMB8_X5Y16:RAMB8_X5Y19;
INST "pkt_comm/units[21].unit/cores[2].core" AREA_GROUP="u21_2";

AREA_GROUP "c21" RANGE=SLICE_X88Y29:SLICE_X107Y41,SLICE_X88Y42:SLICE_X103Y43;
AREA_GROUP "c21" RANGE=RAMB8_X4Y14:RAMB8_X4Y21;
AREA_GROUP "c21" RANGE=RAMB16_X4Y14:RAMB16_X4Y20;
INST "pkt_comm/units[21].unit/ctrl" AREA_GROUP="c21";

// Unit 22
AREA_GROUP "u22_0" RANGE=SLICE_X42Y34:SLICE_X63Y42; # RAMB X2
AREA_GROUP "u22_0" RANGE=RAMB8_X2Y16:RAMB8_X2Y19;
INST "pkt_comm/units[22].unit/cores[0].core" AREA_GROUP="u22_0";

AREA_GROUP "u22_1" RANGE=SLICE_X42Y25:SLICE_X63Y33,SLICE_X42Y24:SLICE_X63Y24; # RAMB X2
AREA_GROUP "u22_1" RANGE=RAMB8_X2Y12:RAMB8_X2Y15;
INST "pkt_comm/units[22].unit/cores[1].core" AREA_GROUP="u22_1";

AREA_GROUP "u22_2" RANGE=SLICE_X42Y16:SLICE_X63Y23,SLICE_X50Y12:SLICE_X63Y15; # RAMB X2
AREA_GROUP "u22_2" RANGE=RAMB8_X2Y8:RAMB8_X2Y11;
INST "pkt_comm/units[22].unit/cores[2].core" AREA_GROUP="u22_2";

AREA_GROUP "c22" RANGE=SLICE_X64Y16:SLICE_X87Y29;
AREA_GROUP "c22" RANGE=RAMB8_X3Y8:RAMB8_X3Y13; # RAMB X3
AREA_GROUP "c22" RANGE=RAMB16_X3Y8:RAMB16_X3Y12;
INST "pkt_comm/units[22].unit/ctrl" AREA_GROUP="c22";


// ===========================================================
// pkt_comm
AREA_GROUP "pkt_comm" RANGE=SLICE_X98Y7:SLICE_X127Y27,SLICE_X90Y17:SLICE_X97Y27;
AREA_GROUP "pkt_comm" RANGE=RAMB8_X4Y6:RAMB8_X5Y13;
AREA_GROUP "pkt_comm" RANGE=RAMB16_X4Y6:RAMB16_X5Y12;

INST "pkt_comm/inpkt_header*" AREA_GROUP="pkt_comm";
INST "pkt_comm/word_gen*" AREA_GROUP="pkt_comm";
INST "pkt_comm/cmp_config*" AREA_GROUP="pkt_comm";
INST "pkt_comm/arbiter_tx*" AREA_GROUP="pkt_comm";
INST "pkt_comm/arbiter_rx*" AREA_GROUP="pkt_comm";
INST "pkt_comm/comparator*" AREA_GROUP="pkt_comm";
INST "pkt_comm/outpkt*" AREA_GROUP="pkt_comm";
INST "pkt_comm/rd_en*" AREA_GROUP="pkt_comm";
INST "pkt_comm/word_list*" AREA_GROUP="pkt_comm";
INST "input_fifo/fifo_input1*" AREA_GROUP="pkt_comm";
INST "output_fifo/fifo_output1*" AREA_GROUP="pkt_comm";
INST "hs_io_inst*" AREA_GROUP="pkt_comm";
INST "vcr_inst*" AREA_GROUP="pkt_comm";

INST "input_fifo/fifo_input0*" AREA_GROUP="io0";
INST "output_fifo/fifo_output0*" AREA_GROUP="io0";

AREA_GROUP "io0" RANGE=SLICE_X98Y0:SLICE_X127Y6;
AREA_GROUP "io0" RANGE=RAMB16_X4Y0:RAMB16_X5Y4;


// ===========================================================
// procb
NET "pkt_comm/units[*].unit/ctrl/engine/process_bytes/saved_bytes_limit_t*" TIG;
NET "pkt_comm/units[*].unit/ctrl/engine/process_bytes/saved_addr_t*" TIG;
NET "pkt_comm/units[*].unit/ctrl/engine/process_bytes/saved_total_t*" TIG;
NET "pkt_comm/units[*].unit/ctrl/engine/process_bytes/saved_finish_ctx_t" TIG;
NET "pkt_comm/units[*].unit/ctrl/engine/process_bytes/saved_padded0x80_t" TIG;
NET "pkt_comm/units[*].unit/ctrl/engine/process_bytes/saved_comp_active_t" TIG;
NET "pkt_comm/units[*].unit/ctrl/engine/process_bytes/saved_procb_active_t" TIG;
NET "pkt_comm/units[*].unit/ctrl/engine/process_bytes/loaded_bytes_left_t*" TIG;
// cpu
NET "pkt_comm/units[*].unit/ctrl/cpu/uob_thread_num*" TIG;

NET "pkt_comm/mode_cmp" TIG;

