#
# This software is Copyright (c) 2018 Denis Burykin
# [denis_burykin yahoo com], [denis-burykin2014 yandex ru]
# and it is hereby released to the general public under the following terms:
# Redistribution and use in source and binary forms, with or without
# modification, are permitted.
#

NET "CLK" TNM_NET = "CLK";
#TIMESPEC "TS_CLK" = PERIOD "CLK" 3.846 ns HIGH 50%; # 260
#TIMESPEC "TS_CLK" = PERIOD "CLK" 4.000 ns HIGH 50%; # 250
TIMESPEC "TS_CLK" = PERIOD "CLK" 4.347 ns HIGH 50%; # 230
#TIMESPEC "TS_CLK" = PERIOD "CLK" 4.444 ns HIGH 50%; # 225
#TIMESPEC "TS_CLK" = PERIOD "CLK" 4.545 ns HIGH 50%; # 220
#TIMESPEC "TS_CLK" = PERIOD "CLK" 4.651 ns HIGH 50%; # 215
#TIMESPEC "TS_CLK" = PERIOD "CLK" 5.000 ns HIGH 50%;
#TIMESPEC "TS_CLK" = PERIOD "CLK" 5.263 ns HIGH 50%; # 190
#TIMESPEC "TS_CLK" = PERIOD "CLK" 5.555 ns HIGH 50%; # 180
#TIMESPEC "TS_CLK" = PERIOD "CLK" 5.714 ns HIGH 50%; # 175

#AREA_GROUP "area1" RANGE=SLICE_X0Y16:SLICE_X22Y23; # 23x8
#AREA_GROUP "area1" RANGE=SLICE_X0Y16:SLICE_X21Y23; # 22x8=704 (22x8=704)
#AREA_GROUP "area1" RANGE=SLICE_X0Y16:SLICE_X20Y23; # 21x8=672
#AREA_GROUP "area1" RANGE=SLICE_X0Y16:SLICE_X19Y23; # 20x8=640 (core 84%)

#AREA_GROUP "area1" RANGE=SLICE_X0Y16:SLICE_X29Y23; # 30x8=960
#AREA_GROUP "area1" RANGE=SLICE_X0Y16:SLICE_X33Y23; # 34x8=1088 (78%)
#AREA_GROUP "area1" RANGE=SLICE_X0Y16:SLICE_X33Y24; # 34x9=1224 (70%)

#AREA_GROUP "area1" RANGE=SLICE_X0Y16:SLICE_X21Y27; # 22x12=1056 (81%)
#AREA_GROUP "area1" RANGE=SLICE_X0Y16:SLICE_X21Y28; # 22x13=1144 (75%)
#AREA_GROUP "area1" RANGE=SLICE_X0Y16:SLICE_X21Y; # 22x14=1232 (%)

#AREA_GROUP "area1" RANGE=RAMB8_X0Y8:RAMB8_X0Y11;

#INST "*" AREA_GROUP="area1";


AREA_GROUP "u0_0" RANGE=SLICE_X0Y128:SLICE_X21Y144; # 22x17
AREA_GROUP "u0_0" RANGE=RAMB8_X0Y64:RAMB8_X0Y71;
AREA_GROUP "u0_0" RANGE=RAMB16_X0Y64:RAMB16_X0Y70;
INST "cores[0].core" AREA_GROUP="u0_0";

AREA_GROUP "u0_1" RANGE=SLICE_X0Y111:SLICE_X21Y127;
AREA_GROUP "u0_1" RANGE=RAMB8_X0Y56:RAMB8_X0Y63;
AREA_GROUP "u0_1" RANGE=RAMB16_X0Y56:RAMB16_X0Y62;
INST "cores[1].core" AREA_GROUP="u0_1";

AREA_GROUP "u0_2" RANGE=SLICE_X22Y111:SLICE_X43Y127;
AREA_GROUP "u0_2" RANGE=RAMB8_X1Y56:RAMB8_X1Y63;
AREA_GROUP "u0_2" RANGE=RAMB16_X1Y56:RAMB16_X1Y62;
INST "cores[2].core" AREA_GROUP="u0_2";

AREA_GROUP "u0_3" RANGE=SLICE_X44Y111:SLICE_X65Y127;
AREA_GROUP "u0_3" RANGE=RAMB8_X2Y56:RAMB8_X2Y63;
AREA_GROUP "u0_3" RANGE=RAMB16_X2Y56:RAMB16_X2Y62;
INST "cores[3].core" AREA_GROUP="u0_3";

AREA_GROUP "c0" RANGE=SLICE_X22Y128:SLICE_X45Y144; # X+2
AREA_GROUP "c0" RANGE=RAMB8_X1Y64:RAMB8_X1Y71;
AREA_GROUP "c0" RANGE=RAMB16_X1Y64:RAMB16_X1Y70;
INST "ctrl" AREA_GROUP="c0";


// Unit 1
#AREA_GROUP "u1_0" RANGE=SLICE_X0Y156:SLICE_X20Y163;
#AREA_GROUP "u1_0" RANGE=RAMB8_X0Y78:RAMB8_X0Y81;
#INST "pkt_comm/units[1].unit/cores[0].core" AREA_GROUP="u1_0";

#AREA_GROUP "u1_1" RANGE=SLICE_X0Y148:SLICE_X20Y155;
#AREA_GROUP "u1_1" RANGE=RAMB8_X0Y74:RAMB8_X0Y77;
#INST "pkt_comm/units[1].unit/cores[1].core" AREA_GROUP="u1_1";

#AREA_GROUP "u1_2" RANGE=SLICE_X43Y152:SLICE_X63Y159; # RAMB X2
#AREA_GROUP "u1_2" RANGE=RAMB8_X2Y76:RAMB8_X2Y79;
#INST "pkt_comm/units[1].unit/cores[2].core" AREA_GROUP="u1_2";

#AREA_GROUP "c1" RANGE=SLICE_X21Y160:SLICE_X39Y167,SLICE_X21Y151:SLICE_X42Y159;
#AREA_GROUP "c1" RANGE=RAMB8_X1Y78:RAMB8_X1Y83;
#INST "pkt_comm/units[1].unit/ctrl" AREA_GROUP="c1";
