* TRTE test
sysclear
archmode esame
r 1a0=00000000800000000000000000000200 # z/Arch restart PSW
r 1d0=0002000080000000000000000000DEAD # z/Arch pgm new PSW
r 200=C018A5A5A5A5 # IIHF R1,X'A5A5A5A5' Load garbage in R1 bits 0-31
r 206=B9040061     # LGR R6,R1         Propagate garbage into R6
r 20A=B9040071     # LGR R7,R1         Propagate garbage into R7
r 20E=B9040081     # LGR R8,R1         Propagate garbage into R8
r 212=C089A5A5A5A5 # IILF R8,X'A5A5A5A5' Load garbage in R8 bits 32-63
r 218=41100300     # LA R1,TABLE1      R1=>Translate table
r 21C=41600280     # LA R6,DATA1       R6=>Test data
r 220=41700006     # LA R7,L'DATA1     R7=>Length of test data
r 224=B9BF0068     # TRTE R6,R8        Translate and test single
r 228=A734FFFE     # BRC 3,*-4         Repeat if more data
r 22C=B2B20270     # LPSWE WAITPSW     Load enabled wait PSW
r 270=07020001800000000000000000FED0D0 # WAITPSW Enabled wait state PSW
* Test data
r 280=F1F2F3F4E7F6                     # DATA1 DC C'1234X6'
r 300=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF # TABLE1 DC 240X'FF',10X'00',6X'FF'
r 310=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 320=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 330=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 340=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 350=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 360=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 370=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 380=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 390=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3A0=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3B0=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3C0=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3D0=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3E0=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3F0=00000000000000000000FFFFFFFFFFFF
ostailor null
s+
pgmtrace +7
restart
