/*
 * Copyright (c) 2022, NVIDIA CORPORATION.  All rights reserved.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
#ifndef DCGMFIELDS_INTERNAL_H
#define DCGMFIELDS_INTERNAL_H

#ifdef __cplusplus
extern "C" {
#endif

/********************************************************************************/
/* Definition of all the internal DCGM fields                                   */
/********************************************************************************/


/********************************************************************************/
/* Field ID ranges                                                              */
/********************************************************************************/

/* Profiling field IDs */
#define DCGM_FI_PROF_FIRST_ID DCGM_FI_PROF_GR_ENGINE_ACTIVE
#define DCGM_FI_PROF_LAST_ID  DCGM_FI_PROF_NVLINK_RX_BYTES

#ifdef __cplusplus
}
#endif

#endif // DCGMFIELDS_INTERNAL_H
