source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp269 = call double @__decompiler_undefined_function_3()
  %stack_var_-60 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-60, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4c = load i32, i32* %edi.global-to-local, align 4
  %v1_4c = add i32 %v0_4c, -44
  store i32 %v1_4c, i32* %edi.global-to-local, align 4
  %v0_4f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4f = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_4f, x86_fp80* %st7.global-to-local, align 4
  %v5_53 = fpext double %tmp269 to x86_fp80
  %v3_57 = load double, double* %stack_var_-60, align 8
  %v8_57 = fpext double %v3_57 to x86_fp80
  %v3_5c = add i32 %v0_4c, -104
  %v4_5c = inttoptr i32 %v3_5c to float*
  %v5_5c = load float, float* %v4_5c, align 4
  %v6_5c = fpext float %v5_5c to x86_fp80
  %v7_5c = fmul x86_fp80 %v8_57, %v6_5c
  %v3_61 = add i32 %v0_4c, -108
  %v4_61 = inttoptr i32 %v3_61 to float*
  %v5_61 = load float, float* %v4_61, align 4
  %v6_61 = fpext float %v5_61 to x86_fp80
  %v7_61 = fmul x86_fp80 %v5_53, %v6_61
  %v4_64 = fadd x86_fp80 %v7_5c, %v7_61
  %v3_68 = add i32 %v0_4c, -112
  %v4_68 = inttoptr i32 %v3_68 to float*
  %v5_68 = load float, float* %v4_68, align 4
  %v6_68 = fpext float %v5_68 to x86_fp80
  %v7_68 = fmul x86_fp80 %v7_4f, %v6_68
  %v4_6b = fadd x86_fp80 %v7_68, %v4_64
  %v3_6f = add i32 %v0_4c, -80
  %v4_6f = inttoptr i32 %v3_6f to float*
  %v5_6f = load float, float* %v4_6f, align 4
  %v6_6f = fpext float %v5_6f to x86_fp80
  %v7_6f = fmul x86_fp80 %v8_57, %v6_6f
  %v3_74 = add i32 %v0_4c, -84
  %v4_74 = inttoptr i32 %v3_74 to float*
  %v5_74 = load float, float* %v4_74, align 4
  %v6_74 = fpext float %v5_74 to x86_fp80
  %v7_74 = fmul x86_fp80 %v5_53, %v6_74
  %v4_77 = fadd x86_fp80 %v7_6f, %v7_74
  %v3_7b = add i32 %v0_4c, -88
  %v4_7b = inttoptr i32 %v3_7b to float*
  %v5_7b = load float, float* %v4_7b, align 4
  %v6_7b = fpext float %v5_7b to x86_fp80
  %v7_7b = fmul x86_fp80 %v7_4f, %v6_7b
  %v4_7e = fadd x86_fp80 %v4_77, %v7_7b
  %v3_82 = add i32 %v0_4c, -92
  %v4_82 = inttoptr i32 %v3_82 to float*
  %v5_82 = load float, float* %v4_82, align 4
  %v6_82 = fpext float %v5_82 to x86_fp80
  %v7_82 = fmul x86_fp80 %v8_57, %v6_82
  %v3_87 = add i32 %v0_4c, -96
  %v4_87 = inttoptr i32 %v3_87 to float*
  %v5_87 = load float, float* %v4_87, align 4
  %v6_87 = fpext float %v5_87 to x86_fp80
  %v7_87 = fmul x86_fp80 %v5_53, %v6_87
  %v4_8a = fadd x86_fp80 %v7_82, %v7_87
  store x86_fp80 %v4_6b, x86_fp80* %st7.global-to-local, align 4
  %v3_8e = add i32 %v0_4c, -100
  %v4_8e = inttoptr i32 %v3_8e to float*
  %v5_8e = load float, float* %v4_8e, align 4
  %v6_8e = fpext float %v5_8e to x86_fp80
  %v7_8e = fmul x86_fp80 %v7_4f, %v6_8e
  %v4_91 = fadd x86_fp80 %v4_8a, %v7_8e
  %tmp274 = fptrunc x86_fp80 %v4_7e to double
  store double %tmp274, double* %stack_var_-60, align 8
  %v6_96 = add i3 %v0_4f, -1
  store i32 %v0_4c, i32* %edi.global-to-local, align 4
  %v3_a5 = fmul x86_fp80 %v4_7e, %v4_7e
  %v3_ab = fmul x86_fp80 %v4_91, %v4_91
  %v4_ad = fadd x86_fp80 %v3_a5, %v3_ab
  %v3_b3 = fmul x86_fp80 %v4_6b, %v4_6b
  %v4_b5 = fadd x86_fp80 %v3_b3, %v4_ad
  store x86_fp80 %v4_b5, x86_fp80* %st7.global-to-local, align 4
  %v2_b7 = add i32 %v0_4c, -16
  %v3_b7 = inttoptr i32 %v2_b7 to double*
  %v4_b7 = load double, double* %v3_b7, align 4
  %tmp275 = call double @llvm.fabs.f64(double %v4_b7)
  %v2_ba = fpext double %tmp275 to x86_fp80
  %v4_bc = fadd x86_fp80 %v4_b5, %v2_ba
  store i3 %v6_96, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_7e, x86_fp80* %st7.global-to-local, align 4
  %v3_cc = add i32 %v0_4c, -72
  %v4_cc = inttoptr i32 %v3_cc to double*
  %v5_cc = load double, double* %v4_cc, align 4
  %v6_cc = fpext double %v5_cc to x86_fp80
  %v7_cc = fmul x86_fp80 %v4_7e, %v6_cc
  %v2_cf = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_cc)
  %v3_cf = fcmp olt x86_fp80 %v2_cf, 0xK403E8000000000000000
  %v4_cf = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_cc)
  %storemerge23 = select i1 %v3_cf, x86_fp80 %v4_cf, x86_fp80 %v7_cc
  store x86_fp80 %storemerge23, x86_fp80* %st7.global-to-local, align 4
  %v0_d3 = call i32 @__asm_wait()
  %v0_d4 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_d4 = call i16 @__asm_fnstsw(i32 %v0_d4)
  %tmp285 = and i16 %v1_d4, 256
  %v16_d6 = icmp ne i16 %tmp285, 0
  %v1_d8 = icmp eq i1 %v16_d6, false
  %v1_e4 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_d8, label %dec_label_pc_e4, label %dec_label_pc_da

dec_label_pc_da:                                  ; preds = %dec_label_pc_40
  %v7_da = fsub x86_fp80 %v4_bc, %v1_e4
  store x86_fp80 %v7_da, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_ec

dec_label_pc_e4:                                  ; preds = %dec_label_pc_40
  %v7_e4 = fadd x86_fp80 %v1_e4, 0xK00000000000000000000
  store x86_fp80 %v7_e4, x86_fp80* %st7.global-to-local, align 4
  %v4_e8 = fptrunc x86_fp80 %v7_e4 to double
  br label %dec_label_pc_ec

dec_label_pc_ec:                                  ; preds = %dec_label_pc_e4, %dec_label_pc_da
  %stack_var_-28.0 = phi double [ %v4_e8, %dec_label_pc_e4 ], [ 0.000000e+00, %dec_label_pc_da ]
  %stack_var_-36.0.in = phi x86_fp80 [ %v4_bc, %dec_label_pc_e4 ], [ %v7_da, %dec_label_pc_da ]
  %stack_var_-36.0 = fptrunc x86_fp80 %stack_var_-36.0.in to double
  store x86_fp80 %v4_91, x86_fp80* %st7.global-to-local, align 4
  %v2_f0 = load i32, i32* %edi.global-to-local, align 4
  %v3_f0 = add i32 %v2_f0, -72
  %v4_f0 = inttoptr i32 %v3_f0 to double*
  %v5_f0 = load double, double* %v4_f0, align 4
  %v6_f0 = fpext double %v5_f0 to x86_fp80
  %v7_f0 = fmul x86_fp80 %v4_91, %v6_f0
  %v2_f3 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_f0)
  %v3_f3 = fcmp olt x86_fp80 %v2_f3, 0xK403E8000000000000000
  %v4_f3 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_f0)
  %storemerge22 = select i1 %v3_f3, x86_fp80 %v4_f3, x86_fp80 %v7_f0
  store x86_fp80 %storemerge22, x86_fp80* %st7.global-to-local, align 4
  %v0_f7 = call i32 @__asm_wait()
  %v0_f8 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_f8 = call i16 @__asm_fnstsw(i32 %v0_f8)
  %tmp286 = and i16 %v1_f8, 256
  %v16_fa = icmp ne i16 %tmp286, 0
  %v1_fc = icmp eq i1 %v16_fa, false
  %v1_108 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_fc, label %dec_label_pc_108, label %dec_label_pc_fe

dec_label_pc_fe:                                  ; preds = %dec_label_pc_ec
  %v7_fe = fsub x86_fp80 %stack_var_-36.0.in, %v1_108
  store x86_fp80 %v7_fe, x86_fp80* %st7.global-to-local, align 4
  %v4_102 = fptrunc x86_fp80 %v7_fe to double
  br label %dec_label_pc_110

dec_label_pc_108:                                 ; preds = %dec_label_pc_ec
  %v6_108 = fpext double %stack_var_-28.0 to x86_fp80
  %v7_108 = fadd x86_fp80 %v1_108, %v6_108
  store x86_fp80 %v7_108, x86_fp80* %st7.global-to-local, align 4
  %v4_10c = fptrunc x86_fp80 %v7_108 to double
  br label %dec_label_pc_110

dec_label_pc_110:                                 ; preds = %dec_label_pc_108, %dec_label_pc_fe
  %stack_var_-28.1 = phi double [ %v4_10c, %dec_label_pc_108 ], [ %stack_var_-28.0, %dec_label_pc_fe ]
  %stack_var_-36.1 = phi double [ %stack_var_-36.0, %dec_label_pc_108 ], [ %v4_102, %dec_label_pc_fe ]
  store x86_fp80 %v4_6b, x86_fp80* %st7.global-to-local, align 4
  %v2_114 = load i32, i32* %edi.global-to-local, align 4
  %v3_114 = add i32 %v2_114, -72
  %v4_114 = inttoptr i32 %v3_114 to double*
  %v5_114 = load double, double* %v4_114, align 4
  %v6_114 = fpext double %v5_114 to x86_fp80
  %v7_114 = fmul x86_fp80 %v4_6b, %v6_114
  %v2_117 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_114)
  %v3_117 = fcmp olt x86_fp80 %v2_117, 0xK403E8000000000000000
  %v4_117 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_114)
  %storemerge = select i1 %v3_117, x86_fp80 %v4_117, x86_fp80 %v7_114
  store x86_fp80 %storemerge, x86_fp80* %st7.global-to-local, align 4
  %v0_11b = call i32 @__asm_wait()
  %v0_11c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_11c = call i16 @__asm_fnstsw(i32 %v0_11c)
  %v2_11c = sext i16 %v1_11c to i32
  %v4_11c = and i32 %v0_11b, -65536
  %tmp282 = udiv i32 %v2_11c, 2
  %v12_11e = and i32 %tmp282, 32512
  %v2_11c.masked = and i32 %v2_11c, -65281
  %v13_11e = or i32 %v4_11c, %v2_11c.masked
  %v14_11e = or i32 %v13_11e, %v12_11e
  %v15_11e21 = and i32 %v2_11c, 256
  %v16_11e = icmp ne i32 %v15_11e21, 0
  %v1_120 = icmp eq i1 %v16_11e, false
  %v1_12c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_120, label %dec_label_pc_12c, label %dec_label_pc_122

dec_label_pc_122:                                 ; preds = %dec_label_pc_110
  %v6_122 = fpext double %stack_var_-36.1 to x86_fp80
  %v7_122 = fsub x86_fp80 %v6_122, %v1_12c
  store x86_fp80 %v7_122, x86_fp80* %st7.global-to-local, align 4
  %v4_126 = fptrunc x86_fp80 %v7_122 to double
  br label %dec_label_pc_134

dec_label_pc_12c:                                 ; preds = %dec_label_pc_110
  %v6_12c = fpext double %stack_var_-28.1 to x86_fp80
  %v7_12c = fadd x86_fp80 %v1_12c, %v6_12c
  store x86_fp80 %v7_12c, x86_fp80* %st7.global-to-local, align 4
  %v4_130 = fptrunc x86_fp80 %v7_12c to double
  br label %dec_label_pc_134

dec_label_pc_134:                                 ; preds = %dec_label_pc_12c, %dec_label_pc_122
  %stack_var_-28.2 = phi double [ %v4_130, %dec_label_pc_12c ], [ %stack_var_-28.1, %dec_label_pc_122 ]
  %stack_var_-36.2 = phi double [ %stack_var_-36.1, %dec_label_pc_12c ], [ %v4_126, %dec_label_pc_122 ]
  %v5_135 = fpext double %stack_var_-28.2 to x86_fp80
  %v2_139 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v5_135)
  %v0_13b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_13b = fpext double %stack_var_-36.2 to x86_fp80
  %v2_13f = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v5_13b)
  %v4_141 = fsub x86_fp80 %v2_13f, %v2_139
  store x86_fp80 %v4_141, x86_fp80* %st7.global-to-local, align 4
  %v1_143 = load i32, i32* %edi.global-to-local, align 4
  %v2_143 = add i32 %v1_143, -72
  %v3_143 = inttoptr i32 %v2_143 to double*
  %v4_143 = load double, double* %v3_143, align 4
  %tmp279 = call double @llvm.fabs.f64(double %v4_143)
  %v2_146 = fpext double %tmp279 to x86_fp80
  %v4_14a = fadd x86_fp80 %v2_146, 0xKBFFF8000000000000000
  %v2_14e = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_14a)
  %v4_150 = fadd x86_fp80 %v4_14a, %v2_14e
  %v4_154 = fadd x86_fp80 %v4_150, 0xK3FFF8000000000000000
  %v3_156 = inttoptr i32 %v1_143 to double*
  %v4_156 = load double, double* %v3_156, align 4
  %v5_156 = fpext double %v4_156 to x86_fp80
  %v6_156 = fmul x86_fp80 %v4_154, %v5_156
  %v2_15a = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v6_156)
  %v4_15c = fdiv x86_fp80 %v4_141, %v2_15a
  store x86_fp80 %v4_15c, x86_fp80* %st7.global-to-local, align 4
  %v1_15f = add i32 %v1_143, -76
  %v2_15f = inttoptr i32 %v1_15f to i32*
  %v3_15f = load i32, i32* %v2_15f, align 4
  %v10_15f = icmp eq i32 %v3_15f, 0
  %v1_163 = icmp eq i1 %v10_15f, false
  br i1 %v1_163, label %dec_label_pc_168, label %dec_label_pc_165

dec_label_pc_165:                                 ; preds = %dec_label_pc_134
  %v3_165 = add i32 %v1_143, -32
  %v4_165 = inttoptr i32 %v3_165 to double*
  %v5_165 = load double, double* %v4_165, align 4
  %v6_165 = fpext double %v5_165 to x86_fp80
  %v7_165 = fdiv x86_fp80 %v4_15c, %v6_165
  store x86_fp80 %v7_165, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_168

dec_label_pc_168:                                 ; preds = %dec_label_pc_165, %dec_label_pc_134
  %v1_168 = phi x86_fp80 [ %v7_165, %dec_label_pc_165 ], [ %v4_15c, %dec_label_pc_134 ]
  %v2_168 = load i32, i32* %esi.global-to-local, align 4
  %v3_168 = add i32 %v2_168, -32
  %v4_168 = fptrunc x86_fp80 %v1_168 to double
  %v5_168 = inttoptr i32 %v3_168 to double*
  store double %v4_168, double* %v5_168, align 4
  %v6_168 = add i3 %v0_13b, 1
  store i3 %v6_168, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_11e
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
