source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp316 = call double @__decompiler_undefined_function_3()
  %stack_var_-70 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-70, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_55 = load i32, i32* %edi.global-to-local, align 4
  %v1_55 = add i32 %v0_55, -44
  store i32 %v1_55, i32* %edi.global-to-local, align 4
  %v7_58 = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_58, x86_fp80* %st7.global-to-local, align 4
  %v5_5c = fpext double %tmp316 to x86_fp80
  %v3_60 = load double, double* %stack_var_-70, align 8
  %v8_60 = fpext double %v3_60 to x86_fp80
  %v3_65 = add i32 %v0_55, -104
  %v4_65 = inttoptr i32 %v3_65 to float*
  %v5_65 = load float, float* %v4_65, align 4
  %v6_65 = fpext float %v5_65 to x86_fp80
  %v7_65 = fmul x86_fp80 %v8_60, %v6_65
  %v3_6a = add i32 %v0_55, -108
  %v4_6a = inttoptr i32 %v3_6a to float*
  %v5_6a = load float, float* %v4_6a, align 4
  %v6_6a = fpext float %v5_6a to x86_fp80
  %v7_6a = fmul x86_fp80 %v5_5c, %v6_6a
  %v4_6d = fadd x86_fp80 %v7_65, %v7_6a
  %v3_71 = add i32 %v0_55, -112
  %v4_71 = inttoptr i32 %v3_71 to float*
  %v5_71 = load float, float* %v4_71, align 4
  %v6_71 = fpext float %v5_71 to x86_fp80
  %v7_71 = fmul x86_fp80 %v7_58, %v6_71
  %v4_74 = fadd x86_fp80 %v7_71, %v4_6d
  %v3_78 = add i32 %v0_55, -80
  %v4_78 = inttoptr i32 %v3_78 to float*
  %v5_78 = load float, float* %v4_78, align 4
  %v6_78 = fpext float %v5_78 to x86_fp80
  %v7_78 = fmul x86_fp80 %v8_60, %v6_78
  %v3_7d = add i32 %v0_55, -84
  %v4_7d = inttoptr i32 %v3_7d to float*
  %v5_7d = load float, float* %v4_7d, align 4
  %v6_7d = fpext float %v5_7d to x86_fp80
  %v7_7d = fmul x86_fp80 %v5_5c, %v6_7d
  %v4_80 = fadd x86_fp80 %v7_78, %v7_7d
  %v3_84 = add i32 %v0_55, -88
  %v4_84 = inttoptr i32 %v3_84 to float*
  %v5_84 = load float, float* %v4_84, align 4
  %v6_84 = fpext float %v5_84 to x86_fp80
  %v7_84 = fmul x86_fp80 %v7_58, %v6_84
  %v4_87 = fadd x86_fp80 %v4_80, %v7_84
  %v3_8b = add i32 %v0_55, -92
  %v4_8b = inttoptr i32 %v3_8b to float*
  %v5_8b = load float, float* %v4_8b, align 4
  %v6_8b = fpext float %v5_8b to x86_fp80
  %v7_8b = fmul x86_fp80 %v8_60, %v6_8b
  %v3_90 = add i32 %v0_55, -96
  %v4_90 = inttoptr i32 %v3_90 to float*
  %v5_90 = load float, float* %v4_90, align 4
  %v6_90 = fpext float %v5_90 to x86_fp80
  %v7_90 = fmul x86_fp80 %v5_5c, %v6_90
  %v4_93 = fadd x86_fp80 %v7_8b, %v7_90
  store x86_fp80 %v4_74, x86_fp80* %st7.global-to-local, align 4
  %v3_97 = add i32 %v0_55, -100
  %v4_97 = inttoptr i32 %v3_97 to float*
  %v5_97 = load float, float* %v4_97, align 4
  %v6_97 = fpext float %v5_97 to x86_fp80
  %v7_97 = fmul x86_fp80 %v7_58, %v6_97
  %v4_9a = fadd x86_fp80 %v4_93, %v7_97
  %tmp323 = fptrunc x86_fp80 %v4_87 to double
  store double %tmp323, double* %stack_var_-70, align 8
  %v6_9f = add i3 %v0_4b, -1
  store i32 %v0_55, i32* %edi.global-to-local, align 4
  store i3 %v6_9f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v10_ad = fmul x86_fp80 %v4_87, %v4_87
  %v7_b0 = fmul x86_fp80 %v10_ad, %v4_9a
  store x86_fp80 %v7_b0, x86_fp80* %st7.global-to-local, align 4
  %v0_b6 = call i32 @__asm_wait()
  store i32 %v0_b6, i32* %eax.global-to-local, align 4
  %v0_b7 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_b7 = call i16 @__asm_fnstsw(i32 %v0_b7)
  %v2_b7 = sext i16 %v1_b7 to i32
  %v3_b7 = load i32, i32* %eax.global-to-local, align 4
  %v4_b7 = and i32 %v3_b7, -65536
  %tmp336 = udiv i32 %v2_b7, 2
  %v12_b9 = and i32 %tmp336, 32512
  %v2_b7.masked = and i32 %v2_b7, -65281
  %v13_b9 = or i32 %v4_b7, %v2_b7.masked
  %v14_b9 = or i32 %v13_b9, %v12_b9
  store i32 %v14_b9, i32* %eax.global-to-local, align 4
  %v15_b963 = and i32 %v2_b7, 256
  %v16_b9 = icmp ne i32 %v15_b963, 0
  %v1_bb = icmp eq i1 %v16_b9, false
  %v1_c7 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_bb, label %dec_label_pc_c7, label %dec_label_pc_bd

dec_label_pc_bd:                                  ; preds = %dec_label_pc_40
  %v7_bd = fsub x86_fp80 0xK00000000000000000000, %v1_c7
  store x86_fp80 %v7_bd, x86_fp80* %st7.global-to-local, align 4
  %v4_c1 = fptrunc x86_fp80 %v7_bd to double
  br label %dec_label_pc_cf

dec_label_pc_c7:                                  ; preds = %dec_label_pc_40
  %v7_c7 = fadd x86_fp80 %v1_c7, 0xK00000000000000000000
  store x86_fp80 %v7_c7, x86_fp80* %st7.global-to-local, align 4
  %v4_cb = fptrunc x86_fp80 %v7_c7 to double
  br label %dec_label_pc_cf

dec_label_pc_cf:                                  ; preds = %dec_label_pc_c7, %dec_label_pc_bd
  %stack_var_-38.0 = phi double [ 0.000000e+00, %dec_label_pc_c7 ], [ %v4_c1, %dec_label_pc_bd ]
  %stack_var_-46.0 = phi double [ %v4_cb, %dec_label_pc_c7 ], [ 0.000000e+00, %dec_label_pc_bd ]
  %v3_cf = load double, double* %stack_var_-70, align 8
  %v8_cf = fpext double %v3_cf to x86_fp80
  %v10_d2 = fmul x86_fp80 %v8_cf, %v8_cf
  %v9_d5 = fmul x86_fp80 %v10_d2, %v4_74
  store x86_fp80 %v9_d5, x86_fp80* %st7.global-to-local, align 4
  %v0_db = call i32 @__asm_wait()
  store i32 %v0_db, i32* %eax.global-to-local, align 4
  %v0_dc = load i32, i32* %fpsw.global-to-local, align 4
  %v1_dc = call i16 @__asm_fnstsw(i32 %v0_dc)
  %v2_dc = sext i16 %v1_dc to i32
  %v3_dc = load i32, i32* %eax.global-to-local, align 4
  %v4_dc = and i32 %v3_dc, -65536
  %tmp337 = udiv i32 %v2_dc, 2
  %v12_de = and i32 %tmp337, 32512
  %v2_dc.masked = and i32 %v2_dc, -65281
  %v13_de = or i32 %v4_dc, %v2_dc.masked
  %v14_de = or i32 %v13_de, %v12_de
  store i32 %v14_de, i32* %eax.global-to-local, align 4
  %v15_de64 = and i32 %v2_dc, 256
  %v16_de = icmp ne i32 %v15_de64, 0
  %v1_e0 = icmp eq i1 %v16_de, false
  %v1_ec = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_e0, label %dec_label_pc_ec, label %dec_label_pc_e2

dec_label_pc_e2:                                  ; preds = %dec_label_pc_cf
  %v6_e2 = fpext double %stack_var_-38.0 to x86_fp80
  %v7_e2 = fsub x86_fp80 %v6_e2, %v1_ec
  store x86_fp80 %v7_e2, x86_fp80* %st7.global-to-local, align 4
  %v4_e6 = fptrunc x86_fp80 %v7_e2 to double
  br label %dec_label_pc_f4

dec_label_pc_ec:                                  ; preds = %dec_label_pc_cf
  %v6_ec = fpext double %stack_var_-46.0 to x86_fp80
  %v7_ec = fadd x86_fp80 %v1_ec, %v6_ec
  store x86_fp80 %v7_ec, x86_fp80* %st7.global-to-local, align 4
  %v4_f0 = fptrunc x86_fp80 %v7_ec to double
  br label %dec_label_pc_f4

dec_label_pc_f4:                                  ; preds = %dec_label_pc_ec, %dec_label_pc_e2
  %stack_var_-38.1 = phi double [ %stack_var_-38.0, %dec_label_pc_ec ], [ %v4_e6, %dec_label_pc_e2 ]
  %stack_var_-46.1 = phi double [ %v4_f0, %dec_label_pc_ec ], [ %stack_var_-46.0, %dec_label_pc_e2 ]
  %v7_f8 = fmul x86_fp80 %v4_9a, %v4_9a
  %v4_fc = load double, double* %stack_var_-70, align 8
  %v9_fc = fpext double %v4_fc to x86_fp80
  %v10_fc = fmul x86_fp80 %v7_f8, %v9_fc
  store x86_fp80 %v10_fc, x86_fp80* %st7.global-to-local, align 4
  %v0_101 = call i32 @__asm_wait()
  store i32 %v0_101, i32* %eax.global-to-local, align 4
  %v0_102 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_102 = call i16 @__asm_fnstsw(i32 %v0_102)
  %v2_102 = sext i16 %v1_102 to i32
  %v3_102 = load i32, i32* %eax.global-to-local, align 4
  %v4_102 = and i32 %v3_102, -65536
  %tmp338 = udiv i32 %v2_102, 2
  %v12_104 = and i32 %tmp338, 32512
  %v2_102.masked = and i32 %v2_102, -65281
  %v13_104 = or i32 %v4_102, %v2_102.masked
  %v14_104 = or i32 %v13_104, %v12_104
  store i32 %v14_104, i32* %eax.global-to-local, align 4
  %v15_10465 = and i32 %v2_102, 256
  %v16_104 = icmp ne i32 %v15_10465, 0
  %v1_106 = icmp eq i1 %v16_104, false
  %v1_112 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_106, label %dec_label_pc_112, label %dec_label_pc_108

dec_label_pc_108:                                 ; preds = %dec_label_pc_f4
  %v6_108 = fpext double %stack_var_-38.1 to x86_fp80
  %v7_108 = fsub x86_fp80 %v6_108, %v1_112
  store x86_fp80 %v7_108, x86_fp80* %st7.global-to-local, align 4
  %v4_10c = fptrunc x86_fp80 %v7_108 to double
  br label %dec_label_pc_11a

dec_label_pc_112:                                 ; preds = %dec_label_pc_f4
  %v6_112 = fpext double %stack_var_-46.1 to x86_fp80
  %v7_112 = fadd x86_fp80 %v1_112, %v6_112
  store x86_fp80 %v7_112, x86_fp80* %st7.global-to-local, align 4
  %v4_116 = fptrunc x86_fp80 %v7_112 to double
  br label %dec_label_pc_11a

dec_label_pc_11a:                                 ; preds = %dec_label_pc_112, %dec_label_pc_108
  %stack_var_-38.2 = phi double [ %stack_var_-38.1, %dec_label_pc_112 ], [ %v4_10c, %dec_label_pc_108 ]
  %stack_var_-46.2 = phi double [ %v4_116, %dec_label_pc_112 ], [ %stack_var_-46.1, %dec_label_pc_108 ]
  %v9_122 = fmul x86_fp80 %v7_f8, %v4_74
  store x86_fp80 %v9_122, x86_fp80* %st7.global-to-local, align 4
  %v0_128 = call i32 @__asm_wait()
  store i32 %v0_128, i32* %eax.global-to-local, align 4
  %v0_129 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_129 = call i16 @__asm_fnstsw(i32 %v0_129)
  %v2_129 = sext i16 %v1_129 to i32
  %v3_129 = load i32, i32* %eax.global-to-local, align 4
  %v4_129 = and i32 %v3_129, -65536
  %tmp339 = udiv i32 %v2_129, 2
  %v12_12b = and i32 %tmp339, 32512
  %v2_129.masked = and i32 %v2_129, -65281
  %v13_12b = or i32 %v4_129, %v2_129.masked
  %v14_12b = or i32 %v13_12b, %v12_12b
  store i32 %v14_12b, i32* %eax.global-to-local, align 4
  %v15_12b66 = and i32 %v2_129, 256
  %v16_12b = icmp ne i32 %v15_12b66, 0
  %v1_12d = icmp eq i1 %v16_12b, false
  %v1_139 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_12d, label %dec_label_pc_139, label %dec_label_pc_12f

dec_label_pc_12f:                                 ; preds = %dec_label_pc_11a
  %v6_12f = fpext double %stack_var_-38.2 to x86_fp80
  %v7_12f = fsub x86_fp80 %v6_12f, %v1_139
  store x86_fp80 %v7_12f, x86_fp80* %st7.global-to-local, align 4
  %v4_133 = fptrunc x86_fp80 %v7_12f to double
  br label %dec_label_pc_141

dec_label_pc_139:                                 ; preds = %dec_label_pc_11a
  %v6_139 = fpext double %stack_var_-46.2 to x86_fp80
  %v7_139 = fadd x86_fp80 %v1_139, %v6_139
  store x86_fp80 %v7_139, x86_fp80* %st7.global-to-local, align 4
  %v4_13d = fptrunc x86_fp80 %v7_139 to double
  br label %dec_label_pc_141

dec_label_pc_141:                                 ; preds = %dec_label_pc_139, %dec_label_pc_12f
  %stack_var_-38.3 = phi double [ %stack_var_-38.2, %dec_label_pc_139 ], [ %v4_133, %dec_label_pc_12f ]
  %stack_var_-46.3 = phi double [ %v4_13d, %dec_label_pc_139 ], [ %stack_var_-46.2, %dec_label_pc_12f ]
  %v9_145 = fmul x86_fp80 %v4_74, %v4_74
  %v7_149 = fmul x86_fp80 %v9_145, %v4_9a
  store x86_fp80 %v7_149, x86_fp80* %st7.global-to-local, align 4
  %v0_14f = call i32 @__asm_wait()
  store i32 %v0_14f, i32* %eax.global-to-local, align 4
  %v0_150 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_150 = call i16 @__asm_fnstsw(i32 %v0_150)
  %v2_150 = sext i16 %v1_150 to i32
  %v3_150 = load i32, i32* %eax.global-to-local, align 4
  %v4_150 = and i32 %v3_150, -65536
  %tmp340 = udiv i32 %v2_150, 2
  %v12_152 = and i32 %tmp340, 32512
  %v2_150.masked = and i32 %v2_150, -65281
  %v13_152 = or i32 %v4_150, %v2_150.masked
  %v14_152 = or i32 %v13_152, %v12_152
  store i32 %v14_152, i32* %eax.global-to-local, align 4
  %v15_15267 = and i32 %v2_150, 256
  %v16_152 = icmp ne i32 %v15_15267, 0
  %v1_154 = icmp eq i1 %v16_152, false
  %v1_160 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_154, label %dec_label_pc_160, label %dec_label_pc_156

dec_label_pc_156:                                 ; preds = %dec_label_pc_141
  %v6_156 = fpext double %stack_var_-38.3 to x86_fp80
  %v7_156 = fsub x86_fp80 %v6_156, %v1_160
  store x86_fp80 %v7_156, x86_fp80* %st7.global-to-local, align 4
  %v4_15a = fptrunc x86_fp80 %v7_156 to double
  br label %dec_label_pc_168

dec_label_pc_160:                                 ; preds = %dec_label_pc_141
  %v6_160 = fpext double %stack_var_-46.3 to x86_fp80
  %v7_160 = fadd x86_fp80 %v1_160, %v6_160
  store x86_fp80 %v7_160, x86_fp80* %st7.global-to-local, align 4
  %v4_164 = fptrunc x86_fp80 %v7_160 to double
  br label %dec_label_pc_168

dec_label_pc_168:                                 ; preds = %dec_label_pc_160, %dec_label_pc_156
  %stack_var_-38.4 = phi double [ %stack_var_-38.3, %dec_label_pc_160 ], [ %v4_15a, %dec_label_pc_156 ]
  %stack_var_-46.4 = phi double [ %v4_164, %dec_label_pc_160 ], [ %stack_var_-46.3, %dec_label_pc_156 ]
  %v4_170 = load double, double* %stack_var_-70, align 8
  %v9_170 = fpext double %v4_170 to x86_fp80
  %v10_170 = fmul x86_fp80 %v9_145, %v9_170
  store x86_fp80 %v10_170, x86_fp80* %st7.global-to-local, align 4
  %v0_175 = call i32 @__asm_wait()
  store i32 %v0_175, i32* %eax.global-to-local, align 4
  %v0_176 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_176 = call i16 @__asm_fnstsw(i32 %v0_176)
  %v2_176 = sext i16 %v1_176 to i32
  %v3_176 = load i32, i32* %eax.global-to-local, align 4
  %v4_176 = and i32 %v3_176, -65536
  %tmp341 = udiv i32 %v2_176, 2
  %v12_178 = and i32 %tmp341, 32512
  %v2_176.masked = and i32 %v2_176, -65281
  %v13_178 = or i32 %v4_176, %v2_176.masked
  %v14_178 = or i32 %v13_178, %v12_178
  store i32 %v14_178, i32* %eax.global-to-local, align 4
  %v15_17868 = and i32 %v2_176, 256
  %v16_178 = icmp ne i32 %v15_17868, 0
  %v1_17a = icmp eq i1 %v16_178, false
  %v1_186 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_17a, label %dec_label_pc_186, label %dec_label_pc_17c

dec_label_pc_17c:                                 ; preds = %dec_label_pc_168
  %v6_17c = fpext double %stack_var_-38.4 to x86_fp80
  %v7_17c = fsub x86_fp80 %v6_17c, %v1_186
  store x86_fp80 %v7_17c, x86_fp80* %st7.global-to-local, align 4
  %v4_180 = fptrunc x86_fp80 %v7_17c to double
  br label %dec_label_pc_18e

dec_label_pc_186:                                 ; preds = %dec_label_pc_168
  %v6_186 = fpext double %stack_var_-46.4 to x86_fp80
  %v7_186 = fadd x86_fp80 %v1_186, %v6_186
  store x86_fp80 %v7_186, x86_fp80* %st7.global-to-local, align 4
  %v4_18a = fptrunc x86_fp80 %v7_186 to double
  br label %dec_label_pc_18e

dec_label_pc_18e:                                 ; preds = %dec_label_pc_186, %dec_label_pc_17c
  %stack_var_-38.5 = phi double [ %stack_var_-38.4, %dec_label_pc_186 ], [ %v4_180, %dec_label_pc_17c ]
  %stack_var_-46.5 = phi double [ %v4_18a, %dec_label_pc_186 ], [ %stack_var_-46.4, %dec_label_pc_17c ]
  %v5_18e = fpext double %stack_var_-46.5 to x86_fp80
  store x86_fp80 %v5_18e, x86_fp80* %st7.global-to-local, align 4
  %v2_192 = load i32, i32* %edi.global-to-local, align 4
  %v3_192 = add i32 %v2_192, -72
  %v4_192 = inttoptr i32 %v3_192 to double*
  %v5_192 = load double, double* %v4_192, align 4
  %v6_192 = fpext double %v5_192 to x86_fp80
  %v7_192 = fmul x86_fp80 %v5_18e, %v6_192
  %tmp330 = fptrunc x86_fp80 %v7_192 to double
  %v4_197 = call double @llvm.fabs.f64(double %tmp330)
  %v5_19b = fpext double %stack_var_-38.5 to x86_fp80
  store x86_fp80 %v5_19b, x86_fp80* %st7.global-to-local, align 4
  %v5_19f = load double, double* %v4_192, align 4
  %v6_19f = fpext double %v5_19f to x86_fp80
  %v7_19f = fmul x86_fp80 %v5_19b, %v6_19f
  %tmp331 = fptrunc x86_fp80 %v7_19f to double
  %v4_1a4 = call double @llvm.fabs.f64(double %tmp331)
  %v3_1aa = load double, double* %stack_var_-70, align 8
  %v8_1aa = fpext double %v3_1aa to x86_fp80
  %v7_1ad = fmul x86_fp80 %v4_9a, %v8_1aa
  %v3_1b1 = fadd x86_fp80 %v7_1ad, %v7_1ad
  store x86_fp80 %v3_1b1, x86_fp80* %st7.global-to-local, align 4
  %v0_1b5 = call i32 @__asm_wait()
  store i32 %v0_1b5, i32* %eax.global-to-local, align 4
  %v0_1b6 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1b6 = call i16 @__asm_fnstsw(i32 %v0_1b6)
  %v2_1b6 = sext i16 %v1_1b6 to i32
  %v3_1b6 = load i32, i32* %eax.global-to-local, align 4
  %v4_1b6 = and i32 %v3_1b6, -65536
  %tmp342 = udiv i32 %v2_1b6, 2
  %v12_1b8 = and i32 %tmp342, 32512
  %v2_1b6.masked = and i32 %v2_1b6, -65281
  %v13_1b8 = or i32 %v4_1b6, %v2_1b6.masked
  %v14_1b8 = or i32 %v13_1b8, %v12_1b8
  store i32 %v14_1b8, i32* %eax.global-to-local, align 4
  %v15_1b869 = and i32 %v2_1b6, 256
  %v16_1b8 = icmp ne i32 %v15_1b869, 0
  %v1_1ba = icmp eq i1 %v16_1b8, false
  %v1_1c6 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_1ba, label %dec_label_pc_1c6, label %dec_label_pc_1bc

dec_label_pc_1bc:                                 ; preds = %dec_label_pc_18e
  %v6_1bc = fpext double %v4_197 to x86_fp80
  %v7_1bc = fsub x86_fp80 %v6_1bc, %v1_1c6
  store x86_fp80 %v7_1bc, x86_fp80* %st7.global-to-local, align 4
  %v4_1c0 = fptrunc x86_fp80 %v7_1bc to double
  br label %dec_label_pc_1ce

dec_label_pc_1c6:                                 ; preds = %dec_label_pc_18e
  %v6_1c6 = fpext double %v4_1a4 to x86_fp80
  %v7_1c6 = fadd x86_fp80 %v1_1c6, %v6_1c6
  store x86_fp80 %v7_1c6, x86_fp80* %st7.global-to-local, align 4
  %v4_1ca = fptrunc x86_fp80 %v7_1c6 to double
  br label %dec_label_pc_1ce

dec_label_pc_1ce:                                 ; preds = %dec_label_pc_1c6, %dec_label_pc_1bc
  %stack_var_-38.6 = phi double [ %v4_1ca, %dec_label_pc_1c6 ], [ %v4_1a4, %dec_label_pc_1bc ]
  %stack_var_-46.6 = phi double [ %v4_197, %dec_label_pc_1c6 ], [ %v4_1c0, %dec_label_pc_1bc ]
  %v3_1ce = load double, double* %stack_var_-70, align 8
  %v8_1ce = fpext double %v3_1ce to x86_fp80
  %v9_1d1 = fmul x86_fp80 %v4_74, %v8_1ce
  %v3_1d5 = fadd x86_fp80 %v9_1d1, %v9_1d1
  store x86_fp80 %v3_1d5, x86_fp80* %st7.global-to-local, align 4
  %v0_1d9 = call i32 @__asm_wait()
  store i32 %v0_1d9, i32* %eax.global-to-local, align 4
  %v0_1da = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1da = call i16 @__asm_fnstsw(i32 %v0_1da)
  %v2_1da = sext i16 %v1_1da to i32
  %v3_1da = load i32, i32* %eax.global-to-local, align 4
  %v4_1da = and i32 %v3_1da, -65536
  %tmp343 = udiv i32 %v2_1da, 2
  %v12_1dc = and i32 %tmp343, 32512
  %v2_1da.masked = and i32 %v2_1da, -65281
  %v13_1dc = or i32 %v4_1da, %v2_1da.masked
  %v14_1dc = or i32 %v13_1dc, %v12_1dc
  store i32 %v14_1dc, i32* %eax.global-to-local, align 4
  %v15_1dc70 = and i32 %v2_1da, 256
  %v16_1dc = icmp ne i32 %v15_1dc70, 0
  %v1_1de = icmp eq i1 %v16_1dc, false
  %v1_1ea = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_1de, label %dec_label_pc_1ea, label %dec_label_pc_1e0

dec_label_pc_1e0:                                 ; preds = %dec_label_pc_1ce
  %v6_1e0 = fpext double %stack_var_-46.6 to x86_fp80
  %v7_1e0 = fsub x86_fp80 %v6_1e0, %v1_1ea
  store x86_fp80 %v7_1e0, x86_fp80* %st7.global-to-local, align 4
  %v4_1e4 = fptrunc x86_fp80 %v7_1e0 to double
  br label %dec_label_pc_1f2

dec_label_pc_1ea:                                 ; preds = %dec_label_pc_1ce
  %v6_1ea = fpext double %stack_var_-38.6 to x86_fp80
  %v7_1ea = fadd x86_fp80 %v1_1ea, %v6_1ea
  store x86_fp80 %v7_1ea, x86_fp80* %st7.global-to-local, align 4
  %v4_1ee = fptrunc x86_fp80 %v7_1ea to double
  br label %dec_label_pc_1f2

dec_label_pc_1f2:                                 ; preds = %dec_label_pc_1ea, %dec_label_pc_1e0
  %stack_var_-38.7 = phi double [ %v4_1ee, %dec_label_pc_1ea ], [ %stack_var_-38.6, %dec_label_pc_1e0 ]
  %stack_var_-46.7 = phi double [ %stack_var_-46.6, %dec_label_pc_1ea ], [ %v4_1e4, %dec_label_pc_1e0 ]
  %v9_1f6 = fmul x86_fp80 %v4_74, %v4_9a
  %v3_1fa = fadd x86_fp80 %v9_1f6, %v9_1f6
  store x86_fp80 %v3_1fa, x86_fp80* %st7.global-to-local, align 4
  %v0_1fe = call i32 @__asm_wait()
  store i32 %v0_1fe, i32* %eax.global-to-local, align 4
  %v0_1ff = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1ff = call i16 @__asm_fnstsw(i32 %v0_1ff)
  %v2_1ff = sext i16 %v1_1ff to i32
  %v3_1ff = load i32, i32* %eax.global-to-local, align 4
  %v4_1ff = and i32 %v3_1ff, -65536
  %tmp344 = udiv i32 %v2_1ff, 2
  %v12_201 = and i32 %tmp344, 32512
  %v2_1ff.masked = and i32 %v2_1ff, -65281
  %v13_201 = or i32 %v4_1ff, %v2_1ff.masked
  %v14_201 = or i32 %v13_201, %v12_201
  store i32 %v14_201, i32* %eax.global-to-local, align 4
  %v15_20171 = and i32 %v2_1ff, 256
  %v16_201 = icmp ne i32 %v15_20171, 0
  %v1_203 = icmp eq i1 %v16_201, false
  %v1_20f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_203, label %dec_label_pc_20f, label %dec_label_pc_205

dec_label_pc_205:                                 ; preds = %dec_label_pc_1f2
  %v6_205 = fpext double %stack_var_-46.7 to x86_fp80
  %v7_205 = fsub x86_fp80 %v6_205, %v1_20f
  store x86_fp80 %v7_205, x86_fp80* %st7.global-to-local, align 4
  %v4_209 = fptrunc x86_fp80 %v7_205 to double
  br label %dec_label_pc_217

dec_label_pc_20f:                                 ; preds = %dec_label_pc_1f2
  %v6_20f = fpext double %stack_var_-38.7 to x86_fp80
  %v7_20f = fadd x86_fp80 %v1_20f, %v6_20f
  store x86_fp80 %v7_20f, x86_fp80* %st7.global-to-local, align 4
  %v4_213 = fptrunc x86_fp80 %v7_20f to double
  br label %dec_label_pc_217

dec_label_pc_217:                                 ; preds = %dec_label_pc_20f, %dec_label_pc_205
  %stack_var_-38.8 = phi double [ %v4_213, %dec_label_pc_20f ], [ %stack_var_-38.7, %dec_label_pc_205 ]
  %stack_var_-46.8 = phi double [ %stack_var_-46.7, %dec_label_pc_20f ], [ %v4_209, %dec_label_pc_205 ]
  %v5_219 = fpext double %stack_var_-46.8 to x86_fp80
  %v2_21d = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v5_219)
  %v2_21f = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_21d)
  %v0_221 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_221 = fpext double %stack_var_-38.8 to x86_fp80
  %v6_221 = add i3 %v0_221, -1
  %v2_225 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v5_221)
  %v2_227 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_225)
  %v4_22b = fsub x86_fp80 %v2_21f, %v2_227
  store x86_fp80 %v4_22b, x86_fp80* %st7.global-to-local, align 4
  %v2_22d = load i32, i32* %edi.global-to-local, align 4
  %v3_22d = inttoptr i32 %v2_22d to double*
  %v4_22d = load double, double* %v3_22d, align 4
  %v5_22d = fpext double %v4_22d to x86_fp80
  %v6_22d = fmul x86_fp80 %v4_22b, %v5_22d
  store x86_fp80 %v6_22d, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_221, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_24b = call i32 @__asm_wait()
  store i32 %v0_24b, i32* %eax.global-to-local, align 4
  %v0_24c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_24c = call i16 @__asm_fnstsw(i32 %v0_24c)
  %v2_24c = sext i16 %v1_24c to i32
  %v3_24c = load i32, i32* %eax.global-to-local, align 4
  %v4_24c = and i32 %v3_24c, -65536
  %tmp335 = udiv i32 %v2_24c, 2
  %v12_24e = and i32 %tmp335, 32512
  %v2_24c.masked = and i32 %v2_24c, -65281
  %v13_24e = or i32 %v4_24c, %v2_24c.masked
  %v14_24e = or i32 %v13_24e, %v12_24e
  store i32 %v14_24e, i32* %eax.global-to-local, align 4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_258 = load i32, i32* %edi.global-to-local, align 4
  %v1_258 = add i32 %v0_258, -76
  %v2_258 = inttoptr i32 %v1_258 to i32*
  %v3_258 = load i32, i32* %v2_258, align 4
  %v10_258 = icmp eq i32 %v3_258, 0
  %v1_25c = icmp eq i1 %v10_258, false
  %v1_261.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_25c, label %dec_label_pc_261, label %dec_label_pc_25e

dec_label_pc_25e:                                 ; preds = %dec_label_pc_217
  %v3_25e = add i32 %v0_258, -32
  %v4_25e = inttoptr i32 %v3_25e to double*
  %v5_25e = load double, double* %v4_25e, align 4
  %v6_25e = fpext double %v5_25e to x86_fp80
  %v7_25e = fdiv x86_fp80 %v1_261.pre, %v6_25e
  store x86_fp80 %v7_25e, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_261

dec_label_pc_261:                                 ; preds = %dec_label_pc_217, %dec_label_pc_25e
  %v1_261 = phi x86_fp80 [ %v7_25e, %dec_label_pc_25e ], [ %v1_261.pre, %dec_label_pc_217 ]
  %v2_261 = load i32, i32* %esi.global-to-local, align 4
  %v3_261 = add i32 %v2_261, -32
  %v4_261 = fptrunc x86_fp80 %v1_261 to double
  %v5_261 = inttoptr i32 %v3_261 to double*
  store double %v4_261, double* %v5_261, align 4
  %v6_261 = add i3 %storemerge.in, 2
  store i3 %v6_261, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_24e
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
