source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8
@global_var_1.1 = constant i8 -117

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebp.global-to-local = alloca i32, align 4
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_0 = load i32, i32* %ebp.global-to-local, align 4
  %v0_9 = load i32, i32* %ebx.global-to-local, align 4
  %v0_a = load i32, i32* %esi.global-to-local, align 4
  %v0_b = load i32, i32* %edi.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_f = add i32 %arg1, 48
  %v2_f = inttoptr i32 %v1_f to i32*
  %v3_f = load i32, i32* %v2_f, align 4
  store i32 %v3_f, i32* %edi.global-to-local, align 4
  %v0_12 = load i32, i32* @eax, align 8
  store i32 %v0_12, i32* %ebx.global-to-local, align 4
  %v1_16 = add i32 %v3_f, -20
  %v2_16 = inttoptr i32 %v1_16 to i32*
  %v3_16 = load i32, i32* %v2_16, align 4
  %v5_1c = icmp sgt i32 %v3_16, 16
  %v6_23 = icmp slt i32 %v3_16, sext (i8 ptrtoint (i8* @global_var_1.1 to i8) to i32)
  %or.cond = or i1 %v5_1c, %v6_23
  %spec.store.select = select i1 %or.cond, i32 2, i32 %v3_16
  store i32 %spec.store.select, i32* @eax, align 8
  %v0_2b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_2b = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_2b = fpext double %v3_2b to x86_fp80
  %v5_2b = sub i3 %v0_2b, ptrtoint (i8* @global_var_1.1 to i3)
  %v3_31 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_31 = fpext double %v3_31 to x86_fp80
  %v3_37 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_37 = fpext double %v3_37 to x86_fp80
  store x86_fp80 %v4_37, x86_fp80* %st7.global-to-local, align 4
  %tmp262 = bitcast double %v3_37 to i64
  %tmp263 = trunc i64 %tmp262 to i32
  %v2_3d = add i32 %tmp263, 8
  %v3_3d = inttoptr i32 %v2_3d to double*
  %v4_3d = load double, double* %v3_3d, align 4
  %v5_3d = fpext double %v4_3d to x86_fp80
  store x86_fp80 %v5_3d, x86_fp80* %st7.global-to-local, align 4
  %v3_40 = add i32 %v3_f, -16
  %v4_40 = inttoptr i32 %v3_40 to double*
  %v5_40 = load double, double* %v4_40, align 4
  %v6_40 = fpext double %v5_40 to x86_fp80
  %v7_40 = fadd x86_fp80 %v5_3d, %v6_40
  store x86_fp80 %v7_40, x86_fp80* %st7.global-to-local, align 4
  %v1_47 = add i32 %v3_f, -24
  %v2_47 = inttoptr i32 %v1_47 to i32*
  %v3_47 = load i32, i32* %v2_47, align 4
  %v10_47 = icmp eq i32 %v3_47, 0
  %v1_4b = icmp eq i1 %v10_47, false
  %tmp264 = bitcast double %v3_2b to i64
  %tmp265 = trunc i64 %tmp264 to i32
  br i1 %v1_4b, label %dec_label_pc_75, label %dec_label_pc_4d

dec_label_pc_4d:                                  ; preds = %dec_label_pc_0
  %v3_4f = fmul x86_fp80 %v4_2b, %v4_2b
  %v5_51 = sub i3 %v5_2b, ptrtoint (i8* @global_var_1.1 to i3)
  %v3_53 = fmul x86_fp80 %v4_31, %v4_31
  %v4_55 = fadd x86_fp80 %v3_4f, %v3_53
  store x86_fp80 %v4_55, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v3_53, x86_fp80* %st5.global-to-local, align 4
  %v4_5f = fsub x86_fp80 %v3_4f, %v3_53
  %v4_61 = fdiv x86_fp80 %v4_5f, %v4_55
  store i3 %v5_51, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_68 = fmul x86_fp80 %v4_2b, %v4_31
  store x86_fp80 %v6_68, x86_fp80* %st6.global-to-local, align 4
  %v4_6a = fdiv x86_fp80 %v6_68, %v4_55
  br label %dec_label_pc_9f

dec_label_pc_75:                                  ; preds = %dec_label_pc_0
  %v2_75 = add i32 %arg1, 24
  %v3_75 = inttoptr i32 %v2_75 to double*
  %v4_75 = load double, double* %v3_75, align 4
  %v5_75 = fpext double %v4_75 to x86_fp80
  %v3_78 = fmul x86_fp80 %v5_75, %v5_75
  store x86_fp80 %v3_78, x86_fp80* %st7.global-to-local, align 4
  %v2_7a = add i32 %arg1, 32
  %v3_7a = inttoptr i32 %v2_7a to double*
  %v4_7a = load double, double* %v3_7a, align 4
  %v5_7a = fpext double %v4_7a to x86_fp80
  %v6_7a = sub i3 %v5_2b, ptrtoint (i8* @global_var_1.1 to i3)
  %v3_7d = fmul x86_fp80 %v5_7a, %v5_7a
  store x86_fp80 %v3_7d, x86_fp80* %st6.global-to-local, align 4
  %v4_7f = fadd x86_fp80 %v3_78, %v3_7d
  store x86_fp80 %v4_7f, x86_fp80* %st7.global-to-local, align 4
  %v4_81 = load double, double* %v3_75, align 4
  %v5_81 = fpext double %v4_81 to x86_fp80
  %v3_84 = fmul x86_fp80 %v5_81, %v5_81
  store x86_fp80 %v3_84, x86_fp80* %st6.global-to-local, align 4
  %v4_86 = load double, double* %v3_7a, align 4
  %v5_86 = fpext double %v4_86 to x86_fp80
  %v3_89 = fmul x86_fp80 %v5_86, %v5_86
  store x86_fp80 %v3_89, x86_fp80* %st5.global-to-local, align 4
  %v4_8b = fsub x86_fp80 %v3_84, %v3_89
  %v4_8d = fdiv x86_fp80 %v4_8b, %v4_7f
  store x86_fp80 %v4_8d, x86_fp80* %st6.global-to-local, align 4
  %v4_92 = load double, double* %v3_75, align 4
  %v5_92 = fpext double %v4_92 to x86_fp80
  store i3 %v6_7a, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_92, x86_fp80* %st6.global-to-local, align 4
  %v5_95 = load double, double* %v3_7a, align 4
  %v6_95 = fpext double %v5_95 to x86_fp80
  %v7_95 = fmul x86_fp80 %v5_92, %v6_95
  store x86_fp80 %v7_95, x86_fp80* %st6.global-to-local, align 4
  %v4_98 = fdiv x86_fp80 %v7_95, %v4_7f
  br label %dec_label_pc_9f

dec_label_pc_9f:                                  ; preds = %dec_label_pc_75, %dec_label_pc_4d
  %storemerge.in = phi i3 [ %v5_51, %dec_label_pc_4d ], [ %v6_7a, %dec_label_pc_75 ]
  %storemerge6 = phi x86_fp80 [ %v4_6a, %dec_label_pc_4d ], [ %v4_98, %dec_label_pc_75 ]
  %stack_var_-44.0.in = phi x86_fp80 [ %v4_61, %dec_label_pc_4d ], [ %v4_8d, %dec_label_pc_75 ]
  store x86_fp80 %storemerge6, x86_fp80* %st6.global-to-local, align 4
  %storemerge = add i3 %storemerge.in, add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3))
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_9f = add i32 %tmp265, -1
  store i32 %v1_9f, i32* @eax, align 8
  br label %dec_label_pc_a1

dec_label_pc_a1:                                  ; preds = %dec_label_pc_154, %dec_label_pc_9f
  %v0_a1 = phi i32 [ %v1_9f, %dec_label_pc_9f ], [ %tmp269, %dec_label_pc_154 ]
  %v6_15d7 = phi i3 [ %storemerge, %dec_label_pc_9f ], [ %v6_15d, %dec_label_pc_154 ]
  %stack_var_-12.0 = phi double [ %v3_2b, %dec_label_pc_9f ], [ %v4_15d, %dec_label_pc_154 ]
  %stack_var_-20.0 = phi double [ %v3_31, %dec_label_pc_9f ], [ %v4_15a, %dec_label_pc_154 ]
  %stack_var_-28.0 = phi double [ %v3_37, %dec_label_pc_9f ], [ %v4_157, %dec_label_pc_154 ]
  %stack_var_-36.0.in = phi x86_fp80 [ %v7_40, %dec_label_pc_9f ], [ %v4_147, %dec_label_pc_154 ]
  %v1_a1 = add i32 %v0_a1, -1
  store i32 %v1_a1, i32* @eax, align 8
  %v5_a2 = fpext double %stack_var_-12.0 to x86_fp80
  %v4_a5 = load double, double* bitcast (i32* @eax to double*), align 8
  %v5_a5 = fpext double %v4_a5 to x86_fp80
  %v6_a5 = fmul x86_fp80 %v5_a2, %v5_a5
  %v5_a7 = fpext double %stack_var_-20.0 to x86_fp80
  %v6_aa = fmul x86_fp80 %v4_31, %v5_a7
  %v4_ac = fsub x86_fp80 %v6_a5, %v6_aa
  %v6_b1 = fpext double %stack_var_-28.0 to x86_fp80
  %v7_b1 = fmul x86_fp80 %stack_var_-44.0.in, %v6_b1
  %v6_b4 = fmul x86_fp80 %v7_b1, %v4_37
  %v4_b6 = fsub x86_fp80 %v4_ac, %v6_b4
  store x86_fp80 %v4_b6, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v6_b1, x86_fp80* %st6.global-to-local, align 4
  %v5_bb = load double, double* %v3_3d, align 4
  %v6_bb = fpext double %v5_bb to x86_fp80
  %v7_bb = fmul x86_fp80 %v6_b1, %v6_bb
  %v6_c1 = fmul x86_fp80 %stack_var_-36.0.in, %v4_37
  store x86_fp80 %v6_c1, x86_fp80* %st5.global-to-local, align 4
  %v4_c3 = fadd x86_fp80 %v6_c1, %v7_bb
  %v11_c5 = fmul x86_fp80 %v4_c3, %storemerge6
  %v4_c8 = fadd x86_fp80 %v4_b6, %v11_c5
  store x86_fp80 %v4_c8, x86_fp80* %st7.global-to-local, align 4
  %v7_cd = fmul x86_fp80 %stack_var_-44.0.in, %stack_var_-36.0.in
  store x86_fp80 %v7_cd, x86_fp80* %st6.global-to-local, align 4
  %v5_d0 = load double, double* %v3_3d, align 4
  %v6_d0 = fpext double %v5_d0 to x86_fp80
  %v7_d0 = fmul x86_fp80 %v7_cd, %v6_d0
  %v4_d3 = fadd x86_fp80 %v4_c8, %v7_d0
  store x86_fp80 %v4_d3, x86_fp80* %st7.global-to-local, align 4
  %v6_da = fmul x86_fp80 %v4_31, %v5_a2
  %v6_e0 = fmul x86_fp80 %v5_a7, %v5_a5
  %v4_e2 = fadd x86_fp80 %v6_da, %v6_e0
  %v7_e7 = fmul x86_fp80 %storemerge6, %v6_b1
  %v6_ea = fmul x86_fp80 %v7_e7, %v4_37
  %v4_ec = fsub x86_fp80 %v4_e2, %v6_ea
  store x86_fp80 %v4_ec, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v6_b1, x86_fp80* %st5.global-to-local, align 4
  %v5_f1 = load double, double* %v3_3d, align 4
  %v6_f1 = fpext double %v5_f1 to x86_fp80
  %v7_f1 = fmul x86_fp80 %v6_b1, %v6_f1
  %v4_f9 = fadd x86_fp80 %v6_c1, %v7_f1
  %v7_fb = fmul x86_fp80 %v4_f9, %stack_var_-44.0.in
  %v4_fe = fsub x86_fp80 %v4_ec, %v7_fb
  store x86_fp80 %v4_fe, x86_fp80* %st6.global-to-local, align 4
  %v7_103 = fmul x86_fp80 %storemerge6, %stack_var_-36.0.in
  store x86_fp80 %v7_103, x86_fp80* %st5.global-to-local, align 4
  %v5_106 = load double, double* %v3_3d, align 4
  %v6_106 = fpext double %v5_106 to x86_fp80
  %v7_106 = fmul x86_fp80 %v7_103, %v6_106
  %v4_109 = fadd x86_fp80 %v7_106, %v4_fe
  store x86_fp80 %v4_109, x86_fp80* %st6.global-to-local, align 4
  %v6_110 = fmul x86_fp80 %v5_a2, %v4_37
  %v6_116 = fmul x86_fp80 %v6_b1, %v5_a5
  %v4_118 = fadd x86_fp80 %v6_116, %v6_110
  store x86_fp80 %v4_118, x86_fp80* %st5.global-to-local, align 4
  %v5_11d = load double, double* %v3_3d, align 4
  %v6_11d = fpext double %v5_11d to x86_fp80
  %v7_11d = fmul x86_fp80 %v5_a7, %v6_11d
  %v4_120 = fsub x86_fp80 %v4_118, %v7_11d
  %v6_125 = fmul x86_fp80 %stack_var_-36.0.in, %v4_31
  %v4_128 = fsub x86_fp80 %v4_120, %v6_125
  store x86_fp80 %v4_128, x86_fp80* %st5.global-to-local, align 4
  %v5_12f = load double, double* %v3_3d, align 4
  %v6_12f = fpext double %v5_12f to x86_fp80
  %v7_12f = fmul x86_fp80 %v5_a2, %v6_12f
  %v6_135 = fmul x86_fp80 %stack_var_-36.0.in, %v5_a5
  %v4_137 = fadd x86_fp80 %v7_12f, %v6_135
  %v6_13c = fmul x86_fp80 %v5_a7, %v4_37
  %v4_13f = fadd x86_fp80 %v6_13c, %v4_137
  %v6_144 = fmul x86_fp80 %v6_b1, %v4_31
  %v4_147 = fadd x86_fp80 %v6_144, %v4_13f
  %tmp268 = bitcast double %v4_a5 to i64
  %tmp269 = trunc i64 %tmp268 to i32
  %v7_14e = icmp sgt i32 %tmp269, 0
  br i1 %v7_14e, label %dec_label_pc_154, label %dec_label_pc_165

dec_label_pc_154:                                 ; preds = %dec_label_pc_a1
  %v4_157 = fptrunc x86_fp80 %v4_128 to double
  %v4_15a = fptrunc x86_fp80 %v4_109 to double
  %v4_15d = fptrunc x86_fp80 %v4_d3 to double
  %v6_15d = add i3 %v6_15d7, add (i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 -1)))))), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 -4))
  br label %dec_label_pc_a1

dec_label_pc_165:                                 ; preds = %dec_label_pc_a1
  %v3_167 = add i32 %arg1, -56
  %v4_167 = inttoptr i32 %v3_167 to double*
  %v5_167 = load double, double* %v4_167, align 4
  %v6_167 = fpext double %v5_167 to x86_fp80
  %v7_167 = fadd x86_fp80 %v4_147, %v6_167
  %v4_16a = fptrunc x86_fp80 %v7_167 to double
  store double %v4_16a, double* %v3_3d, align 4
  %v1_16d = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_16d = add i32 %arg1, 40
  %v4_16d = inttoptr i32 %v3_16d to double*
  %v5_16d = load double, double* %v4_16d, align 4
  %v6_16d = fpext double %v5_16d to x86_fp80
  %v7_16d = fadd x86_fp80 %v1_16d, %v6_16d
  store x86_fp80 %v7_16d, x86_fp80* %st5.global-to-local, align 4
  %v2_170 = load i32, i32* @ecx, align 8
  %v3_170 = fptrunc x86_fp80 %v7_16d to double
  %v4_170 = inttoptr i32 %v2_170 to double*
  store double %v3_170, double* %v4_170, align 4
  %v1_172 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_172 = add i32 %arg1, 32
  %v4_172 = inttoptr i32 %v3_172 to double*
  %v5_172 = load double, double* %v4_172, align 4
  %v6_172 = fpext double %v5_172 to x86_fp80
  %v7_172 = fadd x86_fp80 %v1_172, %v6_172
  store x86_fp80 %v7_172, x86_fp80* %st6.global-to-local, align 4
  %v2_175 = load i32, i32* @edx, align 8
  %v3_175 = fptrunc x86_fp80 %v7_172 to double
  %v4_175 = inttoptr i32 %v2_175 to double*
  store double %v3_175, double* %v4_175, align 4
  %v1_177 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_177 = add i32 %arg1, 24
  %v4_177 = inttoptr i32 %v3_177 to double*
  %v5_177 = load double, double* %v4_177, align 4
  %v6_177 = fpext double %v5_177 to x86_fp80
  %v7_177 = fadd x86_fp80 %v1_177, %v6_177
  store x86_fp80 %v7_177, x86_fp80* %st7.global-to-local, align 4
  %v3_17a = fptrunc x86_fp80 %v7_177 to double
  %v4_17a = inttoptr i32 %v0_12 to double*
  store double %v3_17a, double* %v4_17a, align 4
  %v5_17a = add i3 %v6_15d7, add (i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 -1)))))), i3 -3)
  store i3 %v5_17a, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_12, i32* @eax, align 8
  store i32 %v0_b, i32* %edi.global-to-local, align 4
  store i32 %v0_a, i32* %esi.global-to-local, align 4
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  store i32 %v0_0, i32* %ebp.global-to-local, align 4
  ret i32 %v0_12
}

define i32 @function_18a() local_unnamed_addr {
dec_label_pc_18a:
  store i32 8, i32* @eax, align 8
  ret i32 8
}
