source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp256 = call double @__decompiler_undefined_function_2()
  %stack_var_-52 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -68
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-52, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i32, i32* %edi.global-to-local, align 4
  %v1_4b = add i32 %v0_4b, -44
  store i32 %v1_4b, i32* %edi.global-to-local, align 4
  %v0_4e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4e = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_4e, x86_fp80* %st7.global-to-local, align 4
  %v5_52 = fpext double %tmp256 to x86_fp80
  %v3_56 = load double, double* %stack_var_-52, align 8
  %v8_56 = fpext double %v3_56 to x86_fp80
  %v3_5b = add i32 %v0_4b, -104
  %v4_5b = inttoptr i32 %v3_5b to float*
  %v5_5b = load float, float* %v4_5b, align 4
  %v6_5b = fpext float %v5_5b to x86_fp80
  %v7_5b = fmul x86_fp80 %v8_56, %v6_5b
  %v3_60 = add i32 %v0_4b, -108
  %v4_60 = inttoptr i32 %v3_60 to float*
  %v5_60 = load float, float* %v4_60, align 4
  %v6_60 = fpext float %v5_60 to x86_fp80
  %v7_60 = fmul x86_fp80 %v5_52, %v6_60
  %v4_63 = fadd x86_fp80 %v7_5b, %v7_60
  %v3_67 = add i32 %v0_4b, -112
  %v4_67 = inttoptr i32 %v3_67 to float*
  %v5_67 = load float, float* %v4_67, align 4
  %v6_67 = fpext float %v5_67 to x86_fp80
  %v7_67 = fmul x86_fp80 %v7_4e, %v6_67
  %v4_6a = fadd x86_fp80 %v7_67, %v4_63
  %v3_6e = add i32 %v0_4b, -80
  %v4_6e = inttoptr i32 %v3_6e to float*
  %v5_6e = load float, float* %v4_6e, align 4
  %v6_6e = fpext float %v5_6e to x86_fp80
  %v7_6e = fmul x86_fp80 %v8_56, %v6_6e
  %v3_73 = add i32 %v0_4b, -84
  %v4_73 = inttoptr i32 %v3_73 to float*
  %v5_73 = load float, float* %v4_73, align 4
  %v6_73 = fpext float %v5_73 to x86_fp80
  %v7_73 = fmul x86_fp80 %v5_52, %v6_73
  %v4_76 = fadd x86_fp80 %v7_6e, %v7_73
  %v3_7a = add i32 %v0_4b, -88
  %v4_7a = inttoptr i32 %v3_7a to float*
  %v5_7a = load float, float* %v4_7a, align 4
  %v6_7a = fpext float %v5_7a to x86_fp80
  %v7_7a = fmul x86_fp80 %v7_4e, %v6_7a
  %v4_7d = fadd x86_fp80 %v4_76, %v7_7a
  %v3_81 = add i32 %v0_4b, -92
  %v4_81 = inttoptr i32 %v3_81 to float*
  %v5_81 = load float, float* %v4_81, align 4
  %v6_81 = fpext float %v5_81 to x86_fp80
  %v7_81 = fmul x86_fp80 %v8_56, %v6_81
  %v3_86 = add i32 %v0_4b, -96
  %v4_86 = inttoptr i32 %v3_86 to float*
  %v5_86 = load float, float* %v4_86, align 4
  %v6_86 = fpext float %v5_86 to x86_fp80
  %v7_86 = fmul x86_fp80 %v5_52, %v6_86
  %v4_89 = fadd x86_fp80 %v7_81, %v7_86
  store x86_fp80 %v4_6a, x86_fp80* %st7.global-to-local, align 4
  %v3_8d = add i32 %v0_4b, -100
  %v4_8d = inttoptr i32 %v3_8d to float*
  %v5_8d = load float, float* %v4_8d, align 4
  %v6_8d = fpext float %v5_8d to x86_fp80
  %v7_8d = fmul x86_fp80 %v7_4e, %v6_8d
  %v4_90 = fadd x86_fp80 %v4_89, %v7_8d
  %tmp261 = fptrunc x86_fp80 %v4_7d to double
  store double %tmp261, double* %stack_var_-52, align 8
  store i32 %v0_4b, i32* %edi.global-to-local, align 4
  store x86_fp80 %v4_90, x86_fp80* %st7.global-to-local, align 4
  %v3_a4 = inttoptr i32 %v0_4b to double*
  %v4_a4 = load double, double* %v3_a4, align 4
  %v5_a4 = fpext double %v4_a4 to x86_fp80
  %v6_a4 = fsub x86_fp80 %v4_90, %v5_a4
  %v3_af = fmul x86_fp80 %v4_7d, %v4_7d
  %v3_b7 = fmul x86_fp80 %v4_6a, %v4_6a
  %tmp262 = fptrunc x86_fp80 %v3_b7 to double
  store double %tmp262, double* %stack_var_-52, align 8
  %v3_c0 = fmul x86_fp80 %v4_90, %v4_90
  %v4_c2 = fadd x86_fp80 %v3_b7, %v3_c0
  %v4_c4 = fadd x86_fp80 %v3_af, %v4_c2
  %v7_c4 = add i3 %v0_4e, -2
  %v2_c6 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_c4)
  store x86_fp80 %v2_c6, x86_fp80* %st7.global-to-local, align 4
  %v3_ca = fmul x86_fp80 %v6_a4, %v6_a4
  %v3_cc = fmul x86_fp80 %v3_ca, %v3_ca
  %v3_ce = add i32 %v0_4b, 8
  %v4_ce = inttoptr i32 %v3_ce to double*
  %v5_ce = load double, double* %v4_ce, align 4
  %v6_ce = fpext double %v5_ce to x86_fp80
  %v7_ce = fadd x86_fp80 %v3_cc, %v6_ce
  %v3_d4 = add i32 %v0_4b, 16
  %v4_d4 = inttoptr i32 %v3_d4 to double*
  %v5_d4 = load double, double* %v4_d4, align 4
  %v6_d4 = fpext double %v5_d4 to x86_fp80
  %v7_d4 = fmul x86_fp80 %v3_b7, %v6_d4
  %v4_d7 = fdiv x86_fp80 %v7_d4, %v7_ce
  %v10_d9 = fadd x86_fp80 %v3_af, %v4_d7
  %v2_dd = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v10_d9)
  %v2_df = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_dd)
  %v3_e1 = add i32 %v0_4b, 32
  %v4_e1 = inttoptr i32 %v3_e1 to double*
  %v5_e1 = load double, double* %v4_e1, align 4
  %v6_e1 = fpext double %v5_e1 to x86_fp80
  %v7_e1 = fmul x86_fp80 %v2_df, %v6_e1
  %v3_e8 = add i32 %v0_4b, 24
  %v4_e8 = inttoptr i32 %v3_e8 to double*
  %v5_e8 = load double, double* %v4_e8, align 4
  %v6_e8 = fpext double %v5_e8 to x86_fp80
  %v7_e8 = fmul x86_fp80 %v4_90, %v6_e8
  %v4_eb = fadd x86_fp80 %v7_e8, %v7_e1
  %v3_ef = fmul x86_fp80 %v4_eb, %v4_eb
  %v10_f1 = fadd x86_fp80 %v3_af, %v3_ef
  %v3_f8 = add i32 %v0_4b, 40
  %v4_f8 = inttoptr i32 %v3_f8 to double*
  %v5_f8 = load double, double* %v4_f8, align 4
  %v6_f8 = fpext double %v5_f8 to x86_fp80
  %v7_f8 = fmul x86_fp80 %v3_b7, %v6_f8
  %v4_fb = fadd x86_fp80 %v7_f8, %v10_f1
  %v2_fd = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_fb)
  %v4_101 = fadd x86_fp80 %v2_fd, 0xKBFFF8000000000000000
  store i3 %v7_c4, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_101, x86_fp80* %st7.global-to-local, align 4
  %v12_10a = call i32 @__asm_wait(x86_fp80 %v3_b7, x86_fp80 %v4_90, x86_fp80 %v3_af)
  %v0_10b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_10b = call i16 @__asm_fnstsw(i32 %v0_10b)
  %v2_10b = sext i16 %v1_10b to i32
  %v4_10b = and i32 %v12_10a, -65536
  %v3_10d = and i32 %v2_10b, 16640
  %v2_10b.masked = and i32 %v2_10b, -65281
  %v12_10d = or i32 %v4_10b, %v2_10b.masked
  %v13_10d = or i32 %v12_10d, %v3_10d
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_118 = load i32, i32* %edi.global-to-local, align 4
  %v1_118 = add i32 %v0_118, -68
  %v2_118 = inttoptr i32 %v1_118 to i32*
  %v3_118 = load i32, i32* %v2_118, align 4
  %v10_118 = icmp eq i32 %v3_118, 0
  %v1_11c = icmp eq i1 %v10_118, false
  %v1_121.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_11c, label %dec_label_pc_121, label %dec_label_pc_11e

dec_label_pc_11e:                                 ; preds = %dec_label_pc_40
  %v3_11e = add i32 %v0_118, -32
  %v4_11e = inttoptr i32 %v3_11e to double*
  %v5_11e = load double, double* %v4_11e, align 4
  %v6_11e = fpext double %v5_11e to x86_fp80
  %v7_11e = fdiv x86_fp80 %v1_121.pre, %v6_11e
  store x86_fp80 %v7_11e, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_121

dec_label_pc_121:                                 ; preds = %dec_label_pc_40, %dec_label_pc_11e
  %v1_121 = phi x86_fp80 [ %v7_11e, %dec_label_pc_11e ], [ %v1_121.pre, %dec_label_pc_40 ]
  %v2_121 = load i32, i32* %esi.global-to-local, align 4
  %v3_121 = add i32 %v2_121, -32
  %v4_121 = fptrunc x86_fp80 %v1_121 to double
  %v5_121 = inttoptr i32 %v3_121 to double*
  store double %v4_121, double* %v5_121, align 4
  %v2_124 = add i32 %v0_118, -16
  %v3_124 = inttoptr i32 %v2_124 to double*
  %v4_124 = load double, double* %v3_124, align 4
  %v5_124 = fpext double %v4_124 to x86_fp80
  store x86_fp80 %v5_124, x86_fp80* %st7.global-to-local, align 4
  %v2_127 = add i32 %v2_121, -24
  %v3_127 = inttoptr i32 %v2_127 to i32*
  %v4_127 = load i32, i32* %v3_127, align 4
  %v5_127 = sitofp i32 %v4_127 to x86_fp80
  %v3_12a = add i32 %v0_118, -76
  %v4_12a = inttoptr i32 %v3_12a to double*
  %v5_12a = load double, double* %v4_12a, align 4
  %v6_12a = fpext double %v5_12a to x86_fp80
  %v7_12a = fmul x86_fp80 %v5_127, %v6_12a
  %v4_12d = fadd x86_fp80 %v7_12a, %v5_124
  %v2_12f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_12d)
  store x86_fp80 %v2_12f, x86_fp80* %st7.global-to-local, align 4
  %v3_131 = add i32 %v2_121, 128
  %tmp263 = fptrunc x86_fp80 %v4_12d to double
  %v4_131 = call double @llvm.fabs.f64(double %tmp263)
  %v5_131 = inttoptr i32 %v3_131 to double*
  store double %v4_131, double* %v5_131, align 4
  %v6_131 = add i3 %storemerge.in, 2
  store i3 %v6_131, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v13_10d
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_wait(x86_fp80, x86_fp80, x86_fp80) local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_2() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
