source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st4.global-to-local = alloca x86_fp80, align 4
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %ebx.global-to-local, align 4
  %v0_4 = load i32, i32* %esi.global-to-local, align 4
  %v0_5 = load i32, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  %v0_d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_d = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_d = fpext double %v3_d to x86_fp80
  store x86_fp80 %v4_d, x86_fp80* %st7.global-to-local, align 4
  %v3_f = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_f = fpext double %v3_f to x86_fp80
  store x86_fp80 %v4_f, x86_fp80* %st6.global-to-local, align 4
  %v3_11 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_11 = fpext double %v3_11 to x86_fp80
  store x86_fp80 %v4_11, x86_fp80* %st5.global-to-local, align 4
  %v2_13 = xor i3 %v0_d, -4
  store x86_fp80 %v4_11, x86_fp80* %st4.global-to-local, align 4
  %v3_15 = add i32 %v3_a, -36
  %v4_15 = inttoptr i32 %v3_15 to float*
  %v5_15 = load float, float* %v4_15, align 4
  %v6_15 = fpext float %v5_15 to x86_fp80
  %v7_15 = fmul x86_fp80 %v4_11, %v6_15
  store x86_fp80 %v7_15, x86_fp80* %st4.global-to-local, align 4
  %v3_1a = add i32 %v3_a, -40
  %v4_1a = inttoptr i32 %v3_1a to float*
  %v5_1a = load float, float* %v4_1a, align 4
  %v6_1a = fpext float %v5_1a to x86_fp80
  %v7_1a = fmul x86_fp80 %v4_f, %v6_1a
  %v4_1d = fadd x86_fp80 %v7_15, %v7_1a
  store x86_fp80 %v4_1d, x86_fp80* %st4.global-to-local, align 4
  %v3_21 = add i32 %v3_a, -44
  %v4_21 = inttoptr i32 %v3_21 to float*
  %v5_21 = load float, float* %v4_21, align 4
  %v6_21 = fpext float %v5_21 to x86_fp80
  %v7_21 = fmul x86_fp80 %v4_d, %v6_21
  %v4_24 = fadd x86_fp80 %v4_1d, %v7_21
  %v2_26 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_24)
  store x86_fp80 %v2_26, x86_fp80* %st4.global-to-local, align 4
  %v3_2a = add i32 %v3_a, -12
  %v4_2a = inttoptr i32 %v3_2a to float*
  %v5_2a = load float, float* %v4_2a, align 4
  %v6_2a = fpext float %v5_2a to x86_fp80
  %v7_2a = fmul x86_fp80 %v4_11, %v6_2a
  %v3_2f = add i32 %v3_a, -16
  %v4_2f = inttoptr i32 %v3_2f to float*
  %v5_2f = load float, float* %v4_2f, align 4
  %v6_2f = fpext float %v5_2f to x86_fp80
  %v7_2f = fmul x86_fp80 %v4_f, %v6_2f
  %v4_32 = fadd x86_fp80 %v7_2a, %v7_2f
  %v3_36 = add i32 %v3_a, -20
  %v4_36 = inttoptr i32 %v3_36 to float*
  %v5_36 = load float, float* %v4_36, align 4
  %v6_36 = fpext float %v5_36 to x86_fp80
  %v7_36 = fmul x86_fp80 %v4_d, %v6_36
  %v4_39 = fadd x86_fp80 %v7_36, %v4_32
  %v2_3b = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_39)
  store x86_fp80 %v2_3b, x86_fp80* %st5.global-to-local, align 4
  %v3_3f = add i32 %v3_a, -24
  %v4_3f = inttoptr i32 %v3_3f to float*
  %v5_3f = load float, float* %v4_3f, align 4
  %v6_3f = fpext float %v5_3f to x86_fp80
  %v7_3f = fmul x86_fp80 %v4_11, %v6_3f
  store x86_fp80 %v7_3f, x86_fp80* %st6.global-to-local, align 4
  %v3_44 = add i32 %v3_a, -28
  %v4_44 = inttoptr i32 %v3_44 to float*
  %v5_44 = load float, float* %v4_44, align 4
  %v6_44 = fpext float %v5_44 to x86_fp80
  %v7_44 = fmul x86_fp80 %v4_f, %v6_44
  %v4_47 = fadd x86_fp80 %v7_3f, %v7_44
  store x86_fp80 %v4_47, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_d, x86_fp80* %st4.global-to-local, align 4
  store x86_fp80 %v2_26, x86_fp80* %st7.global-to-local, align 4
  %v3_4b = add i32 %v3_a, -32
  %v4_4b = inttoptr i32 %v3_4b to float*
  %v5_4b = load float, float* %v4_4b, align 4
  %v6_4b = fpext float %v5_4b to x86_fp80
  %v7_4b = fmul x86_fp80 %v4_d, %v6_4b
  %v4_4e = fadd x86_fp80 %v4_47, %v7_4b
  %v2_52 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_4e)
  store x86_fp80 %v2_3b, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_52, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_3b, x86_fp80* %st4.global-to-local, align 4
  %v3_58 = inttoptr i32 %v3_a to double*
  %v4_58 = load double, double* %v3_58, align 4
  %v5_58 = fpext double %v4_58 to x86_fp80
  %v6_58 = fmul x86_fp80 %v2_3b, %v5_58
  store x86_fp80 %v6_58, x86_fp80* %st4.global-to-local, align 4
  %v3_5c = add i32 %v3_a, 8
  %v4_5c = inttoptr i32 %v3_5c to double*
  %v5_5c = load double, double* %v4_5c, align 4
  %v6_5c = fpext double %v5_5c to x86_fp80
  %v7_5c = fmul x86_fp80 %v2_52, %v6_5c
  %v4_5f = fadd x86_fp80 %v6_58, %v7_5c
  store x86_fp80 %v4_5f, x86_fp80* %st4.global-to-local, align 4
  %v3_63 = add i32 %v3_a, 16
  %v4_63 = inttoptr i32 %v3_63 to double*
  %v5_63 = load double, double* %v4_63, align 4
  %v6_63 = fpext double %v5_63 to x86_fp80
  %v7_63 = fmul x86_fp80 %v2_26, %v6_63
  %v4_66 = fadd x86_fp80 %v4_5f, %v7_63
  store x86_fp80 %v4_66, x86_fp80* %st4.global-to-local, align 4
  store i3 %v2_13, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_6a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_6a = call i16 @__asm_fnstsw(i32 %v0_6a)
  %v2_6a = sext i16 %v1_6a to i32
  %v3_6a = load i32, i32* @eax, align 8
  %v4_6a = and i32 %v3_6a, -65536
  %tmp277 = udiv i32 %v2_6a, 2
  %v12_6c = and i32 %tmp277, 32512
  %v2_6a.masked = and i32 %v2_6a, -65281
  %v13_6c = or i32 %v4_6a, %v2_6a.masked
  %v14_6c = or i32 %v13_6c, %v12_6c
  store i32 %v14_6c, i32* @eax, align 8
  %v15_6c14 = and i32 %v2_6a, 256
  %v16_6c = icmp ne i32 %v15_6c14, 0
  %v1_6e = icmp eq i1 %v16_6c, false
  br i1 %v1_6e, label %dec_label_pc_0.dec_label_pc_88_crit_edge, label %dec_label_pc_70

dec_label_pc_0.dec_label_pc_88_crit_edge:         ; preds = %dec_label_pc_0
  %v0_88.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_8a.pre = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_8a.pre = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_8e.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_98.pre = load i32, i32* %esi.global-to-local, align 4
  %.pre = inttoptr i32 %v2_98.pre to double*
  %.pre28 = add i32 %v2_98.pre, 8
  %.pre29 = inttoptr i32 %.pre28 to double*
  %.pre30 = add i32 %v2_98.pre, 16
  %.pre31 = inttoptr i32 %.pre30 to double*
  br label %dec_label_pc_88

dec_label_pc_70:                                  ; preds = %dec_label_pc_0
  %v1_70 = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  %v3_70 = fadd x86_fp80 %v1_70, %v1_70
  store x86_fp80 %v3_70, x86_fp80* %st4.global-to-local, align 4
  %v0_72 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_72 = load i32, i32* %esi.global-to-local, align 4
  %v2_72 = add i32 %v1_72, 8
  %v3_72 = inttoptr i32 %v2_72 to double*
  %v4_72 = load double, double* %v3_72, align 4
  %v5_72 = fpext double %v4_72 to x86_fp80
  %v2_75 = inttoptr i32 %v1_72 to double*
  %v3_75 = load double, double* %v2_75, align 4
  %v4_75 = fpext double %v3_75 to x86_fp80
  %v2_77 = add i32 %v1_72, 16
  %v3_77 = inttoptr i32 %v2_77 to double*
  %v4_77 = load double, double* %v3_77, align 4
  %v5_77 = fpext double %v4_77 to x86_fp80
  %v4_7c = fmul x86_fp80 %v3_70, %v5_77
  store x86_fp80 %v4_7c, x86_fp80* %st4.global-to-local, align 4
  %v4_7e = fmul x86_fp80 %v3_70, %v5_72
  %v4_80 = fmul x86_fp80 %v3_70, %v4_75
  %v3_82 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v4_82 = fsub x86_fp80 %v3_82, %v4_80
  store x86_fp80 %v4_82, x86_fp80* %st5.global-to-local, align 4
  %v3_84 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_84 = fsub x86_fp80 %v3_84, %v4_7e
  store x86_fp80 %v4_84, x86_fp80* %st6.global-to-local, align 4
  %v2_86 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_86 = fsub x86_fp80 %v2_86, %v4_7c
  store x86_fp80 %v4_86, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_88

dec_label_pc_88:                                  ; preds = %dec_label_pc_0.dec_label_pc_88_crit_edge, %dec_label_pc_70
  %v4_a3.pre-phi = phi double* [ %.pre31, %dec_label_pc_0.dec_label_pc_88_crit_edge ], [ %v3_77, %dec_label_pc_70 ]
  %v4_9c.pre-phi = phi double* [ %.pre29, %dec_label_pc_0.dec_label_pc_88_crit_edge ], [ %v3_72, %dec_label_pc_70 ]
  %v3_98.pre-phi = phi double* [ %.pre, %dec_label_pc_0.dec_label_pc_88_crit_edge ], [ %v2_75, %dec_label_pc_70 ]
  %v3_8e = phi x86_fp80 [ %v3_8e.pre, %dec_label_pc_0.dec_label_pc_88_crit_edge ], [ %v4_86, %dec_label_pc_70 ]
  %v3_8a = phi x86_fp80 [ %v3_8a.pre, %dec_label_pc_0.dec_label_pc_88_crit_edge ], [ %v4_84, %dec_label_pc_70 ]
  %v2_8a = phi x86_fp80 [ %v2_8a.pre, %dec_label_pc_0.dec_label_pc_88_crit_edge ], [ %v4_82, %dec_label_pc_70 ]
  %v0_88 = phi i3 [ %v0_88.pre, %dec_label_pc_0.dec_label_pc_88_crit_edge ], [ %v0_72, %dec_label_pc_70 ]
  %v2_8c = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v3_8a)
  %v2_90 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v3_8e)
  store x86_fp80 %v2_90, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v2_8a, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_8c, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_8a, x86_fp80* %st4.global-to-local, align 4
  %v4_98 = load double, double* %v3_98.pre-phi, align 4
  %v5_98 = fpext double %v4_98 to x86_fp80
  %v6_98 = fmul x86_fp80 %v2_8a, %v5_98
  store x86_fp80 %v6_98, x86_fp80* %st4.global-to-local, align 4
  %v5_9c = load double, double* %v4_9c.pre-phi, align 4
  %v6_9c = fpext double %v5_9c to x86_fp80
  %v7_9c = fmul x86_fp80 %v2_8c, %v6_9c
  %v4_9f = fadd x86_fp80 %v6_98, %v7_9c
  store x86_fp80 %v4_9f, x86_fp80* %st4.global-to-local, align 4
  %v5_a3 = load double, double* %v4_a3.pre-phi, align 4
  %v6_a3 = fpext double %v5_a3 to x86_fp80
  %v7_a3 = fmul x86_fp80 %v2_90, %v6_a3
  %v4_a6 = fadd x86_fp80 %v4_9f, %v7_a3
  store x86_fp80 %v4_a6, x86_fp80* %st4.global-to-local, align 4
  store i3 %v0_88, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_aa = load i32, i32* %fpsw.global-to-local, align 4
  %v1_aa = call i16 @__asm_fnstsw(i32 %v0_aa)
  %v2_aa = sext i16 %v1_aa to i32
  %v3_aa = load i32, i32* @eax, align 8
  %v4_aa = and i32 %v3_aa, -65536
  %tmp278 = udiv i32 %v2_aa, 2
  %v12_ac = and i32 %tmp278, 32512
  %v2_aa.masked = and i32 %v2_aa, -65281
  %v13_ac = or i32 %v4_aa, %v2_aa.masked
  %v14_ac = or i32 %v13_ac, %v12_ac
  store i32 %v14_ac, i32* @eax, align 8
  %v15_ac15 = and i32 %v2_aa, 256
  %v16_ac = icmp ne i32 %v15_ac15, 0
  %v1_ae = icmp eq i1 %v16_ac, false
  br i1 %v1_ae, label %dec_label_pc_88.dec_label_pc_c8_crit_edge, label %dec_label_pc_b0

dec_label_pc_88.dec_label_pc_c8_crit_edge:        ; preds = %dec_label_pc_88
  %v0_c8.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_c8.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_d8.pre = load i32, i32* %esi.global-to-local, align 4
  %.pre32 = inttoptr i32 %v2_d8.pre to double*
  %.pre34 = add i32 %v2_d8.pre, 8
  %.pre35 = inttoptr i32 %.pre34 to double*
  %.pre36 = add i32 %v2_d8.pre, 16
  %.pre37 = inttoptr i32 %.pre36 to double*
  br label %dec_label_pc_c8

dec_label_pc_b0:                                  ; preds = %dec_label_pc_88
  %v1_b0 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_b0 = fadd x86_fp80 %v1_b0, %v1_b0
  store x86_fp80 %v3_b0, x86_fp80* %st7.global-to-local, align 4
  %v0_b2 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_b2 = load i32, i32* %esi.global-to-local, align 4
  %v2_b2 = add i32 %v1_b2, 8
  %v3_b2 = inttoptr i32 %v2_b2 to double*
  %v4_b2 = load double, double* %v3_b2, align 4
  %v5_b2 = fpext double %v4_b2 to x86_fp80
  store x86_fp80 %v5_b2, x86_fp80* %st6.global-to-local, align 4
  %v2_b5 = inttoptr i32 %v1_b2 to double*
  %v3_b5 = load double, double* %v2_b5, align 4
  %v4_b5 = fpext double %v3_b5 to x86_fp80
  store x86_fp80 %v4_b5, x86_fp80* %st5.global-to-local, align 4
  %v2_b7 = add i32 %v1_b2, 16
  %v3_b7 = inttoptr i32 %v2_b7 to double*
  %v4_b7 = load double, double* %v3_b7, align 4
  %v5_b7 = fpext double %v4_b7 to x86_fp80
  store x86_fp80 %v3_b0, x86_fp80* %st4.global-to-local, align 4
  %v4_bc = fmul x86_fp80 %v3_b0, %v5_b7
  %v4_be = fmul x86_fp80 %v3_b0, %v5_b2
  store x86_fp80 %v4_be, x86_fp80* %st6.global-to-local, align 4
  %v4_c0 = fmul x86_fp80 %v3_b0, %v4_b5
  store x86_fp80 %v4_c0, x86_fp80* %st5.global-to-local, align 4
  %v4_c2 = fsub x86_fp80 %v4_bc, %v4_c0
  %v4_c4 = fsub x86_fp80 %v4_c2, %v4_be
  %v4_c6 = fsub x86_fp80 %v4_c4, %v4_c4
  store x86_fp80 %v4_c6, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_c8

dec_label_pc_c8:                                  ; preds = %dec_label_pc_88.dec_label_pc_c8_crit_edge, %dec_label_pc_b0
  %v4_e3.pre-phi = phi double* [ %.pre37, %dec_label_pc_88.dec_label_pc_c8_crit_edge ], [ %v3_b7, %dec_label_pc_b0 ]
  %v4_dc.pre-phi = phi double* [ %.pre35, %dec_label_pc_88.dec_label_pc_c8_crit_edge ], [ %v3_b2, %dec_label_pc_b0 ]
  %v3_d8.pre-phi = phi double* [ %.pre32, %dec_label_pc_88.dec_label_pc_c8_crit_edge ], [ %v2_b5, %dec_label_pc_b0 ]
  %v1_c8 = phi x86_fp80 [ %v1_c8.pre, %dec_label_pc_88.dec_label_pc_c8_crit_edge ], [ %v4_c6, %dec_label_pc_b0 ]
  %v0_c8 = phi i3 [ %v0_c8.pre, %dec_label_pc_88.dec_label_pc_c8_crit_edge ], [ %v0_b2, %dec_label_pc_b0 ]
  %v2_cc = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v1_c8)
  store x86_fp80 %v2_cc, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v2_cc, x86_fp80* %st6.global-to-local, align 4
  %v4_d8 = load double, double* %v3_d8.pre-phi, align 4
  %v5_d8 = fpext double %v4_d8 to x86_fp80
  %v6_d8 = fmul x86_fp80 %v2_cc, %v5_d8
  store x86_fp80 %v6_d8, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_cc, x86_fp80* %st5.global-to-local, align 4
  %v5_dc = load double, double* %v4_dc.pre-phi, align 4
  %v6_dc = fpext double %v5_dc to x86_fp80
  %v7_dc = fmul x86_fp80 %v2_cc, %v6_dc
  %v4_df = fadd x86_fp80 %v6_d8, %v7_dc
  store x86_fp80 %v4_df, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_cc, x86_fp80* %st5.global-to-local, align 4
  %v5_e3 = load double, double* %v4_e3.pre-phi, align 4
  %v6_e3 = fpext double %v5_e3 to x86_fp80
  %v7_e3 = fmul x86_fp80 %v2_cc, %v6_e3
  store x86_fp80 %v7_e3, x86_fp80* %st5.global-to-local, align 4
  %v4_e6 = fadd x86_fp80 %v4_df, %v7_e3
  store x86_fp80 %v4_e6, x86_fp80* %st6.global-to-local, align 4
  store i3 %v0_c8, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ea = load i32, i32* %fpsw.global-to-local, align 4
  %v1_ea = call i16 @__asm_fnstsw(i32 %v0_ea)
  %v2_ea = sext i16 %v1_ea to i32
  %v3_ea = load i32, i32* @eax, align 8
  %v4_ea = and i32 %v3_ea, -65536
  %tmp279 = udiv i32 %v2_ea, 2
  %v12_ec = and i32 %tmp279, 32512
  %v2_ea.masked = and i32 %v2_ea, -65281
  %v13_ec = or i32 %v4_ea, %v2_ea.masked
  %v14_ec = or i32 %v13_ec, %v12_ec
  store i32 %v14_ec, i32* @eax, align 8
  %v15_ec16 = and i32 %v2_ea, 256
  %v16_ec = icmp ne i32 %v15_ec16, 0
  %v1_ee = icmp eq i1 %v16_ec, false
  br i1 %v1_ee, label %dec_label_pc_c8.dec_label_pc_108_crit_edge, label %dec_label_pc_f0

dec_label_pc_c8.dec_label_pc_108_crit_edge:       ; preds = %dec_label_pc_c8
  %v0_108.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_108.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_108

dec_label_pc_f0:                                  ; preds = %dec_label_pc_c8
  %v1_f0 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_f0 = fadd x86_fp80 %v1_f0, %v1_f0
  store x86_fp80 %v3_f0, x86_fp80* %st7.global-to-local, align 4
  %v0_f2 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_f2 = load i32, i32* %esi.global-to-local, align 4
  %v2_f2 = add i32 %v1_f2, 8
  %v3_f2 = inttoptr i32 %v2_f2 to double*
  %v4_f2 = load double, double* %v3_f2, align 4
  %v5_f2 = fpext double %v4_f2 to x86_fp80
  store x86_fp80 %v5_f2, x86_fp80* %st6.global-to-local, align 4
  %v2_f5 = inttoptr i32 %v1_f2 to double*
  %v3_f5 = load double, double* %v2_f5, align 4
  %v4_f5 = fpext double %v3_f5 to x86_fp80
  store x86_fp80 %v4_f5, x86_fp80* %st5.global-to-local, align 4
  %v2_f7 = add i32 %v1_f2, 16
  %v3_f7 = inttoptr i32 %v2_f7 to double*
  %v4_f7 = load double, double* %v3_f7, align 4
  %v5_f7 = fpext double %v4_f7 to x86_fp80
  store x86_fp80 %v3_f0, x86_fp80* %st4.global-to-local, align 4
  %v4_fc = fmul x86_fp80 %v3_f0, %v5_f7
  %v4_fe = fmul x86_fp80 %v3_f0, %v5_f2
  store x86_fp80 %v4_fe, x86_fp80* %st6.global-to-local, align 4
  %v4_100 = fmul x86_fp80 %v3_f0, %v4_f5
  store x86_fp80 %v4_100, x86_fp80* %st5.global-to-local, align 4
  %v4_102 = fsub x86_fp80 %v4_fc, %v4_100
  %v4_104 = fsub x86_fp80 %v4_102, %v4_fe
  %v4_106 = fsub x86_fp80 %v4_104, %v4_104
  store x86_fp80 %v4_106, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_108

dec_label_pc_108:                                 ; preds = %dec_label_pc_c8.dec_label_pc_108_crit_edge, %dec_label_pc_f0
  %v1_108 = phi x86_fp80 [ %v1_108.pre, %dec_label_pc_c8.dec_label_pc_108_crit_edge ], [ %v4_106, %dec_label_pc_f0 ]
  %v0_108 = phi i3 [ %v0_108.pre, %dec_label_pc_c8.dec_label_pc_108_crit_edge ], [ %v0_f2, %dec_label_pc_f0 ]
  %v2_10c = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v1_108)
  store x86_fp80 %v2_10c, x86_fp80* %st7.global-to-local, align 4
  %v2_114 = load i32, i32* @edx, align 8
  %tmp280 = fptrunc x86_fp80 %v1_108 to double
  %v3_114 = call double @llvm.fabs.f64(double %tmp280)
  %v4_114 = inttoptr i32 %v2_114 to double*
  store double %v3_114, double* %v4_114, align 4
  %v1_116 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_116 = load i32, i32* %ebx.global-to-local, align 4
  %v3_116 = fptrunc x86_fp80 %v1_116 to double
  %v4_116 = inttoptr i32 %v2_116 to double*
  store double %v3_116, double* %v4_116, align 4
  %v1_118 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_118 = load i32, i32* @ecx, align 8
  %v3_118 = fptrunc x86_fp80 %v1_118 to double
  %v4_118 = inttoptr i32 %v2_118 to double*
  store double %v3_118, double* %v4_118, align 4
  %v5_118 = xor i3 %v0_108, -4
  store i3 %v5_118, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_116, i32* @eax, align 8
  store i32 %v0_4, i32* %esi.global-to-local, align 4
  store i32 %v0_3, i32* %ebx.global-to-local, align 4
  ret i32 %v2_116
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
