source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp261 = call double @__decompiler_undefined_function_3()
  %stack_var_-48 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-48, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_55 = load i32, i32* %edi.global-to-local, align 4
  %v1_55 = add i32 %v0_55, -44
  store i32 %v1_55, i32* %edi.global-to-local, align 4
  %v7_58 = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_58, x86_fp80* %st7.global-to-local, align 4
  %v5_5c = fpext double %tmp261 to x86_fp80
  %v3_60 = load double, double* %stack_var_-48, align 8
  %v8_60 = fpext double %v3_60 to x86_fp80
  %v3_65 = add i32 %v0_55, -104
  %v4_65 = inttoptr i32 %v3_65 to float*
  %v5_65 = load float, float* %v4_65, align 4
  %v6_65 = fpext float %v5_65 to x86_fp80
  %v7_65 = fmul x86_fp80 %v8_60, %v6_65
  %v3_6a = add i32 %v0_55, -108
  %v4_6a = inttoptr i32 %v3_6a to float*
  %v5_6a = load float, float* %v4_6a, align 4
  %v6_6a = fpext float %v5_6a to x86_fp80
  %v7_6a = fmul x86_fp80 %v5_5c, %v6_6a
  %v4_6d = fadd x86_fp80 %v7_65, %v7_6a
  %v3_71 = add i32 %v0_55, -112
  %v4_71 = inttoptr i32 %v3_71 to float*
  %v5_71 = load float, float* %v4_71, align 4
  %v6_71 = fpext float %v5_71 to x86_fp80
  %v7_71 = fmul x86_fp80 %v7_58, %v6_71
  %v4_74 = fadd x86_fp80 %v7_71, %v4_6d
  %v3_78 = add i32 %v0_55, -80
  %v4_78 = inttoptr i32 %v3_78 to float*
  %v5_78 = load float, float* %v4_78, align 4
  %v6_78 = fpext float %v5_78 to x86_fp80
  %v7_78 = fmul x86_fp80 %v8_60, %v6_78
  %v3_7d = add i32 %v0_55, -84
  %v4_7d = inttoptr i32 %v3_7d to float*
  %v5_7d = load float, float* %v4_7d, align 4
  %v6_7d = fpext float %v5_7d to x86_fp80
  %v7_7d = fmul x86_fp80 %v5_5c, %v6_7d
  %v4_80 = fadd x86_fp80 %v7_78, %v7_7d
  %v3_84 = add i32 %v0_55, -88
  %v4_84 = inttoptr i32 %v3_84 to float*
  %v5_84 = load float, float* %v4_84, align 4
  %v6_84 = fpext float %v5_84 to x86_fp80
  %v7_84 = fmul x86_fp80 %v7_58, %v6_84
  %v4_87 = fadd x86_fp80 %v4_80, %v7_84
  %v3_8b = add i32 %v0_55, -92
  %v4_8b = inttoptr i32 %v3_8b to float*
  %v5_8b = load float, float* %v4_8b, align 4
  %v6_8b = fpext float %v5_8b to x86_fp80
  %v7_8b = fmul x86_fp80 %v8_60, %v6_8b
  %v3_90 = add i32 %v0_55, -96
  %v4_90 = inttoptr i32 %v3_90 to float*
  %v5_90 = load float, float* %v4_90, align 4
  %v6_90 = fpext float %v5_90 to x86_fp80
  %v7_90 = fmul x86_fp80 %v5_5c, %v6_90
  %v4_93 = fadd x86_fp80 %v7_8b, %v7_90
  store x86_fp80 %v4_74, x86_fp80* %st7.global-to-local, align 4
  %v3_97 = add i32 %v0_55, -100
  %v4_97 = inttoptr i32 %v3_97 to float*
  %v5_97 = load float, float* %v4_97, align 4
  %v6_97 = fpext float %v5_97 to x86_fp80
  %v7_97 = fmul x86_fp80 %v7_58, %v6_97
  %v4_9a = fadd x86_fp80 %v4_93, %v7_97
  %tmp268 = fptrunc x86_fp80 %v4_87 to double
  store double %tmp268, double* %stack_var_-48, align 8
  store i32 %v0_55, i32* %edi.global-to-local, align 4
  %v3_ad = fmul x86_fp80 %v4_87, %v4_87
  %v3_b3 = fmul x86_fp80 %v4_9a, %v4_9a
  %v4_b5 = fadd x86_fp80 %v3_ad, %v3_b3
  %v3_b7 = fmul x86_fp80 %v4_b5, %v4_b5
  store x86_fp80 %v3_b7, x86_fp80* %st7.global-to-local, align 4
  %v3_bd = fmul x86_fp80 %v4_74, %v4_74
  %v9_bf = fmul x86_fp80 %v3_bd, %v4_74
  %v3_c3 = add i32 %v0_55, -16
  %v4_c3 = inttoptr i32 %v3_c3 to double*
  %v5_c3 = load double, double* %v4_c3, align 4
  %v6_c3 = fpext double %v5_c3 to x86_fp80
  %v7_c3 = fmul x86_fp80 %v9_bf, %v6_c3
  %v2_c6 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_c3)
  %v4_c8 = fadd x86_fp80 %v3_b7, %v2_c6
  store x86_fp80 %v4_87, x86_fp80* %st7.global-to-local, align 4
  %v3_dc = inttoptr i32 %v0_55 to double*
  %v4_dc = load double, double* %v3_dc, align 4
  %v5_dc = fpext double %v4_dc to x86_fp80
  %v6_dc = fmul x86_fp80 %v3_b3, %v5_dc
  %v4_de = fadd x86_fp80 %v3_ad, %v6_dc
  %v4_e0 = fmul x86_fp80 %v4_de, %v4_87
  store x86_fp80 %v4_e0, x86_fp80* %st7.global-to-local, align 4
  %v7_e0 = add i3 %v0_4b, -1
  store i3 %v7_e0, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_e2 = add i32 %v0_55, -72
  %v4_e2 = inttoptr i32 %v3_e2 to double*
  %v5_e2 = load double, double* %v4_e2, align 4
  %v6_e2 = fpext double %v5_e2 to x86_fp80
  %v7_e2 = fmul x86_fp80 %v4_e0, %v6_e2
  store x86_fp80 %v7_e2, x86_fp80* %st7.global-to-local, align 4
  %v0_e7 = call i32 @__asm_wait()
  %v0_e8 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_e8 = call i16 @__asm_fnstsw(i32 %v0_e8)
  %v2_e8 = sext i16 %v1_e8 to i32
  %v4_ea3 = udiv i32 %v2_e8, 512
  %tmp274 = urem i32 %v4_ea3, 128
  %v5_ea = icmp eq i32 %tmp274, 0
  %v15_ea15 = and i32 %v2_e8, 256
  %v16_ea = icmp ne i32 %v15_ea15, 0
  %v2_ec = or i1 %v16_ea, %v5_ea
  %v1_f8 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v2_ec, label %dec_label_pc_f8, label %dec_label_pc_ee

dec_label_pc_ee:                                  ; preds = %dec_label_pc_40
  %v7_ee = fadd x86_fp80 %v1_f8, %v4_c8
  br label %dec_label_pc_100

dec_label_pc_f8:                                  ; preds = %dec_label_pc_40
  %v7_f8 = fsub x86_fp80 0xK00000000000000000000, %v1_f8
  br label %dec_label_pc_100

dec_label_pc_100:                                 ; preds = %dec_label_pc_f8, %dec_label_pc_ee
  %stack_var_-24.0 = phi x86_fp80 [ %v7_f8, %dec_label_pc_f8 ], [ 0xK00000000000000000000, %dec_label_pc_ee ]
  %storemerge273 = phi x86_fp80 [ %v7_f8, %dec_label_pc_f8 ], [ %v7_ee, %dec_label_pc_ee ]
  %stack_var_-16.0.in = phi x86_fp80 [ %v4_c8, %dec_label_pc_f8 ], [ %v7_ee, %dec_label_pc_ee ]
  store x86_fp80 %storemerge273, x86_fp80* %st7.global-to-local, align 4
  %v2_104 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %stack_var_-16.0.in)
  %v2_106 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_104)
  %v0_108 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_108 = add i3 %v0_108, -1
  %v2_10c = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %stack_var_-24.0)
  %v2_10e = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_10c)
  %v4_112 = fsub x86_fp80 %v2_106, %v2_10e
  store x86_fp80 %v4_112, x86_fp80* %st7.global-to-local, align 4
  %v2_114 = load i32, i32* %edi.global-to-local, align 4
  %v3_114 = add i32 %v2_114, 8
  %v4_114 = inttoptr i32 %v3_114 to double*
  %v5_114 = load double, double* %v4_114, align 4
  %v6_114 = fpext double %v5_114 to x86_fp80
  %v7_114 = fmul x86_fp80 %v4_112, %v6_114
  store x86_fp80 %v7_114, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_108, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_122 = call i32 @__asm_wait()
  %v0_123 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_123 = call i16 @__asm_fnstsw(i32 %v0_123)
  %v2_123 = sext i16 %v1_123 to i32
  %v4_123 = and i32 %v0_122, -65536
  %tmp271 = udiv i32 %v2_123, 2
  %v12_125 = and i32 %tmp271, 32512
  %v2_123.masked = and i32 %v2_123, -65281
  %v13_125 = or i32 %v4_123, %v2_123.masked
  %v14_125 = or i32 %v13_125, %v12_125
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_12f = load i32, i32* %edi.global-to-local, align 4
  %v1_12f = add i32 %v0_12f, -76
  %v2_12f = inttoptr i32 %v1_12f to i32*
  %v3_12f = load i32, i32* %v2_12f, align 4
  %v10_12f = icmp eq i32 %v3_12f, 0
  %v1_133 = icmp eq i1 %v10_12f, false
  %v1_138.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_133, label %dec_label_pc_138, label %dec_label_pc_135

dec_label_pc_135:                                 ; preds = %dec_label_pc_100
  %v3_135 = add i32 %v0_12f, -32
  %v4_135 = inttoptr i32 %v3_135 to double*
  %v5_135 = load double, double* %v4_135, align 4
  %v6_135 = fpext double %v5_135 to x86_fp80
  %v7_135 = fdiv x86_fp80 %v1_138.pre, %v6_135
  store x86_fp80 %v7_135, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_138

dec_label_pc_138:                                 ; preds = %dec_label_pc_100, %dec_label_pc_135
  %v1_138 = phi x86_fp80 [ %v7_135, %dec_label_pc_135 ], [ %v1_138.pre, %dec_label_pc_100 ]
  %v2_138 = load i32, i32* %esi.global-to-local, align 4
  %v3_138 = add i32 %v2_138, -32
  %v4_138 = fptrunc x86_fp80 %v1_138 to double
  %v5_138 = inttoptr i32 %v3_138 to double*
  store double %v4_138, double* %v5_138, align 4
  %v6_138 = add i3 %storemerge.in, 2
  %v3_13b = load double, double* %stack_var_-48, align 8
  %v8_13b = fpext double %v3_13b to x86_fp80
  %v3_13e = fmul x86_fp80 %v8_13b, %v8_13b
  %v4_146 = fadd x86_fp80 %v3_b3, %v3_13e
  %v4_14e = fadd x86_fp80 %v3_bd, %v4_146
  %v2_150 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_14e)
  store x86_fp80 %v2_150, x86_fp80* %st7.global-to-local, align 4
  %v3_152 = add i32 %v0_12f, -120
  %v4_152 = inttoptr i32 %v3_152 to double*
  %v5_152 = load double, double* %v4_152, align 4
  %v6_152 = fpext double %v5_152 to x86_fp80
  %v7_152 = fmul x86_fp80 %v2_150, %v6_152
  store x86_fp80 %v7_152, x86_fp80* %st7.global-to-local, align 4
  %v2_155 = add i32 %v2_138, -24
  %v3_155 = inttoptr i32 %v2_155 to i32*
  %v4_155 = load i32, i32* %v3_155, align 4
  %v5_155 = sitofp i32 %v4_155 to x86_fp80
  %v3_158 = add i32 %v0_12f, -128
  %v4_158 = inttoptr i32 %v3_158 to double*
  %v5_158 = load double, double* %v4_158, align 4
  %v6_158 = fpext double %v5_158 to x86_fp80
  %v7_158 = fmul x86_fp80 %v5_155, %v6_158
  %v4_15b = fadd x86_fp80 %v7_152, %v7_158
  store x86_fp80 %v4_15b, x86_fp80* %st7.global-to-local, align 4
  %v3_15d = add i32 %v0_12f, -136
  %v4_15d = inttoptr i32 %v3_15d to double*
  %v5_15d = load double, double* %v4_15d, align 4
  %v6_15d = fpext double %v5_15d to x86_fp80
  %v7_15d = fadd x86_fp80 %v4_15b, %v6_15d
  %v2_163 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_15d)
  store x86_fp80 %v2_163, x86_fp80* %st7.global-to-local, align 4
  %v3_165 = add i32 %v2_138, 128
  %tmp272 = fptrunc x86_fp80 %v7_15d to double
  %v4_165 = call double @llvm.fabs.f64(double %tmp272)
  %v5_165 = inttoptr i32 %v3_165 to double*
  store double %v4_165, double* %v5_165, align 4
  store i3 %v6_138, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_125
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
