source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp272 = call double @__decompiler_undefined_function_3()
  %stack_var_-50 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-50, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4b = fpext double %v6_45 to x86_fp80
  %v8_4b = add i3 %v0_4b, -1
  store i3 %v8_4b, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_4b, x86_fp80* %st7.global-to-local, align 4
  %v2_4f = load i32, i32* @edi, align 8
  %v3_4f = add i32 %v2_4f, -100
  %v4_4f = inttoptr i32 %v3_4f to double*
  %v5_4f = load double, double* %v4_4f, align 4
  %v6_4f = fpext double %v5_4f to x86_fp80
  %v7_4f = fmul x86_fp80 %v7_4b, %v6_4f
  store x86_fp80 %v7_4f, x86_fp80* %st7.global-to-local, align 4
  %v2_52 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_4f)
  %v3_52 = fcmp olt x86_fp80 %v2_52, 0xK403E8000000000000000
  br i1 %v3_52, label %bb, label %bb279

bb:                                               ; preds = %dec_label_pc_40
  %v4_52 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_4f)
  store x86_fp80 %v4_52, x86_fp80* %st7.global-to-local, align 4
  %v8_52 = add i3 %v0_4b, -2
  store i3 %v8_52, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %bb279

bb279:                                            ; preds = %dec_label_pc_40, %bb
  %v1_54 = phi x86_fp80 [ %v7_4f, %dec_label_pc_40 ], [ %v4_52, %bb ]
  %v0_54 = phi i3 [ %v8_4b, %dec_label_pc_40 ], [ %v8_52, %bb ]
  %v3_5c = load double, double* %stack_var_-50, align 8
  %v8_5c = fpext double %v3_5c to x86_fp80
  %v7_5f = fmul x86_fp80 %v1_54, %v8_5c
  %v5_63 = fpext double %tmp272 to x86_fp80
  %v7_67 = fmul x86_fp80 %v1_54, %v5_63
  %v4_6d = fsub x86_fp80 %v7_5f, %v7_67
  store x86_fp80 %v4_6d, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_54, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_80 = call i32 @__asm_fpatan()
  %v4_82 = load double, double* bitcast (i32* @edi to double*), align 8
  %tmp280 = bitcast double %v4_82 to i64
  %tmp281 = trunc i64 %tmp280 to i32
  %v1_9f = add i32 %tmp281, -120
  %v2_9f = inttoptr i32 %v1_9f to i32*
  %v3_9f = load i32, i32* %v2_9f, align 4
  %v13_9f = icmp eq i32 %v3_9f, 2
  br i1 %v13_9f, label %dec_label_pc_a7, label %dec_label_pc_a5

dec_label_pc_a5:                                  ; preds = %bb279
  br label %dec_label_pc_a7

dec_label_pc_a7:                                  ; preds = %dec_label_pc_a5, %bb279
  %v6_ac = add i3 %v0_54, -2
  %v3_b0 = fmul x86_fp80 %v5_63, %v5_63
  store i3 %v6_ac, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ba = call i32 @__asm_fpatan()
  %v4_bc = load double, double* bitcast (i32* @edi to double*), align 8
  %tmp282 = bitcast double %v4_bc to i64
  %tmp283 = trunc i64 %tmp282 to i32
  %v1_d9 = add i32 %tmp283, -120
  %v2_d9 = inttoptr i32 %v1_d9 to i32*
  %v3_d9 = load i32, i32* %v2_d9, align 4
  %v13_d9 = icmp eq i32 %v3_d9, 2
  br i1 %v13_d9, label %dec_label_pc_fe, label %dec_label_pc_e1

dec_label_pc_e1:                                  ; preds = %dec_label_pc_a7
  %v3_e1.pre = load i32, i32* %v2_d9, align 4
  %v3_e1.pre.off = add i32 %v3_e1.pre, -1
  %switch = icmp ult i32 %v3_e1.pre.off, 2
  br i1 %switch, label %dec_label_pc_fe, label %dec_label_pc_ed

dec_label_pc_ed:                                  ; preds = %dec_label_pc_e1
  %v0_ef = call i32 @__asm_wait()
  %v0_f0 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_f0 = call i16 @__asm_fnstsw(i32 %v0_f0)
  br label %dec_label_pc_10d

dec_label_pc_fe:                                  ; preds = %dec_label_pc_e1, %dec_label_pc_a7
  %v0_100 = call i32 @__asm_wait()
  %v0_101 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_101 = call i16 @__asm_fnstsw(i32 %v0_101)
  br label %dec_label_pc_10d

dec_label_pc_10d:                                 ; preds = %dec_label_pc_fe, %dec_label_pc_ed
  %v3_10d = load double, double* %stack_var_-50, align 8
  %v8_10d = fpext double %v3_10d to x86_fp80
  %v3_110 = fmul x86_fp80 %v8_10d, %v8_10d
  %v4_118 = fadd x86_fp80 %v3_b0, %v3_110
  %v3_11e = fmul x86_fp80 %v7_4b, %v7_4b
  %v4_120 = fadd x86_fp80 %v3_11e, %v4_118
  %v2_122 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_120)
  store x86_fp80 %v2_122, x86_fp80* %st7.global-to-local, align 4
  %v2_124 = load i32, i32* @edi, align 8
  %v3_124 = add i32 %v2_124, -72
  %v4_124 = inttoptr i32 %v3_124 to double*
  %v5_124 = load double, double* %v4_124, align 4
  %v6_124 = fpext double %v5_124 to x86_fp80
  %v7_124 = fsub x86_fp80 %v2_122, %v6_124
  store x86_fp80 %v7_124, x86_fp80* %st7.global-to-local, align 4
  %v3_127 = add i32 %v2_124, -92
  %v4_127 = inttoptr i32 %v3_127 to double*
  %v5_127 = load double, double* %v4_127, align 4
  %v6_127 = fpext double %v5_127 to x86_fp80
  %v7_127 = fadd x86_fp80 %v7_124, %v6_127
  %v2_12a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_127)
  store x86_fp80 %v2_12a, x86_fp80* %st7.global-to-local, align 4
  %v5_12c = load double, double* %v4_127, align 4
  %v6_12c = fpext double %v5_12c to x86_fp80
  %v7_12c = fsub x86_fp80 %v2_12a, %v6_12c
  store x86_fp80 %v7_12c, x86_fp80* %st7.global-to-local, align 4
  %v0_131 = call i32 @__asm_wait()
  %v0_132 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_132 = call i16 @__asm_fnstsw(i32 %v0_132)
  %v2_132 = sext i16 %v1_132 to i32
  %v4_132 = and i32 %v0_131, -65536
  %tmp286 = udiv i32 %v2_132, 2
  %v12_134 = and i32 %tmp286, 32512
  %v2_132.masked = and i32 %v2_132, -65281
  %v13_134 = or i32 %v4_132, %v2_132.masked
  %v14_134 = or i32 %v13_134, %v12_134
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_13e = load i32, i32* @edi, align 8
  %v1_13e = add i32 %v0_13e, -76
  %v2_13e = inttoptr i32 %v1_13e to i32*
  %v3_13e = load i32, i32* %v2_13e, align 4
  %v10_13e = icmp eq i32 %v3_13e, 0
  %v1_142 = icmp eq i1 %v10_13e, false
  %v1_147.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_142, label %dec_label_pc_147, label %dec_label_pc_144

dec_label_pc_144:                                 ; preds = %dec_label_pc_10d
  %v3_144 = add i32 %v0_13e, -32
  %v4_144 = inttoptr i32 %v3_144 to double*
  %v5_144 = load double, double* %v4_144, align 4
  %v6_144 = fpext double %v5_144 to x86_fp80
  %v7_144 = fdiv x86_fp80 %v1_147.pre, %v6_144
  store x86_fp80 %v7_144, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_147

dec_label_pc_147:                                 ; preds = %dec_label_pc_10d, %dec_label_pc_144
  %v1_147 = phi x86_fp80 [ %v7_144, %dec_label_pc_144 ], [ %v1_147.pre, %dec_label_pc_10d ]
  %v2_147 = load i32, i32* %esi.global-to-local, align 4
  %v3_147 = add i32 %v2_147, -32
  %v4_147 = fptrunc x86_fp80 %v1_147 to double
  %v5_147 = inttoptr i32 %v3_147 to double*
  store double %v4_147, double* %v5_147, align 4
  %v6_147 = add i3 %storemerge.in, 2
  store i3 %v6_147, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_134
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

declare i32 @__asm_fpatan() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
