source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp260 = call double @__decompiler_undefined_function_3()
  %stack_var_-28 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-28, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i32, i32* %edi.global-to-local, align 4
  %v1_4b = add i32 %v0_4b, -80
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v10_4b = icmp eq i32 %v3_4b, 0
  %v1_4f = icmp eq i1 %v10_4b, false
  %v0_62 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_62 = load double, double* %stack_var_-28, align 8
  %v8_62 = fpext double %v3_62 to x86_fp80
  %v9_62 = add i3 %v0_62, -1
  store i3 %v9_62, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v8_62, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_4f, label %dec_label_pc_62, label %dec_label_pc_51

dec_label_pc_51:                                  ; preds = %dec_label_pc_40
  %v3_54 = fmul x86_fp80 %v8_62, %v8_62
  %v5_56 = fpext double %tmp260 to x86_fp80
  %v3_5a = fmul x86_fp80 %v5_56, %v5_56
  store x86_fp80 %v3_5a, x86_fp80* %st6.global-to-local, align 4
  %v4_5c = fadd x86_fp80 %v3_5a, %v3_54
  store i3 %v9_62, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_5e = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_5c)
  store x86_fp80 %v2_5e, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_7c

dec_label_pc_62:                                  ; preds = %dec_label_pc_40
  %v2_65 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v8_62)
  store x86_fp80 %v2_65, x86_fp80* %st7.global-to-local, align 4
  %v6_67 = add i3 %v0_62, -2
  store i3 %v6_67, i3* %fpu_stat_TOP.global-to-local, align 1
  %tmp265 = call double @llvm.fabs.f64(double %tmp260)
  %v2_6b = fpext double %tmp265 to x86_fp80
  store x86_fp80 %v2_6b, x86_fp80* %st6.global-to-local, align 4
  %v0_6f = call i32 @__asm_wait()
  store i32 %v0_6f, i32* %eax.global-to-local, align 4
  %v0_70 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_70 = call i16 @__asm_fnstsw(i32 %v0_70)
  %v2_70 = sext i16 %v1_70 to i32
  %v4_70 = and i32 %v0_6f, -65536
  %tmp269 = udiv i32 %v2_70, 2
  %v12_72 = and i32 %tmp269, 32512
  %v2_70.masked = and i32 %v2_70, -65281
  %v13_72 = or i32 %v4_70, %v2_70.masked
  %v14_72 = or i32 %v13_72, %v12_72
  store i32 %v14_72, i32* %eax.global-to-local, align 4
  %v0_7a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_7a = add i3 %v0_7a, 1
  store i3 %v5_7a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_7c.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_7c.pre = load i32, i32* %edi.global-to-local, align 4
  br label %dec_label_pc_7c

dec_label_pc_7c:                                  ; preds = %dec_label_pc_62, %dec_label_pc_51
  %v0_95 = phi i3 [ %v5_7a, %dec_label_pc_62 ], [ %v9_62, %dec_label_pc_51 ]
  %v0_7f = phi i32 [ %v2_7c.pre, %dec_label_pc_62 ], [ %v0_4b, %dec_label_pc_51 ]
  %v1_7c = phi x86_fp80 [ %v1_7c.pre, %dec_label_pc_62 ], [ %v2_5e, %dec_label_pc_51 ]
  %v3_7c = add i32 %v0_7f, -16
  %v4_7c = inttoptr i32 %v3_7c to double*
  %v5_7c = load double, double* %v4_7c, align 4
  %v6_7c = fpext double %v5_7c to x86_fp80
  %v7_7c = fsub x86_fp80 %v1_7c, %v6_7c
  store x86_fp80 %v7_7c, x86_fp80* %st7.global-to-local, align 4
  %v1_7f = add i32 %v0_7f, -84
  %v2_7f = inttoptr i32 %v1_7f to i32*
  %v3_7f = load i32, i32* %v2_7f, align 4
  %v10_7f = icmp eq i32 %v3_7f, 0
  %v1_83 = icmp eq i1 %v10_7f, false
  br i1 %v1_83, label %dec_label_pc_93, label %dec_label_pc_85

dec_label_pc_85:                                  ; preds = %dec_label_pc_7c
  %v3_85 = fmul x86_fp80 %v7_7c, %v7_7c
  %v7_87 = fpext double %v6_45 to x86_fp80
  %v3_8b = fmul x86_fp80 %v7_87, %v7_87
  store x86_fp80 %v3_8b, x86_fp80* %st6.global-to-local, align 4
  %v4_8d = fadd x86_fp80 %v3_8b, %v3_85
  store i3 %v0_95, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_8f = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_8d)
  store x86_fp80 %v2_8f, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_aa

dec_label_pc_93:                                  ; preds = %dec_label_pc_7c
  %v2_93 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_7c)
  store x86_fp80 %v2_93, x86_fp80* %st7.global-to-local, align 4
  %v8_95 = add i3 %v0_95, -1
  store i3 %v8_95, i3* %fpu_stat_TOP.global-to-local, align 1
  %tmp267 = call double @llvm.fabs.f64(double %v6_45)
  %v2_99 = fpext double %tmp267 to x86_fp80
  store x86_fp80 %v2_99, x86_fp80* %st6.global-to-local, align 4
  %v0_9d = call i32 @__asm_wait()
  store i32 %v0_9d, i32* %eax.global-to-local, align 4
  %v0_9e = load i32, i32* %fpsw.global-to-local, align 4
  %v1_9e = call i16 @__asm_fnstsw(i32 %v0_9e)
  %v2_9e = sext i16 %v1_9e to i32
  %v4_9e = and i32 %v0_9d, -65536
  %tmp270 = udiv i32 %v2_9e, 2
  %v12_a0 = and i32 %tmp270, 32512
  %v2_9e.masked = and i32 %v2_9e, -65281
  %v13_a0 = or i32 %v4_9e, %v2_9e.masked
  %v14_a0 = or i32 %v13_a0, %v12_a0
  store i32 %v14_a0, i32* %eax.global-to-local, align 4
  %v15_a011 = and i32 %v2_9e, 256
  %v16_a0 = icmp ne i32 %v15_a011, 0
  %v1_a2 = icmp eq i1 %v16_a0, false
  %v0_a8 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_a2, label %dec_label_pc_a8, label %dec_label_pc_a4

dec_label_pc_a4:                                  ; preds = %dec_label_pc_93
  %v4_a4 = add i3 %v0_a8, 1
  store i3 %v4_a4, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_aa.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_aa

dec_label_pc_a8:                                  ; preds = %dec_label_pc_93
  %v1_a8 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v1_a8, x86_fp80* %st7.global-to-local, align 4
  %v5_a8 = add i3 %v0_a8, 1
  store i3 %v5_a8, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_aa

dec_label_pc_aa:                                  ; preds = %dec_label_pc_a8, %dec_label_pc_a4, %dec_label_pc_85
  %v0_be = phi i3 [ %v5_a8, %dec_label_pc_a8 ], [ %v4_a4, %dec_label_pc_a4 ], [ %v0_95, %dec_label_pc_85 ]
  %v1_aa = phi x86_fp80 [ %v1_a8, %dec_label_pc_a8 ], [ %v1_aa.pre, %dec_label_pc_a4 ], [ %v2_8f, %dec_label_pc_85 ]
  %v2_aa = load i32, i32* %edi.global-to-local, align 4
  %v3_aa = add i32 %v2_aa, -72
  %v4_aa = inttoptr i32 %v3_aa to double*
  %v5_aa = load double, double* %v4_aa, align 4
  %v6_aa = fpext double %v5_aa to x86_fp80
  %v7_aa = fsub x86_fp80 %v1_aa, %v6_aa
  store x86_fp80 %v7_aa, x86_fp80* %st7.global-to-local, align 4
  %v3_ad = load double, double* %stack_var_-28, align 8
  %v8_ad = fpext double %v3_ad to x86_fp80
  store x86_fp80 %v8_ad, x86_fp80* %st6.global-to-local, align 4
  %v3_b0 = add i32 %v2_aa, -92
  %v4_b0 = inttoptr i32 %v3_b0 to double*
  %v5_b0 = load double, double* %v4_b0, align 4
  %v6_b0 = fpext double %v5_b0 to x86_fp80
  %v7_b0 = fmul x86_fp80 %v8_ad, %v6_b0
  store x86_fp80 %v7_b0, x86_fp80* %st6.global-to-local, align 4
  %v4_b3 = fadd x86_fp80 %v7_aa, %v7_b0
  store x86_fp80 %v4_b3, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_be, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_b5 = add i32 %v2_aa, -76
  %v2_b5 = inttoptr i32 %v1_b5 to i32*
  %v3_b5 = load i32, i32* %v2_b5, align 4
  %v10_b5 = icmp eq i32 %v3_b5, 0
  %v1_b9 = icmp eq i1 %v10_b5, false
  br i1 %v1_b9, label %dec_label_pc_be, label %dec_label_pc_bb

dec_label_pc_bb:                                  ; preds = %dec_label_pc_aa
  %v3_bb = add i32 %v2_aa, -32
  %v4_bb = inttoptr i32 %v3_bb to double*
  %v5_bb = load double, double* %v4_bb, align 4
  %v6_bb = fpext double %v5_bb to x86_fp80
  %v7_bb = fdiv x86_fp80 %v4_b3, %v6_bb
  store x86_fp80 %v7_bb, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_be

dec_label_pc_be:                                  ; preds = %dec_label_pc_bb, %dec_label_pc_aa
  %v1_be = phi x86_fp80 [ %v7_bb, %dec_label_pc_bb ], [ %v4_b3, %dec_label_pc_aa ]
  %v2_be = load i32, i32* %esi.global-to-local, align 4
  %v3_be = add i32 %v2_be, -32
  %v4_be = fptrunc x86_fp80 %v1_be to double
  %v5_be = inttoptr i32 %v3_be to double*
  store double %v4_be, double* %v5_be, align 4
  %v6_be = add i3 %v0_be, 1
  store i3 %v6_be, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_c4 = load i32, i32* %eax.global-to-local, align 4
  ret i32 %v0_c4
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
