source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8
@global_var_1.1 = constant i8 -117

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_9 = load i32, i32* %esi.global-to-local, align 4
  %v0_a = load i32, i32* %edi.global-to-local, align 4
  %v0_b = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_f = load i32, i32* @eax, align 8
  store i32 %v0_f, i32* %ebx.global-to-local, align 4
  %v1_11 = add i32 %arg1, 48
  %v2_11 = inttoptr i32 %v1_11 to i32*
  %v3_11 = load i32, i32* %v2_11, align 4
  store i32 %v3_11, i32* %edi.global-to-local, align 4
  %v0_14 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_14 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_14 = fpext double %v3_14 to x86_fp80
  store x86_fp80 %v4_14, x86_fp80* %st7.global-to-local, align 4
  %v3_16 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_16 = fpext double %v3_16 to x86_fp80
  store x86_fp80 %v4_16, x86_fp80* %st6.global-to-local, align 4
  %v3_18 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_18 = fpext double %v3_18 to x86_fp80
  %v3_1c = add i32 %v3_11, -36
  %v4_1c = inttoptr i32 %v3_1c to float*
  %v5_1c = load float, float* %v4_1c, align 4
  %v6_1c = fpext float %v5_1c to x86_fp80
  %v7_1c = fmul x86_fp80 %v4_18, %v6_1c
  %v3_21 = add i32 %v3_11, -40
  %v4_21 = inttoptr i32 %v3_21 to float*
  %v5_21 = load float, float* %v4_21, align 4
  %v6_21 = fpext float %v5_21 to x86_fp80
  %v7_21 = fmul x86_fp80 %v4_16, %v6_21
  %v4_24 = fadd x86_fp80 %v7_1c, %v7_21
  %v3_28 = add i32 %v3_11, -44
  %v4_28 = inttoptr i32 %v3_28 to float*
  %v5_28 = load float, float* %v4_28, align 4
  %v6_28 = fpext float %v5_28 to x86_fp80
  %v7_28 = fmul x86_fp80 %v4_14, %v6_28
  %v4_2b = fadd x86_fp80 %v7_28, %v4_24
  %v3_2f = add i32 %v3_11, -12
  %v4_2f = inttoptr i32 %v3_2f to float*
  %v5_2f = load float, float* %v4_2f, align 4
  %v6_2f = fpext float %v5_2f to x86_fp80
  %v7_2f = fmul x86_fp80 %v4_18, %v6_2f
  %v3_34 = add i32 %v3_11, -16
  %v4_34 = inttoptr i32 %v3_34 to float*
  %v5_34 = load float, float* %v4_34, align 4
  %v6_34 = fpext float %v5_34 to x86_fp80
  %v7_34 = fmul x86_fp80 %v4_16, %v6_34
  %v4_37 = fadd x86_fp80 %v7_2f, %v7_34
  %v3_3b = add i32 %v3_11, -20
  %v4_3b = inttoptr i32 %v3_3b to float*
  %v5_3b = load float, float* %v4_3b, align 4
  %v6_3b = fpext float %v5_3b to x86_fp80
  %v7_3b = fmul x86_fp80 %v4_14, %v6_3b
  %v4_3e = fadd x86_fp80 %v4_37, %v7_3b
  %v3_42 = add i32 %v3_11, -24
  %v4_42 = inttoptr i32 %v3_42 to float*
  %v5_42 = load float, float* %v4_42, align 4
  %v6_42 = fpext float %v5_42 to x86_fp80
  %v7_42 = fmul x86_fp80 %v4_18, %v6_42
  store x86_fp80 %v7_42, x86_fp80* %st6.global-to-local, align 4
  %v3_47 = add i32 %v3_11, -28
  %v4_47 = inttoptr i32 %v3_47 to float*
  %v5_47 = load float, float* %v4_47, align 4
  %v6_47 = fpext float %v5_47 to x86_fp80
  %v7_47 = fmul x86_fp80 %v4_16, %v6_47
  %v4_4a = fadd x86_fp80 %v7_42, %v7_47
  store x86_fp80 %v4_4a, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_2b, x86_fp80* %st7.global-to-local, align 4
  %v3_4e = add i32 %v3_11, -32
  %v4_4e = inttoptr i32 %v3_4e to float*
  %v5_4e = load float, float* %v4_4e, align 4
  %v6_4e = fpext float %v5_4e to x86_fp80
  %v7_4e = fmul x86_fp80 %v4_14, %v6_4e
  %v4_51 = fadd x86_fp80 %v4_4a, %v7_4e
  store x86_fp80 %v4_51, x86_fp80* %st6.global-to-local, align 4
  %v3_53 = fptrunc x86_fp80 %v4_3e to double
  %v4_53 = inttoptr i32 %v0_f to double*
  store double %v3_53, double* %v4_53, align 4
  %v1_55 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v2_55 = load i32, i32* @edx, align 8
  %v3_55 = fptrunc x86_fp80 %v1_55 to double
  %v4_55 = inttoptr i32 %v2_55 to double*
  store double %v3_55, double* %v4_55, align 4
  %v1_57 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_57 = load i32, i32* @ecx, align 8
  %v3_57 = fptrunc x86_fp80 %v1_57 to double
  %v4_57 = inttoptr i32 %v2_57 to double*
  store double %v3_57, double* %v4_57, align 4
  %v5_57 = add i3 %v0_14, add (i3 add (i3 add (i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3))))))
  store i3 %v5_57, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_5b = add i32 %v3_11, -80
  %v2_5b = inttoptr i32 %v1_5b to i32*
  %v3_5b = load i32, i32* %v2_5b, align 4
  %v13_5b = icmp eq i32 %v3_5b, 1
  %v1_5f = icmp eq i1 %v13_5b, false
  br i1 %v1_5f, label %dec_label_pc_7a, label %dec_label_pc_61

dec_label_pc_61:                                  ; preds = %dec_label_pc_0
  %v3_61 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_61 = fpext double %v3_61 to x86_fp80
  %v5_61 = sub i3 %v5_57, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v5_61, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_63 = fmul x86_fp80 %v4_61, %v4_61
  store x86_fp80 %v3_63, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_67

dec_label_pc_67:                                  ; preds = %dec_label_pc_7a, %dec_label_pc_61
  %v3_69 = phi x86_fp80 [ %v3_63, %dec_label_pc_61 ], [ %v3_7d, %dec_label_pc_7a ]
  %storemerge4.in = phi i3 [ %v5_61, %dec_label_pc_61 ], [ %v6_7a, %dec_label_pc_7a ]
  %storemerge1.in.in = phi double* [ bitcast (i32* @edx to double*), %dec_label_pc_61 ], [ %v3_7f, %dec_label_pc_7a ]
  %storemerge1.in = load double, double* %storemerge1.in.in, align 4
  %storemerge4 = sub i3 %storemerge4.in, ptrtoint (i8* @global_var_1.1 to i3)
  %storemerge1 = fpext double %storemerge1.in to x86_fp80
  %v3_67 = fmul x86_fp80 %storemerge1, %storemerge1
  store x86_fp80 %v3_67, x86_fp80* %st6.global-to-local, align 4
  %v4_69 = fadd x86_fp80 %v3_69, %v3_67
  store i3 %storemerge4.in, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_6b = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_69)
  store x86_fp80 %v2_6b, x86_fp80* %st7.global-to-local, align 4
  %v3_70 = add i32 %v3_11, -52
  %v4_70 = inttoptr i32 %v3_70 to double*
  %v5_70 = load double, double* %v4_70, align 4
  %v6_70 = fpext double %v5_70 to x86_fp80
  %v7_70 = fmul x86_fp80 %v2_6b, %v6_70
  %v2_73 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_70)
  %v3_73 = fcmp olt x86_fp80 %v2_73, 0xK403E8000000000000000
  %v4_73 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_70)
  %storemerge9 = select i1 %v3_73, x86_fp80 %v4_73, x86_fp80 %v7_70
  store x86_fp80 %storemerge9, x86_fp80* %st7.global-to-local, align 4
  %v3_75 = add i32 %v3_11, -60
  %v4_75 = inttoptr i32 %v3_75 to double*
  %v5_75 = load double, double* %v4_75, align 4
  %v6_75 = fpext double %v5_75 to x86_fp80
  %v7_75 = fmul x86_fp80 %storemerge9, %v6_75
  store x86_fp80 %v7_75, x86_fp80* %st7.global-to-local, align 4
  %v1_84 = add i32 %v3_11, -84
  %v2_84 = inttoptr i32 %v1_84 to i32*
  %v3_84 = load i32, i32* %v2_84, align 4
  %v13_84 = icmp eq i32 %v3_84, 1
  %v1_88 = icmp eq i1 %v13_84, false
  br i1 %v1_88, label %dec_label_pc_9d, label %dec_label_pc_8a

dec_label_pc_7a:                                  ; preds = %dec_label_pc_0
  %v2_7a = add i32 %arg1, 24
  %v3_7a = inttoptr i32 %v2_7a to double*
  %v4_7a = load double, double* %v3_7a, align 4
  %v5_7a = fpext double %v4_7a to x86_fp80
  %v6_7a = sub i3 %v5_57, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v6_7a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_7d = fmul x86_fp80 %v5_7a, %v5_7a
  store x86_fp80 %v3_7d, x86_fp80* %st7.global-to-local, align 4
  %v2_7f = add i32 %arg1, 32
  %v3_7f = inttoptr i32 %v2_7f to double*
  br label %dec_label_pc_67

dec_label_pc_8a:                                  ; preds = %dec_label_pc_67
  %v3_8a = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_8a = fpext double %v3_8a to x86_fp80
  store i3 %storemerge4, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_8a, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_8e

dec_label_pc_8e:                                  ; preds = %dec_label_pc_9d, %dec_label_pc_8a
  %storemerge.in.in = phi double* [ bitcast (i32* @eax to double*), %dec_label_pc_8a ], [ %v3_a0, %dec_label_pc_9d ]
  %storemerge.in = load double, double* %storemerge.in.in, align 4
  %storemerge5 = sub i3 %storemerge4, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %storemerge5, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_8e = call i32 @__asm_fpatan(i32 %v0_b, i32 %v0_a, i32 %v0_9)
  store i32 %v3_8e, i32* @eax, align 8
  %v2_93 = load i32, i32* %edi.global-to-local, align 4
  %v1_98 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_98 = add i32 %v2_93, -76
  %v4_98 = inttoptr i32 %v3_98 to double*
  %v5_98 = load double, double* %v4_98, align 4
  %v6_98 = fpext double %v5_98 to x86_fp80
  %v7_98 = fmul x86_fp80 %v1_98, %v6_98
  %v0_a5 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_a7 = fadd x86_fp80 %v7_98, 0xK3FFF8000000000000000
  %v4_a9 = fadd x86_fp80 %v4_a7, %v4_a7
  %v7_ab = fmul x86_fp80 %v4_a9, %v2_6b
  %v2_ae = load i32, i32* %ebx.global-to-local, align 4
  %v3_ae = fptrunc x86_fp80 %v7_ab to double
  %v4_ae = inttoptr i32 %v2_ae to double*
  store double %v3_ae, double* %v4_ae, align 4
  %v2_b3 = load i32, i32* @edx, align 8
  %v4_b3 = inttoptr i32 %v2_b3 to double*
  store double %storemerge.in, double* %v4_b3, align 4
  %v3_b5 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_b5 = fpext double %v3_b5 to x86_fp80
  %v3_b7 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_b7 = fpext double %v3_b7 to x86_fp80
  %v2_b9 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_b7)
  %v3_b9 = fcmp olt x86_fp80 %v2_b9, 0xK403E8000000000000000
  %v4_b9 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v4_b7)
  %storemerge7 = select i1 %v3_b9, x86_fp80 %v4_b9, x86_fp80 %v4_b7
  %v4_bb = fmul x86_fp80 %storemerge7, %v4_b5
  %v4_c3 = fmul x86_fp80 %v4_bb, %v4_bb
  store x86_fp80 %v4_c3, x86_fp80* %st7.global-to-local, align 4
  %tmp250 = bitcast double %v3_b7 to i64
  %tmp251 = trunc i64 %tmp250 to i32
  %v3_c5 = fptrunc x86_fp80 %v4_c3 to double
  %v4_c5 = inttoptr i32 %tmp251 to double*
  store double %v3_c5, double* %v4_c5, align 4
  %v1_c7 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_c7 = fptrunc x86_fp80 %v1_c7 to double
  store double %v3_c7, double* %v4_ae, align 4
  %v3_cb = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_cb = fpext double %v3_cb to x86_fp80
  store x86_fp80 %v4_cb, x86_fp80* %st7.global-to-local, align 4
  %v3_cd = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_cd = fpext double %v3_cd to x86_fp80
  store x86_fp80 %v4_cd, x86_fp80* %st6.global-to-local, align 4
  %v3_cf = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_cf = fpext double %v3_cf to x86_fp80
  %v3_d3 = add i32 %v2_93, -20
  %v4_d3 = inttoptr i32 %v3_d3 to float*
  %v5_d3 = load float, float* %v4_d3, align 4
  %v6_d3 = fpext float %v5_d3 to x86_fp80
  %v7_d3 = fmul x86_fp80 %v4_cf, %v6_d3
  %v3_d8 = add i32 %v2_93, -32
  %v4_d8 = inttoptr i32 %v3_d8 to float*
  %v5_d8 = load float, float* %v4_d8, align 4
  %v6_d8 = fpext float %v5_d8 to x86_fp80
  %v7_d8 = fmul x86_fp80 %v4_cd, %v6_d8
  %v4_db = fadd x86_fp80 %v7_d3, %v7_d8
  %v3_df = add i32 %v2_93, -44
  %v4_df = inttoptr i32 %v3_df to float*
  %v5_df = load float, float* %v4_df, align 4
  %v6_df = fpext float %v5_df to x86_fp80
  %v7_df = fmul x86_fp80 %v4_cb, %v6_df
  %v4_e2 = fadd x86_fp80 %v7_df, %v4_db
  %v3_e6 = add i32 %v2_93, -12
  %v4_e6 = inttoptr i32 %v3_e6 to float*
  %v5_e6 = load float, float* %v4_e6, align 4
  %v6_e6 = fpext float %v5_e6 to x86_fp80
  %v7_e6 = fmul x86_fp80 %v4_cf, %v6_e6
  %v3_eb = add i32 %v2_93, -24
  %v4_eb = inttoptr i32 %v3_eb to float*
  %v5_eb = load float, float* %v4_eb, align 4
  %v6_eb = fpext float %v5_eb to x86_fp80
  %v7_eb = fmul x86_fp80 %v4_cd, %v6_eb
  %v4_ee = fadd x86_fp80 %v7_e6, %v7_eb
  %v3_f2 = add i32 %v2_93, -36
  %v4_f2 = inttoptr i32 %v3_f2 to float*
  %v5_f2 = load float, float* %v4_f2, align 4
  %v6_f2 = fpext float %v5_f2 to x86_fp80
  %v7_f2 = fmul x86_fp80 %v4_cb, %v6_f2
  %v4_f5 = fadd x86_fp80 %v4_ee, %v7_f2
  %v3_f9 = add i32 %v2_93, -16
  %v4_f9 = inttoptr i32 %v3_f9 to float*
  %v5_f9 = load float, float* %v4_f9, align 4
  %v6_f9 = fpext float %v5_f9 to x86_fp80
  %v7_f9 = fmul x86_fp80 %v4_cf, %v6_f9
  store x86_fp80 %v7_f9, x86_fp80* %st6.global-to-local, align 4
  %v3_fe = add i32 %v2_93, -28
  %v4_fe = inttoptr i32 %v3_fe to float*
  %v5_fe = load float, float* %v4_fe, align 4
  %v6_fe = fpext float %v5_fe to x86_fp80
  %v7_fe = fmul x86_fp80 %v4_cd, %v6_fe
  %v4_101 = fadd x86_fp80 %v7_f9, %v7_fe
  store x86_fp80 %v4_101, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_e2, x86_fp80* %st7.global-to-local, align 4
  %v3_105 = add i32 %v2_93, -40
  %v4_105 = inttoptr i32 %v3_105 to float*
  %v5_105 = load float, float* %v4_105, align 4
  %v6_105 = fpext float %v5_105 to x86_fp80
  %v7_105 = fmul x86_fp80 %v4_cb, %v6_105
  %v4_108 = fadd x86_fp80 %v4_101, %v7_105
  store x86_fp80 %v4_108, x86_fp80* %st6.global-to-local, align 4
  %v3_10a = fptrunc x86_fp80 %v4_f5 to double
  store double %v3_10a, double* %v4_ae, align 4
  %v1_10c = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v2_10c = load i32, i32* @edx, align 8
  %v3_10c = fptrunc x86_fp80 %v1_10c to double
  %v4_10c = inttoptr i32 %v2_10c to double*
  store double %v3_10c, double* %v4_10c, align 4
  %v1_10e = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_10e = load i32, i32* @ecx, align 8
  %v3_10e = fptrunc x86_fp80 %v1_10e to double
  %v4_10e = inttoptr i32 %v2_10e to double*
  store double %v3_10e, double* %v4_10e, align 4
  %v5_10e = add i3 %v0_a5, add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 1)
  store i3 %v5_10e, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_ae, i32* @eax, align 8
  store i32 %v0_b, i32* %ebx.global-to-local, align 4
  store i32 %v0_a, i32* %edi.global-to-local, align 4
  store i32 %v0_9, i32* %esi.global-to-local, align 4
  ret i32 %v2_ae

dec_label_pc_9d:                                  ; preds = %dec_label_pc_67
  %v2_9d = add i32 %arg1, 32
  %v3_9d = inttoptr i32 %v2_9d to double*
  %v4_9d = load double, double* %v3_9d, align 4
  %v5_9d = fpext double %v4_9d to x86_fp80
  store i3 %storemerge4, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_9d, x86_fp80* %st6.global-to-local, align 4
  %v2_a0 = add i32 %arg1, 24
  %v3_a0 = inttoptr i32 %v2_a0 to double*
  br label %dec_label_pc_8e
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

declare i32 @__asm_fpatan(i32, i32, i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

attributes #0 = { nounwind readnone speculatable }
