source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %ebx.global-to-local, align 4
  %v0_4 = load i32, i32* %esi.global-to-local, align 4
  %v0_5 = load i32, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  %v0_d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_d = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_d = fpext double %v3_d to x86_fp80
  store x86_fp80 %v4_d, x86_fp80* %st7.global-to-local, align 4
  %v3_f = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_f = fpext double %v3_f to x86_fp80
  store x86_fp80 %v4_f, x86_fp80* %st6.global-to-local, align 4
  %v3_11 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_11 = fpext double %v3_11 to x86_fp80
  store x86_fp80 %v4_11, x86_fp80* %st5.global-to-local, align 4
  %v3_15 = add i32 %v3_a, -68
  %v4_15 = inttoptr i32 %v3_15 to float*
  %v5_15 = load float, float* %v4_15, align 4
  %v6_15 = fpext float %v5_15 to x86_fp80
  %v7_15 = fmul x86_fp80 %v4_11, %v6_15
  %v3_1a = add i32 %v3_a, -72
  %v4_1a = inttoptr i32 %v3_1a to float*
  %v5_1a = load float, float* %v4_1a, align 4
  %v6_1a = fpext float %v5_1a to x86_fp80
  %v7_1a = fmul x86_fp80 %v4_f, %v6_1a
  %v4_1d = fadd x86_fp80 %v7_15, %v7_1a
  %v3_21 = add i32 %v3_a, -76
  %v4_21 = inttoptr i32 %v3_21 to float*
  %v5_21 = load float, float* %v4_21, align 4
  %v6_21 = fpext float %v5_21 to x86_fp80
  %v7_21 = fmul x86_fp80 %v4_d, %v6_21
  %v4_24 = fadd x86_fp80 %v7_21, %v4_1d
  %v3_28 = add i32 %v3_a, -44
  %v4_28 = inttoptr i32 %v3_28 to float*
  %v5_28 = load float, float* %v4_28, align 4
  %v6_28 = fpext float %v5_28 to x86_fp80
  %v7_28 = fmul x86_fp80 %v4_11, %v6_28
  %v3_2d = add i32 %v3_a, -48
  %v4_2d = inttoptr i32 %v3_2d to float*
  %v5_2d = load float, float* %v4_2d, align 4
  %v6_2d = fpext float %v5_2d to x86_fp80
  %v7_2d = fmul x86_fp80 %v4_f, %v6_2d
  %v4_30 = fadd x86_fp80 %v7_28, %v7_2d
  %v3_34 = add i32 %v3_a, -52
  %v4_34 = inttoptr i32 %v3_34 to float*
  %v5_34 = load float, float* %v4_34, align 4
  %v6_34 = fpext float %v5_34 to x86_fp80
  %v7_34 = fmul x86_fp80 %v4_d, %v6_34
  %v4_37 = fadd x86_fp80 %v4_30, %v7_34
  store x86_fp80 %v4_37, x86_fp80* %st5.global-to-local, align 4
  %v3_3b = add i32 %v3_a, -56
  %v4_3b = inttoptr i32 %v3_3b to float*
  %v5_3b = load float, float* %v4_3b, align 4
  %v6_3b = fpext float %v5_3b to x86_fp80
  %v7_3b = fmul x86_fp80 %v4_11, %v6_3b
  store x86_fp80 %v7_3b, x86_fp80* %st6.global-to-local, align 4
  %v3_40 = add i32 %v3_a, -60
  %v4_40 = inttoptr i32 %v3_40 to float*
  %v5_40 = load float, float* %v4_40, align 4
  %v6_40 = fpext float %v5_40 to x86_fp80
  %v7_40 = fmul x86_fp80 %v4_f, %v6_40
  %v4_43 = fadd x86_fp80 %v7_3b, %v7_40
  store x86_fp80 %v4_43, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_24, x86_fp80* %st7.global-to-local, align 4
  %v3_47 = add i32 %v3_a, -64
  %v4_47 = inttoptr i32 %v3_47 to float*
  %v5_47 = load float, float* %v4_47, align 4
  %v6_47 = fpext float %v5_47 to x86_fp80
  %v7_47 = fmul x86_fp80 %v4_d, %v6_47
  %v4_4a = fadd x86_fp80 %v4_43, %v7_47
  store x86_fp80 %v4_4a, x86_fp80* %st6.global-to-local, align 4
  %v7_4a = add i3 %v0_d, -3
  store i3 %v7_4a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_4c = add i32 %v3_a, -132
  %v2_4c = inttoptr i32 %v1_4c to i32*
  %v3_4c = load i32, i32* %v2_4c, align 4
  %v10_4c = icmp eq i32 %v3_4c, 0
  %v1_53 = icmp eq i1 %v10_4c, false
  br i1 %v1_53, label %dec_label_pc_a6, label %dec_label_pc_59

dec_label_pc_59:                                  ; preds = %dec_label_pc_0
  store x86_fp80 %v4_4a, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v4_37, x86_fp80* %st6.global-to-local, align 4
  %v0_5e = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5e = call i16 @__asm_fnstsw(i32 %v0_5e)
  %v2_5e = sext i16 %v1_5e to i32
  %v3_5e = load i32, i32* @eax, align 8
  %v4_5e = and i32 %v3_5e, -65536
  %tmp323 = udiv i32 %v2_5e, 2
  %v12_60 = and i32 %tmp323, 32512
  %v2_5e.masked = and i32 %v2_5e, -65281
  %v13_60 = or i32 %v4_5e, %v2_5e.masked
  %v14_60 = or i32 %v13_60, %v12_60
  store i32 %v14_60, i32* @eax, align 8
  %v15_6061 = and i32 %v2_5e, 256
  %v16_60 = icmp ne i32 %v15_6061, 0
  %v1_62 = icmp eq i1 %v16_60, false
  br i1 %v1_62, label %dec_label_pc_66, label %dec_label_pc_64

dec_label_pc_64:                                  ; preds = %dec_label_pc_59
  %v2_64 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_64 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_64, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_64, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_66

dec_label_pc_66:                                  ; preds = %dec_label_pc_64, %dec_label_pc_59
  %v0_68 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_68 = call i16 @__asm_fnstsw(i32 %v0_68)
  %v2_68 = sext i16 %v1_68 to i32
  %v3_68 = load i32, i32* @eax, align 8
  %v4_68 = and i32 %v3_68, -65536
  %tmp324 = udiv i32 %v2_68, 2
  %v12_6a = and i32 %tmp324, 32512
  %v2_68.masked = and i32 %v2_68, -65281
  %v13_6a = or i32 %v4_68, %v2_68.masked
  %v14_6a = or i32 %v13_6a, %v12_6a
  store i32 %v14_6a, i32* @eax, align 8
  %v0_74 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_74 = call i16 @__asm_fnstsw(i32 %v0_74)
  %v2_74 = sext i16 %v1_74 to i32
  %v3_74 = load i32, i32* @eax, align 8
  %v4_74 = and i32 %v3_74, -65536
  %tmp325 = udiv i32 %v2_74, 2
  %v12_76 = and i32 %tmp325, 32512
  %v2_74.masked = and i32 %v2_74, -65281
  %v13_76 = or i32 %v4_74, %v2_74.masked
  %v14_76 = or i32 %v13_76, %v12_76
  store i32 %v14_76, i32* @eax, align 8
  %v1_7c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_7c = fsub x86_fp80 0xK80000000000000000000, %v1_7c
  store x86_fp80 %v2_7c, x86_fp80* %st7.global-to-local, align 4
  %v0_80 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_80 = call i16 @__asm_fnstsw(i32 %v0_80)
  %v2_80 = sext i16 %v1_80 to i32
  %v3_80 = load i32, i32* @eax, align 8
  %v4_80 = and i32 %v3_80, -65536
  %tmp326 = udiv i32 %v2_80, 2
  %v12_82 = and i32 %tmp326, 32512
  %v2_80.masked = and i32 %v2_80, -65281
  %v13_82 = or i32 %v4_80, %v2_80.masked
  %v14_82 = or i32 %v13_82, %v12_82
  store i32 %v14_82, i32* @eax, align 8
  %v0_8a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_8a = call i16 @__asm_fnstsw(i32 %v0_8a)
  %v2_8a = sext i16 %v1_8a to i32
  %v3_8a = load i32, i32* @eax, align 8
  %v4_8a = and i32 %v3_8a, -65536
  %tmp327 = udiv i32 %v2_8a, 2
  %v12_8c = and i32 %tmp327, 32512
  %v2_8a.masked = and i32 %v2_8a, -65281
  %v13_8c = or i32 %v4_8a, %v2_8a.masked
  %v14_8c = or i32 %v13_8c, %v12_8c
  store i32 %v14_8c, i32* @eax, align 8
  %v0_9a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_9a = call i16 @__asm_fnstsw(i32 %v0_9a)
  %v2_9a = sext i16 %v1_9a to i32
  %v3_9a = load i32, i32* @eax, align 8
  %v4_9a = and i32 %v3_9a, -65536
  %tmp328 = udiv i32 %v2_9a, 2
  %v12_9c = and i32 %tmp328, 32512
  %v2_9a.masked = and i32 %v2_9a, -65281
  %v13_9c = or i32 %v4_9a, %v2_9a.masked
  %v14_9c = or i32 %v13_9c, %v12_9c
  store i32 %v14_9c, i32* @eax, align 8
  %v1_a2 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_a2 = fsub x86_fp80 0xK80000000000000000000, %v1_a2
  store x86_fp80 %v2_a2, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f1

dec_label_pc_a6:                                  ; preds = %dec_label_pc_0
  %v2_a6 = fsub x86_fp80 0xK80000000000000000000, %v4_37
  store x86_fp80 %v2_a6, x86_fp80* %st5.global-to-local, align 4
  %v0_aa = load i32, i32* %fpsw.global-to-local, align 4
  %v1_aa = call i16 @__asm_fnstsw(i32 %v0_aa)
  %v2_aa = sext i16 %v1_aa to i32
  %v3_aa = load i32, i32* @eax, align 8
  %v4_aa = and i32 %v3_aa, -65536
  %tmp329 = udiv i32 %v2_aa, 2
  %v12_ac = and i32 %tmp329, 32512
  %v2_aa.masked = and i32 %v2_aa, -65281
  %v13_ac = or i32 %v4_aa, %v2_aa.masked
  %v14_ac = or i32 %v13_ac, %v12_ac
  store i32 %v14_ac, i32* @eax, align 8
  %v15_ac69 = and i32 %v2_aa, 256
  %v16_ac = icmp eq i32 %v15_ac69, 0
  br i1 %v16_ac, label %dec_label_pc_b0, label %dec_label_pc_b2

dec_label_pc_b0:                                  ; preds = %dec_label_pc_a6
  %v2_b0 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_b0 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_b0, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_b0, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_b2

dec_label_pc_b2:                                  ; preds = %dec_label_pc_a6, %dec_label_pc_b0
  %v0_b4 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_b4 = call i16 @__asm_fnstsw(i32 %v0_b4)
  %v2_b4 = sext i16 %v1_b4 to i32
  %v3_b4 = load i32, i32* @eax, align 8
  %v4_b4 = and i32 %v3_b4, -65536
  %tmp330 = udiv i32 %v2_b4, 2
  %v12_b6 = and i32 %tmp330, 32512
  %v2_b4.masked = and i32 %v2_b4, -65281
  %v13_b6 = or i32 %v4_b4, %v2_b4.masked
  %v14_b6 = or i32 %v13_b6, %v12_b6
  store i32 %v14_b6, i32* @eax, align 8
  %v0_c4 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_c4 = call i16 @__asm_fnstsw(i32 %v0_c4)
  %v2_c4 = sext i16 %v1_c4 to i32
  %v3_c4 = load i32, i32* @eax, align 8
  %v4_c4 = and i32 %v3_c4, -65536
  %tmp331 = udiv i32 %v2_c4, 2
  %v12_c6 = and i32 %tmp331, 32512
  %v2_c4.masked = and i32 %v2_c4, -65281
  %v13_c6 = or i32 %v4_c4, %v2_c4.masked
  %v14_c6 = or i32 %v13_c6, %v12_c6
  store i32 %v14_c6, i32* @eax, align 8
  %v1_cc = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_cc = fsub x86_fp80 0xK80000000000000000000, %v1_cc
  store x86_fp80 %v2_cc, x86_fp80* %st7.global-to-local, align 4
  %v0_d2 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_d2 = call i16 @__asm_fnstsw(i32 %v0_d2)
  %v2_d2 = sext i16 %v1_d2 to i32
  %v3_d2 = load i32, i32* @eax, align 8
  %v4_d2 = and i32 %v3_d2, -65536
  %tmp332 = udiv i32 %v2_d2, 2
  %v12_d4 = and i32 %tmp332, 32512
  %v2_d2.masked = and i32 %v2_d2, -65281
  %v13_d4 = or i32 %v4_d2, %v2_d2.masked
  %v14_d4 = or i32 %v13_d4, %v12_d4
  store i32 %v14_d4, i32* @eax, align 8
  %v0_dc = load i32, i32* %fpsw.global-to-local, align 4
  %v1_dc = call i16 @__asm_fnstsw(i32 %v0_dc)
  %v2_dc = sext i16 %v1_dc to i32
  %v3_dc = load i32, i32* @eax, align 8
  %v4_dc = and i32 %v3_dc, -65536
  %tmp333 = udiv i32 %v2_dc, 2
  %v12_de = and i32 %tmp333, 32512
  %v2_dc.masked = and i32 %v2_dc, -65281
  %v13_de = or i32 %v4_dc, %v2_dc.masked
  %v14_de = or i32 %v13_de, %v12_de
  store i32 %v14_de, i32* @eax, align 8
  %v0_e8 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_e8 = call i16 @__asm_fnstsw(i32 %v0_e8)
  %v2_e8 = sext i16 %v1_e8 to i32
  %v3_e8 = load i32, i32* @eax, align 8
  %v4_e8 = and i32 %v3_e8, -65536
  %tmp334 = udiv i32 %v2_e8, 2
  %v12_ea = and i32 %tmp334, 32512
  %v2_e8.masked = and i32 %v2_e8, -65281
  %v13_ea = or i32 %v4_e8, %v2_e8.masked
  %v14_ea = or i32 %v13_ea, %v12_ea
  store i32 %v14_ea, i32* @eax, align 8
  br label %dec_label_pc_f1

dec_label_pc_f1:                                  ; preds = %dec_label_pc_b2, %dec_label_pc_66
  %v0_f1 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_f1 = load i32, i32* %esi.global-to-local, align 4
  %v2_f1 = add i32 %v1_f1, -120
  %v3_f1 = inttoptr i32 %v2_f1 to double*
  %v4_f1 = load double, double* %v3_f1, align 4
  %v5_f1 = fpext double %v4_f1 to x86_fp80
  %v6_f1 = add i3 %v0_f1, -1
  store x86_fp80 %v5_f1, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st5.global-to-local, align 4
  store i3 %v6_f1, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_f8 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_f8 = call i16 @__asm_fnstsw(i32 %v0_f8)
  %v2_f8 = sext i16 %v1_f8 to i32
  %v3_f8 = load i32, i32* @eax, align 8
  %v4_f8 = and i32 %v3_f8, -65536
  %tmp335 = udiv i32 %v2_f8, 2
  %v12_fa = and i32 %tmp335, 32512
  %v2_f8.masked = and i32 %v2_f8, -65281
  %v13_fa = or i32 %v4_f8, %v2_f8.masked
  %v14_fa = or i32 %v13_fa, %v12_fa
  store i32 %v14_fa, i32* @eax, align 8
  %v15_fa67 = and i32 %v2_f8, 256
  %v16_fa = icmp ne i32 %v15_fa67, 0
  %v1_fc = icmp eq i1 %v16_fa, false
  br i1 %v1_fc, label %dec_label_pc_f1.dec_label_pc_109_crit_edge, label %dec_label_pc_fe

dec_label_pc_f1.dec_label_pc_109_crit_edge:       ; preds = %dec_label_pc_f1
  %v1_10d.pre = load i32, i32* %esi.global-to-local, align 4
  br label %dec_label_pc_109

dec_label_pc_fe:                                  ; preds = %dec_label_pc_f1
  %v2_fe = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_fe = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_fe = fsub x86_fp80 %v2_fe, %v3_fe
  store x86_fp80 %v4_fe, x86_fp80* %st6.global-to-local, align 4
  %v2_100 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v3_fe)
  %v2_102 = fsub x86_fp80 0xK80000000000000000000, %v2_100
  store x86_fp80 %v2_102, x86_fp80* %st7.global-to-local, align 4
  %v2_104 = load i32, i32* %esi.global-to-local, align 4
  %v3_104 = add i32 %v2_104, -120
  %v4_104 = inttoptr i32 %v3_104 to double*
  %v5_104 = load double, double* %v4_104, align 4
  %v6_104 = fpext double %v5_104 to x86_fp80
  %v7_104 = fsub x86_fp80 %v6_104, %v2_100
  store x86_fp80 %v7_104, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_109

dec_label_pc_109:                                 ; preds = %dec_label_pc_f1.dec_label_pc_109_crit_edge, %dec_label_pc_fe
  %v1_10d = phi i32 [ %v1_10d.pre, %dec_label_pc_f1.dec_label_pc_109_crit_edge ], [ %v2_104, %dec_label_pc_fe ]
  %v2_10d = add i32 %v1_10d, -128
  %v3_10d = inttoptr i32 %v2_10d to double*
  %v4_10d = load double, double* %v3_10d, align 4
  %v5_10d = fpext double %v4_10d to x86_fp80
  store x86_fp80 %v5_10d, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st5.global-to-local, align 4
  %v0_114 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_114 = call i16 @__asm_fnstsw(i32 %v0_114)
  %v2_114 = sext i16 %v1_114 to i32
  %v3_114 = load i32, i32* @eax, align 8
  %v4_114 = and i32 %v3_114, -65536
  %tmp336 = udiv i32 %v2_114, 2
  %v12_116 = and i32 %tmp336, 32512
  %v2_114.masked = and i32 %v2_114, -65281
  %v13_116 = or i32 %v4_114, %v2_114.masked
  %v14_116 = or i32 %v13_116, %v12_116
  store i32 %v14_116, i32* @eax, align 8
  %v15_11668 = and i32 %v2_114, 256
  %v16_116 = icmp ne i32 %v15_11668, 0
  %v1_118 = icmp eq i1 %v16_116, false
  br i1 %v1_118, label %dec_label_pc_109.dec_label_pc_125_crit_edge, label %dec_label_pc_11a

dec_label_pc_109.dec_label_pc_125_crit_edge:      ; preds = %dec_label_pc_109
  %v1_128.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_12a.pre = load i32, i32* %esi.global-to-local, align 4
  br label %dec_label_pc_125

dec_label_pc_11a:                                 ; preds = %dec_label_pc_109
  %v2_11a = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_11a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_11a = fsub x86_fp80 %v2_11a, %v3_11a
  %v2_11c = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_11a)
  %v2_11e = fsub x86_fp80 0xK80000000000000000000, %v2_11c
  store x86_fp80 %v2_11e, x86_fp80* %st6.global-to-local, align 4
  %v2_120 = load i32, i32* %esi.global-to-local, align 4
  %v3_120 = add i32 %v2_120, -128
  %v4_120 = inttoptr i32 %v3_120 to double*
  %v5_120 = load double, double* %v4_120, align 4
  %v6_120 = fpext double %v5_120 to x86_fp80
  %v7_120 = fsub x86_fp80 %v6_120, %v2_11c
  store x86_fp80 %v3_11a, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v7_120, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_125

dec_label_pc_125:                                 ; preds = %dec_label_pc_109.dec_label_pc_125_crit_edge, %dec_label_pc_11a
  %v2_178 = phi i32 [ %v2_12a.pre, %dec_label_pc_109.dec_label_pc_125_crit_edge ], [ %v2_120, %dec_label_pc_11a ]
  %v3_14e = phi x86_fp80 [ %v1_128.pre, %dec_label_pc_109.dec_label_pc_125_crit_edge ], [ %v7_120, %dec_label_pc_11a ]
  %v0_125 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v3_14e, x86_fp80* %st6.global-to-local, align 4
  %v3_12a = add i32 %v2_178, -104
  %v4_12a = inttoptr i32 %v3_12a to float*
  %v5_12a = load float, float* %v4_12a, align 4
  %v6_12a = fpext float %v5_12a to x86_fp80
  %v7_12a = fmul x86_fp80 %v3_14e, %v6_12a
  store x86_fp80 %v7_12a, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_14e, x86_fp80* %st5.global-to-local, align 4
  %v3_12f = add i32 %v2_178, -108
  %v4_12f = inttoptr i32 %v3_12f to float*
  %v5_12f = load float, float* %v4_12f, align 4
  %v6_12f = fpext float %v5_12f to x86_fp80
  %v7_12f = fmul x86_fp80 %v3_14e, %v6_12f
  %v4_132 = fadd x86_fp80 %v7_12a, %v7_12f
  store x86_fp80 %v4_132, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_14e, x86_fp80* %st5.global-to-local, align 4
  %v3_136 = add i32 %v2_178, -112
  %v4_136 = inttoptr i32 %v3_136 to float*
  %v5_136 = load float, float* %v4_136, align 4
  %v6_136 = fpext float %v5_136 to x86_fp80
  %v7_136 = fmul x86_fp80 %v3_14e, %v6_136
  %v4_139 = fadd x86_fp80 %v4_132, %v7_136
  store x86_fp80 %v4_139, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_14e, x86_fp80* %st5.global-to-local, align 4
  %v3_13d = add i32 %v2_178, -80
  %v4_13d = inttoptr i32 %v3_13d to float*
  %v5_13d = load float, float* %v4_13d, align 4
  %v6_13d = fpext float %v5_13d to x86_fp80
  %v7_13d = fmul x86_fp80 %v3_14e, %v6_13d
  store x86_fp80 %v7_13d, x86_fp80* %st5.global-to-local, align 4
  %v3_142 = add i32 %v2_178, -84
  %v4_142 = inttoptr i32 %v3_142 to float*
  %v5_142 = load float, float* %v4_142, align 4
  %v6_142 = fpext float %v5_142 to x86_fp80
  %v7_142 = fmul x86_fp80 %v3_14e, %v6_142
  %v4_145 = fadd x86_fp80 %v7_13d, %v7_142
  store x86_fp80 %v4_145, x86_fp80* %st5.global-to-local, align 4
  %v3_149 = add i32 %v2_178, -88
  %v4_149 = inttoptr i32 %v3_149 to float*
  %v5_149 = load float, float* %v4_149, align 4
  %v6_149 = fpext float %v5_149 to x86_fp80
  %v7_149 = fmul x86_fp80 %v3_14e, %v6_149
  %v4_14c = fadd x86_fp80 %v4_145, %v7_149
  store x86_fp80 %v3_14e, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v4_14c, x86_fp80* %st7.global-to-local, align 4
  %v3_150 = add i32 %v2_178, -92
  %v4_150 = inttoptr i32 %v3_150 to float*
  %v5_150 = load float, float* %v4_150, align 4
  %v6_150 = fpext float %v5_150 to x86_fp80
  %v7_150 = fmul x86_fp80 %v3_14e, %v6_150
  store x86_fp80 %v4_14c, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v7_150, x86_fp80* %st7.global-to-local, align 4
  %v3_155 = add i32 %v2_178, -96
  %v4_155 = inttoptr i32 %v3_155 to float*
  %v5_155 = load float, float* %v4_155, align 4
  %v6_155 = fpext float %v5_155 to x86_fp80
  %v7_155 = fmul x86_fp80 %v7_150, %v6_155
  %v4_158 = fadd x86_fp80 %v7_155, %v7_155
  store x86_fp80 %v4_158, x86_fp80* %st7.global-to-local, align 4
  %v3_15c = add i32 %v2_178, -100
  %v4_15c = inttoptr i32 %v3_15c to float*
  %v5_15c = load float, float* %v4_15c, align 4
  %v6_15c = fpext float %v5_15c to x86_fp80
  %v7_15c = fmul x86_fp80 %v4_158, %v6_15c
  %v4_15f = fadd x86_fp80 %v7_15c, %v7_15c
  store x86_fp80 %v4_15f, x86_fp80* %st7.global-to-local, align 4
  %v2_161 = add i32 %v2_178, -16
  %v3_161 = inttoptr i32 %v2_161 to double*
  %v4_161 = load double, double* %v3_161, align 4
  %v5_161 = fpext double %v4_161 to x86_fp80
  store x86_fp80 %v5_161, x86_fp80* %st7.global-to-local, align 4
  %v1_164 = load i32, i32* @ecx, align 8
  %v2_164 = add i32 %v1_164, 8
  %v3_164 = inttoptr i32 %v2_164 to double*
  %v4_164 = load double, double* %v3_164, align 4
  %v5_164 = fpext double %v4_164 to x86_fp80
  %v4_167 = fmul x86_fp80 %v5_161, %v5_164
  %v4_169 = fptrunc x86_fp80 %v4_167 to double
  store double %v4_169, double* %v3_164, align 4
  %v2_16c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_16c = fmul x86_fp80 %v2_16c, %v2_16c
  %v4_16e = fmul x86_fp80 %v4_16c, %v4_16c
  %v4_170 = fmul x86_fp80 %v4_16e, %v4_16e
  %v4_174 = fadd x86_fp80 %v4_170, 0xKBFFF8000000000000000
  store x86_fp80 %v4_174, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_174, x86_fp80* %st6.global-to-local, align 4
  %v3_178 = add i32 %v2_178, -40
  %v4_178 = inttoptr i32 %v3_178 to double*
  %v5_178 = load double, double* %v4_178, align 4
  %v6_178 = fpext double %v5_178 to x86_fp80
  %v7_178 = fmul x86_fp80 %v4_174, %v6_178
  %v4_17b = fsub x86_fp80 %v4_174, %v7_178
  store x86_fp80 %v4_17b, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_17b, x86_fp80* %st6.global-to-local, align 4
  %v3_17f = add i32 %v2_178, -32
  %v4_17f = inttoptr i32 %v3_17f to double*
  %v5_17f = load double, double* %v4_17f, align 4
  %v6_17f = fpext double %v5_17f to x86_fp80
  %v7_17f = fmul x86_fp80 %v4_17b, %v6_17f
  store x86_fp80 %v7_17f, x86_fp80* %st6.global-to-local, align 4
  %v4_182 = fsub x86_fp80 %v4_17b, %v7_17f
  store x86_fp80 %v4_182, x86_fp80* %st7.global-to-local, align 4
  %v3_184 = add i32 %v2_178, -24
  %v4_184 = inttoptr i32 %v3_184 to double*
  %v5_184 = load double, double* %v4_184, align 4
  %v6_184 = fpext double %v5_184 to x86_fp80
  %v7_184 = fmul x86_fp80 %v4_182, %v6_184
  %v4_187 = fsub x86_fp80 %v7_184, %v7_184
  store x86_fp80 %v4_187, x86_fp80* %st7.global-to-local, align 4
  %v2_189 = load i32, i32* %ebx.global-to-local, align 4
  %v3_189 = fptrunc x86_fp80 %v4_187 to double
  %v4_189 = inttoptr i32 %v2_189 to double*
  store double %v3_189, double* %v4_189, align 4
  %v1_18b = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_18b = load i32, i32* @edx, align 8
  %v3_18b = fptrunc x86_fp80 %v1_18b to double
  %v4_18b = inttoptr i32 %v2_18b to double*
  store double %v3_18b, double* %v4_18b, align 4
  %v1_18d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_18d = load i32, i32* @ecx, align 8
  %v3_18d = fptrunc x86_fp80 %v1_18d to double
  %v4_18d = inttoptr i32 %v2_18d to double*
  store double %v3_18d, double* %v4_18d, align 4
  %v5_18d = xor i3 %v0_125, -4
  store i3 %v5_18d, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_189, i32* @eax, align 8
  store i32 %v0_4, i32* %esi.global-to-local, align 4
  store i32 %v0_3, i32* %ebx.global-to-local, align 4
  ret i32 %v2_189
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

attributes #0 = { nounwind readnone speculatable }
