source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %ebx.global-to-local, align 4
  %v0_4 = load i32, i32* %esi.global-to-local, align 4
  %v0_5 = load i32, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  store i32 2147483647, i32* @eax, align 8
  %v0_12 = load i32, i32* @ecx, align 8
  %v1_12 = add i32 %v0_12, 4
  %v2_12 = inttoptr i32 %v1_12 to i32*
  %v3_12 = load i32, i32* %v2_12, align 4
  %tmp256 = urem i32 %v3_12, -2147483648
  store i32 %tmp256, i32* %v2_12, align 4
  %v0_15 = load i32, i32* @edx, align 8
  %v1_15 = add i32 %v0_15, 4
  %v2_15 = inttoptr i32 %v1_15 to i32*
  %v3_15 = load i32, i32* %v2_15, align 4
  %v4_15 = load i32, i32* @eax, align 8
  %v5_15 = and i32 %v4_15, %v3_15
  store i32 %v5_15, i32* %v2_15, align 4
  %v0_18 = load i32, i32* %ebx.global-to-local, align 4
  %v1_18 = add i32 %v0_18, 4
  %v2_18 = inttoptr i32 %v1_18 to i32*
  %v3_18 = load i32, i32* %v2_18, align 4
  %v4_18 = load i32, i32* @eax, align 8
  %v5_18 = and i32 %v4_18, %v3_18
  store i32 %v5_18, i32* %v2_18, align 4
  %v0_1b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_1b = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_1b = fpext double %v3_1b to x86_fp80
  store x86_fp80 %v4_1b, x86_fp80* %st7.global-to-local, align 4
  %v3_1d = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_1d = fpext double %v3_1d to x86_fp80
  store x86_fp80 %v4_1d, x86_fp80* %st6.global-to-local, align 4
  %v3_1f = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_1f = fpext double %v3_1f to x86_fp80
  store x86_fp80 %v4_1f, x86_fp80* %st5.global-to-local, align 4
  %v2_23 = load i32, i32* %esi.global-to-local, align 4
  %v3_23 = add i32 %v2_23, -68
  %v4_23 = inttoptr i32 %v3_23 to float*
  %v5_23 = load float, float* %v4_23, align 4
  %v6_23 = fpext float %v5_23 to x86_fp80
  %v7_23 = fmul x86_fp80 %v4_1f, %v6_23
  %v3_28 = add i32 %v2_23, -72
  %v4_28 = inttoptr i32 %v3_28 to float*
  %v5_28 = load float, float* %v4_28, align 4
  %v6_28 = fpext float %v5_28 to x86_fp80
  %v7_28 = fmul x86_fp80 %v4_1d, %v6_28
  %v4_2b = fadd x86_fp80 %v7_23, %v7_28
  %v3_2f = add i32 %v2_23, -76
  %v4_2f = inttoptr i32 %v3_2f to float*
  %v5_2f = load float, float* %v4_2f, align 4
  %v6_2f = fpext float %v5_2f to x86_fp80
  %v7_2f = fmul x86_fp80 %v4_1b, %v6_2f
  %v4_32 = fadd x86_fp80 %v7_2f, %v4_2b
  %v3_36 = add i32 %v2_23, -44
  %v4_36 = inttoptr i32 %v3_36 to float*
  %v5_36 = load float, float* %v4_36, align 4
  %v6_36 = fpext float %v5_36 to x86_fp80
  %v7_36 = fmul x86_fp80 %v4_1f, %v6_36
  %v3_3b = add i32 %v2_23, -48
  %v4_3b = inttoptr i32 %v3_3b to float*
  %v5_3b = load float, float* %v4_3b, align 4
  %v6_3b = fpext float %v5_3b to x86_fp80
  %v7_3b = fmul x86_fp80 %v4_1d, %v6_3b
  %v4_3e = fadd x86_fp80 %v7_36, %v7_3b
  %v3_42 = add i32 %v2_23, -52
  %v4_42 = inttoptr i32 %v3_42 to float*
  %v5_42 = load float, float* %v4_42, align 4
  %v6_42 = fpext float %v5_42 to x86_fp80
  %v7_42 = fmul x86_fp80 %v4_1b, %v6_42
  %v4_45 = fadd x86_fp80 %v4_3e, %v7_42
  store x86_fp80 %v4_45, x86_fp80* %st5.global-to-local, align 4
  %v3_49 = add i32 %v2_23, -56
  %v4_49 = inttoptr i32 %v3_49 to float*
  %v5_49 = load float, float* %v4_49, align 4
  %v6_49 = fpext float %v5_49 to x86_fp80
  %v7_49 = fmul x86_fp80 %v4_1f, %v6_49
  store x86_fp80 %v7_49, x86_fp80* %st6.global-to-local, align 4
  %v3_4e = add i32 %v2_23, -60
  %v4_4e = inttoptr i32 %v3_4e to float*
  %v5_4e = load float, float* %v4_4e, align 4
  %v6_4e = fpext float %v5_4e to x86_fp80
  %v7_4e = fmul x86_fp80 %v4_1d, %v6_4e
  %v4_51 = fadd x86_fp80 %v7_49, %v7_4e
  store x86_fp80 %v4_51, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_32, x86_fp80* %st7.global-to-local, align 4
  %v3_55 = add i32 %v2_23, -64
  %v4_55 = inttoptr i32 %v3_55 to float*
  %v5_55 = load float, float* %v4_55, align 4
  %v6_55 = fpext float %v5_55 to x86_fp80
  %v7_55 = fmul x86_fp80 %v4_1b, %v6_55
  %v4_58 = fadd x86_fp80 %v4_51, %v7_55
  store x86_fp80 %v4_58, x86_fp80* %st6.global-to-local, align 4
  %v7_58 = add i3 %v0_1b, -3
  store i3 %v7_58, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_5c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5c = call i16 @__asm_fnstsw(i32 %v0_5c)
  %v2_5c = sext i16 %v1_5c to i32
  %v3_5c = load i32, i32* @eax, align 8
  %v4_5c = and i32 %v3_5c, -65536
  %tmp253 = udiv i32 %v2_5c, 2
  %v12_5e = and i32 %tmp253, 32512
  %v2_5c.masked = and i32 %v2_5c, -65281
  %v13_5e = or i32 %v4_5c, %v2_5c.masked
  %v14_5e = or i32 %v13_5e, %v12_5e
  store i32 %v14_5e, i32* @eax, align 8
  %v15_5e16 = and i32 %v2_5c, 256
  %v16_5e = icmp ne i32 %v15_5e16, 0
  %v1_60 = icmp eq i1 %v16_5e, false
  br i1 %v1_60, label %dec_label_pc_64, label %dec_label_pc_62

dec_label_pc_62:                                  ; preds = %dec_label_pc_0
  %v2_62 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_62 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_62, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_62, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_64

dec_label_pc_64:                                  ; preds = %dec_label_pc_62, %dec_label_pc_0
  %v0_66 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_66 = call i16 @__asm_fnstsw(i32 %v0_66)
  %v2_66 = sext i16 %v1_66 to i32
  %v3_66 = load i32, i32* @eax, align 8
  %v4_66 = and i32 %v3_66, -65536
  %tmp254 = udiv i32 %v2_66, 2
  %v12_68 = and i32 %tmp254, 32512
  %v2_66.masked = and i32 %v2_66, -65281
  %v13_68 = or i32 %v4_66, %v2_66.masked
  %v14_68 = or i32 %v13_68, %v12_68
  store i32 %v14_68, i32* @eax, align 8
  %v0_72 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_72 = call i16 @__asm_fnstsw(i32 %v0_72)
  %v2_72 = sext i16 %v1_72 to i32
  %v3_72 = load i32, i32* @eax, align 8
  %v4_72 = and i32 %v3_72, -65536
  %tmp255 = udiv i32 %v2_72, 2
  %v12_74 = and i32 %tmp255, 32512
  %v2_72.masked = and i32 %v2_72, -65281
  %v13_74 = or i32 %v4_72, %v2_72.masked
  %v14_74 = or i32 %v13_74, %v12_74
  store i32 %v14_74, i32* @eax, align 8
  %v0_7a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_7a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_7a = add i3 %v0_7a, -1
  %v2_7c = load i32, i32* %esi.global-to-local, align 4
  %v3_7c = add i32 %v2_7c, -104
  %v4_7c = inttoptr i32 %v3_7c to float*
  %v5_7c = load float, float* %v4_7c, align 4
  %v6_7c = fpext float %v5_7c to x86_fp80
  %v7_7c = fmul x86_fp80 %v2_7a, %v6_7c
  store x86_fp80 %v7_7c, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_7c, x86_fp80* %st6.global-to-local, align 4
  %v3_81 = add i32 %v2_7c, -108
  %v4_81 = inttoptr i32 %v3_81 to float*
  %v5_81 = load float, float* %v4_81, align 4
  %v6_81 = fpext float %v5_81 to x86_fp80
  %v7_81 = fmul x86_fp80 %v7_7c, %v6_81
  %v4_84 = fadd x86_fp80 %v7_7c, %v7_81
  store x86_fp80 %v4_84, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_84, x86_fp80* %st6.global-to-local, align 4
  %v3_88 = add i32 %v2_7c, -112
  %v4_88 = inttoptr i32 %v3_88 to float*
  %v5_88 = load float, float* %v4_88, align 4
  %v6_88 = fpext float %v5_88 to x86_fp80
  %v7_88 = fmul x86_fp80 %v4_84, %v6_88
  %v4_8b = fadd x86_fp80 %v4_84, %v7_88
  store x86_fp80 %v4_8b, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_8b, x86_fp80* %st6.global-to-local, align 4
  %v3_8f = add i32 %v2_7c, -80
  %v4_8f = inttoptr i32 %v3_8f to float*
  %v5_8f = load float, float* %v4_8f, align 4
  %v6_8f = fpext float %v5_8f to x86_fp80
  %v7_8f = fmul x86_fp80 %v4_8b, %v6_8f
  store x86_fp80 %v7_8f, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_8b, x86_fp80* %st5.global-to-local, align 4
  %v3_94 = add i32 %v2_7c, -84
  %v4_94 = inttoptr i32 %v3_94 to float*
  %v5_94 = load float, float* %v4_94, align 4
  %v6_94 = fpext float %v5_94 to x86_fp80
  %v7_94 = fmul x86_fp80 %v4_8b, %v6_94
  %v4_97 = fadd x86_fp80 %v7_8f, %v7_94
  store x86_fp80 %v4_97, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_8b, x86_fp80* %st5.global-to-local, align 4
  %v3_9b = add i32 %v2_7c, -88
  %v4_9b = inttoptr i32 %v3_9b to float*
  %v5_9b = load float, float* %v4_9b, align 4
  %v6_9b = fpext float %v5_9b to x86_fp80
  %v7_9b = fmul x86_fp80 %v4_8b, %v6_9b
  store x86_fp80 %v7_9b, x86_fp80* %st5.global-to-local, align 4
  %v4_9e = fadd x86_fp80 %v4_97, %v7_9b
  store x86_fp80 %v4_8b, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_9e, x86_fp80* %st7.global-to-local, align 4
  %v3_a2 = add i32 %v2_7c, -92
  %v4_a2 = inttoptr i32 %v3_a2 to float*
  %v5_a2 = load float, float* %v4_a2, align 4
  %v6_a2 = fpext float %v5_a2 to x86_fp80
  %v7_a2 = fmul x86_fp80 %v4_9e, %v6_a2
  store x86_fp80 %v7_a2, x86_fp80* %st7.global-to-local, align 4
  %v3_a7 = add i32 %v2_7c, -96
  %v4_a7 = inttoptr i32 %v3_a7 to float*
  %v5_a7 = load float, float* %v4_a7, align 4
  %v6_a7 = fpext float %v5_a7 to x86_fp80
  %v7_a7 = fmul x86_fp80 %v7_a2, %v6_a7
  %v4_aa = fadd x86_fp80 %v7_a7, %v7_a7
  store x86_fp80 %v4_aa, x86_fp80* %st7.global-to-local, align 4
  %v3_ae = add i32 %v2_7c, -100
  %v4_ae = inttoptr i32 %v3_ae to float*
  %v5_ae = load float, float* %v4_ae, align 4
  %v6_ae = fpext float %v5_ae to x86_fp80
  %v7_ae = fmul x86_fp80 %v4_aa, %v6_ae
  %v4_b1 = fadd x86_fp80 %v7_ae, %v7_ae
  store x86_fp80 %v4_b1, x86_fp80* %st7.global-to-local, align 4
  %v2_b3 = add i32 %v2_7c, -16
  %v3_b3 = inttoptr i32 %v2_b3 to double*
  %v4_b3 = load double, double* %v3_b3, align 4
  %v5_b3 = fpext double %v4_b3 to x86_fp80
  store x86_fp80 %v5_b3, x86_fp80* %st7.global-to-local, align 4
  %v1_b6 = load i32, i32* @ecx, align 8
  %v2_b6 = add i32 %v1_b6, 8
  %v3_b6 = inttoptr i32 %v2_b6 to double*
  %v4_b6 = load double, double* %v3_b6, align 4
  %v5_b6 = fpext double %v4_b6 to x86_fp80
  %v4_b9 = fmul x86_fp80 %v5_b3, %v5_b6
  %v4_bb = fptrunc x86_fp80 %v4_b9 to double
  store double %v4_bb, double* %v3_b6, align 4
  %v2_be = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_be = fmul x86_fp80 %v2_be, %v2_be
  %v4_c0 = fmul x86_fp80 %v4_be, %v4_be
  %v4_c2 = fmul x86_fp80 %v4_c0, %v4_c0
  %v4_c6 = fadd x86_fp80 %v4_c2, 0xKBFFF8000000000000000
  store x86_fp80 %v4_c6, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_c6, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_c6, x86_fp80* %st5.global-to-local, align 4
  %v3_cc = add i32 %v2_7c, -24
  %v4_cc = inttoptr i32 %v3_cc to double*
  %v5_cc = load double, double* %v4_cc, align 4
  %v6_cc = fpext double %v5_cc to x86_fp80
  %v7_cc = fmul x86_fp80 %v4_c6, %v6_cc
  store x86_fp80 %v7_cc, x86_fp80* %st5.global-to-local, align 4
  %v4_cf = fsub x86_fp80 %v4_c6, %v7_cc
  store x86_fp80 %v4_cf, x86_fp80* %st7.global-to-local, align 4
  %v3_d1 = add i32 %v2_7c, -32
  %v4_d1 = inttoptr i32 %v3_d1 to double*
  %v5_d1 = load double, double* %v4_d1, align 4
  %v6_d1 = fpext double %v5_d1 to x86_fp80
  %v7_d1 = fmul x86_fp80 %v4_c6, %v6_d1
  store x86_fp80 %v7_d1, x86_fp80* %st6.global-to-local, align 4
  %v4_d4 = fsub x86_fp80 %v4_cf, %v7_d1
  store x86_fp80 %v4_d4, x86_fp80* %st7.global-to-local, align 4
  %v3_d6 = add i32 %v2_7c, -40
  %v4_d6 = inttoptr i32 %v3_d6 to double*
  %v5_d6 = load double, double* %v4_d6, align 4
  %v6_d6 = fpext double %v5_d6 to x86_fp80
  %v7_d6 = fmul x86_fp80 %v4_d4, %v6_d6
  store x86_fp80 %v7_d6, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_d6, x86_fp80* %st6.global-to-local, align 4
  %v3_db = add i32 %v2_7c, -8
  %v4_db = inttoptr i32 %v3_db to double*
  %v5_db = load double, double* %v4_db, align 4
  %v6_db = fpext double %v5_db to x86_fp80
  %v7_db = fmul x86_fp80 %v7_d6, %v6_db
  store x86_fp80 %v7_db, x86_fp80* %st6.global-to-local, align 4
  store i3 %v3_7a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_e0 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_e0 = call i16 @__asm_fnstsw(i32 %v0_e0)
  %v2_e0 = sext i16 %v1_e0 to i32
  %v3_e0 = load i32, i32* @eax, align 8
  %v4_e0 = and i32 %v3_e0, -65536
  %v1_e2 = udiv i32 %v2_e0, 256
  %v2_e2 = trunc i32 %v1_e2 to i8
  %v3_e2 = and i8 %v2_e2, 65
  %v4_e2 = icmp eq i8 %v3_e2, 0
  %v9_e2 = zext i8 %v3_e2 to i32
  %v11_e2 = mul i32 %v9_e2, 256
  %v2_e0.masked = and i32 %v2_e0, -65281
  %v12_e2 = or i32 %v4_e0, %v2_e0.masked
  %v13_e2 = or i32 %v12_e2, %v11_e2
  store i32 %v13_e2, i32* @eax, align 8
  %v1_e9.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v4_e2, label %dec_label_pc_e9, label %dec_label_pc_e7

dec_label_pc_e7:                                  ; preds = %dec_label_pc_64
  %v4_e7 = fsub x86_fp80 %v1_e9.pre, %v1_e9.pre
  store x86_fp80 %v4_e7, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_e9

dec_label_pc_e9:                                  ; preds = %dec_label_pc_64, %dec_label_pc_e7
  %v1_e9 = phi x86_fp80 [ %v4_e7, %dec_label_pc_e7 ], [ %v1_e9.pre, %dec_label_pc_64 ]
  %v0_e9 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_eb = load i32, i32* @edx, align 8
  %v3_eb = fptrunc x86_fp80 %v1_e9 to double
  %v4_eb = inttoptr i32 %v2_eb to double*
  store double %v3_eb, double* %v4_eb, align 4
  %v1_ed = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_ed = load i32, i32* %ebx.global-to-local, align 4
  %v3_ed = fptrunc x86_fp80 %v1_ed to double
  %v4_ed = inttoptr i32 %v2_ed to double*
  store double %v3_ed, double* %v4_ed, align 4
  %v1_ef = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_ef = load i32, i32* @ecx, align 8
  %v3_ef = fptrunc x86_fp80 %v1_ef to double
  %v4_ef = inttoptr i32 %v2_ef to double*
  store double %v3_ef, double* %v4_ef, align 4
  %v5_ef = xor i3 %v0_e9, -4
  store i3 %v5_ef, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_ed, i32* @eax, align 8
  store i32 %v0_4, i32* %esi.global-to-local, align 4
  store i32 %v0_3, i32* %ebx.global-to-local, align 4
  ret i32 %v2_ed
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr
