source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@fpu_stat_TOP = internal unnamed_addr global i3 0
@fpsw = internal unnamed_addr global i32 0
@eax = internal unnamed_addr global i32 0
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8
@ebx = internal unnamed_addr global i32 0, align 8
@ebp = internal unnamed_addr global i32 0
@esi = internal unnamed_addr global i32 0
@edi = internal unnamed_addr global i32 0
@0 = external global i32
@global_var_1.1 = constant i8 -117

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %v0_f = load i32, i32* %eax.global-to-local, align 4
  store i32 %v0_f, i32* @ebx, align 8
  %v1_11 = add i32 %arg1, 48
  %v2_11 = inttoptr i32 %v1_11 to i32*
  %v3_11 = load i32, i32* %v2_11, align 4
  store i32 %v3_11, i32* @esi, align 4
  %v1_14 = add i32 %arg1, 128
  store i32 %v1_14, i32* @edi, align 4
  %v0_1a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_1a = sub i3 %v0_1a, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v6_1a, i3* @fpu_stat_TOP, align 1
  %v0_1d = call x86_fp80 @function_2a()
  %v1_1d = fptrunc x86_fp80 %v0_1d to float
  %v2_1d = bitcast float %v1_1d to i32
  store i32 %v2_1d, i32* @eax, align 4
  %v3_22 = call i32 @function_c5(i32 ptrtoint (i32* @0 to i32), i32 ptrtoint (i32* @0 to i32), i32 ptrtoint (i32* @0 to i32))
  store i32 %v3_22, i32* %eax.global-to-local, align 4
  ret i32 %v3_22
}

define x86_fp80 @function_2a() local_unnamed_addr {
dec_label_pc_2a:
  %eax.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  store i32 0, i32* %eax.global-to-local, align 4
  %v1_2f = load i32, i32* @ebp, align 4
  %v2_2f = add i32 %v1_2f, -8
  %v3_2f = inttoptr i32 %v2_2f to i32*
  store i32 0, i32* %v3_2f, align 4
  %v3_32 = load double, double* bitcast (i32* @ebx to double*), align 8
  %tmp38 = call double @llvm.fabs.f64(double %v3_32)
  %v2_34 = fpext double %tmp38 to x86_fp80
  store x86_fp80 %v2_34, x86_fp80* %st7.global-to-local, align 4
  %v0_38 = load i32, i32* @fpsw, align 4
  %v1_38 = call i16 @__asm_fnstsw(i32 %v0_38)
  %v2_38 = sext i16 %v1_38 to i32
  %v3_38 = load i32, i32* %eax.global-to-local, align 4
  %v4_38 = and i32 %v3_38, -65536
  %tmp48 = udiv i32 %v2_38, 2
  %v12_3a = and i32 %tmp48, 32512
  %v2_38.masked = and i32 %v2_38, -65281
  %v13_3a = or i32 %v4_38, %v2_38.masked
  %v14_3a = or i32 %v13_3a, %v12_3a
  store i32 %v14_3a, i32* %eax.global-to-local, align 4
  %v15_3a26 = and i32 %v2_38, 256
  %v16_3a = icmp ne i32 %v15_3a26, 0
  %v1_3c = icmp eq i1 %v16_3a, false
  br i1 %v1_3c, label %dec_label_pc_41, label %dec_label_pc_3e

dec_label_pc_3e:                                  ; preds = %dec_label_pc_2a
  %v0_3e = load i32, i32* @ebp, align 4
  %v1_3e = add i32 %v0_3e, -8
  %v2_3e = inttoptr i32 %v1_3e to i32*
  %v3_3e = load i32, i32* %v2_3e, align 4
  %v4_3e = add i32 %v3_3e, ptrtoint (i8* @global_var_1.1 to i32)
  store i32 %v4_3e, i32* %v2_3e, align 4
  br label %dec_label_pc_41

dec_label_pc_41:                                  ; preds = %dec_label_pc_3e, %dec_label_pc_2a
  %v3_41 = load double, double* bitcast (i32* @edx to double*), align 8
  %tmp40 = call double @llvm.fabs.f64(double %v3_41)
  %v2_43 = fpext double %tmp40 to x86_fp80
  store x86_fp80 %v2_43, x86_fp80* %st7.global-to-local, align 4
  %v0_47 = load i32, i32* @fpsw, align 4
  %v1_47 = call i16 @__asm_fnstsw(i32 %v0_47)
  %v2_47 = sext i16 %v1_47 to i32
  %v3_47 = load i32, i32* %eax.global-to-local, align 4
  %v4_47 = and i32 %v3_47, -65536
  %tmp49 = udiv i32 %v2_47, 2
  %v12_49 = and i32 %tmp49, 32512
  %v2_47.masked = and i32 %v2_47, -65281
  %v13_49 = or i32 %v4_47, %v2_47.masked
  %v14_49 = or i32 %v13_49, %v12_49
  store i32 %v14_49, i32* %eax.global-to-local, align 4
  %v15_4927 = and i32 %v2_47, 256
  %v16_49 = icmp ne i32 %v15_4927, 0
  %v1_4b = icmp eq i1 %v16_49, false
  br i1 %v1_4b, label %dec_label_pc_50, label %dec_label_pc_4d

dec_label_pc_4d:                                  ; preds = %dec_label_pc_41
  %v0_4d = load i32, i32* @ebp, align 4
  %v1_4d = add i32 %v0_4d, -8
  %v2_4d = inttoptr i32 %v1_4d to i32*
  %v3_4d = load i32, i32* %v2_4d, align 4
  %v4_4d = add i32 %v3_4d, ptrtoint (i8* @global_var_1.1 to i32)
  store i32 %v4_4d, i32* %v2_4d, align 4
  br label %dec_label_pc_50

dec_label_pc_50:                                  ; preds = %dec_label_pc_4d, %dec_label_pc_41
  %v3_50 = load double, double* bitcast (i32* @ecx to double*), align 8
  %tmp42 = call double @llvm.fabs.f64(double %v3_50)
  %v2_52 = fpext double %tmp42 to x86_fp80
  store x86_fp80 %v2_52, x86_fp80* %st7.global-to-local, align 4
  %v0_56 = load i32, i32* @fpsw, align 4
  %v1_56 = call i16 @__asm_fnstsw(i32 %v0_56)
  %v2_56 = sext i16 %v1_56 to i32
  %v3_56 = load i32, i32* %eax.global-to-local, align 4
  %v4_56 = and i32 %v3_56, -65536
  %tmp50 = udiv i32 %v2_56, 2
  %v12_58 = and i32 %tmp50, 32512
  %v2_56.masked = and i32 %v2_56, -65281
  %v13_58 = or i32 %v4_56, %v2_56.masked
  %v14_58 = or i32 %v13_58, %v12_58
  store i32 %v14_58, i32* %eax.global-to-local, align 4
  %v15_5828 = and i32 %v2_56, 256
  %v16_58 = icmp ne i32 %v15_5828, 0
  %v1_5a = icmp eq i1 %v16_58, false
  br i1 %v1_5a, label %dec_label_pc_5f, label %dec_label_pc_5c

dec_label_pc_5c:                                  ; preds = %dec_label_pc_50
  %v0_5c = load i32, i32* @ebp, align 4
  %v1_5c = add i32 %v0_5c, -8
  %v2_5c = inttoptr i32 %v1_5c to i32*
  %v3_5c = load i32, i32* %v2_5c, align 4
  %v4_5c = add i32 %v3_5c, ptrtoint (i8* @global_var_1.1 to i32)
  store i32 %v4_5c, i32* %v2_5c, align 4
  br label %dec_label_pc_5f

dec_label_pc_5f:                                  ; preds = %dec_label_pc_5c, %dec_label_pc_50
  %v0_5f = load i32, i32* @esi, align 4
  %v1_5f = add i32 %v0_5f, -104
  %v2_5f = inttoptr i32 %v1_5f to i32*
  %v3_5f = load i32, i32* %v2_5f, align 4
  %v1_62 = urem i32 %v3_5f, 4
  store i32 %v1_62, i32* %eax.global-to-local, align 4
  %v1_65 = load i32, i32* @ebp, align 4
  %v2_65 = add i32 %v1_65, -8
  %v3_65 = inttoptr i32 %v2_65 to i32*
  %v4_65 = load i32, i32* %v3_65, align 4
  %v5_65 = xor i32 %v4_65, %v1_62
  %v6_65 = icmp eq i32 %v5_65, 0
  store i32 %v5_65, i32* %eax.global-to-local, align 4
  %v1_68 = icmp eq i1 %v6_65, false
  br i1 %v1_68, label %dec_label_pc_5f.dec_label_pc_bf_crit_edge, label %dec_label_pc_6e

dec_label_pc_5f.dec_label_pc_bf_crit_edge:        ; preds = %dec_label_pc_5f
  %v0_bf.pre = load i3, i3* @fpu_stat_TOP, align 1
  br label %dec_label_pc_bf

dec_label_pc_6e:                                  ; preds = %dec_label_pc_5f
  %v1_6e = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_6e = add i32 %v0_5f, -100
  %v4_6e = inttoptr i32 %v3_6e to double*
  %v5_6e = load double, double* %v4_6e, align 4
  %v6_6e = fpext double %v5_6e to x86_fp80
  %v7_6e = fmul x86_fp80 %v1_6e, %v6_6e
  store x86_fp80 %v7_6e, x86_fp80* %st7.global-to-local, align 4
  %v0_71 = load i3, i3* @fpu_stat_TOP, align 1
  %v3_71 = load double, double* bitcast (i32* @ebx to double*), align 8
  %v4_71 = fpext double %v3_71 to x86_fp80
  %v5_71 = sub i3 %v0_71, ptrtoint (i8* @global_var_1.1 to i3)
  store x86_fp80 %v4_71, x86_fp80* %st6.global-to-local, align 4
  store i3 %v5_71, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_77 = load i32, i32* @fpsw, align 4
  %v1_77 = call i16 @__asm_fnstsw(i32 %v0_77)
  %v2_77 = sext i16 %v1_77 to i32
  %v3_77 = load i32, i32* %eax.global-to-local, align 4
  %v4_77 = and i32 %v3_77, -65536
  %tmp51 = udiv i32 %v2_77, 2
  %v12_79 = and i32 %tmp51, 32512
  %v2_77.masked = and i32 %v2_77, -65281
  %v13_79 = or i32 %v4_77, %v2_77.masked
  %v14_79 = or i32 %v13_79, %v12_79
  store i32 %v14_79, i32* %eax.global-to-local, align 4
  %v15_7929 = and i32 %v2_77, 256
  %v16_79 = icmp ne i32 %v15_7929, 0
  %v1_7b = icmp eq i1 %v16_79, false
  %v0_81 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_81 = sub i3 %v0_81, ptrtoint (i8* @global_var_1.1 to i3)
  %spec.select = select i1 %v1_7b, x86_fp80 0xKBFFF8000000000000000, x86_fp80 0xK3FFF8000000000000000
  %v3_85 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_85 = fmul x86_fp80 %spec.select, %v3_85
  %v3_87 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_87 = fsub x86_fp80 %v3_87, %v4_85
  %v2_89 = load i32, i32* @ebx, align 8
  %v3_89 = fptrunc x86_fp80 %v4_87 to double
  %v4_89 = inttoptr i32 %v2_89 to double*
  store double %v3_89, double* %v4_89, align 4
  %v3_8b = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_8b = fpext double %v3_8b to x86_fp80
  %v5_8b = add i3 %v1_81, add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3)))
  store x86_fp80 %v4_8b, x86_fp80* %st6.global-to-local, align 4
  store i3 %v5_8b, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_91 = load i32, i32* @fpsw, align 4
  %v1_91 = call i16 @__asm_fnstsw(i32 %v0_91)
  %v2_91 = sext i16 %v1_91 to i32
  %v3_91 = load i32, i32* %eax.global-to-local, align 4
  %v4_91 = and i32 %v3_91, -65536
  %tmp52 = udiv i32 %v2_91, 2
  %v12_93 = and i32 %tmp52, 32512
  %v2_91.masked = and i32 %v2_91, -65281
  %v13_93 = or i32 %v4_91, %v2_91.masked
  %v14_93 = or i32 %v13_93, %v12_93
  store i32 %v14_93, i32* %eax.global-to-local, align 4
  %v15_9330 = and i32 %v2_91, 256
  %v16_93 = icmp ne i32 %v15_9330, 0
  %v1_95 = icmp eq i1 %v16_93, false
  %v0_9b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_9b = sub i3 %v0_9b, ptrtoint (i8* @global_var_1.1 to i3)
  %v2_9f = select i1 %v1_95, x86_fp80 0xKBFFF8000000000000000, x86_fp80 0xK3FFF8000000000000000
  %v3_9f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_9f = fmul x86_fp80 %v2_9f, %v3_9f
  %v3_a1 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_a1 = fsub x86_fp80 %v3_a1, %v4_9f
  %v2_a3 = load i32, i32* @edx, align 8
  %v3_a3 = fptrunc x86_fp80 %v4_a1 to double
  %v4_a3 = inttoptr i32 %v2_a3 to double*
  store double %v3_a3, double* %v4_a3, align 4
  %v3_a5 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_a5 = fpext double %v3_a5 to x86_fp80
  %v5_a5 = add i3 %v1_9b, add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3)))
  store x86_fp80 %v4_a5, x86_fp80* %st6.global-to-local, align 4
  store i3 %v5_a5, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ab = load i32, i32* @fpsw, align 4
  %v1_ab = call i16 @__asm_fnstsw(i32 %v0_ab)
  %v2_ab = sext i16 %v1_ab to i32
  %v3_ab = load i32, i32* %eax.global-to-local, align 4
  %v4_ab = and i32 %v3_ab, -65536
  %tmp53 = udiv i32 %v2_ab, 2
  %v12_ad = and i32 %tmp53, 32512
  %v2_ab.masked = and i32 %v2_ab, -65281
  %v13_ad = or i32 %v4_ab, %v2_ab.masked
  %v14_ad = or i32 %v13_ad, %v12_ad
  store i32 %v14_ad, i32* %eax.global-to-local, align 4
  %v15_ad31 = and i32 %v2_ab, 256
  %v16_ad = icmp ne i32 %v15_ad31, 0
  %v1_af = icmp eq i1 %v16_ad, false
  %v0_b5 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_b5 = sub i3 %v0_b5, ptrtoint (i8* @global_var_1.1 to i3)
  %spec.select47 = select i1 %v1_af, x86_fp80 0xKBFFF8000000000000000, x86_fp80 0xK3FFF8000000000000000
  %v3_b9 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_b9 = fmul x86_fp80 %spec.select47, %v3_b9
  %v3_bb = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_bb = fsub x86_fp80 %v3_bb, %v4_b9
  store x86_fp80 %v4_bb, x86_fp80* %st6.global-to-local, align 4
  %v2_bd = load i32, i32* @ecx, align 8
  %v3_bd = fptrunc x86_fp80 %v4_bb to double
  %v4_bd = inttoptr i32 %v2_bd to double*
  store double %v3_bd, double* %v4_bd, align 4
  %v5_bd = add i3 %v1_b5, add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3))
  store i3 %v5_bd, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_bf

dec_label_pc_bf:                                  ; preds = %dec_label_pc_5f.dec_label_pc_bf_crit_edge, %dec_label_pc_6e
  %v0_bf = phi i3 [ %v0_bf.pre, %dec_label_pc_5f.dec_label_pc_bf_crit_edge ], [ %v5_bd, %dec_label_pc_6e ]
  %v1_bf = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_bf = add i3 %v0_bf, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v4_bf, i3* @fpu_stat_TOP, align 1
  ret x86_fp80 %v1_bf
}

define i32 @function_c5(i32 %arg1, i32 %arg2, i32 %arg3) local_unnamed_addr {
dec_label_pc_c5:
  %eax.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st4.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_c5 = load i3, i3* @fpu_stat_TOP, align 1
  %v3_c5 = load double, double* bitcast (i32* @ebx to double*), align 8
  %v4_c5 = fpext double %v3_c5 to x86_fp80
  store x86_fp80 %v4_c5, x86_fp80* %st7.global-to-local, align 4
  %v3_c7 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_c7 = fpext double %v3_c7 to x86_fp80
  store x86_fp80 %v4_c7, x86_fp80* %st6.global-to-local, align 4
  %v3_c9 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_c9 = fpext double %v3_c9 to x86_fp80
  store x86_fp80 %v4_c9, x86_fp80* %st4.global-to-local, align 4
  %v2_ce = load i32, i32* @esi, align 4
  %v3_ce = add i32 %v2_ce, -68
  %v4_ce = inttoptr i32 %v3_ce to float*
  %v5_ce = load float, float* %v4_ce, align 4
  %v6_ce = fpext float %v5_ce to x86_fp80
  %v7_ce = fmul x86_fp80 %v4_c9, %v6_ce
  store x86_fp80 %v7_ce, x86_fp80* %st4.global-to-local, align 4
  %v3_d3 = add i32 %v2_ce, -72
  %v4_d3 = inttoptr i32 %v3_d3 to float*
  %v5_d3 = load float, float* %v4_d3, align 4
  %v6_d3 = fpext float %v5_d3 to x86_fp80
  %v7_d3 = fmul x86_fp80 %v4_c7, %v6_d3
  %v4_d6 = fadd x86_fp80 %v7_ce, %v7_d3
  store x86_fp80 %v4_d6, x86_fp80* %st4.global-to-local, align 4
  %v3_da = add i32 %v2_ce, -76
  %v4_da = inttoptr i32 %v3_da to float*
  %v5_da = load float, float* %v4_da, align 4
  %v6_da = fpext float %v5_da to x86_fp80
  %v7_da = fmul x86_fp80 %v4_c5, %v6_da
  %v4_dd = fadd x86_fp80 %v4_d6, %v7_da
  store x86_fp80 %v4_dd, x86_fp80* %st4.global-to-local, align 4
  %v3_e1 = add i32 %v2_ce, -44
  %v4_e1 = inttoptr i32 %v3_e1 to float*
  %v5_e1 = load float, float* %v4_e1, align 4
  %v6_e1 = fpext float %v5_e1 to x86_fp80
  %v7_e1 = fmul x86_fp80 %v4_c9, %v6_e1
  %v3_e6 = add i32 %v2_ce, -48
  %v4_e6 = inttoptr i32 %v3_e6 to float*
  %v5_e6 = load float, float* %v4_e6, align 4
  %v6_e6 = fpext float %v5_e6 to x86_fp80
  %v7_e6 = fmul x86_fp80 %v4_c7, %v6_e6
  %v4_e9 = fadd x86_fp80 %v7_e1, %v7_e6
  %v3_ed = add i32 %v2_ce, -52
  %v4_ed = inttoptr i32 %v3_ed to float*
  %v5_ed = load float, float* %v4_ed, align 4
  %v6_ed = fpext float %v5_ed to x86_fp80
  %v7_ed = fmul x86_fp80 %v4_c5, %v6_ed
  %v4_f0 = fadd x86_fp80 %v4_e9, %v7_ed
  %v3_f4 = add i32 %v2_ce, -56
  %v4_f4 = inttoptr i32 %v3_f4 to float*
  %v5_f4 = load float, float* %v4_f4, align 4
  %v6_f4 = fpext float %v5_f4 to x86_fp80
  %v7_f4 = fmul x86_fp80 %v4_c9, %v6_f4
  store x86_fp80 %v7_f4, x86_fp80* %st6.global-to-local, align 4
  %v3_f9 = add i32 %v2_ce, -60
  %v4_f9 = inttoptr i32 %v3_f9 to float*
  %v5_f9 = load float, float* %v4_f9, align 4
  %v6_f9 = fpext float %v5_f9 to x86_fp80
  %v7_f9 = fmul x86_fp80 %v4_c7, %v6_f9
  %v4_fc = fadd x86_fp80 %v7_f4, %v7_f9
  store x86_fp80 %v4_fc, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_c5, x86_fp80* %st4.global-to-local, align 4
  store x86_fp80 %v4_dd, x86_fp80* %st7.global-to-local, align 4
  %v3_100 = add i32 %v2_ce, -64
  %v4_100 = inttoptr i32 %v3_100 to float*
  %v5_100 = load float, float* %v4_100, align 4
  %v6_100 = fpext float %v5_100 to x86_fp80
  %v7_100 = fmul x86_fp80 %v4_c5, %v6_100
  store x86_fp80 %v7_100, x86_fp80* %st4.global-to-local, align 4
  %v4_103 = fadd x86_fp80 %v4_fc, %v7_100
  store x86_fp80 %v4_103, x86_fp80* %st6.global-to-local, align 4
  %tmp54 = bitcast double %v3_c9 to i64
  %tmp55 = trunc i64 %tmp54 to i32
  %v3_105 = fptrunc x86_fp80 %v4_f0 to double
  %v4_105 = inttoptr i32 %tmp55 to double*
  store double %v3_105, double* %v4_105, align 4
  %v1_107 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v2_107 = load i32, i32* @edx, align 8
  %v3_107 = fptrunc x86_fp80 %v1_107 to double
  %v4_107 = inttoptr i32 %v2_107 to double*
  store double %v3_107, double* %v4_107, align 4
  %v1_109 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_109 = load i32, i32* @ebx, align 8
  %v3_109 = fptrunc x86_fp80 %v1_109 to double
  %v4_109 = inttoptr i32 %v2_109 to double*
  store double %v3_109, double* %v4_109, align 4
  %v2_10c = add i32 %v2_ce, -40
  %v3_10c = inttoptr i32 %v2_10c to double*
  %v4_10c = load double, double* %v3_10c, align 4
  %v5_10c = fpext double %v4_10c to x86_fp80
  store x86_fp80 %v5_10c, x86_fp80* %st6.global-to-local, align 4
  %v4_113 = fadd x86_fp80 %v5_10c, %v5_10c
  store x86_fp80 %v4_113, x86_fp80* %st7.global-to-local, align 4
  %v3_117 = load double, double* bitcast (i32* @ebx to double*), align 8
  %v4_117 = fpext double %v3_117 to x86_fp80
  %v5_117 = add i3 %v0_c5, add (i3 add (i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 ptrtoint (i8* @global_var_1.1 to i3))
  store i3 %v5_117, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_117, x86_fp80* %st4.global-to-local, align 4
  %v0_11b = load i32, i32* @fpsw, align 4
  %v1_11b = call i16 @__asm_fnstsw(i32 %v0_11b)
  %v2_11b = sext i16 %v1_11b to i32
  %v3_11b = load i32, i32* @eax, align 4
  %v4_11b = and i32 %v3_11b, -65536
  %tmp64 = udiv i32 %v2_11b, 2
  %v12_11d = and i32 %tmp64, 32512
  %v2_11b.masked = and i32 %v2_11b, -65281
  %v13_11d = or i32 %v4_11b, %v2_11b.masked
  %v14_11d = or i32 %v13_11d, %v12_11d
  store i32 %v14_11d, i32* %eax.global-to-local, align 4
  %v15_11d39 = and i32 %v2_11b, 256
  %v16_11d = icmp eq i32 %v15_11d39, 0
  br i1 %v16_11d, label %dec_label_pc_121, label %dec_label_pc_127

dec_label_pc_121:                                 ; preds = %dec_label_pc_c5
  %v2_127 = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  %v3_123 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_123 = fsub x86_fp80 %v3_123, %v2_127
  store x86_fp80 %v4_123, x86_fp80* %st4.global-to-local, align 4
  br label %dec_label_pc_133

dec_label_pc_127:                                 ; preds = %dec_label_pc_c5
  %v0_129 = load i32, i32* @fpsw, align 4
  %v1_129 = call i16 @__asm_fnstsw(i32 %v0_129)
  %v2_129 = sext i16 %v1_129 to i32
  %v3_129 = load i32, i32* %eax.global-to-local, align 4
  %v4_129 = and i32 %v3_129, -65536
  %tmp65 = udiv i32 %v2_129, 2
  %v12_12b = and i32 %tmp65, 32512
  %v2_129.masked = and i32 %v2_129, -65281
  %v13_12b = or i32 %v4_129, %v2_129.masked
  %v14_12b = or i32 %v13_12b, %v12_12b
  store i32 %v14_12b, i32* %eax.global-to-local, align 4
  %v15_12b46 = and i32 %v2_129, 256
  %v16_12b = icmp ne i32 %v15_12b46, 0
  %v1_12d = icmp eq i1 %v16_12b, false
  br i1 %v1_12d, label %dec_label_pc_133, label %dec_label_pc_12f

dec_label_pc_12f:                                 ; preds = %dec_label_pc_127
  %v1_12f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_131 = fsub x86_fp80 %v1_12f, %v1_12f
  store x86_fp80 %v4_131, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_133

dec_label_pc_133:                                 ; preds = %dec_label_pc_12f, %dec_label_pc_127, %dec_label_pc_121
  %v0_133 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_133 = sub i3 %v0_133, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v5_133, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_137 = load i32, i32* @fpsw, align 4
  %v1_137 = call i16 @__asm_fnstsw(i32 %v0_137)
  %v2_137 = sext i16 %v1_137 to i32
  %v3_137 = load i32, i32* %eax.global-to-local, align 4
  %v4_137 = and i32 %v3_137, -65536
  %tmp66 = udiv i32 %v2_137, 2
  %v12_139 = and i32 %tmp66, 32512
  %v2_137.masked = and i32 %v2_137, -65281
  %v13_139 = or i32 %v4_137, %v2_137.masked
  %v14_139 = or i32 %v13_139, %v12_139
  store i32 %v14_139, i32* %eax.global-to-local, align 4
  %v15_13940 = and i32 %v2_137, 256
  %v16_139 = icmp eq i32 %v15_13940, 0
  %v2_143 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_139, label %dec_label_pc_13d, label %dec_label_pc_143

dec_label_pc_13d:                                 ; preds = %dec_label_pc_133
  %v2_13d = fsub x86_fp80 0xK80000000000000000000, %v2_143
  %v4_13f = fsub x86_fp80 %v2_13d, %v2_143
  store x86_fp80 %v4_13f, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_14f

dec_label_pc_143:                                 ; preds = %dec_label_pc_133
  %v0_145 = load i32, i32* @fpsw, align 4
  %v1_145 = call i16 @__asm_fnstsw(i32 %v0_145)
  %v2_145 = sext i16 %v1_145 to i32
  %v3_145 = load i32, i32* %eax.global-to-local, align 4
  %v4_145 = and i32 %v3_145, -65536
  %tmp67 = udiv i32 %v2_145, 2
  %v12_147 = and i32 %tmp67, 32512
  %v2_145.masked = and i32 %v2_145, -65281
  %v13_147 = or i32 %v4_145, %v2_145.masked
  %v14_147 = or i32 %v13_147, %v12_147
  store i32 %v14_147, i32* %eax.global-to-local, align 4
  %v15_14745 = and i32 %v2_145, 256
  %v16_147 = icmp ne i32 %v15_14745, 0
  %v1_149 = icmp eq i1 %v16_147, false
  br i1 %v1_149, label %dec_label_pc_14f, label %dec_label_pc_14b

dec_label_pc_14b:                                 ; preds = %dec_label_pc_143
  %v1_14b = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_14d = fsub x86_fp80 %v1_14b, %v1_14b
  store x86_fp80 %v4_14d, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_14f

dec_label_pc_14f:                                 ; preds = %dec_label_pc_14b, %dec_label_pc_143, %dec_label_pc_13d
  %v0_14f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_14f = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_14f = fpext double %v3_14f to x86_fp80
  %v5_14f = sub i3 %v0_14f, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v5_14f, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_14f, x86_fp80* %st6.global-to-local, align 4
  %v0_153 = load i32, i32* @fpsw, align 4
  %v1_153 = call i16 @__asm_fnstsw(i32 %v0_153)
  %v2_153 = sext i16 %v1_153 to i32
  %v3_153 = load i32, i32* %eax.global-to-local, align 4
  %v4_153 = and i32 %v3_153, -65536
  %tmp68 = udiv i32 %v2_153, 2
  %v12_155 = and i32 %tmp68, 32512
  %v2_153.masked = and i32 %v2_153, -65281
  %v13_155 = or i32 %v4_153, %v2_153.masked
  %v14_155 = or i32 %v13_155, %v12_155
  store i32 %v14_155, i32* %eax.global-to-local, align 4
  %v15_15541 = and i32 %v2_153, 256
  %v16_155 = icmp eq i32 %v15_15541, 0
  %v2_15f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_155, label %dec_label_pc_159, label %dec_label_pc_15f

dec_label_pc_159:                                 ; preds = %dec_label_pc_14f
  %v2_159 = fsub x86_fp80 0xK80000000000000000000, %v2_15f
  %v4_15b = fsub x86_fp80 %v2_159, %v2_15f
  store x86_fp80 %v4_15b, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_16b

dec_label_pc_15f:                                 ; preds = %dec_label_pc_14f
  %v0_161 = load i32, i32* @fpsw, align 4
  %v1_161 = call i16 @__asm_fnstsw(i32 %v0_161)
  %v2_161 = sext i16 %v1_161 to i32
  %v3_161 = load i32, i32* %eax.global-to-local, align 4
  %v4_161 = and i32 %v3_161, -65536
  %tmp69 = udiv i32 %v2_161, 2
  %v12_163 = and i32 %tmp69, 32512
  %v2_161.masked = and i32 %v2_161, -65281
  %v13_163 = or i32 %v4_161, %v2_161.masked
  %v14_163 = or i32 %v13_163, %v12_163
  store i32 %v14_163, i32* %eax.global-to-local, align 4
  %v15_16344 = and i32 %v2_161, 256
  %v16_163 = icmp ne i32 %v15_16344, 0
  %v1_165 = icmp eq i1 %v16_163, false
  %v2_16b.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_165, label %dec_label_pc_16b, label %dec_label_pc_167

dec_label_pc_167:                                 ; preds = %dec_label_pc_15f
  %v4_169 = fsub x86_fp80 %v2_16b.pre, %v2_16b.pre
  store x86_fp80 %v4_169, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_16b

dec_label_pc_16b:                                 ; preds = %dec_label_pc_15f, %dec_label_pc_167, %dec_label_pc_159
  %v2_16b = phi x86_fp80 [ %v4_169, %dec_label_pc_167 ], [ %v4_15b, %dec_label_pc_159 ], [ %v2_16b.pre, %dec_label_pc_15f ]
  %v0_16d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_171 = add i3 %v0_16d, add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3))
  store x86_fp80 %v2_16b, x86_fp80* %st7.global-to-local, align 4
  %v2_179 = load i32, i32* @esi, align 4
  %v3_179 = add i32 %v2_179, -68
  %v4_179 = inttoptr i32 %v3_179 to float*
  %v5_179 = load float, float* %v4_179, align 4
  %v6_179 = fpext float %v5_179 to x86_fp80
  %v7_179 = fmul x86_fp80 %v2_16b, %v6_179
  store x86_fp80 %v7_179, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_179, x86_fp80* %st6.global-to-local, align 4
  %v3_17e = add i32 %v2_179, -72
  %v4_17e = inttoptr i32 %v3_17e to float*
  %v5_17e = load float, float* %v4_17e, align 4
  %v6_17e = fpext float %v5_17e to x86_fp80
  %v7_17e = fmul x86_fp80 %v7_179, %v6_17e
  %v4_181 = fadd x86_fp80 %v7_179, %v7_17e
  store x86_fp80 %v4_181, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_181, x86_fp80* %st6.global-to-local, align 4
  %v3_185 = add i32 %v2_179, -76
  %v4_185 = inttoptr i32 %v3_185 to float*
  %v5_185 = load float, float* %v4_185, align 4
  %v6_185 = fpext float %v5_185 to x86_fp80
  %v7_185 = fmul x86_fp80 %v4_181, %v6_185
  %v4_188 = fadd x86_fp80 %v4_181, %v7_185
  store x86_fp80 %v4_188, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_188, x86_fp80* %st6.global-to-local, align 4
  %v3_18c = add i32 %v2_179, -44
  %v4_18c = inttoptr i32 %v3_18c to float*
  %v5_18c = load float, float* %v4_18c, align 4
  %v6_18c = fpext float %v5_18c to x86_fp80
  %v7_18c = fmul x86_fp80 %v4_188, %v6_18c
  store x86_fp80 %v7_18c, x86_fp80* %st6.global-to-local, align 4
  %v3_191 = add i32 %v2_179, -48
  %v4_191 = inttoptr i32 %v3_191 to float*
  %v5_191 = load float, float* %v4_191, align 4
  %v6_191 = fpext float %v5_191 to x86_fp80
  %v7_191 = fmul x86_fp80 %v4_188, %v6_191
  %v4_194 = fadd x86_fp80 %v7_18c, %v7_191
  store x86_fp80 %v4_194, x86_fp80* %st6.global-to-local, align 4
  %v3_198 = add i32 %v2_179, -52
  %v4_198 = inttoptr i32 %v3_198 to float*
  %v5_198 = load float, float* %v4_198, align 4
  %v6_198 = fpext float %v5_198 to x86_fp80
  %v7_198 = fmul x86_fp80 %v4_188, %v6_198
  %v4_19b = fadd x86_fp80 %v4_194, %v7_198
  store x86_fp80 %v4_188, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_19b, x86_fp80* %st7.global-to-local, align 4
  %v3_19f = add i32 %v2_179, -56
  %v4_19f = inttoptr i32 %v3_19f to float*
  %v5_19f = load float, float* %v4_19f, align 4
  %v6_19f = fpext float %v5_19f to x86_fp80
  %v7_19f = fmul x86_fp80 %v4_19b, %v6_19f
  store x86_fp80 %v7_19f, x86_fp80* %st7.global-to-local, align 4
  %v3_1a4 = add i32 %v2_179, -60
  %v4_1a4 = inttoptr i32 %v3_1a4 to float*
  %v5_1a4 = load float, float* %v4_1a4, align 4
  %v6_1a4 = fpext float %v5_1a4 to x86_fp80
  %v7_1a4 = fmul x86_fp80 %v7_19f, %v6_1a4
  %v4_1a7 = fadd x86_fp80 %v7_1a4, %v7_1a4
  store x86_fp80 %v4_1a7, x86_fp80* %st7.global-to-local, align 4
  %v3_1ab = add i32 %v2_179, -64
  %v4_1ab = inttoptr i32 %v3_1ab to float*
  %v5_1ab = load float, float* %v4_1ab, align 4
  %v6_1ab = fpext float %v5_1ab to x86_fp80
  %v7_1ab = fmul x86_fp80 %v4_1a7, %v6_1ab
  %v4_1ae = fadd x86_fp80 %v7_1ab, %v7_1ab
  %v4_1b3 = fmul x86_fp80 %v4_1ae, %v4_1ae
  %v4_1b7 = fmul x86_fp80 %v4_1b3, %v4_1b3
  store x86_fp80 %v4_1b7, x86_fp80* %st6.global-to-local, align 4
  %v4_1b9 = fadd x86_fp80 %v4_1b3, %v4_1b3
  %v4_1bd = fmul x86_fp80 %v4_1b9, %v4_1b9
  %v4_1bf = fadd x86_fp80 %v4_1bd, %v4_1bd
  store x86_fp80 %v4_1bf, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_171, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1c4 = load i32, i32* @fpsw, align 4
  %v1_1c4 = call i16 @__asm_fnstsw(i32 %v0_1c4)
  %v2_1c4 = sext i16 %v1_1c4 to i32
  %v3_1c4 = load i32, i32* %eax.global-to-local, align 4
  %v4_1c4 = and i32 %v3_1c4, -65536
  %tmp70 = udiv i32 %v2_1c4, 2
  %v12_1c6 = and i32 %tmp70, 32512
  %v2_1c4.masked = and i32 %v2_1c4, -65281
  %v13_1c6 = or i32 %v4_1c4, %v2_1c4.masked
  %v14_1c6 = or i32 %v13_1c6, %v12_1c6
  store i32 %v14_1c6, i32* %eax.global-to-local, align 4
  %v15_1c642 = and i32 %v2_1c4, 256
  %v16_1c6 = icmp ne i32 %v15_1c642, 0
  %v1_1c8 = icmp eq i1 %v16_1c6, false
  %v0_1d1 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_1c8, label %dec_label_pc_1d1, label %dec_label_pc_1ca

dec_label_pc_1ca:                                 ; preds = %dec_label_pc_16b
  %v1_1cc = load i32, i32* @esi, align 4
  %v2_1cc = add i32 %v1_1cc, -24
  %v3_1cc = inttoptr i32 %v2_1cc to double*
  %v4_1cc = load double, double* %v3_1cc, align 4
  %v5_1cc = fpext double %v4_1cc to x86_fp80
  store x86_fp80 %v5_1cc, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1e7

dec_label_pc_1d1:                                 ; preds = %dec_label_pc_16b
  %v1_1d1 = sub i3 %v0_1d1, ptrtoint (i8* @global_var_1.1 to i3)
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v1_1d1, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1d5 = load i32, i32* @fpsw, align 4
  %v1_1d5 = call i16 @__asm_fnstsw(i32 %v0_1d5)
  %v2_1d5 = sext i16 %v1_1d5 to i32
  %v3_1d5 = load i32, i32* %eax.global-to-local, align 4
  %v4_1d5 = and i32 %v3_1d5, -65536
  %tmp71 = udiv i32 %v2_1d5, 2
  %v12_1d7 = and i32 %tmp71, 32512
  %v2_1d5.masked = and i32 %v2_1d5, -65281
  %v13_1d7 = or i32 %v4_1d5, %v2_1d5.masked
  %v14_1d7 = or i32 %v13_1d7, %v12_1d7
  store i32 %v14_1d7, i32* %eax.global-to-local, align 4
  %v15_1d743 = and i32 %v2_1d5, 256
  %v16_1d7 = icmp eq i32 %v15_1d743, 0
  %v0_1e2 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v16_1d7, label %dec_label_pc_1db, label %dec_label_pc_1e2

dec_label_pc_1db:                                 ; preds = %dec_label_pc_1d1
  %v2_1e2 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_1db = add i3 %v0_1e2, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v4_1db, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_1dd = load i32, i32* @esi, align 4
  %v3_1dd = add i32 %v2_1dd, -16
  %v4_1dd = inttoptr i32 %v3_1dd to double*
  %v5_1dd = load double, double* %v4_1dd, align 4
  %v6_1dd = fpext double %v5_1dd to x86_fp80
  %v7_1dd = fdiv x86_fp80 %v6_1dd, %v2_1e2
  store x86_fp80 %v7_1dd, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1e7

dec_label_pc_1e2:                                 ; preds = %dec_label_pc_1d1
  %v1_1e4 = load i32, i32* @esi, align 4
  %v2_1e4 = add i32 %v1_1e4, -16
  %v3_1e4 = inttoptr i32 %v2_1e4 to double*
  %v4_1e4 = load double, double* %v3_1e4, align 4
  %v5_1e4 = fpext double %v4_1e4 to x86_fp80
  %v6_1e4 = add i3 %v0_1e2, 1
  store i3 %v6_1e4, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_1e4, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1e7

dec_label_pc_1e7:                                 ; preds = %dec_label_pc_1e2, %dec_label_pc_1db, %dec_label_pc_1ca
  %v1_205 = phi i32 [ %v1_1e4, %dec_label_pc_1e2 ], [ %v2_1dd, %dec_label_pc_1db ], [ %v1_1cc, %dec_label_pc_1ca ]
  %v3_1ea = phi x86_fp80 [ %v5_1e4, %dec_label_pc_1e2 ], [ %v7_1dd, %dec_label_pc_1db ], [ %v5_1cc, %dec_label_pc_1ca ]
  %v0_1e7 = phi i3 [ %v6_1e4, %dec_label_pc_1e2 ], [ %v4_1db, %dec_label_pc_1db ], [ %v0_1d1, %dec_label_pc_1ca ]
  %v1_1e7 = load i32, i32* @ecx, align 8
  %v2_1e7 = add i32 %v1_1e7, 8
  %v3_1e7 = inttoptr i32 %v2_1e7 to double*
  %v4_1e7 = load double, double* %v3_1e7, align 4
  %v5_1e7 = fpext double %v4_1e7 to x86_fp80
  %v4_1ea = fmul x86_fp80 %v3_1ea, %v5_1e7
  store x86_fp80 %v4_1ea, x86_fp80* %st6.global-to-local, align 4
  %v4_1ec = fptrunc x86_fp80 %v4_1ea to double
  store double %v4_1ec, double* %v3_1e7, align 4
  %v2_1ef = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_1ef = fmul x86_fp80 %v2_1ef, %v2_1ef
  %v4_1f1 = fmul x86_fp80 %v4_1ef, %v4_1ef
  %v4_1f3 = fmul x86_fp80 %v4_1f1, %v4_1f1
  store x86_fp80 %v4_1f3, x86_fp80* %st7.global-to-local, align 4
  %v2_1f5 = load i32, i32* @edi, align 4
  %v3_1f5 = add i32 %v2_1f5, -88
  %v4_1f5 = inttoptr i32 %v3_1f5 to double*
  %v5_1f5 = load double, double* %v4_1f5, align 4
  %v6_1f5 = fpext double %v5_1f5 to x86_fp80
  %v7_1f5 = fadd x86_fp80 %v4_1f3, %v6_1f5
  store x86_fp80 %v7_1f5, x86_fp80* %st7.global-to-local, align 4
  %v2_1f8 = load i32, i32* @ecx, align 8
  %v3_1f8 = fptrunc x86_fp80 %v7_1f5 to double
  %v4_1f8 = inttoptr i32 %v2_1f8 to double*
  store double %v3_1f8, double* %v4_1f8, align 4
  %v1_1fa = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_1fa = add i32 %v2_1f5, -96
  %v4_1fa = inttoptr i32 %v3_1fa to double*
  %v5_1fa = load double, double* %v4_1fa, align 4
  %v6_1fa = fpext double %v5_1fa to x86_fp80
  %v7_1fa = fadd x86_fp80 %v1_1fa, %v6_1fa
  store x86_fp80 %v7_1fa, x86_fp80* %st7.global-to-local, align 4
  %v2_1fd = load i32, i32* @edx, align 8
  %v3_1fd = fptrunc x86_fp80 %v7_1fa to double
  %v4_1fd = inttoptr i32 %v2_1fd to double*
  store double %v3_1fd, double* %v4_1fd, align 4
  %v1_1ff = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_1ff = add i32 %v2_1f5, -104
  %v4_1ff = inttoptr i32 %v3_1ff to double*
  %v5_1ff = load double, double* %v4_1ff, align 4
  %v6_1ff = fpext double %v5_1ff to x86_fp80
  %v7_1ff = fadd x86_fp80 %v1_1ff, %v6_1ff
  store x86_fp80 %v7_1ff, x86_fp80* %st7.global-to-local, align 4
  %v2_202 = load i32, i32* @ebx, align 8
  %v3_202 = fptrunc x86_fp80 %v7_1ff to double
  %v4_202 = inttoptr i32 %v2_202 to double*
  store double %v3_202, double* %v4_202, align 4
  %v2_205 = add i32 %v1_205, -92
  %v3_205 = inttoptr i32 %v2_205 to double*
  %v4_205 = load double, double* %v3_205, align 4
  %v5_205 = fpext double %v4_205 to x86_fp80
  %v6_205 = add i3 %v0_1e7, add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 -3))
  store i3 %v6_205, i3* @fpu_stat_TOP, align 1
  store x86_fp80 %v5_205, x86_fp80* %st7.global-to-local, align 4
  %v0_208 = call x86_fp80 @function_2a()
  store x86_fp80 %v0_208, x86_fp80* %st7.global-to-local, align 4
  %v0_20d = load i32, i32* @ebx, align 8
  store i32 %v0_20d, i32* %eax.global-to-local, align 4
  store i32 %arg3, i32* @ebx, align 8
  ret i32 %v0_20d
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
