source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %ecx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %esp.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st3.global-to-local = alloca x86_fp80, align 4
  %st4.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  store i32 0, i32* %esp.global-to-local, align 4
  %stack_var_-36 = alloca i32, align 4
  %v0_0 = load i32, i32* %ecx.global-to-local, align 4
  %v15_1 = ptrtoint i32* %stack_var_-36 to i32
  %v0_4 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_4 = load i32, i32* %esi.global-to-local, align 4
  %v2_4 = add i32 %v1_4, -104
  %v3_4 = inttoptr i32 %v2_4 to double*
  %v4_4 = load double, double* %v3_4, align 4
  %v5_4 = fpext double %v4_4 to x86_fp80
  %v2_7 = load i32, i32* @edi, align 8
  %v3_7 = add i32 %v2_7, -28
  %v4_7 = inttoptr i32 %v3_7 to float*
  %v5_7 = load float, float* %v4_7, align 4
  %v6_7 = fpext float %v5_7 to x86_fp80
  %v7_7 = fsub x86_fp80 %v5_4, %v6_7
  %v2_a = add i32 %v1_4, -112
  %v3_a = inttoptr i32 %v2_a to double*
  %v4_a = load double, double* %v3_a, align 4
  %v5_a = fpext double %v4_a to x86_fp80
  store x86_fp80 %v5_a, x86_fp80* %st6.global-to-local, align 4
  %v3_d = add i32 %v2_7, -24
  %v4_d = inttoptr i32 %v3_d to float*
  %v5_d = load float, float* %v4_d, align 4
  %v6_d = fpext float %v5_d to x86_fp80
  %v7_d = fsub x86_fp80 %v5_a, %v6_d
  store x86_fp80 %v7_d, x86_fp80* %st6.global-to-local, align 4
  %v2_10 = add i32 %v1_4, -120
  %v3_10 = inttoptr i32 %v2_10 to double*
  %v4_10 = load double, double* %v3_10, align 4
  %v5_10 = fpext double %v4_10 to x86_fp80
  %v3_13 = add i32 %v2_7, -20
  %v4_13 = inttoptr i32 %v3_13 to float*
  %v5_13 = load float, float* %v4_13, align 4
  %v6_13 = fpext float %v5_13 to x86_fp80
  %v7_13 = fsub x86_fp80 %v5_10, %v6_13
  store x86_fp80 %v7_13, x86_fp80* %st4.global-to-local, align 4
  %v3_18 = add i32 %v2_7, -68
  %v4_18 = inttoptr i32 %v3_18 to float*
  %v5_18 = load float, float* %v4_18, align 4
  %v6_18 = fpext float %v5_18 to x86_fp80
  %v7_18 = fmul x86_fp80 %v7_13, %v6_18
  store x86_fp80 %v7_18, x86_fp80* %st4.global-to-local, align 4
  %v3_1b = add i3 %v0_4, 3
  store x86_fp80 %v7_d, x86_fp80* %st3.global-to-local, align 4
  %v3_1d = add i32 %v2_7, -72
  %v4_1d = inttoptr i32 %v3_1d to float*
  %v5_1d = load float, float* %v4_1d, align 4
  %v6_1d = fpext float %v5_1d to x86_fp80
  %v7_1d = fmul x86_fp80 %v7_d, %v6_1d
  %v4_20 = fadd x86_fp80 %v7_18, %v7_1d
  store x86_fp80 %v4_20, x86_fp80* %st4.global-to-local, align 4
  store x86_fp80 %v7_7, x86_fp80* %st3.global-to-local, align 4
  %v3_24 = add i32 %v2_7, -76
  %v4_24 = inttoptr i32 %v3_24 to float*
  %v5_24 = load float, float* %v4_24, align 4
  %v6_24 = fpext float %v5_24 to x86_fp80
  %v7_24 = fmul x86_fp80 %v7_7, %v6_24
  %v4_27 = fadd x86_fp80 %v4_20, %v7_24
  store x86_fp80 %v4_27, x86_fp80* %st4.global-to-local, align 4
  store x86_fp80 %v7_13, x86_fp80* %st3.global-to-local, align 4
  %v3_2b = add i32 %v2_7, -44
  %v4_2b = inttoptr i32 %v3_2b to float*
  %v5_2b = load float, float* %v4_2b, align 4
  %v6_2b = fpext float %v5_2b to x86_fp80
  %v7_2b = fmul x86_fp80 %v7_13, %v6_2b
  store x86_fp80 %v7_2b, x86_fp80* %st3.global-to-local, align 4
  %v3_30 = add i32 %v2_7, -48
  %v4_30 = inttoptr i32 %v3_30 to float*
  %v5_30 = load float, float* %v4_30, align 4
  %v6_30 = fpext float %v5_30 to x86_fp80
  %v7_30 = fmul x86_fp80 %v7_d, %v6_30
  %v4_33 = fadd x86_fp80 %v7_2b, %v7_30
  store x86_fp80 %v4_33, x86_fp80* %st3.global-to-local, align 4
  %v3_37 = add i32 %v2_7, -52
  %v4_37 = inttoptr i32 %v3_37 to float*
  %v5_37 = load float, float* %v4_37, align 4
  %v6_37 = fpext float %v5_37 to x86_fp80
  %v7_37 = fmul x86_fp80 %v7_7, %v6_37
  %v4_3a = fadd x86_fp80 %v4_33, %v7_37
  store x86_fp80 %v7_13, x86_fp80* %st3.global-to-local, align 4
  %v3_3e = add i32 %v2_7, -56
  %v4_3e = inttoptr i32 %v3_3e to float*
  %v5_3e = load float, float* %v4_3e, align 4
  %v6_3e = fpext float %v5_3e to x86_fp80
  %v7_3e = fmul x86_fp80 %v7_13, %v6_3e
  store x86_fp80 %v7_d, x86_fp80* %st3.global-to-local, align 4
  store x86_fp80 %v7_3e, x86_fp80* %st6.global-to-local, align 4
  %v3_43 = add i32 %v2_7, -60
  %v4_43 = inttoptr i32 %v3_43 to float*
  %v5_43 = load float, float* %v4_43, align 4
  %v6_43 = fpext float %v5_43 to x86_fp80
  %v7_43 = fmul x86_fp80 %v7_d, %v6_43
  store x86_fp80 %v7_43, x86_fp80* %st3.global-to-local, align 4
  %v4_46 = fadd x86_fp80 %v7_3e, %v7_43
  store x86_fp80 %v4_46, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v7_7, x86_fp80* %st4.global-to-local, align 4
  %v3_4a = add i32 %v2_7, -64
  %v4_4a = inttoptr i32 %v3_4a to float*
  %v5_4a = load float, float* %v4_4a, align 4
  %v6_4a = fpext float %v5_4a to x86_fp80
  %v7_4a = fmul x86_fp80 %v7_7, %v6_4a
  %v4_4d = fadd x86_fp80 %v4_46, %v7_4a
  store x86_fp80 %v4_4d, x86_fp80* %st6.global-to-local, align 4
  %v3_51 = fmul x86_fp80 %v4_4d, %v4_4d
  %v3_55 = fmul x86_fp80 %v4_3a, %v4_3a
  %v4_57 = fadd x86_fp80 %v3_55, %v3_51
  %v2_59 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_57)
  store x86_fp80 %v2_59, x86_fp80* %st4.global-to-local, align 4
  store x86_fp80 %v4_27, x86_fp80* %st3.global-to-local, align 4
  %v3_5d = add i32 %v2_7, -92
  %v4_5d = inttoptr i32 %v3_5d to float*
  %v5_5d = load float, float* %v4_5d, align 4
  %v6_5d = fpext float %v5_5d to x86_fp80
  %v7_5d = fmul x86_fp80 %v4_27, %v6_5d
  store x86_fp80 %v7_5d, x86_fp80* %st3.global-to-local, align 4
  %v4_60 = fadd x86_fp80 %v7_5d, %v2_59
  store x86_fp80 %v4_60, x86_fp80* %st4.global-to-local, align 4
  %v3_66 = add i32 %v2_7, -36
  %v4_66 = inttoptr i32 %v3_66 to float*
  %v5_66 = load float, float* %v4_66, align 4
  %v6_66 = fpext float %v5_66 to x86_fp80
  %v7_66 = fsub x86_fp80 %v4_60, %v6_66
  store x86_fp80 %v7_66, x86_fp80* %st4.global-to-local, align 4
  store i3 %v3_1b, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_6b = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_27)
  store x86_fp80 %v2_6b, x86_fp80* %st3.global-to-local, align 4
  %v3_6d = add i32 %v2_7, -32
  %v4_6d = inttoptr i32 %v3_6d to float*
  %v5_6d = load float, float* %v4_6d, align 4
  %v6_6d = fpext float %v5_6d to x86_fp80
  %v7_6d = fsub x86_fp80 %v2_6b, %v6_6d
  store x86_fp80 %v7_6d, x86_fp80* %st3.global-to-local, align 4
  %v0_72 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_72 = call i16 @__asm_fnstsw(i32 %v0_72)
  %v2_72 = sext i16 %v1_72 to i32
  %v3_72 = load i32, i32* %eax.global-to-local, align 4
  %v4_72 = and i32 %v3_72, -65536
  %tmp251 = udiv i32 %v2_72, 2
  %v12_74 = and i32 %tmp251, 32512
  %v2_72.masked = and i32 %v2_72, -65281
  %v13_74 = or i32 %v4_72, %v2_72.masked
  %v14_74 = or i32 %v13_74, %v12_74
  store i32 %v14_74, i32* %eax.global-to-local, align 4
  %v15_7410 = and i32 %v2_72, 256
  %v16_74 = icmp eq i32 %v15_7410, 0
  br i1 %v16_74, label %dec_label_pc_78, label %dec_label_pc_0.dec_label_pc_7a_crit_edge

dec_label_pc_0.dec_label_pc_7a_crit_edge:         ; preds = %dec_label_pc_0
  %v1_7c.pre = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  br label %dec_label_pc_7a

dec_label_pc_78:                                  ; preds = %dec_label_pc_0
  %v2_78 = load x86_fp80, x86_fp80* %st3.global-to-local, align 4
  %v3_78 = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  store x86_fp80 %v3_78, x86_fp80* %st3.global-to-local, align 4
  store x86_fp80 %v2_78, x86_fp80* %st4.global-to-local, align 4
  br label %dec_label_pc_7a

dec_label_pc_7a:                                  ; preds = %dec_label_pc_0.dec_label_pc_7a_crit_edge, %dec_label_pc_78
  %v1_7c = phi x86_fp80 [ %v1_7c.pre, %dec_label_pc_0.dec_label_pc_7a_crit_edge ], [ %v2_78, %dec_label_pc_78 ]
  %v0_7a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_7a = add i3 %v0_7a, 1
  %v2_7e = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v1_7c)
  store x86_fp80 %v2_7e, x86_fp80* %st3.global-to-local, align 4
  store i3 %v4_7a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_87 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_87 = call i16 @__asm_fnstsw(i32 %v0_87)
  %v2_87 = sext i16 %v1_87 to i32
  %v3_87 = load i32, i32* %eax.global-to-local, align 4
  %v4_87 = and i32 %v3_87, -65536
  %tmp252 = udiv i32 %v2_87, 2
  %v12_89 = and i32 %tmp252, 32512
  %v2_87.masked = and i32 %v2_87, -65281
  %v13_89 = or i32 %v4_87, %v2_87.masked
  %v14_89 = or i32 %v13_89, %v12_89
  store i32 %v14_89, i32* %eax.global-to-local, align 4
  %v15_8911 = and i32 %v2_87, 256
  %v16_89 = icmp ne i32 %v15_8911, 0
  %v1_8b = icmp eq i1 %v16_89, false
  %v1_9a = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  br i1 %v1_8b, label %dec_label_pc_9a, label %dec_label_pc_8d

dec_label_pc_8d:                                  ; preds = %dec_label_pc_7a
  %v2_8d = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v1_9a)
  store x86_fp80 %v2_8d, x86_fp80* %st4.global-to-local, align 4
  %v0_8f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_8f = load i32, i32* %esi.global-to-local, align 4
  %v3_8f = add i32 %v2_8f, -32
  %tmp253 = fptrunc x86_fp80 %v1_9a to double
  %v4_8f = call double @llvm.fabs.f64(double %tmp253)
  %v5_8f = inttoptr i32 %v3_8f to double*
  store double %v4_8f, double* %v5_8f, align 4
  %v4_94 = add i3 %v0_8f, 3
  store i3 %v4_94, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_96 = xor i3 %v0_8f, -4
  br label %dec_label_pc_f3

dec_label_pc_9a:                                  ; preds = %dec_label_pc_7a
  %v2_9e = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_9e, x86_fp80* %st4.global-to-local, align 4
  %v2_a0 = call i32 @__asm_fpatan(x86_fp80 %v1_9a)
  store i32 %v2_a0, i32* %eax.global-to-local, align 4
  %v4_a2 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_a2 = fpext double %v4_a2 to x86_fp80
  %v6_a2 = fmul x86_fp80 %v2_9e, %v5_a2
  store x86_fp80 %v6_a2, x86_fp80* %st4.global-to-local, align 4
  %v0_a4 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_a4 = fptrunc x86_fp80 %v6_a2 to float
  %v5_a4 = bitcast float %v4_a4 to i32
  store i32 %v5_a4, i32* %stack_var_-36, align 4
  %v4_a7 = add i3 %v0_a4, 2
  %v1_a9 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v6_a9 = fmul x86_fp80 %v1_a9, %v5_a2
  store x86_fp80 %v6_a9, x86_fp80* %st6.global-to-local, align 4
  %tmp254 = bitcast double %v4_a2 to i64
  %tmp255 = trunc i64 %tmp254 to i32
  %v3_ab = add i32 %tmp255, -36
  %v4_ab = inttoptr i32 %v3_ab to float*
  %v5_ab = load float, float* %v4_ab, align 4
  %v6_ab = fpext float %v5_ab to x86_fp80
  %v7_ab = fdiv x86_fp80 %v6_a9, %v6_ab
  store x86_fp80 %v7_ab, x86_fp80* %st6.global-to-local, align 4
  %v6_ae = add i3 %v0_a4, 3
  store i32 %v15_1, i32* %eax.global-to-local, align 4
  store i32 %v15_1, i32* %ecx.global-to-local, align 4
  %v1_bf = add i32 %tmp255, -16
  %v2_bf = inttoptr i32 %v1_bf to i32*
  %v3_bf = load i32, i32* %v2_bf, align 4
  %v1_c2 = urem i32 %v3_bf, 4
  store i32 %v1_c2, i32* %ecx.global-to-local, align 4
  %v1_c5 = load i32, i32* %esp.global-to-local, align 4
  %v3_c5 = mul i32 %v1_c2, 8
  %v4_c5 = add i32 %v1_c5, %v3_c5
  %v5_c5 = inttoptr i32 %v4_c5 to double*
  %v6_c5 = load double, double* %v5_c5, align 4
  %v7_c5 = fpext double %v6_c5 to x86_fp80
  store x86_fp80 %v7_c5, x86_fp80* %st6.global-to-local, align 4
  %v3_c8 = add i32 %tmp255, -8
  %v4_c8 = inttoptr i32 %v3_c8 to double*
  %v5_c8 = load double, double* %v4_c8, align 4
  %v6_c8 = fpext double %v5_c8 to x86_fp80
  %v7_c8 = fsub x86_fp80 %v7_c5, %v6_c8
  store x86_fp80 %v7_c8, x86_fp80* %st6.global-to-local, align 4
  %v3_cb = add i32 %tmp255, -40
  %v4_cb = inttoptr i32 %v3_cb to float*
  %v5_cb = load float, float* %v4_cb, align 4
  %v6_cb = fpext float %v5_cb to x86_fp80
  %v7_cb = fmul x86_fp80 %v7_c8, %v6_cb
  %v7_ce = fmul x86_fp80 %v7_cb, %v4_60
  %v7_d2 = fsub x86_fp80 %v1_9a, %v7_ce
  %v2_d6 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_d2)
  store x86_fp80 %v2_d6, x86_fp80* %st6.global-to-local, align 4
  %v3_d8 = add i32 %tmp255, 8
  %v4_d8 = inttoptr i32 %v3_d8 to double*
  %v5_d8 = load double, double* %v4_d8, align 4
  %v6_d8 = fpext double %v5_d8 to x86_fp80
  %v7_d8 = fsub x86_fp80 %v2_d6, %v6_d8
  store x86_fp80 %v7_d8, x86_fp80* %st6.global-to-local, align 4
  %v2_db = load i32, i32* %esi.global-to-local, align 4
  %v3_db = add i32 %v2_db, -32
  %v4_db = fptrunc x86_fp80 %v7_d8 to double
  %v5_db = inttoptr i32 %v3_db to double*
  store double %v4_db, double* %v5_db, align 4
  %v0_de = load i32, i32* @edi, align 8
  %v1_de = add i32 %v0_de, -80
  %v2_de = inttoptr i32 %v1_de to i32*
  %v3_de = load i32, i32* %v2_de, align 4
  %v1_e1 = urem i32 %v3_de, 4
  store i32 %v1_e1, i32* %ecx.global-to-local, align 4
  %v3_e4 = mul i32 %v1_e1, 8
  %v4_e4 = add i32 %v3_e4, %v1_c5
  %v5_e4 = inttoptr i32 %v4_e4 to double*
  %v6_e4 = load double, double* %v5_e4, align 4
  %v7_e4 = fpext double %v6_e4 to x86_fp80
  store i3 %v4_a7, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_e4, x86_fp80* %st6.global-to-local, align 4
  %v3_e7 = add i32 %v0_de, -84
  %v4_e7 = inttoptr i32 %v3_e7 to float*
  %v5_e7 = load float, float* %v4_e7, align 4
  %v6_e7 = fpext float %v5_e7 to x86_fp80
  %v7_e7 = fadd x86_fp80 %v7_e4, %v6_e7
  store x86_fp80 %v7_e7, x86_fp80* %st6.global-to-local, align 4
  %v3_ea = add i32 %v0_de, -88
  %v4_ea = inttoptr i32 %v3_ea to float*
  %v5_ea = load float, float* %v4_ea, align 4
  %v6_ea = fpext float %v5_ea to x86_fp80
  %v7_ea = fmul x86_fp80 %v7_e7, %v6_ea
  store x86_fp80 %v7_ea, x86_fp80* %st6.global-to-local, align 4
  %v3_ed = add i32 %v2_db, 128
  %v4_ed = fptrunc x86_fp80 %v7_ea to double
  %v5_ed = inttoptr i32 %v3_ed to double*
  store double %v4_ed, double* %v5_ed, align 4
  br label %dec_label_pc_f3

dec_label_pc_f3:                                  ; preds = %dec_label_pc_9a, %dec_label_pc_8d
  %v0_f7 = phi i32 [ %v15_1, %dec_label_pc_9a ], [ %v14_89, %dec_label_pc_8d ]
  %storemerge = phi i3 [ %v6_ae, %dec_label_pc_9a ], [ %v4_96, %dec_label_pc_8d ]
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_0, i32* %ecx.global-to-local, align 4
  ret i32 %v0_f7
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare i32 @__asm_fpatan(x86_fp80) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
