source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8
@global_var_1.1 = constant i8 -117

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st4.global-to-local = alloca x86_fp80, align 4
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_9 = load i32, i32* %ebx.global-to-local, align 4
  %v0_a = load i32, i32* %esi.global-to-local, align 4
  %v0_b = load i32, i32* %edi.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_f = add i32 %arg1, 48
  %v2_f = inttoptr i32 %v1_f to i32*
  %v3_f = load i32, i32* %v2_f, align 4
  store i32 %v3_f, i32* %edi.global-to-local, align 4
  %v0_12 = load i32, i32* @eax, align 8
  store i32 %v0_12, i32* %ebx.global-to-local, align 4
  %v0_14 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_14 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_14 = fpext double %v3_14 to x86_fp80
  store x86_fp80 %v4_14, x86_fp80* %st7.global-to-local, align 4
  %v3_16 = add i32 %v3_f, -40
  %v4_16 = inttoptr i32 %v3_16 to double*
  %v5_16 = load double, double* %v4_16, align 4
  %v6_16 = fpext double %v5_16 to x86_fp80
  %v7_16 = fadd x86_fp80 %v4_14, %v6_16
  store x86_fp80 %v7_16, x86_fp80* %st7.global-to-local, align 4
  %tmp260 = bitcast double %v3_14 to i64
  %tmp261 = trunc i64 %tmp260 to i32
  %v3_19 = fptrunc x86_fp80 %v7_16 to double
  %v4_19 = inttoptr i32 %tmp261 to double*
  store double %v3_19, double* %v4_19, align 4
  %v3_1b = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_1b = fpext double %v3_1b to x86_fp80
  %v5_1b = add i3 %v0_14, add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)))
  store i3 %v5_1b, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_1b, x86_fp80* %st6.global-to-local, align 4
  %v3_1d = add i32 %v3_f, -32
  %v4_1d = inttoptr i32 %v3_1d to double*
  %v5_1d = load double, double* %v4_1d, align 4
  %v6_1d = fpext double %v5_1d to x86_fp80
  %v7_1d = fadd x86_fp80 %v4_1b, %v6_1d
  store x86_fp80 %v7_1d, x86_fp80* %st6.global-to-local, align 4
  %v3_20 = fptrunc x86_fp80 %v7_1d to double
  %v4_20 = inttoptr i32 %v0_12 to double*
  store double %v3_20, double* %v4_20, align 4
  %v3_22 = call i32 @__asm_fpatan(i32 %v0_b, i32 %v0_a, i32 %v0_9)
  store i32 %v3_22, i32* @eax, align 8
  %v0_24 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_24 = load i32, i32* %edi.global-to-local, align 4
  %v2_24 = add i32 %v1_24, -24
  %v3_24 = inttoptr i32 %v2_24 to double*
  %v4_24 = load double, double* %v3_24, align 4
  %v5_24 = fpext double %v4_24 to x86_fp80
  %v6_24 = sub i3 %v0_24, ptrtoint (i8* @global_var_1.1 to i3)
  store x86_fp80 %v5_24, x86_fp80* %st5.global-to-local, align 4
  %v3_27 = add i32 %v1_24, 8
  %v4_27 = inttoptr i32 %v3_27 to double*
  %v5_27 = load double, double* %v4_27, align 4
  %v6_27 = fpext double %v5_27 to x86_fp80
  %v7_27 = fmul x86_fp80 %v5_24, %v6_27
  store x86_fp80 %v7_27, x86_fp80* %st5.global-to-local, align 4
  %v3_2a = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_2a = fadd x86_fp80 %v7_27, %v3_2a
  store x86_fp80 %v4_2a, x86_fp80* %st6.global-to-local, align 4
  %v3_2c = inttoptr i32 %v1_24 to double*
  %v4_2c = load double, double* %v3_2c, align 4
  %v5_2c = fpext double %v4_2c to x86_fp80
  %v6_2c = fdiv x86_fp80 %v4_2a, %v5_2c
  store x86_fp80 %v6_2c, x86_fp80* %st6.global-to-local, align 4
  %v3_2e = add i32 %v1_24, -16
  %v4_2e = inttoptr i32 %v3_2e to double*
  %v5_2e = load double, double* %v4_2e, align 4
  %v6_2e = fpext double %v5_2e to x86_fp80
  %v7_2e = fmul x86_fp80 %v6_2c, %v6_2e
  %v2_31 = fptosi x86_fp80 %v7_2e to i32
  %v2_37 = fsub x86_fp80 0xK80000000000000000000, %v7_2e
  store x86_fp80 %v2_37, x86_fp80* %st6.global-to-local, align 4
  %v5_39 = load double, double* %v4_2e, align 4
  %v6_39 = fpext double %v5_39 to x86_fp80
  %v7_39 = fdiv x86_fp80 %v2_37, %v6_39
  store x86_fp80 %v7_39, x86_fp80* %st6.global-to-local, align 4
  %v4_3c = load double, double* %v3_2c, align 4
  %v5_3c = fpext double %v4_3c to x86_fp80
  %v6_3c = fmul x86_fp80 %v7_39, %v5_3c
  store x86_fp80 %v6_3c, x86_fp80* %st6.global-to-local, align 4
  %v4_3e = load double, double* %v3_24, align 4
  %v5_3e = fpext double %v4_3e to x86_fp80
  store x86_fp80 %v5_3e, x86_fp80* %st5.global-to-local, align 4
  %v5_41 = load double, double* %v4_27, align 4
  %v6_41 = fpext double %v5_41 to x86_fp80
  %v7_41 = fmul x86_fp80 %v5_3e, %v6_41
  store x86_fp80 %v7_41, x86_fp80* %st5.global-to-local, align 4
  %v4_44 = fadd x86_fp80 %v6_3c, %v7_41
  store x86_fp80 %v4_44, x86_fp80* %st6.global-to-local, align 4
  %v2_46 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_44)
  %v3_46 = fcmp olt x86_fp80 %v2_46, 0xK403E8000000000000000
  br i1 %v3_46, label %bb, label %bb262

bb:                                               ; preds = %dec_label_pc_0
  %v4_46 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_44)
  store x86_fp80 %v4_46, x86_fp80* %st6.global-to-local, align 4
  %v7_46 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v4_44)
  store i3 %v6_24, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_46, x86_fp80* %st5.global-to-local, align 4
  %.pre = sub i3 %v6_24, ptrtoint (i8* @global_var_1.1 to i3)
  br label %bb262

bb262:                                            ; preds = %dec_label_pc_0, %bb
  %v5_4a.pre-phi = phi i3 [ %v6_24, %dec_label_pc_0 ], [ %.pre, %bb ]
  %v3_58 = phi x86_fp80 [ %v4_44, %dec_label_pc_0 ], [ %v4_46, %bb ]
  %v3_5c = phi x86_fp80 [ %v7_41, %dec_label_pc_0 ], [ %v7_46, %bb ]
  %v3_4a = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_4a = fpext double %v3_4a to x86_fp80
  %v4_4c = fmul x86_fp80 %v3_5c, %v4_4a
  %v3_4e = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_4e = fpext double %v3_4e to x86_fp80
  %v5_4e = sub i3 %v5_4a.pre-phi, ptrtoint (i8* @global_var_1.1 to i3)
  %v4_50 = fmul x86_fp80 %v3_58, %v4_4e
  %v4_52 = fsub x86_fp80 %v4_50, %v4_4c
  store x86_fp80 %v4_52, x86_fp80* %st4.global-to-local, align 4
  store i3 %v5_4e, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_60 = add i32 %v1_24, -128
  %v2_60 = inttoptr i32 %v1_60 to i32*
  %v3_60 = load i32, i32* %v2_60, align 4
  %v1_63 = and i32 %v3_60, 2
  %v2_63 = icmp eq i32 %v1_63, 0
  store i32 %v1_63, i32* @eax, align 8
  %tmp263 = bitcast double %v3_4e to i64
  %tmp264 = trunc i64 %tmp263 to i32
  br i1 %v2_63, label %dec_label_pc_6d, label %dec_label_pc_68

dec_label_pc_68:                                  ; preds = %bb262
  %v1_68 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_68 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v1_68)
  store x86_fp80 %v2_68, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_77

dec_label_pc_6d:                                  ; preds = %bb262
  %v1_70 = and i32 %v2_31, ptrtoint (i8* @global_var_1.1 to i32)
  %v2_70 = icmp eq i32 %v1_70, 0
  store i32 %v1_70, i32* @eax, align 8
  %v1_73 = icmp eq i1 %v2_70, false
  %v1_77.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_73, label %dec_label_pc_77, label %dec_label_pc_75

dec_label_pc_75:                                  ; preds = %dec_label_pc_6d
  %v2_75 = fsub x86_fp80 0xK80000000000000000000, %v1_77.pre
  store x86_fp80 %v2_75, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_77

dec_label_pc_77:                                  ; preds = %dec_label_pc_6d, %dec_label_pc_75, %dec_label_pc_68
  %v1_77 = phi x86_fp80 [ %v2_75, %dec_label_pc_75 ], [ %v2_68, %dec_label_pc_68 ], [ %v1_77.pre, %dec_label_pc_6d ]
  %v3_77 = add i32 %v1_24, -40
  %v4_77 = inttoptr i32 %v3_77 to double*
  %v5_77 = load double, double* %v4_77, align 4
  %v6_77 = fpext double %v5_77 to x86_fp80
  %v7_77 = fsub x86_fp80 %v1_77, %v6_77
  store x86_fp80 %v7_77, x86_fp80* %st7.global-to-local, align 4
  %v3_7a = add i32 %v1_24, -48
  %v4_7a = inttoptr i32 %v3_7a to double*
  %v5_7a = load double, double* %v4_7a, align 4
  %v6_7a = fpext double %v5_7a to x86_fp80
  %v7_7a = fsub x86_fp80 %v7_77, %v6_7a
  %v2_7d = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_7a)
  %v2_7f = fsub x86_fp80 0xK80000000000000000000, %v2_7d
  store x86_fp80 %v2_7f, x86_fp80* %st7.global-to-local, align 4
  %v5_81 = load double, double* %v4_7a, align 4
  %v6_81 = fpext double %v5_81 to x86_fp80
  %v7_81 = fsub x86_fp80 %v6_81, %v2_7d
  store x86_fp80 %v7_81, x86_fp80* %st7.global-to-local, align 4
  %v3_84 = fptrunc x86_fp80 %v7_81 to double
  %v4_84 = inttoptr i32 %tmp264 to double*
  store double %v3_84, double* %v4_84, align 4
  %v1_86 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_86 = add i32 %v1_24, -32
  %v4_86 = inttoptr i32 %v3_86 to double*
  %v5_86 = load double, double* %v4_86, align 4
  %v6_86 = fpext double %v5_86 to x86_fp80
  %v7_86 = fsub x86_fp80 %v1_86, %v6_86
  store x86_fp80 %v7_86, x86_fp80* %st7.global-to-local, align 4
  %v3_89 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_89 = fpext double %v3_89 to x86_fp80
  store x86_fp80 %v4_89, x86_fp80* %st6.global-to-local, align 4
  %v2_8b = add i32 %v1_24, -56
  %v3_8b = inttoptr i32 %v2_8b to double*
  %v4_8b = load double, double* %v3_8b, align 4
  %v5_8b = fpext double %v4_8b to x86_fp80
  %v4_8e = fadd x86_fp80 %v7_86, %v5_8b
  store x86_fp80 %v4_8e, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v5_8b, x86_fp80* %st5.global-to-local, align 4
  store i3 %v5_4e, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_94 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_94 = call i16 @__asm_fnstsw(i32 %v0_94)
  %v2_94 = sext i16 %v1_94 to i32
  %v3_94 = load i32, i32* @eax, align 8
  %v4_94 = and i32 %v3_94, -65536
  %v4_961 = udiv i32 %v2_94, 512
  %tmp265 = trunc i32 %v4_961 to i8
  %tmp272 = urem i8 %tmp265, -128
  %v5_96 = icmp eq i8 %tmp272, 0
  %v10_96 = zext i8 %tmp272 to i32
  %v12_96 = mul i32 %v10_96, 256
  %v2_94.masked = and i32 %v2_94, -65281
  %v13_96 = or i32 %v4_94, %v2_94.masked
  %v14_96 = or i32 %v13_96, %v12_96
  store i32 %v14_96, i32* @eax, align 8
  %v15_9616 = and i32 %v2_94, 256
  %v16_96 = icmp ne i32 %v15_9616, 0
  %v2_99 = or i1 %v16_96, %v5_96
  br i1 %v2_99, label %dec_label_pc_77.dec_label_pc_9d_crit_edge, label %dec_label_pc_9b

dec_label_pc_77.dec_label_pc_9d_crit_edge:        ; preds = %dec_label_pc_77
  %v2_a0.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_9d

dec_label_pc_9b:                                  ; preds = %dec_label_pc_77
  %v2_9b = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_9b = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v3_9b, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_9b, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_9d

dec_label_pc_9d:                                  ; preds = %dec_label_pc_77.dec_label_pc_9d_crit_edge, %dec_label_pc_9b
  %v2_a0 = phi x86_fp80 [ %v2_a0.pre, %dec_label_pc_77.dec_label_pc_9d_crit_edge ], [ %v2_9b, %dec_label_pc_9b ]
  %v0_9d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_9d = load i32, i32* %edi.global-to-local, align 4
  %v2_9d = add i32 %v1_9d, -56
  %v3_9d = inttoptr i32 %v2_9d to double*
  %v4_9d = load double, double* %v3_9d, align 4
  %v5_9d = fpext double %v4_9d to x86_fp80
  %v6_9d = sub i3 %v0_9d, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v6_9d, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_9d, x86_fp80* %st5.global-to-local, align 4
  %v4_a0 = fsub x86_fp80 %v2_a0, %v5_9d
  store x86_fp80 %v4_a0, x86_fp80* %st7.global-to-local, align 4
  %v1_a2 = add i32 %v1_9d, -128
  %v2_a2 = inttoptr i32 %v1_a2 to i32*
  %v3_a2 = load i32, i32* %v2_a2, align 4
  %v1_a5 = and i32 %v3_a2, ptrtoint (i8* @global_var_1.1 to i32)
  %v2_a5 = icmp eq i32 %v1_a5, 0
  store i32 %v1_a5, i32* @eax, align 8
  br i1 %v2_a5, label %dec_label_pc_c4, label %dec_label_pc_ac

dec_label_pc_ac:                                  ; preds = %dec_label_pc_9d
  %v4_ac = fadd x86_fp80 %v4_a0, %v5_9d
  store x86_fp80 %v4_ac, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_9d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_b2 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_b2 = call i16 @__asm_fnstsw(i32 %v0_b2)
  %v2_b2 = sext i16 %v1_b2 to i32
  %v3_b2 = load i32, i32* @eax, align 8
  %v4_b2 = and i32 %v3_b2, -65536
  %tmp268 = udiv i32 %v2_b2, 2
  %v12_b4 = and i32 %tmp268, 32512
  %v2_b2.masked = and i32 %v2_b2, -65281
  %v13_b4 = or i32 %v4_b2, %v2_b2.masked
  %v14_b4 = or i32 %v13_b4, %v12_b4
  store i32 %v14_b4, i32* @eax, align 8
  %v0_bb = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_bb = load i32, i32* %edi.global-to-local, align 4
  %v2_bb = add i32 %v1_bb, -56
  %v3_bb = inttoptr i32 %v2_bb to double*
  %v4_bb = load double, double* %v3_bb, align 4
  %v5_bb = fpext double %v4_bb to x86_fp80
  %v6_bb = sub i3 %v0_bb, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v6_bb, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_bb, x86_fp80* %st7.global-to-local, align 4
  %v4_be = fsub x86_fp80 %v5_bb, %v5_bb
  br label %dec_label_pc_d8

dec_label_pc_c4:                                  ; preds = %dec_label_pc_9d
  %v4_c4 = fsub x86_fp80 %v4_a0, %v5_9d
  store x86_fp80 %v4_c4, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_9d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ca = load i32, i32* %fpsw.global-to-local, align 4
  %v1_ca = call i16 @__asm_fnstsw(i32 %v0_ca)
  %v2_ca = sext i16 %v1_ca to i32
  %v3_ca = load i32, i32* @eax, align 8
  %v4_ca = and i32 %v3_ca, -65536
  %tmp269 = udiv i32 %v2_ca, 2
  %v12_cc = and i32 %tmp269, 32512
  %v2_ca.masked = and i32 %v2_ca, -65281
  %v13_cc = or i32 %v4_ca, %v2_ca.masked
  %v14_cc = or i32 %v13_cc, %v12_cc
  store i32 %v14_cc, i32* @eax, align 8
  %v0_d3 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_d3 = load i32, i32* %edi.global-to-local, align 4
  %v2_d3 = add i32 %v1_d3, -56
  %v3_d3 = inttoptr i32 %v2_d3 to double*
  %v4_d3 = load double, double* %v3_d3, align 4
  %v5_d3 = fpext double %v4_d3 to x86_fp80
  %v6_d3 = sub i3 %v0_d3, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v6_d3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_d3, x86_fp80* %st7.global-to-local, align 4
  %v4_d6 = fadd x86_fp80 %v5_d3, %v5_d3
  br label %dec_label_pc_d8

dec_label_pc_d8:                                  ; preds = %dec_label_pc_c4, %dec_label_pc_ac
  %v2_10d = phi i32 [ %v1_bb, %dec_label_pc_ac ], [ %v1_d3, %dec_label_pc_c4 ]
  %v0_d8 = phi i3 [ %v6_bb, %dec_label_pc_ac ], [ %v6_d3, %dec_label_pc_c4 ]
  %storemerge12.in.in = phi x86_fp80 [ %v4_be, %dec_label_pc_ac ], [ %v4_d6, %dec_label_pc_c4 ]
  store x86_fp80 %storemerge12.in.in, x86_fp80* %st7.global-to-local, align 4
  %v2_dc = load i32, i32* @ecx, align 8
  %v3_dc = fptrunc x86_fp80 %storemerge12.in.in to double
  %v4_dc = inttoptr i32 %v2_dc to double*
  store double %v3_dc, double* %v4_dc, align 4
  %v1_de = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_de = load i32, i32* %ebx.global-to-local, align 4
  %v3_de = fptrunc x86_fp80 %v1_de to double
  %v4_de = inttoptr i32 %v2_de to double*
  store double %v3_de, double* %v4_de, align 4
  %v4_e2 = add i3 %v0_d8, add (i3 add (i3 add (i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 ptrtoint (i8* @global_var_1.1 to i3))
  %v3_e4 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_e4 = fpext double %v3_e4 to x86_fp80
  store x86_fp80 %v4_e4, x86_fp80* %st7.global-to-local, align 4
  %v3_e6 = add i32 %v2_10d, -72
  %v4_e6 = inttoptr i32 %v3_e6 to double*
  %v5_e6 = load double, double* %v4_e6, align 4
  %v6_e6 = fpext double %v5_e6 to x86_fp80
  %v7_e6 = fadd x86_fp80 %v4_e4, %v6_e6
  store x86_fp80 %v7_e6, x86_fp80* %st7.global-to-local, align 4
  %v3_e9 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_e9 = fpext double %v3_e9 to x86_fp80
  store x86_fp80 %v4_e9, x86_fp80* %st6.global-to-local, align 4
  %v3_eb = add i32 %v2_10d, -80
  %v4_eb = inttoptr i32 %v3_eb to double*
  %v5_eb = load double, double* %v4_eb, align 4
  %v6_eb = fpext double %v5_eb to x86_fp80
  %v7_eb = fadd x86_fp80 %v4_e9, %v6_eb
  store x86_fp80 %v7_eb, x86_fp80* %st6.global-to-local, align 4
  %v3_ee = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_ee = fpext double %v3_ee to x86_fp80
  store x86_fp80 %v4_ee, x86_fp80* %st5.global-to-local, align 4
  %v3_f0 = add i32 %v2_10d, -88
  %v4_f0 = inttoptr i32 %v3_f0 to double*
  %v5_f0 = load double, double* %v4_f0, align 4
  %v6_f0 = fpext double %v5_f0 to x86_fp80
  %v7_f0 = fadd x86_fp80 %v4_ee, %v6_f0
  store x86_fp80 %v7_f0, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v7_f0, x86_fp80* %st4.global-to-local, align 4
  %v3_f5 = add i32 %v2_10d, -116
  %v4_f5 = inttoptr i32 %v3_f5 to float*
  %v5_f5 = load float, float* %v4_f5, align 4
  %v6_f5 = fpext float %v5_f5 to x86_fp80
  %v7_f5 = fmul x86_fp80 %v7_f0, %v6_f5
  store x86_fp80 %v7_f5, x86_fp80* %st4.global-to-local, align 4
  %v3_fa = add i32 %v2_10d, -120
  %v4_fa = inttoptr i32 %v3_fa to float*
  %v5_fa = load float, float* %v4_fa, align 4
  %v6_fa = fpext float %v5_fa to x86_fp80
  %v7_fa = fmul x86_fp80 %v7_eb, %v6_fa
  %v4_fd = fadd x86_fp80 %v7_f5, %v7_fa
  store x86_fp80 %v4_fd, x86_fp80* %st4.global-to-local, align 4
  %v3_101 = add i32 %v2_10d, -124
  %v4_101 = inttoptr i32 %v3_101 to float*
  %v5_101 = load float, float* %v4_101, align 4
  %v6_101 = fpext float %v5_101 to x86_fp80
  %v7_101 = fmul x86_fp80 %v7_e6, %v6_101
  %v4_104 = fadd x86_fp80 %v4_fd, %v7_101
  store x86_fp80 %v4_104, x86_fp80* %st4.global-to-local, align 4
  %v3_108 = add i32 %v2_10d, -92
  %v4_108 = inttoptr i32 %v3_108 to float*
  %v5_108 = load float, float* %v4_108, align 4
  %v6_108 = fpext float %v5_108 to x86_fp80
  %v7_108 = fmul x86_fp80 %v7_f0, %v6_108
  %v3_10d = add i32 %v2_10d, -96
  %v4_10d = inttoptr i32 %v3_10d to float*
  %v5_10d = load float, float* %v4_10d, align 4
  %v6_10d = fpext float %v5_10d to x86_fp80
  %v7_10d = fmul x86_fp80 %v7_eb, %v6_10d
  %v4_110 = fadd x86_fp80 %v7_108, %v7_10d
  %v3_114 = add i32 %v2_10d, -100
  %v4_114 = inttoptr i32 %v3_114 to float*
  %v5_114 = load float, float* %v4_114, align 4
  %v6_114 = fpext float %v5_114 to x86_fp80
  %v7_114 = fmul x86_fp80 %v7_e6, %v6_114
  %v4_117 = fadd x86_fp80 %v4_110, %v7_114
  store x86_fp80 %v4_117, x86_fp80* %st5.global-to-local, align 4
  %v3_11b = add i32 %v2_10d, -104
  %v4_11b = inttoptr i32 %v3_11b to float*
  %v5_11b = load float, float* %v4_11b, align 4
  %v6_11b = fpext float %v5_11b to x86_fp80
  %v7_11b = fmul x86_fp80 %v7_f0, %v6_11b
  store x86_fp80 %v7_11b, x86_fp80* %st6.global-to-local, align 4
  %v3_120 = add i32 %v2_10d, -108
  %v4_120 = inttoptr i32 %v3_120 to float*
  %v5_120 = load float, float* %v4_120, align 4
  %v6_120 = fpext float %v5_120 to x86_fp80
  %v7_120 = fmul x86_fp80 %v7_eb, %v6_120
  %v4_123 = fadd x86_fp80 %v7_11b, %v7_120
  store x86_fp80 %v4_123, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v7_e6, x86_fp80* %st4.global-to-local, align 4
  store x86_fp80 %v4_104, x86_fp80* %st7.global-to-local, align 4
  %v3_127 = add i32 %v2_10d, -112
  %v4_127 = inttoptr i32 %v3_127 to float*
  %v5_127 = load float, float* %v4_127, align 4
  %v6_127 = fpext float %v5_127 to x86_fp80
  %v7_127 = fmul x86_fp80 %v7_e6, %v6_127
  store x86_fp80 %v7_127, x86_fp80* %st4.global-to-local, align 4
  %v4_12a = fadd x86_fp80 %v4_123, %v7_127
  store x86_fp80 %v4_12a, x86_fp80* %st6.global-to-local, align 4
  %v2_12c = add i32 %v2_10d, -64
  %v3_12c = inttoptr i32 %v2_12c to double*
  %v4_12c = load double, double* %v3_12c, align 4
  %v5_12c = fpext double %v4_12c to x86_fp80
  store x86_fp80 %v5_12c, x86_fp80* %st4.global-to-local, align 4
  %tmp270 = bitcast double %v3_e4 to i64
  %tmp271 = trunc i64 %tmp270 to i32
  %v2_12f = add i32 %tmp271, 8
  %v3_12f = inttoptr i32 %v2_12f to double*
  %v4_12f = load double, double* %v3_12f, align 4
  %v5_12f = fpext double %v4_12f to x86_fp80
  %v4_132 = fmul x86_fp80 %v5_12c, %v5_12f
  %v4_134 = fptrunc x86_fp80 %v4_132 to double
  store double %v4_134, double* %v3_12f, align 4
  %v2_137 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_137 = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  %v4_137 = fmul x86_fp80 %v2_137, %v3_137
  store x86_fp80 %v4_137, x86_fp80* %st7.global-to-local, align 4
  %v2_139 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_139 = fmul x86_fp80 %v3_137, %v2_139
  store x86_fp80 %v4_139, x86_fp80* %st6.global-to-local, align 4
  %v2_13b = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v4_13b = fmul x86_fp80 %v3_137, %v2_13b
  store x86_fp80 %v4_13b, x86_fp80* %st5.global-to-local, align 4
  %v5_140 = load double, double* %v4_f0, align 4
  %v6_140 = fpext double %v5_140 to x86_fp80
  %v7_140 = fsub x86_fp80 %v4_13b, %v6_140
  store x86_fp80 %v7_140, x86_fp80* %st5.global-to-local, align 4
  %v2_143 = load i32, i32* %ebx.global-to-local, align 4
  %v3_143 = fptrunc x86_fp80 %v7_140 to double
  %v4_143 = inttoptr i32 %v2_143 to double*
  store double %v3_143, double* %v4_143, align 4
  %v1_145 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v5_145 = load double, double* %v4_eb, align 4
  %v6_145 = fpext double %v5_145 to x86_fp80
  %v7_145 = fsub x86_fp80 %v1_145, %v6_145
  store x86_fp80 %v7_145, x86_fp80* %st6.global-to-local, align 4
  %v2_148 = load i32, i32* @edx, align 8
  %v3_148 = fptrunc x86_fp80 %v7_145 to double
  %v4_148 = inttoptr i32 %v2_148 to double*
  store double %v3_148, double* %v4_148, align 4
  %v1_14a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_14a = load i32, i32* %edi.global-to-local, align 4
  %v3_14a = add i32 %v2_14a, -72
  %v4_14a = inttoptr i32 %v3_14a to double*
  %v5_14a = load double, double* %v4_14a, align 4
  %v6_14a = fpext double %v5_14a to x86_fp80
  %v7_14a = fsub x86_fp80 %v1_14a, %v6_14a
  store x86_fp80 %v7_14a, x86_fp80* %st7.global-to-local, align 4
  %v2_14d = load i32, i32* @ecx, align 8
  %v3_14d = fptrunc x86_fp80 %v7_14a to double
  %v4_14d = inttoptr i32 %v2_14d to double*
  store double %v3_14d, double* %v4_14d, align 4
  store i3 %v4_e2, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_143, i32* @eax, align 8
  store i32 %v0_b, i32* %edi.global-to-local, align 4
  store i32 %v0_a, i32* %esi.global-to-local, align 4
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  ret i32 %v2_143
}

declare i32 @__asm_fpatan(i32, i32, i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
