source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %ebx.global-to-local, align 4
  %v0_4 = load i32, i32* %esi.global-to-local, align 4
  %v0_5 = load i32, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  store i32 2147483647, i32* @eax, align 8
  %v0_12 = load i32, i32* @ecx, align 8
  %v1_12 = add i32 %v0_12, 4
  %v2_12 = inttoptr i32 %v1_12 to i32*
  %v3_12 = load i32, i32* %v2_12, align 4
  %tmp262 = urem i32 %v3_12, -2147483648
  store i32 %tmp262, i32* %v2_12, align 4
  %v0_15 = load i32, i32* @edx, align 8
  %v1_15 = add i32 %v0_15, 4
  %v2_15 = inttoptr i32 %v1_15 to i32*
  %v3_15 = load i32, i32* %v2_15, align 4
  %v4_15 = load i32, i32* @eax, align 8
  %v5_15 = and i32 %v4_15, %v3_15
  store i32 %v5_15, i32* %v2_15, align 4
  %v0_18 = load i32, i32* %ebx.global-to-local, align 4
  %v1_18 = add i32 %v0_18, 4
  %v2_18 = inttoptr i32 %v1_18 to i32*
  %v3_18 = load i32, i32* %v2_18, align 4
  %v4_18 = load i32, i32* @eax, align 8
  %v5_18 = and i32 %v4_18, %v3_18
  store i32 %v5_18, i32* %v2_18, align 4
  %v0_1b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_1b = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_1b = fpext double %v3_1b to x86_fp80
  store x86_fp80 %v4_1b, x86_fp80* %st7.global-to-local, align 4
  %v3_1d = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_1d = fpext double %v3_1d to x86_fp80
  store x86_fp80 %v4_1d, x86_fp80* %st6.global-to-local, align 4
  %v3_1f = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_1f = fpext double %v3_1f to x86_fp80
  store x86_fp80 %v4_1f, x86_fp80* %st5.global-to-local, align 4
  %v2_23 = load i32, i32* %esi.global-to-local, align 4
  %v3_23 = add i32 %v2_23, -68
  %v4_23 = inttoptr i32 %v3_23 to float*
  %v5_23 = load float, float* %v4_23, align 4
  %v6_23 = fpext float %v5_23 to x86_fp80
  %v7_23 = fmul x86_fp80 %v4_1f, %v6_23
  %v3_28 = add i32 %v2_23, -72
  %v4_28 = inttoptr i32 %v3_28 to float*
  %v5_28 = load float, float* %v4_28, align 4
  %v6_28 = fpext float %v5_28 to x86_fp80
  %v7_28 = fmul x86_fp80 %v4_1d, %v6_28
  %v4_2b = fadd x86_fp80 %v7_23, %v7_28
  %v3_2f = add i32 %v2_23, -76
  %v4_2f = inttoptr i32 %v3_2f to float*
  %v5_2f = load float, float* %v4_2f, align 4
  %v6_2f = fpext float %v5_2f to x86_fp80
  %v7_2f = fmul x86_fp80 %v4_1b, %v6_2f
  %v4_32 = fadd x86_fp80 %v7_2f, %v4_2b
  %v3_36 = add i32 %v2_23, -44
  %v4_36 = inttoptr i32 %v3_36 to float*
  %v5_36 = load float, float* %v4_36, align 4
  %v6_36 = fpext float %v5_36 to x86_fp80
  %v7_36 = fmul x86_fp80 %v4_1f, %v6_36
  %v3_3b = add i32 %v2_23, -48
  %v4_3b = inttoptr i32 %v3_3b to float*
  %v5_3b = load float, float* %v4_3b, align 4
  %v6_3b = fpext float %v5_3b to x86_fp80
  %v7_3b = fmul x86_fp80 %v4_1d, %v6_3b
  %v4_3e = fadd x86_fp80 %v7_36, %v7_3b
  %v3_42 = add i32 %v2_23, -52
  %v4_42 = inttoptr i32 %v3_42 to float*
  %v5_42 = load float, float* %v4_42, align 4
  %v6_42 = fpext float %v5_42 to x86_fp80
  %v7_42 = fmul x86_fp80 %v4_1b, %v6_42
  %v4_45 = fadd x86_fp80 %v4_3e, %v7_42
  store x86_fp80 %v4_45, x86_fp80* %st5.global-to-local, align 4
  %v3_49 = add i32 %v2_23, -56
  %v4_49 = inttoptr i32 %v3_49 to float*
  %v5_49 = load float, float* %v4_49, align 4
  %v6_49 = fpext float %v5_49 to x86_fp80
  %v7_49 = fmul x86_fp80 %v4_1f, %v6_49
  store x86_fp80 %v7_49, x86_fp80* %st6.global-to-local, align 4
  %v3_4e = add i32 %v2_23, -60
  %v4_4e = inttoptr i32 %v3_4e to float*
  %v5_4e = load float, float* %v4_4e, align 4
  %v6_4e = fpext float %v5_4e to x86_fp80
  %v7_4e = fmul x86_fp80 %v4_1d, %v6_4e
  %v4_51 = fadd x86_fp80 %v7_49, %v7_4e
  store x86_fp80 %v4_51, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_32, x86_fp80* %st7.global-to-local, align 4
  %v3_55 = add i32 %v2_23, -64
  %v4_55 = inttoptr i32 %v3_55 to float*
  %v5_55 = load float, float* %v4_55, align 4
  %v6_55 = fpext float %v5_55 to x86_fp80
  %v7_55 = fmul x86_fp80 %v4_1b, %v6_55
  %v4_58 = fadd x86_fp80 %v4_51, %v7_55
  store x86_fp80 %v4_58, x86_fp80* %st6.global-to-local, align 4
  %v7_58 = add i3 %v0_1b, -3
  store i3 %v7_58, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_5c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5c = call i16 @__asm_fnstsw(i32 %v0_5c)
  %v2_5c = sext i16 %v1_5c to i32
  %v3_5c = load i32, i32* @eax, align 8
  %v4_5c = and i32 %v3_5c, -65536
  %v1_5e = udiv i32 %v2_5c, 256
  %v2_5e = trunc i32 %v1_5e to i8
  %v3_5e = and i8 %v2_5e, 65
  %v4_5e = icmp eq i8 %v3_5e, 0
  %v9_5e = zext i8 %v3_5e to i32
  %v11_5e = mul i32 %v9_5e, 256
  %v2_5c.masked = and i32 %v2_5c, -65281
  %v12_5e = or i32 %v4_5c, %v2_5c.masked
  %v13_5e = or i32 %v12_5e, %v11_5e
  store i32 %v13_5e, i32* @eax, align 8
  br i1 %v4_5e, label %dec_label_pc_65, label %dec_label_pc_63

dec_label_pc_63:                                  ; preds = %dec_label_pc_0
  %v2_63 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_63 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_63, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_63, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_65

dec_label_pc_65:                                  ; preds = %dec_label_pc_63, %dec_label_pc_0
  %v0_67 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_67 = call i16 @__asm_fnstsw(i32 %v0_67)
  %v2_67 = sext i16 %v1_67 to i32
  %v3_67 = load i32, i32* @eax, align 8
  %v4_67 = and i32 %v3_67, -65536
  %v3_69 = and i32 %v2_67, 16640
  %v2_67.masked = and i32 %v2_67, -65281
  %v12_69 = or i32 %v4_67, %v2_67.masked
  %v13_69 = or i32 %v12_69, %v3_69
  store i32 %v13_69, i32* @eax, align 8
  %v0_74 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_74 = call i16 @__asm_fnstsw(i32 %v0_74)
  %v2_74 = sext i16 %v1_74 to i32
  %v3_74 = load i32, i32* @eax, align 8
  %v4_74 = and i32 %v3_74, -65536
  %v3_76 = and i32 %v2_74, 16640
  %v2_74.masked = and i32 %v2_74, -65281
  %v12_76 = or i32 %v4_74, %v2_74.masked
  %v13_76 = or i32 %v12_76, %v3_76
  store i32 %v13_76, i32* @eax, align 8
  %v0_7d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_7d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_7d = load i32, i32* @edx, align 8
  %v3_7d = fptrunc x86_fp80 %v1_7d to double
  %v4_7d = inttoptr i32 %v2_7d to double*
  store double %v3_7d, double* %v4_7d, align 4
  %v5_7d = add i3 %v0_7d, 1
  %v1_7f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_7f = load i32, i32* %ebx.global-to-local, align 4
  %v3_7f = fptrunc x86_fp80 %v1_7f to double
  %v4_7f = inttoptr i32 %v2_7f to double*
  store double %v3_7f, double* %v4_7f, align 4
  %v1_81 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_81 = load i32, i32* @ecx, align 8
  %v3_81 = fptrunc x86_fp80 %v1_81 to double
  %v4_81 = inttoptr i32 %v2_81 to double*
  store double %v3_81, double* %v4_81, align 4
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  %v2_85 = load i32, i32* %esi.global-to-local, align 4
  %v3_85 = add i32 %v2_85, -16
  %v4_85 = inttoptr i32 %v3_85 to double*
  %v5_85 = load double, double* %v4_85, align 4
  %v6_85 = fpext double %v5_85 to x86_fp80
  %v7_85 = fadd x86_fp80 %v6_85, 0xKBFFF8000000000000000
  store x86_fp80 %v7_85, x86_fp80* %st7.global-to-local, align 4
  %v3_88 = add i32 %v2_85, -128
  %v4_88 = inttoptr i32 %v3_88 to double*
  %v5_88 = load double, double* %v4_88, align 4
  %v6_88 = fpext double %v5_88 to x86_fp80
  %v7_88 = fmul x86_fp80 %v7_85, %v6_88
  %v3_8b = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_8b = fpext double %v3_8b to x86_fp80
  store x86_fp80 %v4_8b, x86_fp80* %st6.global-to-local, align 4
  %v4_8d = fsub x86_fp80 %v4_8b, %v7_88
  %v3_8f = fptrunc x86_fp80 %v4_8d to double
  store double %v3_8f, double* %v4_7f, align 4
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  %v5_93 = load double, double* %v4_85, align 4
  %v6_93 = fpext double %v5_93 to x86_fp80
  %v7_93 = fadd x86_fp80 %v6_93, 0xKBFFF8000000000000000
  store x86_fp80 %v7_93, x86_fp80* %st7.global-to-local, align 4
  %v3_96 = add i32 %v2_85, -120
  %v4_96 = inttoptr i32 %v3_96 to double*
  %v5_96 = load double, double* %v4_96, align 4
  %v6_96 = fpext double %v5_96 to x86_fp80
  %v7_96 = fmul x86_fp80 %v7_93, %v6_96
  store x86_fp80 %v7_96, x86_fp80* %st7.global-to-local, align 4
  %v3_99 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_99 = fpext double %v3_99 to x86_fp80
  %v4_9b = fadd x86_fp80 %v7_96, %v4_99
  %v2_9d = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_9b)
  %v4_a1 = fsub x86_fp80 %v4_99, %v7_96
  %v2_a3 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_a1)
  %v2_a5 = fsub x86_fp80 0xK80000000000000000000, %v2_a3
  %v6_a7 = fsub x86_fp80 %v2_a5, %v4_99
  store x86_fp80 %v6_a7, x86_fp80* %st5.global-to-local, align 4
  %v4_a9 = fadd x86_fp80 %v2_9d, %v6_a7
  store x86_fp80 %v4_a9, x86_fp80* %st6.global-to-local, align 4
  store i3 %v5_7d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_ab = add i32 %v2_85, -132
  %v2_ab = inttoptr i32 %v1_ab to i32*
  %v3_ab = load i32, i32* %v2_ab, align 4
  %v10_ab = icmp eq i32 %v3_ab, 0
  br i1 %v10_ab, label %dec_label_pc_b6, label %dec_label_pc_b4

dec_label_pc_b4:                                  ; preds = %dec_label_pc_65
  %v2_b4 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_a9)
  store x86_fp80 %v2_b4, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_b6

dec_label_pc_b6:                                  ; preds = %dec_label_pc_b4, %dec_label_pc_65
  %v1_b6 = phi x86_fp80 [ %v2_b4, %dec_label_pc_b4 ], [ %v4_a9, %dec_label_pc_65 ]
  %v3_b6 = fptrunc x86_fp80 %v1_b6 to double
  store double %v3_b6, double* %v4_7f, align 4
  %v3_ba = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_ba = fpext double %v3_ba to x86_fp80
  store x86_fp80 %v4_ba, x86_fp80* %st7.global-to-local, align 4
  %v3_bc = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_bc = fpext double %v3_bc to x86_fp80
  store x86_fp80 %v4_bc, x86_fp80* %st6.global-to-local, align 4
  %v3_be = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_be = fpext double %v3_be to x86_fp80
  store i3 %v0_7d, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_be, x86_fp80* %st5.global-to-local, align 4
  %v0_c2 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_c2 = call i16 @__asm_fnstsw(i32 %v0_c2)
  %v2_c2 = sext i16 %v1_c2 to i32
  %v3_c2 = load i32, i32* @eax, align 8
  %v4_c2 = and i32 %v3_c2, -65536
  %tmp259 = udiv i32 %v2_c2, 2
  %v12_c4 = and i32 %tmp259, 32512
  %v2_c2.masked = and i32 %v2_c2, -65281
  %v13_c4 = or i32 %v4_c2, %v2_c2.masked
  %v14_c4 = or i32 %v13_c4, %v12_c4
  store i32 %v14_c4, i32* @eax, align 8
  %v0_cc = load i32, i32* %fpsw.global-to-local, align 4
  %v1_cc = call i16 @__asm_fnstsw(i32 %v0_cc)
  %v2_cc = sext i16 %v1_cc to i32
  %v3_cc = load i32, i32* @eax, align 8
  %v4_cc = and i32 %v3_cc, -65536
  %tmp260 = udiv i32 %v2_cc, 2
  %v12_ce = and i32 %tmp260, 32512
  %v2_cc.masked = and i32 %v2_cc, -65281
  %v13_ce = or i32 %v4_cc, %v2_cc.masked
  %v14_ce = or i32 %v13_ce, %v12_ce
  store i32 %v14_ce, i32* @eax, align 8
  %v0_d8 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_d8 = call i16 @__asm_fnstsw(i32 %v0_d8)
  %v2_d8 = sext i16 %v1_d8 to i32
  %v3_d8 = load i32, i32* @eax, align 8
  %v4_d8 = and i32 %v3_d8, -65536
  %tmp261 = udiv i32 %v2_d8, 2
  %v12_da = and i32 %tmp261, 32512
  %v2_d8.masked = and i32 %v2_d8, -65281
  %v13_da = or i32 %v4_d8, %v2_d8.masked
  %v14_da = or i32 %v13_da, %v12_da
  store i32 %v14_da, i32* @eax, align 8
  %v0_e0 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_e0 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_e2 = load i32, i32* %esi.global-to-local, align 4
  %v3_e2 = add i32 %v2_e2, -104
  %v4_e2 = inttoptr i32 %v3_e2 to float*
  %v5_e2 = load float, float* %v4_e2, align 4
  %v6_e2 = fpext float %v5_e2 to x86_fp80
  %v7_e2 = fmul x86_fp80 %v2_e0, %v6_e2
  store x86_fp80 %v7_e2, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_e2, x86_fp80* %st6.global-to-local, align 4
  %v3_e7 = add i32 %v2_e2, -108
  %v4_e7 = inttoptr i32 %v3_e7 to float*
  %v5_e7 = load float, float* %v4_e7, align 4
  %v6_e7 = fpext float %v5_e7 to x86_fp80
  %v7_e7 = fmul x86_fp80 %v7_e2, %v6_e7
  %v4_ea = fadd x86_fp80 %v7_e2, %v7_e7
  store x86_fp80 %v4_ea, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_ea, x86_fp80* %st6.global-to-local, align 4
  %v3_ee = add i32 %v2_e2, -112
  %v4_ee = inttoptr i32 %v3_ee to float*
  %v5_ee = load float, float* %v4_ee, align 4
  %v6_ee = fpext float %v5_ee to x86_fp80
  %v7_ee = fmul x86_fp80 %v4_ea, %v6_ee
  %v4_f1 = fadd x86_fp80 %v4_ea, %v7_ee
  store x86_fp80 %v4_f1, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_f1, x86_fp80* %st6.global-to-local, align 4
  %v3_f5 = add i32 %v2_e2, -80
  %v4_f5 = inttoptr i32 %v3_f5 to float*
  %v5_f5 = load float, float* %v4_f5, align 4
  %v6_f5 = fpext float %v5_f5 to x86_fp80
  %v7_f5 = fmul x86_fp80 %v4_f1, %v6_f5
  store x86_fp80 %v7_f5, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_f1, x86_fp80* %st5.global-to-local, align 4
  %v3_fa = add i32 %v2_e2, -84
  %v4_fa = inttoptr i32 %v3_fa to float*
  %v5_fa = load float, float* %v4_fa, align 4
  %v6_fa = fpext float %v5_fa to x86_fp80
  %v7_fa = fmul x86_fp80 %v4_f1, %v6_fa
  %v4_fd = fadd x86_fp80 %v7_f5, %v7_fa
  store x86_fp80 %v4_fd, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_f1, x86_fp80* %st5.global-to-local, align 4
  %v3_101 = add i32 %v2_e2, -88
  %v4_101 = inttoptr i32 %v3_101 to float*
  %v5_101 = load float, float* %v4_101, align 4
  %v6_101 = fpext float %v5_101 to x86_fp80
  %v7_101 = fmul x86_fp80 %v4_f1, %v6_101
  store x86_fp80 %v7_101, x86_fp80* %st5.global-to-local, align 4
  %v4_104 = fadd x86_fp80 %v4_fd, %v7_101
  store x86_fp80 %v4_f1, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_104, x86_fp80* %st7.global-to-local, align 4
  %v3_108 = add i32 %v2_e2, -92
  %v4_108 = inttoptr i32 %v3_108 to float*
  %v5_108 = load float, float* %v4_108, align 4
  %v6_108 = fpext float %v5_108 to x86_fp80
  %v7_108 = fmul x86_fp80 %v4_104, %v6_108
  store x86_fp80 %v7_108, x86_fp80* %st7.global-to-local, align 4
  %v3_10d = add i32 %v2_e2, -96
  %v4_10d = inttoptr i32 %v3_10d to float*
  %v5_10d = load float, float* %v4_10d, align 4
  %v6_10d = fpext float %v5_10d to x86_fp80
  %v7_10d = fmul x86_fp80 %v7_108, %v6_10d
  %v4_110 = fadd x86_fp80 %v7_10d, %v7_10d
  store x86_fp80 %v4_110, x86_fp80* %st7.global-to-local, align 4
  %v3_114 = add i32 %v2_e2, -100
  %v4_114 = inttoptr i32 %v3_114 to float*
  %v5_114 = load float, float* %v4_114, align 4
  %v6_114 = fpext float %v5_114 to x86_fp80
  %v7_114 = fmul x86_fp80 %v4_110, %v6_114
  %v4_117 = fadd x86_fp80 %v7_114, %v7_114
  store x86_fp80 %v4_117, x86_fp80* %st7.global-to-local, align 4
  %v2_119 = add i32 %v2_e2, -16
  %v3_119 = inttoptr i32 %v2_119 to double*
  %v4_119 = load double, double* %v3_119, align 4
  %v5_119 = fpext double %v4_119 to x86_fp80
  %v4_11e = fadd x86_fp80 %v5_119, 0xKBFFF8000000000000000
  store x86_fp80 %v4_11e, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_11e, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_11e, x86_fp80* %st5.global-to-local, align 4
  %v3_124 = add i32 %v2_e2, -24
  %v4_124 = inttoptr i32 %v3_124 to double*
  %v5_124 = load double, double* %v4_124, align 4
  %v6_124 = fpext double %v5_124 to x86_fp80
  %v7_124 = fmul x86_fp80 %v4_11e, %v6_124
  store x86_fp80 %v7_124, x86_fp80* %st5.global-to-local, align 4
  %v4_127 = fsub x86_fp80 %v4_11e, %v7_124
  store x86_fp80 %v4_127, x86_fp80* %st7.global-to-local, align 4
  %v3_129 = add i32 %v2_e2, -32
  %v4_129 = inttoptr i32 %v3_129 to double*
  %v5_129 = load double, double* %v4_129, align 4
  %v6_129 = fpext double %v5_129 to x86_fp80
  %v7_129 = fmul x86_fp80 %v4_11e, %v6_129
  store x86_fp80 %v7_129, x86_fp80* %st6.global-to-local, align 4
  %v4_12c = fsub x86_fp80 %v4_127, %v7_129
  store x86_fp80 %v4_12c, x86_fp80* %st7.global-to-local, align 4
  %v3_12e = add i32 %v2_e2, -40
  %v4_12e = inttoptr i32 %v3_12e to double*
  %v5_12e = load double, double* %v4_12e, align 4
  %v6_12e = fpext double %v5_12e to x86_fp80
  %v7_12e = fmul x86_fp80 %v4_12c, %v6_12e
  %v4_131 = fsub x86_fp80 %v7_12e, %v7_12e
  store x86_fp80 %v4_131, x86_fp80* %st7.global-to-local, align 4
  %v4_135 = load double, double* %v3_119, align 4
  %v5_135 = fpext double %v4_135 to x86_fp80
  store x86_fp80 %v5_135, x86_fp80* %st7.global-to-local, align 4
  %v1_138 = load i32, i32* @ecx, align 8
  %v2_138 = add i32 %v1_138, 8
  %v3_138 = inttoptr i32 %v2_138 to double*
  %v4_138 = load double, double* %v3_138, align 4
  %v5_138 = fpext double %v4_138 to x86_fp80
  %v4_13b = fmul x86_fp80 %v5_135, %v5_138
  store x86_fp80 %v4_13b, x86_fp80* %st6.global-to-local, align 4
  %v4_13d = fptrunc x86_fp80 %v4_13b to double
  store double %v4_13d, double* %v3_138, align 4
  %v2_140 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_140 = fmul x86_fp80 %v2_140, %v2_140
  %v4_142 = fmul x86_fp80 %v4_140, %v4_140
  %v4_144 = fmul x86_fp80 %v4_142, %v4_142
  store x86_fp80 %v4_144, x86_fp80* %st7.global-to-local, align 4
  %v2_148 = load i32, i32* @edx, align 8
  %v3_148 = fptrunc x86_fp80 %v4_144 to double
  %v4_148 = inttoptr i32 %v2_148 to double*
  store double %v3_148, double* %v4_148, align 4
  %v1_14a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_14a = load i32, i32* %ebx.global-to-local, align 4
  %v3_14a = fptrunc x86_fp80 %v1_14a to double
  %v4_14a = inttoptr i32 %v2_14a to double*
  store double %v3_14a, double* %v4_14a, align 4
  %v1_14c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_14c = load i32, i32* @ecx, align 8
  %v3_14c = fptrunc x86_fp80 %v1_14c to double
  %v4_14c = inttoptr i32 %v2_14c to double*
  store double %v3_14c, double* %v4_14c, align 4
  %v5_14c = add i3 %v0_e0, 3
  store i3 %v5_14c, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_14a, i32* @eax, align 8
  store i32 %v0_4, i32* %esi.global-to-local, align 4
  store i32 %v0_3, i32* %ebx.global-to-local, align 4
  ret i32 %v2_14a
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

attributes #0 = { nounwind readnone speculatable }
