source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %ebx.global-to-local = alloca i32, align 4
  %ecx.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %stack_var_-12 = alloca i32, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %stack_var_-12, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_8 = load i32, i32* %eax.global-to-local, align 8
  store i32 %v0_8, i32* %ebx.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  %v0_10 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_10 = add i32 %v3_a, -40
  %v3_10 = inttoptr i32 %v2_10 to double*
  %v4_10 = load double, double* %v3_10, align 4
  %v5_10 = fpext double %v4_10 to x86_fp80
  store x86_fp80 %v5_10, x86_fp80* %st7.global-to-local, align 4
  %v5_54 = xor i3 %v0_10, -4
  %v5_da = add i3 %v0_10, 3
  store i3 %v5_54, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_131 = add i32 %v3_a, -176
  %v2_131 = inttoptr i32 %v1_131 to i32*
  %v3_131 = load i32, i32* %v2_131, align 4
  %v1_137 = and i32 %v3_131, 4
  store i32 %v1_137, i32* %eax.global-to-local, align 8
  %v3_13e = load i32, i32* %v2_131, align 4
  %v1_144 = and i32 %v3_13e, 2
  store i32 %v1_144, i32* %eax.global-to-local, align 8
  %v3_14f = load i32, i32* %v2_131, align 4
  %v1_155 = urem i32 %v3_14f, 2
  %v2_155 = icmp eq i32 %v1_155, 0
  store i32 %v1_155, i32* %eax.global-to-local, align 8
  br i1 %v2_155, label %dec_label_pc_160, label %dec_label_pc_15a

dec_label_pc_15a:                                 ; preds = %dec_label_pc_0
  %v2_15c = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v5_10)
  store x86_fp80 %v2_15c, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_160

dec_label_pc_160:                                 ; preds = %dec_label_pc_15a, %dec_label_pc_0
  %v2_164 = phi x86_fp80 [ %v2_15c, %dec_label_pc_15a ], [ %v5_10, %dec_label_pc_0 ]
  %v2_161 = add i32 %v3_a, -100
  %v3_161 = inttoptr i32 %v2_161 to double*
  %v4_161 = load double, double* %v3_161, align 4
  %v5_161 = fpext double %v4_161 to x86_fp80
  %v4_164 = fadd x86_fp80 %v2_164, %v5_161
  store x86_fp80 %v4_164, x86_fp80* %st7.global-to-local, align 4
  %v2_169 = add i32 %v3_a, -92
  %v3_169 = inttoptr i32 %v2_169 to double*
  %v4_169 = load double, double* %v3_169, align 4
  %v5_169 = fpext double %v4_169 to x86_fp80
  %v4_16c = fadd x86_fp80 %v4_164, %v5_169
  store x86_fp80 %v4_16c, x86_fp80* %st7.global-to-local, align 4
  %v2_171 = add i32 %v3_a, -84
  %v3_171 = inttoptr i32 %v2_171 to double*
  %v4_171 = load double, double* %v3_171, align 4
  %v5_171 = fpext double %v4_171 to x86_fp80
  %v4_174 = fadd x86_fp80 %v5_171, %v5_171
  %v3_17a = fmul x86_fp80 %v4_174, %v4_174
  %v3_17e = fmul x86_fp80 %v3_17a, %v3_17a
  %v4_180 = fadd x86_fp80 %v3_17a, %v3_17e
  %v3_184 = fmul x86_fp80 %v4_180, %v4_180
  %v4_186 = fadd x86_fp80 %v4_180, %v3_184
  store x86_fp80 %v4_186, x86_fp80* %st7.global-to-local, align 4
  store i3 %v5_da, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_188 = add i32 %v3_a, -108
  %v4_188 = inttoptr i32 %v3_188 to double*
  %v5_188 = load double, double* %v4_188, align 4
  %v6_188 = fpext double %v5_188 to x86_fp80
  %v7_188 = fmul x86_fp80 %v4_186, %v6_188
  store x86_fp80 %v7_188, x86_fp80* %st7.global-to-local, align 4
  %v0_18f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_18f = call i16 @__asm_fnstsw(i32 %v0_18f)
  %v2_18f = sext i16 %v1_18f to i32
  %v3_18f = load i32, i32* %eax.global-to-local, align 8
  %v4_18f = and i32 %v3_18f, -65536
  %tmp265 = udiv i32 %v2_18f, 2
  %v12_191 = and i32 %tmp265, 32512
  %v2_18f.masked = and i32 %v2_18f, -65281
  %v13_191 = or i32 %v4_18f, %v2_18f.masked
  %v14_191 = or i32 %v13_191, %v12_191
  store i32 %v14_191, i32* %eax.global-to-local, align 8
  %v15_19113 = and i32 %v2_18f, 256
  %v16_191 = icmp ne i32 %v15_19113, 0
  %v1_193 = icmp eq i1 %v16_191, false
  %v0_19c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_193, label %dec_label_pc_19c, label %dec_label_pc_195

dec_label_pc_195:                                 ; preds = %dec_label_pc_160
  %v1_197 = load i32, i32* %esi.global-to-local, align 4
  %v2_197 = add i32 %v1_197, -24
  %v3_197 = inttoptr i32 %v2_197 to double*
  %v4_197 = load double, double* %v3_197, align 4
  %v5_197 = fpext double %v4_197 to x86_fp80
  store x86_fp80 %v5_197, x86_fp80* %st7.global-to-local, align 4
  %.pre = add i32 %v1_197, -16
  %.pre20 = inttoptr i32 %.pre to double*
  br label %dec_label_pc_1b2

dec_label_pc_19c:                                 ; preds = %dec_label_pc_160
  %v1_19c = add i3 %v0_19c, -1
  store i3 %v1_19c, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1a0 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1a0 = call i16 @__asm_fnstsw(i32 %v0_1a0)
  %v2_1a0 = sext i16 %v1_1a0 to i32
  %v3_1a0 = load i32, i32* %eax.global-to-local, align 8
  %v4_1a0 = and i32 %v3_1a0, -65536
  %tmp266 = udiv i32 %v2_1a0, 2
  %v12_1a2 = and i32 %tmp266, 32512
  %v2_1a0.masked = and i32 %v2_1a0, -65281
  %v13_1a2 = or i32 %v4_1a0, %v2_1a0.masked
  %v14_1a2 = or i32 %v13_1a2, %v12_1a2
  store i32 %v14_1a2, i32* %eax.global-to-local, align 8
  %v15_1a214 = and i32 %v2_1a0, 256
  %v16_1a2 = icmp eq i32 %v15_1a214, 0
  %v0_1ad = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_1a6 = add i3 %v0_1ad, 1
  br i1 %v16_1a2, label %dec_label_pc_1a6, label %dec_label_pc_1ad

dec_label_pc_1a6:                                 ; preds = %dec_label_pc_19c
  %v2_1ad = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_1a6, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_1a8 = load i32, i32* %esi.global-to-local, align 4
  %v3_1a8 = add i32 %v2_1a8, -16
  %v4_1a8 = inttoptr i32 %v3_1a8 to double*
  %v5_1a8 = load double, double* %v4_1a8, align 4
  %v6_1a8 = fpext double %v5_1a8 to x86_fp80
  %v7_1a8 = fdiv x86_fp80 %v6_1a8, %v2_1ad
  store x86_fp80 %v7_1a8, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1b2

dec_label_pc_1ad:                                 ; preds = %dec_label_pc_19c
  %v1_1af = load i32, i32* %esi.global-to-local, align 4
  %v2_1af = add i32 %v1_1af, -16
  %v3_1af = inttoptr i32 %v2_1af to double*
  %v4_1af = load double, double* %v3_1af, align 4
  %v5_1af = fpext double %v4_1af to x86_fp80
  store i3 %v4_1a6, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_1af, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1b2

dec_label_pc_1b2:                                 ; preds = %dec_label_pc_1ad, %dec_label_pc_1a6, %dec_label_pc_195
  %v4_1c4.pre-phi = phi double* [ %v3_1af, %dec_label_pc_1ad ], [ %v4_1a8, %dec_label_pc_1a6 ], [ %.pre20, %dec_label_pc_195 ]
  %v2_1fe = phi i32 [ %v1_1af, %dec_label_pc_1ad ], [ %v2_1a8, %dec_label_pc_1a6 ], [ %v1_197, %dec_label_pc_195 ]
  %v3_1b5 = phi x86_fp80 [ %v5_1af, %dec_label_pc_1ad ], [ %v7_1a8, %dec_label_pc_1a6 ], [ %v5_197, %dec_label_pc_195 ]
  %v0_1b2 = phi i3 [ %v4_1a6, %dec_label_pc_1ad ], [ %v4_1a6, %dec_label_pc_1a6 ], [ %v0_19c, %dec_label_pc_195 ]
  %v1_1b2 = load i32, i32* %ecx.global-to-local, align 8
  %v2_1b2 = add i32 %v1_1b2, 8
  %v3_1b2 = inttoptr i32 %v2_1b2 to double*
  %v4_1b2 = load double, double* %v3_1b2, align 4
  %v5_1b2 = fpext double %v4_1b2 to x86_fp80
  %v4_1b5 = fmul x86_fp80 %v3_1b5, %v5_1b2
  %v4_1b7 = fptrunc x86_fp80 %v4_1b5 to double
  store double %v4_1b7, double* %v3_1b2, align 4
  %v2_1ba = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_1ba = fmul x86_fp80 %v2_1ba, %v2_1ba
  %v4_1bc = fmul x86_fp80 %v4_1ba, %v4_1ba
  %v4_1be = fmul x86_fp80 %v4_1bc, %v4_1bc
  store x86_fp80 %v4_1be, x86_fp80* %st7.global-to-local, align 4
  %v2_1c1 = add i32 %v2_1fe, -100
  %v3_1c1 = inttoptr i32 %v2_1c1 to double*
  %v4_1c1 = load double, double* %v3_1c1, align 4
  %v5_1c1 = fpext double %v4_1c1 to x86_fp80
  store x86_fp80 %v5_1c1, x86_fp80* %st7.global-to-local, align 4
  %v5_1c4 = load double, double* %v4_1c4.pre-phi, align 4
  %v6_1c4 = fpext double %v5_1c4 to x86_fp80
  %v7_1c4 = fmul x86_fp80 %v5_1c1, %v6_1c4
  %v4_1c7 = fsub x86_fp80 %v7_1c4, %v7_1c4
  store x86_fp80 %v4_1c7, x86_fp80* %st7.global-to-local, align 4
  %v2_1cc = add i32 %v2_1fe, -92
  %v3_1cc = inttoptr i32 %v2_1cc to double*
  %v4_1cc = load double, double* %v3_1cc, align 4
  %v5_1cc = fpext double %v4_1cc to x86_fp80
  store x86_fp80 %v5_1cc, x86_fp80* %st7.global-to-local, align 4
  %v5_1cf = load double, double* %v4_1c4.pre-phi, align 4
  %v6_1cf = fpext double %v5_1cf to x86_fp80
  %v7_1cf = fmul x86_fp80 %v5_1cc, %v6_1cf
  %v4_1d2 = fsub x86_fp80 %v7_1cf, %v7_1cf
  store x86_fp80 %v4_1d2, x86_fp80* %st7.global-to-local, align 4
  %v2_1d7 = add i32 %v2_1fe, -84
  %v3_1d7 = inttoptr i32 %v2_1d7 to double*
  %v4_1d7 = load double, double* %v3_1d7, align 4
  %v5_1d7 = fpext double %v4_1d7 to x86_fp80
  store x86_fp80 %v5_1d7, x86_fp80* %st7.global-to-local, align 4
  %v5_1da = load double, double* %v4_1c4.pre-phi, align 4
  %v6_1da = fpext double %v5_1da to x86_fp80
  %v7_1da = fmul x86_fp80 %v5_1d7, %v6_1da
  %v4_1dd = fsub x86_fp80 %v7_1da, %v7_1da
  store x86_fp80 %v4_1dd, x86_fp80* %st7.global-to-local, align 4
  %v3_1f9 = add i32 %v2_1fe, -44
  %v4_1f9 = inttoptr i32 %v3_1f9 to float*
  %v5_1f9 = load float, float* %v4_1f9, align 4
  %v6_1f9 = fpext float %v5_1f9 to x86_fp80
  %v7_1f9 = fmul x86_fp80 %v4_1dd, %v6_1f9
  %v3_1fe = add i32 %v2_1fe, -48
  %v4_1fe = inttoptr i32 %v3_1fe to float*
  %v5_1fe = load float, float* %v4_1fe, align 4
  %v6_1fe = fpext float %v5_1fe to x86_fp80
  %v7_1fe = fmul x86_fp80 %v4_1dd, %v6_1fe
  %v4_201 = fadd x86_fp80 %v7_1f9, %v7_1fe
  %v3_205 = add i32 %v2_1fe, -52
  %v4_205 = inttoptr i32 %v3_205 to float*
  %v5_205 = load float, float* %v4_205, align 4
  %v6_205 = fpext float %v5_205 to x86_fp80
  %v7_205 = fmul x86_fp80 %v4_1dd, %v6_205
  %v4_208 = fadd x86_fp80 %v7_205, %v4_201
  store x86_fp80 %v4_208, x86_fp80* %st7.global-to-local, align 4
  %v3_20c = add i32 %v2_1fe, -56
  %v4_20c = inttoptr i32 %v3_20c to float*
  %v5_20c = load float, float* %v4_20c, align 4
  %v6_20c = fpext float %v5_20c to x86_fp80
  %v7_20c = fmul x86_fp80 %v4_1dd, %v6_20c
  store x86_fp80 %v7_20c, x86_fp80* %st7.global-to-local, align 4
  %v3_211 = add i32 %v2_1fe, -60
  %v4_211 = inttoptr i32 %v3_211 to float*
  %v5_211 = load float, float* %v4_211, align 4
  %v6_211 = fpext float %v5_211 to x86_fp80
  %v7_211 = fmul x86_fp80 %v7_20c, %v6_211
  %v4_214 = fadd x86_fp80 %v7_211, %v7_211
  store x86_fp80 %v4_214, x86_fp80* %st7.global-to-local, align 4
  %v3_218 = add i32 %v2_1fe, -64
  %v4_218 = inttoptr i32 %v3_218 to float*
  %v5_218 = load float, float* %v4_218, align 4
  %v6_218 = fpext float %v5_218 to x86_fp80
  %v7_218 = fmul x86_fp80 %v4_214, %v6_218
  %v4_21b = fadd x86_fp80 %v7_218, %v7_218
  store x86_fp80 %v4_21b, x86_fp80* %st7.global-to-local, align 4
  %v3_222 = add i32 %arg1, 40
  %v4_222 = inttoptr i32 %v3_222 to double*
  %v5_222 = load double, double* %v4_222, align 4
  %v6_222 = fpext double %v5_222 to x86_fp80
  %v7_222 = fadd x86_fp80 %v4_21b, %v6_222
  store x86_fp80 %v7_222, x86_fp80* %st7.global-to-local, align 4
  %v2_225 = load i32, i32* %ecx.global-to-local, align 8
  %v3_225 = fptrunc x86_fp80 %v7_222 to double
  %v4_225 = inttoptr i32 %v2_225 to double*
  store double %v3_225, double* %v4_225, align 4
  %v1_227 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_227 = add i32 %arg1, 32
  %v4_227 = inttoptr i32 %v3_227 to double*
  %v5_227 = load double, double* %v4_227, align 4
  %v6_227 = fpext double %v5_227 to x86_fp80
  %v7_227 = fadd x86_fp80 %v1_227, %v6_227
  store x86_fp80 %v7_227, x86_fp80* %st7.global-to-local, align 4
  %v2_22a = load i32, i32* %edx.global-to-local, align 8
  %v3_22a = fptrunc x86_fp80 %v7_227 to double
  %v4_22a = inttoptr i32 %v2_22a to double*
  store double %v3_22a, double* %v4_22a, align 4
  %v1_22c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_22c = add i32 %arg1, 24
  %v4_22c = inttoptr i32 %v3_22c to double*
  %v5_22c = load double, double* %v4_22c, align 4
  %v6_22c = fpext double %v5_22c to x86_fp80
  %v7_22c = fadd x86_fp80 %v1_22c, %v6_22c
  store x86_fp80 %v7_22c, x86_fp80* %st7.global-to-local, align 4
  %v2_22f = load i32, i32* %ebx.global-to-local, align 4
  %v3_22f = fptrunc x86_fp80 %v7_22c to double
  %v4_22f = inttoptr i32 %v2_22f to double*
  store double %v3_22f, double* %v4_22f, align 4
  %v4_231 = add i3 %v0_1b2, -3
  store i3 %v4_231, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_22f, i32* %eax.global-to-local, align 8
  %v2_238 = load i32, i32* %stack_var_-12, align 4
  store i32 %v2_238, i32* %ebx.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v2_22f
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
