source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp277 = call double @__decompiler_undefined_function_3()
  %stack_var_-48 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -112
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -120
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -48
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -48
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -72
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -112
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -48
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -112
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -120
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-48, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_4b = load double, double* %stack_var_-48, align 8
  %tmp288 = call double @llvm.fabs.f64(double %v3_4b)
  %v2_4e = fpext double %tmp288 to x86_fp80
  store x86_fp80 %v2_4e, x86_fp80* %st7.global-to-local, align 4
  %tmp289 = call double @llvm.fabs.f64(double %v6_45)
  %v2_54 = fpext double %tmp289 to x86_fp80
  %v4_58 = fadd x86_fp80 %v2_4e, %v2_54
  %v4_5c = fsub x86_fp80 %v2_54, %v2_4e
  %v2_5e = load i32, i32* @edi, align 8
  %v3_5e = add i32 %v2_5e, -92
  %v4_5e = inttoptr i32 %v3_5e to double*
  %v5_5e = load double, double* %v4_5e, align 4
  %v6_5e = fpext double %v5_5e to x86_fp80
  %v7_5e = fsub x86_fp80 %v4_5c, %v6_5e
  %tmp290 = fptrunc x86_fp80 %v7_5e to double
  store double %tmp290, double* %stack_var_-48, align 8
  %v3_64 = add i32 %v2_5e, -100
  %v4_64 = inttoptr i32 %v3_64 to double*
  %v5_64 = load double, double* %v4_64, align 4
  %v6_64 = fpext double %v5_64 to x86_fp80
  %v7_64 = fsub x86_fp80 %v4_58, %v6_64
  %tmp291 = call double @llvm.fabs.f64(double %tmp290)
  %v2_72 = fpext double %tmp291 to x86_fp80
  %v2_74 = fsub x86_fp80 0xK80000000000000000000, %v2_72
  store x86_fp80 %v2_74, x86_fp80* %st7.global-to-local, align 4
  %v8_76 = add i3 %v0_4b, -2
  %v4_80 = fsub x86_fp80 %v7_64, %v2_72
  %v2_82 = fsub x86_fp80 0xK80000000000000000000, %v4_80
  %v3_84 = add i32 %v2_5e, -108
  %v4_84 = inttoptr i32 %v3_84 to double*
  %v5_84 = load double, double* %v4_84, align 4
  %v6_84 = fpext double %v5_84 to x86_fp80
  %v7_84 = fsub x86_fp80 %v2_82, %v6_84
  %v4_87 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_87 = fpext double %v4_87 to x86_fp80
  %v6_87 = fmul x86_fp80 %v7_84, %v5_87
  %tmp292 = fptrunc x86_fp80 %v6_87 to double
  store double %tmp292, double* %stack_var_-48, align 8
  %tmp293 = bitcast double %v4_87 to i64
  %tmp294 = trunc i64 %tmp293 to i32
  %v2_99 = add i32 %tmp294, -24
  %v3_99 = inttoptr i32 %v2_99 to double*
  %v4_99 = load double, double* %v3_99, align 4
  %v5_99 = fpext double %v4_99 to x86_fp80
  store x86_fp80 %v5_99, x86_fp80* %st7.global-to-local, align 4
  store i3 %v8_76, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_a1 = call i32 @__asm_wait()
  %v0_a2 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_a2 = call i16 @__asm_fnstsw(i32 %v0_a2)
  %v2_a2 = sext i16 %v1_a2 to i32
  %v4_a43 = udiv i32 %v2_a2, 512
  %tmp299 = urem i32 %v4_a43, 128
  %v5_a4 = icmp eq i32 %tmp299, 0
  %v15_a421 = and i32 %v2_a2, 256
  %v16_a4 = icmp ne i32 %v15_a421, 0
  %v2_a6 = or i1 %v16_a4, %v5_a4
  %v0_c3.pre = load i32, i32* @edi, align 8
  br i1 %v2_a6, label %dec_label_pc_c1, label %dec_label_pc_a8

dec_label_pc_a8:                                  ; preds = %dec_label_pc_40
  %v1_a8 = add i32 %v0_c3.pre, -84
  %v2_a8 = inttoptr i32 %v1_a8 to i32*
  %v3_a8 = load i32, i32* %v2_a8, align 4
  %v1_ab = add i32 %v3_a8, -1
  %v7_ac = icmp slt i32 %v3_a8, 2
  %v8_b4 = icmp sgt i32 %v1_ab, 999
  %or.cond = or i1 %v7_ac, %v8_b4
  br i1 %or.cond, label %dec_label_pc_c1, label %dec_label_pc_b6thread-pre-split

dec_label_pc_b6thread-pre-split:                  ; preds = %dec_label_pc_a8
  %st7.promoted = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_b6

dec_label_pc_b6:                                  ; preds = %dec_label_pc_b6thread-pre-split, %dec_label_pc_b6
  %v2_bc22 = phi x86_fp80 [ %st7.promoted, %dec_label_pc_b6thread-pre-split ], [ %v2_bc, %dec_label_pc_b6 ]
  %v0_be = phi i32 [ %v1_ab, %dec_label_pc_b6thread-pre-split ], [ %v1_be, %dec_label_pc_b6 ]
  %v4_b6 = fsub x86_fp80 %v2_bc22, %v2_bc22
  %v2_b8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_b6)
  %v4_ba = fsub x86_fp80 %v2_b8, %v2_b8
  %v2_bc = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_ba)
  %v1_be = add i32 %v0_be, -1
  %v8_bf = icmp sgt i32 %v0_be, 1
  br i1 %v8_bf, label %dec_label_pc_b6, label %dec_label_pc_c1.loopexit

dec_label_pc_c1.loopexit:                         ; preds = %dec_label_pc_b6
  store x86_fp80 %v2_bc, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_c1

dec_label_pc_c1:                                  ; preds = %dec_label_pc_a8, %dec_label_pc_40, %dec_label_pc_c1.loopexit
  %v0_c1 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_c1 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v5_c1 = add i3 %v0_c1, 1
  store i3 %v5_c1, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_c3 = add i32 %v0_c3.pre, -12
  %v2_c3 = inttoptr i32 %v1_c3 to i32*
  %v3_c3 = load i32, i32* %v2_c3, align 4
  %v2_c6 = icmp sgt i32 %v3_c3, -1
  %v1_cc = icmp eq i1 %v2_c6, false
  br i1 %v1_cc, label %dec_label_pc_106, label %dec_label_pc_ce

dec_label_pc_ce:                                  ; preds = %dec_label_pc_c1
  %v3_ce = fmul x86_fp80 %v1_c1, %v1_c1
  store x86_fp80 %v3_ce, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_c1, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_d4 = add i32 %v0_c3.pre, -76
  %v2_d4 = inttoptr i32 %v1_d4 to i32*
  %v3_d4 = load i32, i32* %v2_d4, align 4
  %v2_d7 = icmp sgt i32 %v3_d4, -1
  %v1_dd = icmp eq i1 %v2_d7, false
  br i1 %v1_dd, label %dec_label_pc_e7, label %dec_label_pc_df

dec_label_pc_df:                                  ; preds = %dec_label_pc_ce
  %v3_df = add i32 %v0_c3.pre, -80
  %v4_df = inttoptr i32 %v3_df to double*
  %v5_df = load double, double* %v4_df, align 4
  %v6_df = fpext double %v5_df to x86_fp80
  %v7_df = fsub x86_fp80 %v6_df, %v3_ce
  %v2_e2 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_df)
  store x86_fp80 %v2_e2, x86_fp80* %st7.global-to-local, align 4
  %v5_e4 = load double, double* %v4_df, align 4
  %v6_e4 = fpext double %v5_e4 to x86_fp80
  %v7_e4 = fsub x86_fp80 %v6_e4, %v2_e2
  store x86_fp80 %v7_e4, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_e7

dec_label_pc_e7:                                  ; preds = %dec_label_pc_df, %dec_label_pc_ce
  %v1_e7 = phi x86_fp80 [ %v7_e4, %dec_label_pc_df ], [ %v3_ce, %dec_label_pc_ce ]
  %v3_e7 = fmul x86_fp80 %v1_e7, %v1_e7
  %v4_e9 = fadd x86_fp80 %v3_e7, %v3_e7
  store i3 %v5_c1, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_eb = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_e9)
  store x86_fp80 %v2_eb, x86_fp80* %st7.global-to-local, align 4
  %v3_ed = add i32 %v0_c3.pre, -16
  %v4_ed = inttoptr i32 %v3_ed to double*
  %v5_ed = load double, double* %v4_ed, align 4
  %v6_ed = fpext double %v5_ed to x86_fp80
  %v7_ed = fsub x86_fp80 %v2_eb, %v6_ed
  store x86_fp80 %v7_ed, x86_fp80* %st7.global-to-local, align 4
  br i1 %v2_d7, label %dec_label_pc_145, label %dec_label_pc_f4

dec_label_pc_f4:                                  ; preds = %dec_label_pc_e7
  %v5_f4 = fpext double %tmp277 to x86_fp80
  %v3_f8 = fmul x86_fp80 %v5_f4, %v5_f4
  %v2_fa = add i32 %v0_c3.pre, -80
  %v3_fa = inttoptr i32 %v2_fa to double*
  %v4_fa = load double, double* %v3_fa, align 4
  %v5_fa = fpext double %v4_fa to x86_fp80
  %v3_fd = add i32 %v0_c3.pre, -24
  %v4_fd = inttoptr i32 %v3_fd to double*
  %v5_fd = load double, double* %v4_fd, align 4
  %v6_fd = fpext double %v5_fd to x86_fp80
  %v7_fd = fadd x86_fp80 %v5_fa, %v6_fd
  %v4_100 = fmul x86_fp80 %v3_f8, %v7_fd
  %v4_102 = fsub x86_fp80 %v7_ed, %v4_100
  store x86_fp80 %v4_102, x86_fp80* %st7.global-to-local, align 4
  store i3 %v5_c1, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_145

dec_label_pc_106:                                 ; preds = %dec_label_pc_c1
  %v2_106 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v1_c1)
  store x86_fp80 %v2_106, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_c1, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_10c = add i32 %v0_c3.pre, -76
  %v2_10c = inttoptr i32 %v1_10c to i32*
  %v3_10c = load i32, i32* %v2_10c, align 4
  %v2_10f = icmp sgt i32 %v3_10c, -1
  %v1_115 = icmp eq i1 %v2_10f, false
  br i1 %v1_115, label %dec_label_pc_11f, label %dec_label_pc_117

dec_label_pc_117:                                 ; preds = %dec_label_pc_106
  %v3_117 = add i32 %v0_c3.pre, -80
  %v4_117 = inttoptr i32 %v3_117 to double*
  %v5_117 = load double, double* %v4_117, align 4
  %v6_117 = fpext double %v5_117 to x86_fp80
  %v7_117 = fsub x86_fp80 %v6_117, %v2_106
  %v2_11a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_117)
  store x86_fp80 %v2_11a, x86_fp80* %st7.global-to-local, align 4
  %v5_11c = load double, double* %v4_117, align 4
  %v6_11c = fpext double %v5_11c to x86_fp80
  %v7_11c = fsub x86_fp80 %v6_11c, %v2_11a
  store x86_fp80 %v7_11c, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_11f

dec_label_pc_11f:                                 ; preds = %dec_label_pc_117, %dec_label_pc_106
  %v1_11f = phi x86_fp80 [ %v7_11c, %dec_label_pc_117 ], [ %v2_106, %dec_label_pc_106 ]
  %v2_11f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v1_11f)
  store x86_fp80 %v2_11f, x86_fp80* %st7.global-to-local, align 4
  %v0_123 = call i32 @__asm_wait()
  %v0_124 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_124 = call i16 @__asm_fnstsw(i32 %v0_124)
  %v1_12a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %storemerge10.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge10 = add i3 %storemerge10.in, 1
  store i3 %storemerge10, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_130 = load i32, i32* @edi, align 8
  %v3_130 = add i32 %v2_130, -16
  %v4_130 = inttoptr i32 %v3_130 to double*
  %v5_130 = load double, double* %v4_130, align 4
  %v6_130 = fpext double %v5_130 to x86_fp80
  %v7_130 = fadd x86_fp80 %v1_12a, %v6_130
  store x86_fp80 %v7_130, x86_fp80* %st7.global-to-local, align 4
  br i1 %v2_10f, label %dec_label_pc_145, label %dec_label_pc_137

dec_label_pc_137:                                 ; preds = %dec_label_pc_11f
  %v5_137 = fpext double %tmp277 to x86_fp80
  store x86_fp80 %v5_137, x86_fp80* %st7.global-to-local, align 4
  %v2_13b = add i32 %v2_130, -80
  %v3_13b = inttoptr i32 %v2_13b to double*
  %v4_13b = load double, double* %v3_13b, align 4
  %v5_13b = fpext double %v4_13b to x86_fp80
  %v3_13e = add i32 %v2_130, -24
  %v4_13e = inttoptr i32 %v3_13e to double*
  %v5_13e = load double, double* %v4_13e, align 4
  %v6_13e = fpext double %v5_13e to x86_fp80
  %v7_13e = fadd x86_fp80 %v5_13b, %v6_13e
  %v4_141 = fmul x86_fp80 %v7_13e, %v5_137
  %v4_143 = fadd x86_fp80 %v4_141, %v4_141
  store x86_fp80 %v4_143, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge10, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_145

dec_label_pc_145:                                 ; preds = %dec_label_pc_e7, %dec_label_pc_f4, %dec_label_pc_137, %dec_label_pc_11f
  %v0_145 = phi i3 [ %v5_c1, %dec_label_pc_e7 ], [ %v5_c1, %dec_label_pc_f4 ], [ %storemerge10, %dec_label_pc_137 ], [ %storemerge10, %dec_label_pc_11f ]
  %v6_145 = add i3 %v0_145, -1
  store i3 %v6_145, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_150 = call i32 @__asm_wait()
  %v0_151 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_151 = call i16 @__asm_fnstsw(i32 %v0_151)
  %v2_151 = sext i16 %v1_151 to i32
  %v4_151 = and i32 %v0_150, -65536
  %tmp298 = udiv i32 %v2_151, 2
  %v12_153 = and i32 %tmp298, 32512
  %v2_151.masked = and i32 %v2_151, -65281
  %v13_153 = or i32 %v4_151, %v2_151.masked
  %v14_153 = or i32 %v13_153, %v12_153
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_15d = load i32, i32* @edi, align 8
  %v1_15d = add i32 %v0_15d, -112
  %v2_15d = inttoptr i32 %v1_15d to i32*
  %v3_15d = load i32, i32* %v2_15d, align 4
  %v10_15d = icmp eq i32 %v3_15d, 0
  %v1_161 = icmp eq i1 %v10_15d, false
  %v1_166.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_161, label %dec_label_pc_166, label %dec_label_pc_163

dec_label_pc_163:                                 ; preds = %dec_label_pc_145
  %v3_163 = add i32 %v0_15d, -48
  %v4_163 = inttoptr i32 %v3_163 to double*
  %v5_163 = load double, double* %v4_163, align 4
  %v6_163 = fpext double %v5_163 to x86_fp80
  %v7_163 = fdiv x86_fp80 %v1_166.pre, %v6_163
  store x86_fp80 %v7_163, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_166

dec_label_pc_166:                                 ; preds = %dec_label_pc_145, %dec_label_pc_163
  %v1_166 = phi x86_fp80 [ %v7_163, %dec_label_pc_163 ], [ %v1_166.pre, %dec_label_pc_145 ]
  %v2_166 = load i32, i32* %esi.global-to-local, align 4
  %v3_166 = add i32 %v2_166, -32
  %v4_166 = fptrunc x86_fp80 %v1_166 to double
  %v5_166 = inttoptr i32 %v3_166 to double*
  store double %v4_166, double* %v5_166, align 4
  %v6_166 = add i3 %storemerge.in, 2
  store i3 %v6_166, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_153
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
