source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %ecx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st4.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp312 = call double @__decompiler_undefined_function_4()
  %stack_var_-64 = alloca double, align 8
  %v0_0 = load i32, i32* %ecx.global-to-local, align 4
  %v0_4 = load i32, i32* %esi.global-to-local, align 4
  %v1_4 = add i32 %v0_4, -112
  %v2_4 = inttoptr i32 %v1_4 to i128*
  %v3_4 = load i128, i128* %v2_4, align 4
  %v4_4 = call i128 @__asm_movupd(i128 %v3_4)
  %v1_9 = add i32 %v0_4, -120
  %v2_9 = inttoptr i32 %v1_9 to i64*
  %v3_9 = load i64, i64* %v2_9, align 4
  %v4_9 = call i128 @__asm_movsd(i64 %v3_9)
  %v1_e = load i32, i32* @edi, align 8
  %v2_e = add i32 %v1_e, -48
  %v3_e = inttoptr i32 %v2_e to i128*
  %v4_e = load i128, i128* %v3_e, align 4
  %v5_e = call i128 @__asm_mulpd(i128 %v4_4, i128 %v4_e)
  %v1_13 = load i32, i32* @edi, align 8
  %v2_13 = add i32 %v1_13, -48
  %v3_13 = inttoptr i32 %v2_13 to i64*
  %v4_13 = load i64, i64* %v3_13, align 4
  %v5_13 = call i128 @__asm_mulsd(i128 %v4_9, i64 %v4_13)
  %v0_18 = load i32, i32* @edi, align 8
  %v1_18 = add i32 %v0_18, -76
  %v2_18 = inttoptr i32 %v1_18 to i32*
  %v3_18 = load i32, i32* %v2_18, align 4
  %v11_18 = icmp slt i32 %v3_18, 0
  %v2_1c = icmp eq i1 %v11_18, false
  br i1 %v2_1c, label %dec_label_pc_1e, label %dec_label_pc_2d

dec_label_pc_1e:                                  ; preds = %dec_label_pc_0
  %v0_1e = load i32, i32* %esi.global-to-local, align 4
  %v1_1e = add i32 %v0_1e, 112
  %v2_1e = inttoptr i32 %v1_1e to i64*
  %v3_1e = load i64, i64* %v2_1e, align 4
  %v4_1e = call i128 @__asm_movsd(i64 %v3_1e)
  %v1_23 = load i32, i32* @edi, align 8
  %v2_23 = add i32 %v1_23, -48
  %v3_23 = inttoptr i32 %v2_23 to i64*
  %v4_23 = load i64, i64* %v3_23, align 4
  %v5_23 = call i128 @__asm_mulsd(i128 %v4_1e, i64 %v4_23)
  %v1_28 = call i32 @__asm_movsd.1(i128 %v5_23)
  %v2_28 = load i32, i32* %esi.global-to-local, align 4
  %v3_28 = add i32 %v2_28, 112
  %v4_28 = sext i32 %v1_28 to i64
  %v5_28 = inttoptr i32 %v3_28 to i64*
  store i64 %v4_28, i64* %v5_28, align 4
  br label %dec_label_pc_2d

dec_label_pc_2d:                                  ; preds = %dec_label_pc_0, %dec_label_pc_1e
  %v2_2d = load double, double* %stack_var_-64, align 8
  %v3_2d = fptrunc double %v2_2d to float
  %v4_2d = bitcast float %v3_2d to i32
  %v5_2d = sext i32 %v4_2d to i128
  call void @__asm_movupd.2(i128 %v5_2d, i128 %v5_e)
  %v1_32 = call i32 @__asm_movsd.1(i128 %v5_13)
  %v4_32 = sext i32 %v1_32 to i64
  %v6_32 = bitcast i64 %v4_32 to double
  %v0_38 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_38 = fpext double %v6_32 to x86_fp80
  store x86_fp80 %v7_38, x86_fp80* %st7.global-to-local, align 4
  %v3_3c = load double, double* %stack_var_-64, align 8
  %v8_3c = fpext double %v3_3c to x86_fp80
  %v9_3c = add i3 %v0_38, -2
  store i3 %v9_3c, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v8_3c, x86_fp80* %st6.global-to-local, align 4
  %v3_3f = call i32 @__asm_fpatan(i32 %v1_32)
  store i32 %v3_3f, i32* %eax.global-to-local, align 4
  %v1_41 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v2_41 = load i32, i32* @edi, align 8
  %v3_41 = add i32 %v2_41, 24
  %v4_41 = inttoptr i32 %v3_41 to double*
  %v5_41 = load double, double* %v4_41, align 4
  %v6_41 = fpext double %v5_41 to x86_fp80
  %v7_41 = fsub x86_fp80 %v6_41, %v1_41
  store x86_fp80 %v7_41, x86_fp80* %st6.global-to-local, align 4
  %v3_44 = add i32 %v2_41, 8
  %v4_44 = inttoptr i32 %v3_44 to double*
  %v5_44 = load double, double* %v4_44, align 4
  %v6_44 = fpext double %v5_44 to x86_fp80
  %v7_44 = fmul x86_fp80 %v7_41, %v6_44
  store x86_fp80 %v7_44, x86_fp80* %st6.global-to-local, align 4
  %v3_47 = add i32 %v2_41, -76
  %v4_47 = inttoptr i32 %v3_47 to i32*
  %v5_47 = load i32, i32* %v4_47, align 4
  %v6_47 = sitofp i32 %v5_47 to x86_fp80
  %v7_47 = fmul x86_fp80 %v7_44, %v6_47
  store x86_fp80 %v7_47, x86_fp80* %st6.global-to-local, align 4
  %v5_52 = load i32, i32* %v4_47, align 4
  %v6_52 = sitofp i32 %v5_52 to x86_fp80
  %v7_52 = fdiv x86_fp80 %v7_47, %v6_52
  store x86_fp80 %v7_52, x86_fp80* %st6.global-to-local, align 4
  %v3_55 = add i32 %v2_41, 16
  %v4_55 = inttoptr i32 %v3_55 to double*
  %v5_55 = load double, double* %v4_55, align 4
  %v6_55 = fpext double %v5_55 to x86_fp80
  %v7_55 = fmul x86_fp80 %v7_52, %v6_55
  store x86_fp80 %v7_55, x86_fp80* %st6.global-to-local, align 4
  %v2_58 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_55)
  %v3_58 = fcmp olt x86_fp80 %v2_58, 0xK403E8000000000000000
  %v0_58 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v3_58, label %bb, label %dec_label_pc_2d._crit_edge

bb:                                               ; preds = %dec_label_pc_2d
  %v4_58 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_55)
  store x86_fp80 %v4_58, x86_fp80* %st6.global-to-local, align 4
  %v8_58 = add i3 %v0_58, -1
  store i3 %v8_58, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_2d._crit_edge

dec_label_pc_2d._crit_edge:                       ; preds = %dec_label_pc_2d, %bb
  %v0_5a = phi i3 [ %v8_58, %bb ], [ %v0_58, %dec_label_pc_2d ]
  %v1_5a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v7_66 = fmul x86_fp80 %v1_5a, %v7_38
  %v3_6a = load double, double* %stack_var_-64, align 8
  %v8_6a = fpext double %v3_6a to x86_fp80
  %v7_6d = fmul x86_fp80 %v1_5a, %v8_6a
  %v2_71 = fsub x86_fp80 0xK80000000000000000000, %v7_6d
  store x86_fp80 %v2_71, x86_fp80* %st6.global-to-local, align 4
  %v4_73 = fsub x86_fp80 %v7_66, %v7_6d
  store x86_fp80 %v4_73, x86_fp80* %st7.global-to-local, align 4
  %v3_75 = add i32 %v2_41, -72
  %v4_75 = inttoptr i32 %v3_75 to double*
  %v5_75 = load double, double* %v4_75, align 4
  %v6_75 = fpext double %v5_75 to x86_fp80
  %v7_75 = fadd x86_fp80 %v4_73, %v6_75
  store x86_fp80 %v7_75, x86_fp80* %st7.global-to-local, align 4
  %v4_87 = fadd x86_fp80 %v7_6d, %v7_66
  store x86_fp80 %v4_87, x86_fp80* %st6.global-to-local, align 4
  %v3_89 = add i32 %v2_41, -64
  %v4_89 = inttoptr i32 %v3_89 to double*
  %v5_89 = load double, double* %v4_89, align 4
  %v6_89 = fpext double %v5_89 to x86_fp80
  %v7_89 = fadd x86_fp80 %v4_87, %v6_89
  store x86_fp80 %v7_89, x86_fp80* %st6.global-to-local, align 4
  %tmp327 = fptrunc x86_fp80 %v7_89 to double
  store double %tmp327, double* %stack_var_-64, align 8
  %v4_8f = fptrunc x86_fp80 %v7_75 to double
  %v5_93 = fpext double %tmp312 to x86_fp80
  store x86_fp80 %v5_93, x86_fp80* %st7.global-to-local, align 4
  %v3_97 = add i32 %v2_41, -56
  %v4_97 = inttoptr i32 %v3_97 to double*
  %v5_97 = load double, double* %v4_97, align 4
  %v6_97 = fpext double %v5_97 to x86_fp80
  %v7_97 = fadd x86_fp80 %v5_93, %v6_97
  store x86_fp80 %v7_97, x86_fp80* %st7.global-to-local, align 4
  %v6_9a = add i3 %v0_5a, 2
  store i3 %v6_9a, i3* %fpu_stat_TOP.global-to-local, align 1
  %tmp356 = fptrunc x86_fp80 %v7_89 to float
  %v4_9e = bitcast float %tmp356 to i32
  %v5_9e = sext i32 %v4_9e to i128
  %v6_9e = call i128 @__asm_movupd(i128 %v5_9e)
  %v4_a3 = bitcast double %v4_8f to i64
  %v5_a3 = call i128 @__asm_movsd(i64 %v4_a3)
  %v0_a9 = load i32, i32* @edi, align 8
  %v1_a9 = add i32 %v0_a9, -76
  %v2_a9 = inttoptr i32 %v1_a9 to i32*
  %v3_a9 = load i32, i32* %v2_a9, align 4
  %v11_a9 = icmp slt i32 %v3_a9, 0
  %v2_ad = icmp eq i1 %v11_a9, false
  br i1 %v2_ad, label %dec_label_pc_af, label %dec_label_pc_b9

dec_label_pc_af:                                  ; preds = %dec_label_pc_2d._crit_edge
  %v0_af = load i32, i32* %esi.global-to-local, align 4
  %v1_af = add i32 %v0_af, -112
  %v2_af = inttoptr i32 %v1_af to i128*
  %v3_af = load i128, i128* %v2_af, align 4
  call void @__asm_movupd.2(i128 %v3_af, i128 %v6_9e)
  %v1_b4 = call i32 @__asm_movsd.1(i128 %v5_a3)
  %v3_b4 = add i32 %v0_af, -120
  %v4_b4 = sext i32 %v1_b4 to i64
  %v5_b4 = inttoptr i32 %v3_b4 to i64*
  store i64 %v4_b4, i64* %v5_b4, align 4
  %v2_bd.pre = load i32, i32* @edi, align 8
  br label %dec_label_pc_b9

dec_label_pc_b9:                                  ; preds = %dec_label_pc_2d._crit_edge, %dec_label_pc_af
  %v1_ed = phi i32 [ %v0_a9, %dec_label_pc_2d._crit_edge ], [ %v2_bd.pre, %dec_label_pc_af ]
  %v0_b9 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_b9 = add i3 %v0_b9, -1
  store x86_fp80 %v7_97, x86_fp80* %st7.global-to-local, align 4
  %v3_bd = add i32 %v1_ed, -92
  %v4_bd = inttoptr i32 %v3_bd to double*
  %v5_bd = load double, double* %v4_bd, align 4
  %v6_bd = fpext double %v5_bd to x86_fp80
  %v7_bd = fmul x86_fp80 %v7_97, %v6_bd
  store x86_fp80 %v7_bd, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_75, x86_fp80* %st6.global-to-local, align 4
  %v3_c4 = add i32 %v1_ed, -100
  %v4_c4 = inttoptr i32 %v3_c4 to double*
  %v5_c4 = load double, double* %v4_c4, align 4
  %v6_c4 = fpext double %v5_c4 to x86_fp80
  %v7_c4 = fmul x86_fp80 %v7_75, %v6_c4
  %v4_c7 = fadd x86_fp80 %v7_bd, %v7_c4
  store x86_fp80 %v4_c7, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_97, x86_fp80* %st6.global-to-local, align 4
  %v5_cd = load double, double* %v4_c4, align 4
  %v6_cd = fpext double %v5_cd to x86_fp80
  %v7_cd = fmul x86_fp80 %v7_97, %v6_cd
  store x86_fp80 %v7_cd, x86_fp80* %st6.global-to-local, align 4
  %v5_d4 = load double, double* %v4_bd, align 4
  %v6_d4 = fpext double %v5_d4 to x86_fp80
  %v7_d4 = fmul x86_fp80 %v7_75, %v6_d4
  %v4_d9 = fsub x86_fp80 %v7_cd, %v7_d4
  store x86_fp80 %v4_d9, x86_fp80* %st6.global-to-local, align 4
  %v4_df = fptrunc x86_fp80 %v4_c7 to double
  %tmp328 = call double @llvm.fabs.f64(double %v4_df)
  %v2_eb = fpext double %tmp328 to x86_fp80
  store x86_fp80 %v2_eb, x86_fp80* %st7.global-to-local, align 4
  %v2_ed = add i32 %v1_ed, -16
  %v3_ed = inttoptr i32 %v2_ed to double*
  %v4_ed = load double, double* %v3_ed, align 4
  %tmp329 = call double @llvm.fabs.f64(double %v4_ed)
  %v2_f0 = fpext double %tmp329 to x86_fp80
  store x86_fp80 %v2_f0, x86_fp80* %st6.global-to-local, align 4
  %v4_f2 = fsub x86_fp80 %v2_eb, %v2_f0
  store i3 %v6_b9, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_f4 = fsub x86_fp80 0xK80000000000000000000, %v4_f2
  store x86_fp80 %v2_f4, x86_fp80* %st7.global-to-local, align 4
  %v2_f6 = load double, double* %stack_var_-64, align 8
  %v3_f6 = fptrunc double %v2_f6 to float
  %v4_f6 = bitcast float %v3_f6 to i32
  %v5_f6 = sext i32 %v4_f6 to i128
  call void @__asm_movupd.2(i128 %v5_f6, i128 %v6_9e)
  %v1_fb = call i32 @__asm_movsd.1(i128 %v5_a3)
  %tmp357 = fptrunc x86_fp80 %v7_47 to float
  %v5_101 = bitcast float %tmp357 to i32
  %v1_105 = add i32 %v5_101, 256
  store i32 %v1_105, i32* %eax.global-to-local, align 4
  %v0_10c = load i32, i32* @edi, align 8
  %v1_10c = add i32 %v0_10c, -120
  %v2_10c = inttoptr i32 %v1_10c to i32*
  %v3_10c = load i32, i32* %v2_10c, align 4
  %v4_10c = sext i32 %v3_10c to i64
  store i32 %v3_10c, i32* %ecx.global-to-local, align 4
  %v8_112 = icmp sgt i32 %v3_10c, 0
  br i1 %v8_112, label %dec_label_pc_114, label %dec_label_pc_11f

dec_label_pc_114:                                 ; preds = %dec_label_pc_b9
  %v3_114 = zext i32 %v1_105 to i64
  %v9_114 = udiv i64 %v3_114, %v4_10c
  %v10_114 = trunc i64 %v9_114 to i32
  store i32 %v10_114, i32* %eax.global-to-local, align 4
  %v11_114 = urem i64 %v3_114, %v4_10c
  %v10_116 = icmp eq i64 %v11_114, 1
  %v1_119 = icmp eq i1 %v10_116, false
  br i1 %v1_119, label %dec_label_pc_114.dec_label_pc_1b2_crit_edge, label %dec_label_pc_11f

dec_label_pc_114.dec_label_pc_1b2_crit_edge:      ; preds = %dec_label_pc_114
  %v0_22c.pre.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_1b2

dec_label_pc_11f:                                 ; preds = %dec_label_pc_b9, %dec_label_pc_114
  %v0_11f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_11f = load double, double* %stack_var_-64, align 8
  %tmp331 = call double @llvm.fabs.f64(double %v3_11f)
  %v2_122 = fpext double %tmp331 to x86_fp80
  store x86_fp80 %v2_122, x86_fp80* %st6.global-to-local, align 4
  %v3_124 = add i32 %v0_10c, -116
  %v4_124 = inttoptr i32 %v3_124 to double*
  %v5_124 = load double, double* %v4_124, align 4
  %v6_124 = fpext double %v5_124 to x86_fp80
  %v7_124 = fmul x86_fp80 %v2_122, %v6_124
  store x86_fp80 %v7_124, x86_fp80* %st6.global-to-local, align 4
  %v3_12b = add i32 %v0_10c, -108
  %v4_12b = inttoptr i32 %v3_12b to double*
  %v5_12b = load double, double* %v4_12b, align 4
  %v6_12b = fpext double %v5_12b to x86_fp80
  %v7_12b = fmul x86_fp80 %v4_d9, %v6_12b
  %v4_130 = fsub x86_fp80 %v7_124, %v7_12b
  store x86_fp80 %v4_130, x86_fp80* %st6.global-to-local, align 4
  %v3_132 = add i32 %v0_10c, -84
  %v4_132 = inttoptr i32 %v3_132 to double*
  %v5_132 = load double, double* %v4_132, align 4
  %v6_132 = fpext double %v5_132 to x86_fp80
  %v7_132 = fsub x86_fp80 %v4_130, %v6_132
  store x86_fp80 %v7_132, x86_fp80* %st6.global-to-local, align 4
  %v2_139 = add i32 %v0_10c, -32
  %v3_139 = inttoptr i32 %v2_139 to double*
  %v4_139 = load double, double* %v3_139, align 4
  %v5_139 = fpext double %v4_139 to x86_fp80
  %v6_139 = add i3 %v0_11f, -3
  %v2_13c = fsub x86_fp80 0xK80000000000000000000, %v5_139
  %v4_13e = fsub x86_fp80 %v2_13c, %v4_d9
  store x86_fp80 %v4_13e, x86_fp80* %st4.global-to-local, align 4
  store i3 %v6_139, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_149 = call i32 @__asm_wait()
  store i32 %v0_149, i32* %eax.global-to-local, align 4
  %v0_14a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_14a = call i16 @__asm_fnstsw(i32 %v0_14a)
  %v2_14a = sext i16 %v1_14a to i32
  %v3_14a = load i32, i32* %eax.global-to-local, align 4
  %v4_14a = and i32 %v3_14a, -65536
  %v4_14c4 = udiv i32 %v2_14a, 512
  %tmp332 = trunc i32 %v4_14c4 to i8
  %tmp358 = urem i8 %tmp332, -128
  %v5_14c = icmp eq i8 %tmp358, 0
  %v10_14c = zext i8 %tmp358 to i32
  %v12_14c = mul i32 %v10_14c, 256
  %v2_14a.masked = and i32 %v2_14a, -65281
  %v13_14c = or i32 %v4_14a, %v2_14a.masked
  %v14_14c = or i32 %v13_14c, %v12_14c
  store i32 %v14_14c, i32* %eax.global-to-local, align 4
  %v15_14c343 = and i32 %v2_14a, 256
  %v16_14c = icmp ne i32 %v15_14c343, 0
  %v2_14e = or i1 %v16_14c, %v5_14c
  %v1_150 = load i32, i32* @edi, align 8
  br i1 %v2_14e, label %dec_label_pc_150, label %dec_label_pc_15f

dec_label_pc_150:                                 ; preds = %dec_label_pc_11f
  %v2_150 = add i32 %v1_150, -128
  %v3_150 = inttoptr i32 %v2_150 to double*
  %v4_150 = load double, double* %v3_150, align 4
  br label %dec_label_pc_170

dec_label_pc_15f:                                 ; preds = %dec_label_pc_11f
  %v2_15f = add i32 %v1_150, -84
  %v3_15f = inttoptr i32 %v2_15f to double*
  %v4_15f = load double, double* %v3_15f, align 4
  %v5_15f = fpext double %v4_15f to x86_fp80
  %v3_162 = add i32 %v1_150, -128
  %v4_162 = inttoptr i32 %v3_162 to double*
  %v5_162 = load double, double* %v4_162, align 4
  %v6_162 = fpext double %v5_162 to x86_fp80
  %v7_162 = fsub x86_fp80 %v5_15f, %v6_162
  %v4_165 = fptrunc x86_fp80 %v7_162 to double
  br label %dec_label_pc_170

dec_label_pc_170:                                 ; preds = %dec_label_pc_15f, %dec_label_pc_150
  %stack_var_-24.0 = phi x86_fp80 [ %v6_162, %dec_label_pc_15f ], [ 0xK00000000000000000000, %dec_label_pc_150 ]
  %stack_var_-40.0 = phi double [ %v4_165, %dec_label_pc_15f ], [ %v4_150, %dec_label_pc_150 ]
  %v1_170 = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  %v3_170 = fmul x86_fp80 %v1_170, %v1_170
  %v3_172 = load double, double* %stack_var_-64, align 8
  %tmp333 = call double @llvm.fabs.f64(double %v3_172)
  %v2_175 = fpext double %tmp333 to x86_fp80
  %v11_177 = fsub x86_fp80 %v2_175, %stack_var_-24.0
  %v3_17b = fmul x86_fp80 %v11_177, %v11_177
  %v4_17d = fadd x86_fp80 %v3_170, %v3_17b
  %v2_17f = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_17d)
  %v6_181 = fpext double %stack_var_-40.0 to x86_fp80
  %v7_181 = fsub x86_fp80 %v2_17f, %v6_181
  store x86_fp80 %v7_181, x86_fp80* %st4.global-to-local, align 4
  %v0_187 = call i32 @__asm_wait()
  store i32 %v0_187, i32* %eax.global-to-local, align 4
  %v0_188 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_188 = call i16 @__asm_fnstsw(i32 %v0_188)
  %v2_188 = sext i16 %v1_188 to i32
  %v3_188 = load i32, i32* %eax.global-to-local, align 4
  %v4_188 = and i32 %v3_188, -65536
  %tmp349 = udiv i32 %v2_188, 2
  %v12_18a = and i32 %tmp349, 32512
  %v2_188.masked = and i32 %v2_188, -65281
  %v13_18a = or i32 %v4_188, %v2_188.masked
  %v14_18a = or i32 %v13_18a, %v12_18a
  store i32 %v14_18a, i32* %eax.global-to-local, align 4
  %storemerge31.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge31 = add i3 %storemerge31.in, 1
  store i3 %storemerge31, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_196 = call i32 @__asm_wait()
  store i32 %v0_196, i32* %eax.global-to-local, align 4
  %v0_197 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_197 = call i16 @__asm_fnstsw(i32 %v0_197)
  %v2_197 = sext i16 %v1_197 to i32
  %v3_197 = load i32, i32* %eax.global-to-local, align 4
  %v4_197 = and i32 %v3_197, -65536
  %tmp350 = udiv i32 %v2_197, 2
  %v12_199 = and i32 %tmp350, 32512
  %v2_197.masked = and i32 %v2_197, -65281
  %v13_199 = or i32 %v4_197, %v2_197.masked
  %v14_199 = or i32 %v13_199, %v12_199
  store i32 %v14_199, i32* %eax.global-to-local, align 4
  %storemerge29.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge29 = add i3 %storemerge29.in, 1
  store i3 %storemerge29, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1a5 = call i32 @__asm_wait()
  store i32 %v0_1a5, i32* %eax.global-to-local, align 4
  %v0_1a6 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1a6 = call i16 @__asm_fnstsw(i32 %v0_1a6)
  %v2_1a6 = sext i16 %v1_1a6 to i32
  %v3_1a6 = load i32, i32* %eax.global-to-local, align 4
  %v4_1a6 = and i32 %v3_1a6, -65536
  %tmp351 = udiv i32 %v2_1a6, 2
  %v12_1a8 = and i32 %tmp351, 32512
  %v2_1a6.masked = and i32 %v2_1a6, -65281
  %v13_1a8 = or i32 %v4_1a6, %v2_1a6.masked
  %v14_1a8 = or i32 %v13_1a8, %v12_1a8
  store i32 %v14_1a8, i32* %eax.global-to-local, align 4
  %v0_1b0 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_1b0 = add i3 %v0_1b0, 1
  store i3 %v4_1b0, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1b6.pre = load i32, i32* @edi, align 8
  br label %dec_label_pc_1b2

dec_label_pc_1b2:                                 ; preds = %dec_label_pc_114.dec_label_pc_1b2_crit_edge, %dec_label_pc_170
  %v0_22c.pre = phi i3 [ %v0_22c.pre.pre, %dec_label_pc_114.dec_label_pc_1b2_crit_edge ], [ %v4_1b0, %dec_label_pc_170 ]
  %v2_1d1 = phi i32 [ %v0_10c, %dec_label_pc_114.dec_label_pc_1b2_crit_edge ], [ %v0_1b6.pre, %dec_label_pc_170 ]
  %v1_1b2 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_1b2 = fsub x86_fp80 0xK80000000000000000000, %v1_1b2
  store x86_fp80 %v2_1b2, x86_fp80* %st7.global-to-local, align 4
  store i32 0, i32* %ecx.global-to-local, align 4
  %v1_1b6 = add i32 %v2_1d1, -12
  %v2_1b6 = inttoptr i32 %v1_1b6 to i32*
  %v3_1b6 = load i32, i32* %v2_1b6, align 4
  %v2_1b9 = icmp sgt i32 %v3_1b6, -1
  br i1 %v2_1b9, label %dec_label_pc_22c, label %dec_label_pc_1c1

dec_label_pc_1c1:                                 ; preds = %dec_label_pc_1b2
  store x86_fp80 %v4_d9, x86_fp80* %st7.global-to-local, align 4
  %v3_1c5 = add i32 %v2_1d1, -24
  %v4_1c5 = inttoptr i32 %v3_1c5 to double*
  %v5_1c5 = load double, double* %v4_1c5, align 4
  %v6_1c5 = fpext double %v5_1c5 to x86_fp80
  %v7_1c5 = fadd x86_fp80 %v4_d9, %v6_1c5
  %v2_1c8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_1c5)
  store x86_fp80 %v2_1c8, x86_fp80* %st7.global-to-local, align 4
  %v3_1ca = add i32 %v2_1d1, -16
  %v4_1ca = inttoptr i32 %v3_1ca to double*
  %v5_1ca = load double, double* %v4_1ca, align 4
  %v6_1ca = fpext double %v5_1ca to x86_fp80
  %v7_1ca = fadd x86_fp80 %v2_1c8, %v6_1ca
  store x86_fp80 %v7_1ca, x86_fp80* %st7.global-to-local, align 4
  %v6_1cd = add i3 %v0_22c.pre, -2
  store i3 %v6_1cd, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_c7, x86_fp80* %st6.global-to-local, align 4
  %v5_1d1 = load double, double* %v4_1ca, align 4
  %v6_1d1 = fpext double %v5_1d1 to x86_fp80
  %v7_1d1 = fadd x86_fp80 %v4_c7, %v6_1d1
  store x86_fp80 %v7_1d1, x86_fp80* %st6.global-to-local, align 4
  %v0_1d6 = call i32 @__asm_wait()
  store i32 %v0_1d6, i32* %eax.global-to-local, align 4
  %v0_1d7 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1d7 = call i16 @__asm_fnstsw(i32 %v0_1d7)
  %v2_1d7 = sext i16 %v1_1d7 to i32
  %v3_1d7 = load i32, i32* %eax.global-to-local, align 4
  %v4_1d7 = and i32 %v3_1d7, -65536
  %tmp352 = udiv i32 %v2_1d7, 2
  %v12_1d9 = and i32 %tmp352, 32512
  %v2_1d7.masked = and i32 %v2_1d7, -65281
  %v13_1d9 = or i32 %v4_1d7, %v2_1d7.masked
  %v14_1d9 = or i32 %v13_1d9, %v12_1d9
  store i32 %v14_1d9, i32* %eax.global-to-local, align 4
  %v15_1d9344 = and i32 %v2_1d7, 256
  %v16_1d9 = icmp eq i32 %v15_1d9344, 0
  %v0_1e1 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v16_1d9, label %dec_label_pc_1dd, label %dec_label_pc_1c1.dec_label_pc_1e3_crit_edge

dec_label_pc_1c1.dec_label_pc_1e3_crit_edge:      ; preds = %dec_label_pc_1c1
  %v1_1e3.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1e3

dec_label_pc_1dd:                                 ; preds = %dec_label_pc_1c1
  %v1_1e1 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v1_1e1, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1e3

dec_label_pc_1e3:                                 ; preds = %dec_label_pc_1c1.dec_label_pc_1e3_crit_edge, %dec_label_pc_1dd
  %v1_1e3 = phi x86_fp80 [ %v1_1e3.pre, %dec_label_pc_1c1.dec_label_pc_1e3_crit_edge ], [ %v1_1e1, %dec_label_pc_1dd ]
  store x86_fp80 %v1_1e3, x86_fp80* %st6.global-to-local, align 4
  %v1_1e5 = load i32, i32* @edi, align 8
  %v2_1e5 = add i32 %v1_1e5, 32
  %v3_1e5 = inttoptr i32 %v2_1e5 to double*
  %v4_1e5 = load double, double* %v3_1e5, align 4
  %v5_1e5 = fpext double %v4_1e5 to x86_fp80
  %v2_1e8 = load i32, i32* %esi.global-to-local, align 4
  %v3_1e8 = add i32 %v2_1e8, -136
  %v4_1e8 = inttoptr i32 %v3_1e8 to double*
  %v5_1e8 = load double, double* %v4_1e8, align 4
  %v6_1e8 = fpext double %v5_1e8 to x86_fp80
  %v7_1e8 = fmul x86_fp80 %v5_1e5, %v6_1e8
  %v4_1ee = fadd x86_fp80 %v1_1e3, %v7_1e8
  store x86_fp80 %v4_1ee, x86_fp80* %st6.global-to-local, align 4
  %v8_1f2 = add i3 %v0_1e1, 1
  store i3 %v8_1f2, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1f4 = call i32 @__asm_wait()
  store i32 %v0_1f4, i32* %eax.global-to-local, align 4
  %v0_1f5 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1f5 = call i16 @__asm_fnstsw(i32 %v0_1f5)
  %v2_1f5 = sext i16 %v1_1f5 to i32
  %v3_1f5 = load i32, i32* %eax.global-to-local, align 4
  %v4_1f5 = and i32 %v3_1f5, -65536
  %tmp353 = udiv i32 %v2_1f5, 2
  %v12_1f7 = and i32 %tmp353, 32512
  %v2_1f5.masked = and i32 %v2_1f5, -65281
  %v13_1f7 = or i32 %v4_1f5, %v2_1f5.masked
  %v14_1f7 = or i32 %v13_1f7, %v12_1f7
  store i32 %v14_1f7, i32* %eax.global-to-local, align 4
  %v15_1f7345 = and i32 %v2_1f5, 256
  %v16_1f7 = icmp eq i32 %v15_1f7345, 0
  br i1 %v16_1f7, label %dec_label_pc_1fb, label %dec_label_pc_21d

dec_label_pc_1fb:                                 ; preds = %dec_label_pc_1e3
  %v0_1fb = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_1fb = load i32, i32* @edi, align 8
  %v2_1fb = add i32 %v1_1fb, -152
  %v3_1fb = inttoptr i32 %v2_1fb to double*
  %v4_1fb = load double, double* %v3_1fb, align 4
  %v5_1fb = fpext double %v4_1fb to x86_fp80
  %v6_1fb = add i3 %v0_1fb, -1
  store x86_fp80 %v5_1fb, x86_fp80* %st6.global-to-local, align 4
  store i3 %v6_1fb, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_205 = call i32 @__asm_wait()
  store i32 %v0_205, i32* %eax.global-to-local, align 4
  %v0_206 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_206 = call i16 @__asm_fnstsw(i32 %v0_206)
  %v2_206 = sext i16 %v1_206 to i32
  %v3_206 = load i32, i32* %eax.global-to-local, align 4
  %v4_206 = and i32 %v3_206, -65536
  %tmp354 = udiv i32 %v2_206, 2
  %v12_208 = and i32 %tmp354, 32512
  %v2_206.masked = and i32 %v2_206, -65281
  %v13_208 = or i32 %v4_206, %v2_206.masked
  %v14_208 = or i32 %v13_208, %v12_208
  store i32 %v14_208, i32* %eax.global-to-local, align 4
  %v15_208346 = and i32 %v2_206, 256
  %v16_208 = icmp eq i32 %v15_208346, 0
  br i1 %v16_208, label %dec_label_pc_20c, label %dec_label_pc_212

dec_label_pc_20c:                                 ; preds = %dec_label_pc_1fb
  store i32 0, i32* %ecx.global-to-local, align 4
  %v0_20e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_20e = add i3 %v0_20e, 1
  store i3 %v4_20e, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_21d

dec_label_pc_212:                                 ; preds = %dec_label_pc_1fb
  store i32 1, i32* %ecx.global-to-local, align 4
  %v0_217 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_217 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v2_217 = load i32, i32* %esi.global-to-local, align 4
  %v3_217 = add i32 %v2_217, 128
  %v4_217 = fptrunc x86_fp80 %v1_217 to double
  %v5_217 = inttoptr i32 %v3_217 to double*
  store double %v4_217, double* %v5_217, align 4
  %v6_217 = add i3 %v0_217, 1
  store i3 %v6_217, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_21d

dec_label_pc_21d:                                 ; preds = %dec_label_pc_1e3, %dec_label_pc_212, %dec_label_pc_20c
  %v0_21f = call i32 @__asm_wait()
  store i32 %v0_21f, i32* %eax.global-to-local, align 4
  %v0_220 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_220 = call i16 @__asm_fnstsw(i32 %v0_220)
  %v2_220 = sext i16 %v1_220 to i32
  %v3_220 = load i32, i32* %eax.global-to-local, align 4
  %v4_220 = and i32 %v3_220, -65536
  %tmp355 = udiv i32 %v2_220, 2
  %v12_222 = and i32 %tmp355, 32512
  %v2_220.masked = and i32 %v2_220, -65281
  %v13_222 = or i32 %v4_220, %v2_220.masked
  %v14_222 = or i32 %v13_222, %v12_222
  store i32 %v14_222, i32* %eax.global-to-local, align 4
  %v0_22a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_22a = add i3 %v0_22a, 1
  store i3 %v4_22a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_230.pre = load i32, i32* @edi, align 8
  br label %dec_label_pc_22c

dec_label_pc_22c:                                 ; preds = %dec_label_pc_1b2, %dec_label_pc_21d
  %v1_230 = phi i32 [ %v1_230.pre, %dec_label_pc_21d ], [ %v2_1d1, %dec_label_pc_1b2 ]
  %v0_22c = phi i3 [ %v4_22a, %dec_label_pc_21d ], [ %v0_22c.pre, %dec_label_pc_1b2 ]
  store x86_fp80 %v4_d9, x86_fp80* %st7.global-to-local, align 4
  %v2_230 = add i32 %v1_230, -24
  %v3_230 = inttoptr i32 %v2_230 to double*
  %v4_230 = load double, double* %v3_230, align 4
  %v5_230 = fpext double %v4_230 to x86_fp80
  %v4_233 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_233 = fpext double %v4_233 to x86_fp80
  %v6_233 = fmul x86_fp80 %v5_230, %v5_233
  store x86_fp80 %v6_233, x86_fp80* %st6.global-to-local, align 4
  %v4_239 = fadd x86_fp80 %v6_233, %v4_d9
  %v7_239 = add i3 %v0_22c, -1
  store i3 %v7_239, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_23b = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_239)
  %v7_23d = fsub x86_fp80 %v2_23b, %v6_233
  store x86_fp80 %v7_23d, x86_fp80* %st7.global-to-local, align 4
  %v0_243 = call i32 @__asm_wait()
  store i32 %v0_243, i32* %eax.global-to-local, align 4
  %v0_244 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_244 = call i16 @__asm_fnstsw(i32 %v0_244)
  %v2_244 = sext i16 %v1_244 to i32
  %v3_244 = load i32, i32* %eax.global-to-local, align 4
  %v4_244 = and i32 %v3_244, -65536
  %tmp341 = udiv i32 %v2_244, 2
  %v12_246 = and i32 %tmp341, 32512
  %v2_244.masked = and i32 %v2_244, -65281
  %v13_246 = or i32 %v4_244, %v2_244.masked
  %v14_246 = or i32 %v13_246, %v12_246
  store i32 %v14_246, i32* %eax.global-to-local, align 4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_250 = load i32, i32* %ecx.global-to-local, align 4
  %v7_250 = icmp eq i32 %v0_250, 0
  %v1_253 = icmp eq i1 %v7_250, false
  br i1 %v1_253, label %dec_label_pc_26a, label %dec_label_pc_255

dec_label_pc_255:                                 ; preds = %dec_label_pc_22c
  %v1_255 = load i32, i32* %esi.global-to-local, align 4
  %v2_255 = add i32 %v1_255, -24
  %v3_255 = inttoptr i32 %v2_255 to i32*
  %v4_255 = load i32, i32* %v3_255, align 4
  %v5_255 = sitofp i32 %v4_255 to x86_fp80
  store x86_fp80 %v5_255, x86_fp80* %st7.global-to-local, align 4
  %v2_258 = load i32, i32* @edi, align 8
  %v3_258 = add i32 %v2_258, -136
  %v4_258 = inttoptr i32 %v3_258 to double*
  %v5_258 = load double, double* %v4_258, align 4
  %v6_258 = fpext double %v5_258 to x86_fp80
  %v7_258 = fmul x86_fp80 %v5_255, %v6_258
  store x86_fp80 %v7_258, x86_fp80* %st7.global-to-local, align 4
  %v3_25e = add i32 %v2_258, -144
  %v4_25e = inttoptr i32 %v3_25e to double*
  %v5_25e = load double, double* %v4_25e, align 4
  %v6_25e = fpext double %v5_25e to x86_fp80
  %v7_25e = fadd x86_fp80 %v7_258, %v6_25e
  store x86_fp80 %v7_25e, x86_fp80* %st7.global-to-local, align 4
  %v3_264 = add i32 %v1_255, 128
  %v4_264 = fptrunc x86_fp80 %v7_25e to double
  %v5_264 = inttoptr i32 %v3_264 to double*
  store double %v4_264, double* %v5_264, align 4
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_26a

dec_label_pc_26a:                                 ; preds = %dec_label_pc_255, %dec_label_pc_22c
  %v0_26a = load i32, i32* @edi, align 8
  %v1_26a = add i32 %v0_26a, -76
  %v2_26a = inttoptr i32 %v1_26a to i32*
  %v3_26a = load i32, i32* %v2_26a, align 4
  %v11_26a = icmp slt i32 %v3_26a, 0
  %v2_26e = icmp eq i1 %v11_26a, false
  %v1_273.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v2_26e, label %dec_label_pc_273, label %dec_label_pc_270

dec_label_pc_270:                                 ; preds = %dec_label_pc_26a
  %v3_270 = add i32 %v0_26a, -48
  %v4_270 = inttoptr i32 %v3_270 to double*
  %v5_270 = load double, double* %v4_270, align 4
  %v6_270 = fpext double %v5_270 to x86_fp80
  %v7_270 = fdiv x86_fp80 %v1_273.pre, %v6_270
  store x86_fp80 %v7_270, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_273

dec_label_pc_273:                                 ; preds = %dec_label_pc_26a, %dec_label_pc_270
  %v1_273 = phi x86_fp80 [ %v7_270, %dec_label_pc_270 ], [ %v1_273.pre, %dec_label_pc_26a ]
  %v2_273 = load i32, i32* %esi.global-to-local, align 4
  %v3_273 = add i32 %v2_273, -32
  %v4_273 = fptrunc x86_fp80 %v1_273 to double
  %v5_273 = inttoptr i32 %v3_273 to double*
  store double %v4_273, double* %v5_273, align 4
  %v6_273 = add i3 %storemerge.in, 2
  store i3 %v6_273, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_0, i32* %ecx.global-to-local, align 4
  ret i32 %v14_246
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i32 @__asm_movsd.1(i128) local_unnamed_addr

declare void @__asm_movupd.2(i128, i128) local_unnamed_addr

declare i32 @__asm_fpatan(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_4() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
