source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %edi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %esi.global-to-local, align 4
  %v1_e = add i32 %arg1, 128
  store i32 %v1_e, i32* %edi.global-to-local, align 4
  %v1_14 = add i32 %arg1, 208
  %v2_14 = inttoptr i32 %v1_14 to i32*
  %v3_14 = load i32, i32* %v2_14, align 4
  %v10_14 = icmp eq i32 %v3_14, 0
  %v11_14 = icmp slt i32 %v3_14, 0
  %v3_18 = icmp eq i1 %v11_14, false
  %v4_18 = icmp eq i1 %v10_14, false
  %v5_18 = icmp eq i1 %v3_18, %v4_18
  br i1 %v5_18, label %dec_label_pc_0.dec_label_pc_23_crit_edge, label %dec_label_pc_1a

dec_label_pc_0.dec_label_pc_23_crit_edge:         ; preds = %dec_label_pc_0
  %v0_23.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %.pre = add i32 %arg1, 200
  %.pre48 = inttoptr i32 %.pre to double*
  %v4_23.pre = load double, double* %.pre48, align 4
  %.pre300 = fpext double %v4_23.pre to x86_fp80
  br label %dec_label_pc_23

dec_label_pc_1a:                                  ; preds = %dec_label_pc_0
  %v4_1a = add i32 %v3_14, 1
  store i32 %v4_1a, i32* %v2_14, align 4
  %v0_1d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_1d = load i32, i32* %esi.global-to-local, align 4
  %v2_1d = add i32 %v1_1d, -16
  %v3_1d = inttoptr i32 %v2_1d to double*
  %v4_1d = load double, double* %v3_1d, align 4
  %v5_1d = fpext double %v4_1d to x86_fp80
  store x86_fp80 %v5_1d, x86_fp80* %st7.global-to-local, align 4
  %v2_20 = load i32, i32* %edi.global-to-local, align 4
  %v3_20 = add i32 %v2_20, 72
  %v5_20 = inttoptr i32 %v3_20 to double*
  store double %v4_1d, double* %v5_20, align 4
  br label %dec_label_pc_23

dec_label_pc_23:                                  ; preds = %dec_label_pc_0.dec_label_pc_23_crit_edge, %dec_label_pc_1a
  %v5_23.pre-phi = phi x86_fp80 [ %.pre300, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_1d, %dec_label_pc_1a ]
  %v3_23.pre-phi = phi double* [ %.pre48, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_20, %dec_label_pc_1a ]
  %v2_39 = phi i32 [ %v3_b, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v1_1d, %dec_label_pc_1a ]
  %v0_23 = phi i3 [ %v0_23.pre, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v0_1d, %dec_label_pc_1a ]
  store x86_fp80 %v5_23.pre-phi, x86_fp80* %st7.global-to-local, align 4
  %v2_2a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v5_23.pre-phi)
  store x86_fp80 %v2_2a, x86_fp80* %st5.global-to-local, align 4
  %v4_2c = fadd x86_fp80 %v2_2a, 0xKBFFF8000000000000000
  store x86_fp80 %v4_2c, x86_fp80* %st6.global-to-local, align 4
  %v3_2e = add i32 %v2_39, -48
  %v4_2e = inttoptr i32 %v3_2e to double*
  %v5_2e = load double, double* %v4_2e, align 4
  %v6_2e = fpext double %v5_2e to x86_fp80
  %v7_2e = fmul x86_fp80 %v4_2c, %v6_2e
  store x86_fp80 %v7_2e, x86_fp80* %st6.global-to-local, align 4
  %v4_31 = fadd x86_fp80 %v7_2e, %v5_23.pre-phi
  store x86_fp80 %v4_31, x86_fp80* %st7.global-to-local, align 4
  %v4_33 = fptrunc x86_fp80 %v4_31 to double
  store double %v4_33, double* %v3_23.pre-phi, align 4
  %v2_36 = add i32 %v2_39, -40
  %v3_36 = inttoptr i32 %v2_36 to double*
  %v4_36 = load double, double* %v3_36, align 4
  %v5_36 = fpext double %v4_36 to x86_fp80
  store x86_fp80 %v5_36, x86_fp80* %st7.global-to-local, align 4
  %v3_39 = inttoptr i32 %v2_39 to double*
  %v4_39 = load double, double* %v3_39, align 4
  %v5_39 = fpext double %v4_39 to x86_fp80
  %v6_39 = fmul x86_fp80 %v5_36, %v5_39
  store x86_fp80 %v6_39, x86_fp80* %st7.global-to-local, align 4
  %v3_3b = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_3b = fpext double %v3_3b to x86_fp80
  %v4_3d = fadd x86_fp80 %v6_39, %v4_3b
  store x86_fp80 %v4_3d, x86_fp80* %st6.global-to-local, align 4
  %v3_3f = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_3f = fpext double %v3_3f to x86_fp80
  %v5_3f = add i3 %v0_23, -3
  %v4_41 = fadd x86_fp80 %v6_39, %v4_3f
  store x86_fp80 %v4_41, x86_fp80* %st5.global-to-local, align 4
  store i3 %v5_3f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_4b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_4b = call i16 @__asm_fnstsw(i32 %v0_4b)
  %v2_4b = sext i16 %v1_4b to i32
  %v3_4b = load i32, i32* @eax, align 8
  %v4_4b = and i32 %v3_4b, -65536
  %v4_4d1 = udiv i32 %v2_4b, 512
  %tmp283 = trunc i32 %v4_4d1 to i8
  %tmp306 = urem i8 %tmp283, -128
  %v5_4d = icmp eq i8 %tmp306, 0
  %v10_4d = zext i8 %tmp306 to i32
  %v12_4d = mul i32 %v10_4d, 256
  %v2_4b.masked = and i32 %v2_4b, -65281
  %v13_4d = or i32 %v4_4b, %v2_4b.masked
  %v14_4d = or i32 %v13_4d, %v12_4d
  store i32 %v14_4d, i32* @eax, align 8
  %v15_4d291 = and i32 %v2_4b, 256
  %v16_4d = icmp ne i32 %v15_4d291, 0
  %v2_4f = or i1 %v16_4d, %v5_4d
  %v1_51 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  br i1 %v2_4f, label %dec_label_pc_51, label %dec_label_pc_65

dec_label_pc_51:                                  ; preds = %dec_label_pc_23
  %v2_51 = fsub x86_fp80 0xK80000000000000000000, %v1_51
  %v3_53 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_53 = fsub x86_fp80 %v2_51, %v3_53
  store x86_fp80 %v4_53, x86_fp80* %st5.global-to-local, align 4
  %v0_55 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_55 = load i32, i32* @edx, align 8
  %v3_55 = fptrunc x86_fp80 %v4_53 to double
  %v4_55 = inttoptr i32 %v2_55 to double*
  store double %v3_55, double* %v4_55, align 4
  %v1_57 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v2_57 = fsub x86_fp80 0xK80000000000000000000, %v1_57
  %v3_59 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_59 = fsub x86_fp80 %v2_57, %v3_59
  store x86_fp80 %v4_59, x86_fp80* %st6.global-to-local, align 4
  %v2_5b = load i32, i32* %ebx.global-to-local, align 4
  %v3_5b = fptrunc x86_fp80 %v4_59 to double
  %v4_5b = inttoptr i32 %v2_5b to double*
  store double %v3_5b, double* %v4_5b, align 4
  %v4_5d = add i3 %v0_55, 3
  store i3 %v4_5d, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_95

dec_label_pc_65:                                  ; preds = %dec_label_pc_23
  %v3_65 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_65 = fsub x86_fp80 %v1_51, %v3_65
  %v4_67 = fsub x86_fp80 %v4_65, %v3_65
  %v3_69 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_6b = fsub x86_fp80 %v3_69, %v3_65
  %v4_6d = fsub x86_fp80 %v4_6b, %v3_65
  store x86_fp80 %v4_67, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v4_6d, x86_fp80* %st6.global-to-local, align 4
  %v0_79 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_79 = call i16 @__asm_fnstsw(i32 %v0_79)
  %v2_79 = sext i16 %v1_79 to i32
  %v3_79 = load i32, i32* @eax, align 8
  %v4_79 = and i32 %v3_79, -65536
  %tmp301 = udiv i32 %v2_79, 2
  %v12_7b = and i32 %tmp301, 32512
  %v2_79.masked = and i32 %v2_79, -65281
  %v13_7b = or i32 %v4_79, %v2_79.masked
  %v14_7b = or i32 %v13_7b, %v12_7b
  store i32 %v14_7b, i32* @eax, align 8
  %v15_7b292 = and i32 %v2_79, 256
  %v16_7b = icmp eq i32 %v15_7b292, 0
  br i1 %v16_7b, label %dec_label_pc_7f, label %dec_label_pc_8f

dec_label_pc_7f:                                  ; preds = %dec_label_pc_65
  %v1_7f = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_81 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_81 = fsub x86_fp80 %v3_81, %v1_7f
  store x86_fp80 %v4_81, x86_fp80* %st5.global-to-local, align 4
  %v0_83 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_83 = load i32, i32* @edx, align 8
  %v3_83 = fptrunc x86_fp80 %v4_81 to double
  %v4_83 = inttoptr i32 %v2_83 to double*
  store double %v3_83, double* %v4_83, align 4
  %v1_85 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_87 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_87 = fsub x86_fp80 %v3_87, %v1_85
  store x86_fp80 %v4_87, x86_fp80* %st6.global-to-local, align 4
  %v2_89 = load i32, i32* %ebx.global-to-local, align 4
  %v3_89 = fptrunc x86_fp80 %v4_87 to double
  %v4_89 = inttoptr i32 %v2_89 to double*
  store double %v3_89, double* %v4_89, align 4
  %v4_8b = add i3 %v0_83, 3
  store i3 %v4_8b, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_95

dec_label_pc_8f:                                  ; preds = %dec_label_pc_65
  %v0_8f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_93 = add i3 %v0_8f, 3
  store i3 %v4_93, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_95

dec_label_pc_95:                                  ; preds = %dec_label_pc_8f, %dec_label_pc_7f, %dec_label_pc_51
  %v0_95 = phi i3 [ %v4_93, %dec_label_pc_8f ], [ %v4_8b, %dec_label_pc_7f ], [ %v4_5d, %dec_label_pc_51 ]
  %v1_95 = load i32, i32* %esi.global-to-local, align 4
  %v2_95 = add i32 %v1_95, -40
  %v3_95 = inttoptr i32 %v2_95 to double*
  %v4_95 = load double, double* %v3_95, align 4
  %v5_95 = fpext double %v4_95 to x86_fp80
  store x86_fp80 %v5_95, x86_fp80* %st7.global-to-local, align 4
  %v3_98 = inttoptr i32 %v1_95 to double*
  %v4_98 = load double, double* %v3_98, align 4
  %v5_98 = fpext double %v4_98 to x86_fp80
  %v6_98 = fmul x86_fp80 %v5_95, %v5_98
  store x86_fp80 %v6_98, x86_fp80* %st7.global-to-local, align 4
  %v3_9a = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_9a = fpext double %v3_9a to x86_fp80
  %v4_9c = fadd x86_fp80 %v6_98, %v4_9a
  store x86_fp80 %v4_9c, x86_fp80* %st6.global-to-local, align 4
  %v3_9e = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_9e = fpext double %v3_9e to x86_fp80
  %v5_9e = add i3 %v0_95, -3
  %v4_a0 = fadd x86_fp80 %v6_98, %v4_9e
  store x86_fp80 %v4_a0, x86_fp80* %st5.global-to-local, align 4
  store i3 %v5_9e, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_aa = load i32, i32* %fpsw.global-to-local, align 4
  %v1_aa = call i16 @__asm_fnstsw(i32 %v0_aa)
  %v2_aa = sext i16 %v1_aa to i32
  %v3_aa = load i32, i32* @eax, align 8
  %v4_aa = and i32 %v3_aa, -65536
  %v4_ac3 = udiv i32 %v2_aa, 512
  %tmp285 = trunc i32 %v4_ac3 to i8
  %tmp307 = urem i8 %tmp285, -128
  %v5_ac = icmp eq i8 %tmp307, 0
  %v10_ac = zext i8 %tmp307 to i32
  %v12_ac = mul i32 %v10_ac, 256
  %v2_aa.masked = and i32 %v2_aa, -65281
  %v13_ac = or i32 %v4_aa, %v2_aa.masked
  %v14_ac = or i32 %v13_ac, %v12_ac
  store i32 %v14_ac, i32* @eax, align 8
  %v15_ac293 = and i32 %v2_aa, 256
  %v16_ac = icmp ne i32 %v15_ac293, 0
  %v2_ae = or i1 %v16_ac, %v5_ac
  %v1_b0 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_b2 = fsub x86_fp80 %v1_b0, %v1_b0
  br i1 %v2_ae, label %dec_label_pc_b0, label %dec_label_pc_c4

dec_label_pc_b0:                                  ; preds = %dec_label_pc_95
  store x86_fp80 %v4_b2, x86_fp80* %st7.global-to-local, align 4
  %v0_b4 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_b4 = load i32, i32* @ecx, align 8
  %v3_b4 = fptrunc x86_fp80 %v4_b2 to double
  %v4_b4 = inttoptr i32 %v2_b4 to double*
  store double %v3_b4, double* %v4_b4, align 4
  %v1_b6 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_b8 = fsub x86_fp80 %v1_b6, %v1_b6
  store x86_fp80 %v4_b8, x86_fp80* %st7.global-to-local, align 4
  %v2_ba = load i32, i32* %ebx.global-to-local, align 4
  %v3_ba = fptrunc x86_fp80 %v4_b8 to double
  %v4_ba = inttoptr i32 %v2_ba to double*
  store double %v3_ba, double* %v4_ba, align 4
  %v4_bc = add i3 %v0_b4, 3
  store i3 %v4_bc, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_f4

dec_label_pc_c4:                                  ; preds = %dec_label_pc_95
  %v4_c6 = fsub x86_fp80 %v4_b2, %v4_b2
  %v4_ca = fsub x86_fp80 %v4_c6, %v4_c6
  %v4_cc = fsub x86_fp80 %v4_ca, %v4_ca
  store x86_fp80 %v4_cc, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v0_d8 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_d8 = call i16 @__asm_fnstsw(i32 %v0_d8)
  %v2_d8 = sext i16 %v1_d8 to i32
  %v3_d8 = load i32, i32* @eax, align 8
  %v4_d8 = and i32 %v3_d8, -65536
  %tmp302 = udiv i32 %v2_d8, 2
  %v12_da = and i32 %tmp302, 32512
  %v2_d8.masked = and i32 %v2_d8, -65281
  %v13_da = or i32 %v4_d8, %v2_d8.masked
  %v14_da = or i32 %v13_da, %v12_da
  store i32 %v14_da, i32* @eax, align 8
  %v15_da294 = and i32 %v2_d8, 256
  %v16_da = icmp eq i32 %v15_da294, 0
  br i1 %v16_da, label %dec_label_pc_de, label %dec_label_pc_ee

dec_label_pc_de:                                  ; preds = %dec_label_pc_c4
  %v1_de = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_de = fsub x86_fp80 0xK80000000000000000000, %v1_de
  %v4_e0 = fsub x86_fp80 %v2_de, %v1_de
  store x86_fp80 %v4_e0, x86_fp80* %st7.global-to-local, align 4
  %v0_e2 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_e2 = load i32, i32* @ecx, align 8
  %v3_e2 = fptrunc x86_fp80 %v4_e0 to double
  %v4_e2 = inttoptr i32 %v2_e2 to double*
  store double %v3_e2, double* %v4_e2, align 4
  %v1_e4 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_e4 = fsub x86_fp80 0xK80000000000000000000, %v1_e4
  %v4_e6 = fsub x86_fp80 %v2_e4, %v1_e4
  store x86_fp80 %v4_e6, x86_fp80* %st7.global-to-local, align 4
  %v2_e8 = load i32, i32* %ebx.global-to-local, align 4
  %v3_e8 = fptrunc x86_fp80 %v4_e6 to double
  %v4_e8 = inttoptr i32 %v2_e8 to double*
  store double %v3_e8, double* %v4_e8, align 4
  %v4_ea = add i3 %v0_e2, 3
  store i3 %v4_ea, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_f4

dec_label_pc_ee:                                  ; preds = %dec_label_pc_c4
  %v0_ee = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_f2 = add i3 %v0_ee, 3
  store i3 %v4_f2, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_f4

dec_label_pc_f4:                                  ; preds = %dec_label_pc_ee, %dec_label_pc_de, %dec_label_pc_b0
  %v0_f4 = phi i3 [ %v4_f2, %dec_label_pc_ee ], [ %v4_ea, %dec_label_pc_de ], [ %v4_bc, %dec_label_pc_b0 ]
  %v1_f4 = load i32, i32* %esi.global-to-local, align 4
  %v2_f4 = add i32 %v1_f4, -40
  %v3_f4 = inttoptr i32 %v2_f4 to double*
  %v4_f4 = load double, double* %v3_f4, align 4
  %v5_f4 = fpext double %v4_f4 to x86_fp80
  store x86_fp80 %v5_f4, x86_fp80* %st7.global-to-local, align 4
  %v3_f7 = inttoptr i32 %v1_f4 to double*
  %v4_f7 = load double, double* %v3_f7, align 4
  %v5_f7 = fpext double %v4_f7 to x86_fp80
  %v6_f7 = fmul x86_fp80 %v5_f4, %v5_f7
  store x86_fp80 %v6_f7, x86_fp80* %st7.global-to-local, align 4
  %v3_f9 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_f9 = fpext double %v3_f9 to x86_fp80
  %v4_fb = fadd x86_fp80 %v6_f7, %v4_f9
  store x86_fp80 %v4_fb, x86_fp80* %st6.global-to-local, align 4
  %v3_fd = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_fd = fpext double %v3_fd to x86_fp80
  %v5_fd = add i3 %v0_f4, -3
  %v4_ff = fadd x86_fp80 %v6_f7, %v4_fd
  store x86_fp80 %v4_ff, x86_fp80* %st5.global-to-local, align 4
  store i3 %v5_fd, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_109 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_109 = call i16 @__asm_fnstsw(i32 %v0_109)
  %v2_109 = sext i16 %v1_109 to i32
  %v3_109 = load i32, i32* @eax, align 8
  %v4_109 = and i32 %v3_109, -65536
  %v4_10b5 = udiv i32 %v2_109, 512
  %tmp287 = trunc i32 %v4_10b5 to i8
  %tmp308 = urem i8 %tmp287, -128
  %v5_10b = icmp eq i8 %tmp308, 0
  %v10_10b = zext i8 %tmp308 to i32
  %v12_10b = mul i32 %v10_10b, 256
  %v2_109.masked = and i32 %v2_109, -65281
  %v13_10b = or i32 %v4_109, %v2_109.masked
  %v14_10b = or i32 %v13_10b, %v12_10b
  store i32 %v14_10b, i32* @eax, align 8
  %v15_10b295 = and i32 %v2_109, 256
  %v16_10b = icmp ne i32 %v15_10b295, 0
  %v2_10d = or i1 %v16_10b, %v5_10b
  %v1_10f = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  br i1 %v2_10d, label %dec_label_pc_10f, label %dec_label_pc_123

dec_label_pc_10f:                                 ; preds = %dec_label_pc_f4
  %v2_10f = fsub x86_fp80 0xK80000000000000000000, %v1_10f
  %v3_111 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_111 = fsub x86_fp80 %v2_10f, %v3_111
  store x86_fp80 %v4_111, x86_fp80* %st5.global-to-local, align 4
  %v0_113 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_113 = load i32, i32* @ecx, align 8
  %v3_113 = fptrunc x86_fp80 %v4_111 to double
  %v4_113 = inttoptr i32 %v2_113 to double*
  store double %v3_113, double* %v4_113, align 4
  %v1_115 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v2_115 = fsub x86_fp80 0xK80000000000000000000, %v1_115
  %v3_117 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_117 = fsub x86_fp80 %v2_115, %v3_117
  store x86_fp80 %v4_117, x86_fp80* %st6.global-to-local, align 4
  %v2_119 = load i32, i32* @edx, align 8
  %v3_119 = fptrunc x86_fp80 %v4_117 to double
  %v4_119 = inttoptr i32 %v2_119 to double*
  store double %v3_119, double* %v4_119, align 4
  %v4_11b = add i3 %v0_113, 3
  store i3 %v4_11b, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_153

dec_label_pc_123:                                 ; preds = %dec_label_pc_f4
  %v3_123 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_123 = fsub x86_fp80 %v1_10f, %v3_123
  %v4_125 = fsub x86_fp80 %v4_123, %v3_123
  %v3_127 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_129 = fsub x86_fp80 %v3_127, %v3_123
  %v4_12b = fsub x86_fp80 %v4_129, %v3_123
  store x86_fp80 %v4_125, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v4_12b, x86_fp80* %st6.global-to-local, align 4
  %v0_137 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_137 = call i16 @__asm_fnstsw(i32 %v0_137)
  %v2_137 = sext i16 %v1_137 to i32
  %v3_137 = load i32, i32* @eax, align 8
  %v4_137 = and i32 %v3_137, -65536
  %tmp303 = udiv i32 %v2_137, 2
  %v12_139 = and i32 %tmp303, 32512
  %v2_137.masked = and i32 %v2_137, -65281
  %v13_139 = or i32 %v4_137, %v2_137.masked
  %v14_139 = or i32 %v13_139, %v12_139
  store i32 %v14_139, i32* @eax, align 8
  %v15_139296 = and i32 %v2_137, 256
  %v16_139 = icmp eq i32 %v15_139296, 0
  br i1 %v16_139, label %dec_label_pc_13d, label %dec_label_pc_14d

dec_label_pc_13d:                                 ; preds = %dec_label_pc_123
  %v1_13d = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_13f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_13f = fsub x86_fp80 %v3_13f, %v1_13d
  store x86_fp80 %v4_13f, x86_fp80* %st5.global-to-local, align 4
  %v0_141 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_141 = load i32, i32* @ecx, align 8
  %v3_141 = fptrunc x86_fp80 %v4_13f to double
  %v4_141 = inttoptr i32 %v2_141 to double*
  store double %v3_141, double* %v4_141, align 4
  %v1_143 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_145 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_145 = fsub x86_fp80 %v3_145, %v1_143
  store x86_fp80 %v4_145, x86_fp80* %st6.global-to-local, align 4
  %v2_147 = load i32, i32* @edx, align 8
  %v3_147 = fptrunc x86_fp80 %v4_145 to double
  %v4_147 = inttoptr i32 %v2_147 to double*
  store double %v3_147, double* %v4_147, align 4
  %v4_149 = add i3 %v0_141, 3
  store i3 %v4_149, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_153

dec_label_pc_14d:                                 ; preds = %dec_label_pc_123
  %v0_14d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_151 = add i3 %v0_14d, 3
  store i3 %v4_151, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_153

dec_label_pc_153:                                 ; preds = %dec_label_pc_14d, %dec_label_pc_13d, %dec_label_pc_10f
  %v0_153 = phi i3 [ %v4_151, %dec_label_pc_14d ], [ %v4_149, %dec_label_pc_13d ], [ %v4_11b, %dec_label_pc_10f ]
  %v3_153 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_153 = fpext double %v3_153 to x86_fp80
  store x86_fp80 %v4_153, x86_fp80* %st7.global-to-local, align 4
  %v3_155 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_155 = fpext double %v3_155 to x86_fp80
  store x86_fp80 %v4_155, x86_fp80* %st6.global-to-local, align 4
  %v3_157 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_157 = fpext double %v3_157 to x86_fp80
  store x86_fp80 %v4_157, x86_fp80* %st5.global-to-local, align 4
  %v2_159 = xor i3 %v0_153, -4
  store i3 %v2_159, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_16f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_16f = call i16 @__asm_fnstsw(i32 %v0_16f)
  %v2_16f = sext i16 %v1_16f to i32
  %v3_16f = load i32, i32* @eax, align 8
  %v4_16f = and i32 %v3_16f, -65536
  %tmp304 = udiv i32 %v2_16f, 2
  %v12_171 = and i32 %tmp304, 32512
  %v2_16f.masked = and i32 %v2_16f, -65281
  %v13_171 = or i32 %v4_16f, %v2_16f.masked
  %v14_171 = or i32 %v13_171, %v12_171
  store i32 %v14_171, i32* @eax, align 8
  %v15_171297 = and i32 %v2_16f, 256
  %v16_171 = icmp ne i32 %v15_171297, 0
  %v1_173 = icmp eq i1 %v16_171, false
  %v0_17c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_173, label %dec_label_pc_17c, label %dec_label_pc_175

dec_label_pc_175:                                 ; preds = %dec_label_pc_153
  %v1_177 = load i32, i32* %esi.global-to-local, align 4
  %v2_177 = add i32 %v1_177, -24
  %v3_177 = inttoptr i32 %v2_177 to double*
  %v4_177 = load double, double* %v3_177, align 4
  %v5_177 = fpext double %v4_177 to x86_fp80
  store x86_fp80 %v5_177, x86_fp80* %st7.global-to-local, align 4
  %v2_1a0.pre = load i32, i32* %edi.global-to-local, align 4
  br label %dec_label_pc_192

dec_label_pc_17c:                                 ; preds = %dec_label_pc_153
  %v1_17c = add i3 %v0_17c, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v1_17c, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_180 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_180 = call i16 @__asm_fnstsw(i32 %v0_180)
  %v2_180 = sext i16 %v1_180 to i32
  %v3_180 = load i32, i32* @eax, align 8
  %v4_180 = and i32 %v3_180, -65536
  %tmp305 = udiv i32 %v2_180, 2
  %v12_182 = and i32 %tmp305, 32512
  %v2_180.masked = and i32 %v2_180, -65281
  %v13_182 = or i32 %v4_180, %v2_180.masked
  %v14_182 = or i32 %v13_182, %v12_182
  store i32 %v14_182, i32* @eax, align 8
  %v15_182298 = and i32 %v2_180, 256
  %v16_182 = icmp eq i32 %v15_182298, 0
  %v0_18d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_186 = add i3 %v0_18d, 1
  br i1 %v16_182, label %dec_label_pc_186, label %dec_label_pc_18d

dec_label_pc_186:                                 ; preds = %dec_label_pc_17c
  %v2_18d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_186, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_188 = load i32, i32* %edi.global-to-local, align 4
  %v3_188 = add i32 %v2_188, 72
  %v4_188 = inttoptr i32 %v3_188 to double*
  %v5_188 = load double, double* %v4_188, align 4
  %v6_188 = fpext double %v5_188 to x86_fp80
  %v7_188 = fdiv x86_fp80 %v6_188, %v2_18d
  store x86_fp80 %v7_188, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_192

dec_label_pc_18d:                                 ; preds = %dec_label_pc_17c
  %v1_18f = load i32, i32* %edi.global-to-local, align 4
  %v2_18f = add i32 %v1_18f, 72
  %v3_18f = inttoptr i32 %v2_18f to double*
  %v4_18f = load double, double* %v3_18f, align 4
  %v5_18f = fpext double %v4_18f to x86_fp80
  store i3 %v4_186, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_18f, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_192

dec_label_pc_192:                                 ; preds = %dec_label_pc_18d, %dec_label_pc_186, %dec_label_pc_175
  %v2_1aa = phi i32 [ %v1_18f, %dec_label_pc_18d ], [ %v2_188, %dec_label_pc_186 ], [ %v2_1a0.pre, %dec_label_pc_175 ]
  %v3_195 = phi x86_fp80 [ %v5_18f, %dec_label_pc_18d ], [ %v7_188, %dec_label_pc_186 ], [ %v5_177, %dec_label_pc_175 ]
  %v0_192 = phi i3 [ %v4_186, %dec_label_pc_18d ], [ %v4_186, %dec_label_pc_186 ], [ %v0_17c, %dec_label_pc_175 ]
  %v1_192 = load i32, i32* @ecx, align 8
  %v2_192 = add i32 %v1_192, 8
  %v3_192 = inttoptr i32 %v2_192 to double*
  %v4_192 = load double, double* %v3_192, align 4
  %v5_192 = fpext double %v4_192 to x86_fp80
  %v4_195 = fmul x86_fp80 %v3_195, %v5_192
  store x86_fp80 %v4_195, x86_fp80* %st6.global-to-local, align 4
  %v4_197 = fptrunc x86_fp80 %v4_195 to double
  store double %v4_197, double* %v3_192, align 4
  %v2_19a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_19a = fmul x86_fp80 %v2_19a, %v2_19a
  %v4_19c = fmul x86_fp80 %v4_19a, %v4_19a
  %v4_19e = fmul x86_fp80 %v4_19c, %v4_19c
  store x86_fp80 %v4_19e, x86_fp80* %st7.global-to-local, align 4
  %v3_1a0 = add i32 %v2_1aa, -88
  %v4_1a0 = inttoptr i32 %v3_1a0 to double*
  %v5_1a0 = load double, double* %v4_1a0, align 4
  %v6_1a0 = fpext double %v5_1a0 to x86_fp80
  %v7_1a0 = fadd x86_fp80 %v4_19e, %v6_1a0
  store x86_fp80 %v7_1a0, x86_fp80* %st7.global-to-local, align 4
  %v2_1a3 = load i32, i32* @ecx, align 8
  %v3_1a3 = fptrunc x86_fp80 %v7_1a0 to double
  %v4_1a3 = inttoptr i32 %v2_1a3 to double*
  store double %v3_1a3, double* %v4_1a3, align 4
  %v1_1a5 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_1a5 = add i32 %v2_1aa, -96
  %v4_1a5 = inttoptr i32 %v3_1a5 to double*
  %v5_1a5 = load double, double* %v4_1a5, align 4
  %v6_1a5 = fpext double %v5_1a5 to x86_fp80
  %v7_1a5 = fadd x86_fp80 %v1_1a5, %v6_1a5
  store x86_fp80 %v7_1a5, x86_fp80* %st7.global-to-local, align 4
  %v2_1a8 = load i32, i32* @edx, align 8
  %v3_1a8 = fptrunc x86_fp80 %v7_1a5 to double
  %v4_1a8 = inttoptr i32 %v2_1a8 to double*
  store double %v3_1a8, double* %v4_1a8, align 4
  %v1_1aa = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_1aa = add i32 %v2_1aa, -104
  %v4_1aa = inttoptr i32 %v3_1aa to double*
  %v5_1aa = load double, double* %v4_1aa, align 4
  %v6_1aa = fpext double %v5_1aa to x86_fp80
  %v7_1aa = fadd x86_fp80 %v1_1aa, %v6_1aa
  store x86_fp80 %v7_1aa, x86_fp80* %st7.global-to-local, align 4
  %v2_1ad = load i32, i32* %ebx.global-to-local, align 4
  %v3_1ad = fptrunc x86_fp80 %v7_1aa to double
  %v4_1ad = inttoptr i32 %v2_1ad to double*
  store double %v3_1ad, double* %v4_1ad, align 4
  %v5_1ad = xor i3 %v0_192, -4
  store i3 %v5_1ad, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_1ad, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v2_1ad
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
