source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %ecx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %esp.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st4.global-to-local = alloca x86_fp80, align 4
  store i32 0, i32* %esp.global-to-local, align 4
  %stack_var_-52 = alloca i32, align 4
  %v0_0 = load i32, i32* %ecx.global-to-local, align 4
  %v15_1 = ptrtoint i32* %stack_var_-52 to i32
  %v0_4 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_4 = load i32, i32* %esi.global-to-local, align 4
  %v2_4 = add i32 %v1_4, -104
  %v3_4 = inttoptr i32 %v2_4 to double*
  %v4_4 = load double, double* %v3_4, align 4
  %v5_4 = fpext double %v4_4 to x86_fp80
  %v2_7 = load i32, i32* @edi, align 8
  %v3_7 = add i32 %v2_7, -28
  %v4_7 = inttoptr i32 %v3_7 to float*
  %v5_7 = load float, float* %v4_7, align 4
  %v6_7 = fpext float %v5_7 to x86_fp80
  %v7_7 = fsub x86_fp80 %v5_4, %v6_7
  %v2_a = add i32 %v1_4, -112
  %v3_a = inttoptr i32 %v2_a to double*
  %v4_a = load double, double* %v3_a, align 4
  %v5_a = fpext double %v4_a to x86_fp80
  %v6_a = add i3 %v0_4, -2
  %v3_d = add i32 %v2_7, -24
  %v4_d = inttoptr i32 %v3_d to float*
  %v5_d = load float, float* %v4_d, align 4
  %v6_d = fpext float %v5_d to x86_fp80
  %v7_d = fsub x86_fp80 %v5_a, %v6_d
  %v2_10 = add i32 %v1_4, -120
  %v3_10 = inttoptr i32 %v2_10 to double*
  %v4_10 = load double, double* %v3_10, align 4
  %v5_10 = fpext double %v4_10 to x86_fp80
  %v3_13 = add i32 %v2_7, -20
  %v4_13 = inttoptr i32 %v3_13 to float*
  %v5_13 = load float, float* %v4_13, align 4
  %v6_13 = fpext float %v5_13 to x86_fp80
  %v7_13 = fsub x86_fp80 %v5_10, %v6_13
  store x86_fp80 %v7_13, x86_fp80* %st4.global-to-local, align 4
  %v3_18 = add i32 %v2_7, -68
  %v4_18 = inttoptr i32 %v3_18 to float*
  %v5_18 = load float, float* %v4_18, align 4
  %v6_18 = fpext float %v5_18 to x86_fp80
  %v7_18 = fmul x86_fp80 %v7_13, %v6_18
  store x86_fp80 %v7_18, x86_fp80* %st4.global-to-local, align 4
  %v3_1d = add i32 %v2_7, -72
  %v4_1d = inttoptr i32 %v3_1d to float*
  %v5_1d = load float, float* %v4_1d, align 4
  %v6_1d = fpext float %v5_1d to x86_fp80
  %v7_1d = fmul x86_fp80 %v7_d, %v6_1d
  %v4_20 = fadd x86_fp80 %v7_18, %v7_1d
  store x86_fp80 %v4_20, x86_fp80* %st4.global-to-local, align 4
  %v3_24 = add i32 %v2_7, -76
  %v4_24 = inttoptr i32 %v3_24 to float*
  %v5_24 = load float, float* %v4_24, align 4
  %v6_24 = fpext float %v5_24 to x86_fp80
  %v7_24 = fmul x86_fp80 %v7_7, %v6_24
  %v4_27 = fadd x86_fp80 %v4_20, %v7_24
  store x86_fp80 %v4_27, x86_fp80* %st4.global-to-local, align 4
  %v3_2b = add i32 %v2_7, -44
  %v4_2b = inttoptr i32 %v3_2b to float*
  %v5_2b = load float, float* %v4_2b, align 4
  %v6_2b = fpext float %v5_2b to x86_fp80
  %v7_2b = fmul x86_fp80 %v7_13, %v6_2b
  %v3_30 = add i32 %v2_7, -48
  %v4_30 = inttoptr i32 %v3_30 to float*
  %v5_30 = load float, float* %v4_30, align 4
  %v6_30 = fpext float %v5_30 to x86_fp80
  %v7_30 = fmul x86_fp80 %v7_d, %v6_30
  %v4_33 = fadd x86_fp80 %v7_2b, %v7_30
  %v3_37 = add i32 %v2_7, -52
  %v4_37 = inttoptr i32 %v3_37 to float*
  %v5_37 = load float, float* %v4_37, align 4
  %v6_37 = fpext float %v5_37 to x86_fp80
  %v7_37 = fmul x86_fp80 %v7_7, %v6_37
  %v4_3a = fadd x86_fp80 %v4_33, %v7_37
  %v3_3e = add i32 %v2_7, -56
  %v4_3e = inttoptr i32 %v3_3e to float*
  %v5_3e = load float, float* %v4_3e, align 4
  %v6_3e = fpext float %v5_3e to x86_fp80
  %v7_3e = fmul x86_fp80 %v7_13, %v6_3e
  %v3_43 = add i32 %v2_7, -60
  %v4_43 = inttoptr i32 %v3_43 to float*
  %v5_43 = load float, float* %v4_43, align 4
  %v6_43 = fpext float %v5_43 to x86_fp80
  %v7_43 = fmul x86_fp80 %v7_d, %v6_43
  %v4_46 = fadd x86_fp80 %v7_3e, %v7_43
  store x86_fp80 %v7_7, x86_fp80* %st4.global-to-local, align 4
  %v3_4a = add i32 %v2_7, -64
  %v4_4a = inttoptr i32 %v3_4a to float*
  %v5_4a = load float, float* %v4_4a, align 4
  %v6_4a = fpext float %v5_4a to x86_fp80
  %v7_4a = fmul x86_fp80 %v7_7, %v6_4a
  store x86_fp80 %v7_4a, x86_fp80* %st4.global-to-local, align 4
  %v4_4d = fadd x86_fp80 %v4_46, %v7_4a
  %v3_5f = fmul x86_fp80 %v4_3a, %v4_3a
  %v3_65 = fmul x86_fp80 %v4_4d, %v4_4d
  %v4_67 = fadd x86_fp80 %v3_5f, %v3_65
  %v2_69 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_67)
  %v3_6b = add i32 %v2_7, -32
  %v4_6b = inttoptr i32 %v3_6b to float*
  %v5_6b = load float, float* %v4_6b, align 4
  %v6_6b = fpext float %v5_6b to x86_fp80
  %v7_6b = fsub x86_fp80 %v2_69, %v6_6b
  %v3_7c = add i32 %v2_7, -36
  %v4_7c = inttoptr i32 %v3_7c to float*
  %v5_7c = load float, float* %v4_7c, align 4
  %v2_84 = add i32 %v2_7, -40
  %v3_84 = inttoptr i32 %v2_84 to float*
  %v4_84 = load float, float* %v3_84, align 4
  %tmp244 = call float @llvm.fabs.f32(float %v4_84)
  %v2_87 = fpext float %tmp244 to x86_fp80
  store x86_fp80 %v2_87, x86_fp80* %st4.global-to-local, align 4
  %v3_89 = add i32 %v2_7, 8
  %v4_89 = inttoptr i32 %v3_89 to double*
  %v5_89 = load double, double* %v4_89, align 4
  %v6_89 = fpext double %v5_89 to x86_fp80
  %v7_89 = fadd x86_fp80 %v2_87, %v6_89
  store x86_fp80 %v7_89, x86_fp80* %st4.global-to-local, align 4
  %v5_8c = load double, double* %v4_89, align 4
  %v6_8c = fpext double %v5_8c to x86_fp80
  %v7_8c = fadd x86_fp80 %v7_89, %v6_8c
  store x86_fp80 %v7_8c, x86_fp80* %st4.global-to-local, align 4
  store i3 %v6_a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_91 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_91 = call i16 @__asm_fnstsw(i32 %v0_91)
  %v2_91 = sext i16 %v1_91 to i32
  %v3_91 = load i32, i32* %eax.global-to-local, align 4
  %v4_91 = and i32 %v3_91, -65536
  %tmp245 = udiv i32 %v2_91, 2
  %v12_93 = and i32 %tmp245, 32512
  %v2_91.masked = and i32 %v2_91, -65281
  %v13_93 = or i32 %v4_91, %v2_91.masked
  %v14_93 = or i32 %v13_93, %v12_93
  store i32 %v14_93, i32* %eax.global-to-local, align 4
  %v15_935 = and i32 %v2_91, 256
  %v16_93 = icmp ne i32 %v15_935, 0
  %v1_95 = icmp eq i1 %v16_93, false
  br i1 %v1_95, label %dec_label_pc_a4, label %dec_label_pc_97

dec_label_pc_97:                                  ; preds = %dec_label_pc_0
  %v3_76 = fmul x86_fp80 %v4_27, %v4_27
  %v3_70 = fmul x86_fp80 %v7_6b, %v7_6b
  %v4_78 = fadd x86_fp80 %v3_76, %v3_70
  %v2_7a = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_78)
  %v6_7c = fpext float %v5_7c to x86_fp80
  %v7_7c = fsub x86_fp80 %v2_7a, %v6_7c
  %v0_99 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_99 = load i32, i32* %esi.global-to-local, align 4
  %v3_99 = add i32 %v2_99, -32
  %tmp248 = fptrunc x86_fp80 %v7_7c to double
  %v4_99 = call double @llvm.fabs.f64(double %tmp248)
  %v5_99 = inttoptr i32 %v3_99 to double*
  store double %v4_99, double* %v5_99, align 4
  %v4_9e = add i3 %v0_99, 3
  store i3 %v4_9e, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_105

dec_label_pc_a4:                                  ; preds = %dec_label_pc_0
  %v0_a4 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_a6 = add i3 %v0_a4, -2
  store i3 %v6_a6, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_27, x86_fp80* %st4.global-to-local, align 4
  %v0_aa = call i32 @__asm_fpatan()
  store i32 %v0_aa, i32* %eax.global-to-local, align 4
  %v4_ac = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_ac = fpext double %v4_ac to x86_fp80
  %v6_ac = fmul x86_fp80 %v4_27, %v5_ac
  store x86_fp80 %v6_ac, x86_fp80* %st4.global-to-local, align 4
  %v0_ae = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_b2 = add i3 %v0_ae, -2
  store i3 %v6_b2, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_b6 = call i32 @__asm_fpatan()
  %v4_b8 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_b8 = fpext double %v4_b8 to x86_fp80
  %v6_b8 = fmul x86_fp80 %v4_4d, %v5_b8
  %v4_bb = fptrunc x86_fp80 %v6_b8 to float
  %v5_bb = bitcast float %v4_bb to i32
  store i32 %v5_bb, i32* %stack_var_-52, align 4
  %v1_c2 = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  store i32 %v15_1, i32* %eax.global-to-local, align 4
  store i32 %v15_1, i32* %ecx.global-to-local, align 4
  %tmp246 = bitcast double %v4_b8 to i64
  %tmp247 = trunc i64 %tmp246 to i32
  %v1_d5 = add i32 %tmp247, -16
  %v2_d5 = inttoptr i32 %v1_d5 to i32*
  %v3_d5 = load i32, i32* %v2_d5, align 4
  %v1_d8 = urem i32 %v3_d5, 4
  store i32 %v1_d8, i32* %ecx.global-to-local, align 4
  %v1_db = load i32, i32* %esp.global-to-local, align 4
  %v3_db = mul i32 %v1_d8, 8
  %v4_db = add i32 %v1_db, %v3_db
  %v5_db = inttoptr i32 %v4_db to double*
  %v6_db = load double, double* %v5_db, align 4
  %v7_db = fpext double %v6_db to x86_fp80
  %v8_db = add i3 %v0_ae, 1
  %v3_de = add i32 %tmp247, -8
  %v4_de = inttoptr i32 %v3_de to double*
  %v5_de = load double, double* %v4_de, align 4
  %v6_de = fpext double %v5_de to x86_fp80
  %v7_de = fsub x86_fp80 %v7_db, %v6_de
  %v3_e1 = add i32 %tmp247, -40
  %v4_e1 = inttoptr i32 %v3_e1 to float*
  %v5_e1 = load float, float* %v4_e1, align 4
  %v6_e1 = fpext float %v5_e1 to x86_fp80
  %v7_e1 = fmul x86_fp80 %v7_de, %v6_e1
  %v7_e4 = fsub x86_fp80 %v1_c2, %v7_e1
  %v2_e8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_e4)
  %v3_ea = add i32 %tmp247, 8
  %v4_ea = inttoptr i32 %v3_ea to double*
  %v5_ea = load double, double* %v4_ea, align 4
  %v6_ea = fpext double %v5_ea to x86_fp80
  %v7_ea = fsub x86_fp80 %v2_e8, %v6_ea
  %v2_ed = load i32, i32* %esi.global-to-local, align 4
  %v3_ed = add i32 %v2_ed, -32
  %v4_ed = fptrunc x86_fp80 %v7_ea to double
  %v5_ed = inttoptr i32 %v3_ed to double*
  store double %v4_ed, double* %v5_ed, align 4
  %v0_f0 = load i32, i32* @edi, align 8
  %v1_f0 = add i32 %v0_f0, -80
  %v2_f0 = inttoptr i32 %v1_f0 to i32*
  %v3_f0 = load i32, i32* %v2_f0, align 4
  %v1_f3 = urem i32 %v3_f0, 4
  store i32 %v1_f3, i32* %ecx.global-to-local, align 4
  %v3_f6 = mul i32 %v1_f3, 8
  %v4_f6 = add i32 %v3_f6, %v1_db
  %v5_f6 = inttoptr i32 %v4_f6 to double*
  %v6_f6 = load double, double* %v5_f6, align 4
  %v7_f6 = fpext double %v6_f6 to x86_fp80
  store i3 %v8_db, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_f9 = add i32 %v0_f0, -84
  %v4_f9 = inttoptr i32 %v3_f9 to float*
  %v5_f9 = load float, float* %v4_f9, align 4
  %v6_f9 = fpext float %v5_f9 to x86_fp80
  %v7_f9 = fadd x86_fp80 %v7_f6, %v6_f9
  %v3_fc = add i32 %v0_f0, -88
  %v4_fc = inttoptr i32 %v3_fc to float*
  %v5_fc = load float, float* %v4_fc, align 4
  %v6_fc = fpext float %v5_fc to x86_fp80
  %v7_fc = fmul x86_fp80 %v7_f9, %v6_fc
  %v3_ff = add i32 %v2_ed, 128
  %v4_ff = fptrunc x86_fp80 %v7_fc to double
  %v5_ff = inttoptr i32 %v3_ff to double*
  store double %v4_ff, double* %v5_ff, align 4
  br label %dec_label_pc_105

dec_label_pc_105:                                 ; preds = %dec_label_pc_a4, %dec_label_pc_97
  %v0_109 = phi i32 [ %v15_1, %dec_label_pc_a4 ], [ %v14_93, %dec_label_pc_97 ]
  %storemerge.in = phi i3 [ %v6_b2, %dec_label_pc_a4 ], [ %v0_99, %dec_label_pc_97 ]
  %storemerge = xor i3 %storemerge.in, -4
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_0, i32* %ecx.global-to-local, align 4
  ret i32 %v0_109
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare i32 @__asm_fpatan() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare float @llvm.fabs.f32(float) #0

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
