source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %ebx.global-to-local, align 4
  %v0_4 = load i32, i32* %esi.global-to-local, align 4
  %v0_5 = load i32, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  store i32 2147483647, i32* @eax, align 8
  %v0_12 = load i32, i32* @ecx, align 8
  %v1_12 = add i32 %v0_12, 4
  %v2_12 = inttoptr i32 %v1_12 to i32*
  %v3_12 = load i32, i32* %v2_12, align 4
  %tmp277 = urem i32 %v3_12, -2147483648
  store i32 %tmp277, i32* %v2_12, align 4
  %v0_15 = load i32, i32* @edx, align 8
  %v1_15 = add i32 %v0_15, 4
  %v2_15 = inttoptr i32 %v1_15 to i32*
  %v3_15 = load i32, i32* %v2_15, align 4
  %v4_15 = load i32, i32* @eax, align 8
  %v5_15 = and i32 %v4_15, %v3_15
  store i32 %v5_15, i32* %v2_15, align 4
  %v0_18 = load i32, i32* %ebx.global-to-local, align 4
  %v1_18 = add i32 %v0_18, 4
  %v2_18 = inttoptr i32 %v1_18 to i32*
  %v3_18 = load i32, i32* %v2_18, align 4
  %v4_18 = load i32, i32* @eax, align 8
  %v5_18 = and i32 %v4_18, %v3_18
  store i32 %v5_18, i32* %v2_18, align 4
  %v0_1b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_1b = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_1b = fpext double %v3_1b to x86_fp80
  store x86_fp80 %v4_1b, x86_fp80* %st7.global-to-local, align 4
  %v3_1d = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_1d = fpext double %v3_1d to x86_fp80
  store x86_fp80 %v4_1d, x86_fp80* %st6.global-to-local, align 4
  %v3_1f = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_1f = fpext double %v3_1f to x86_fp80
  store x86_fp80 %v4_1f, x86_fp80* %st5.global-to-local, align 4
  %v2_23 = load i32, i32* %esi.global-to-local, align 4
  %v3_23 = add i32 %v2_23, -68
  %v4_23 = inttoptr i32 %v3_23 to float*
  %v5_23 = load float, float* %v4_23, align 4
  %v6_23 = fpext float %v5_23 to x86_fp80
  %v7_23 = fmul x86_fp80 %v4_1f, %v6_23
  %v3_28 = add i32 %v2_23, -72
  %v4_28 = inttoptr i32 %v3_28 to float*
  %v5_28 = load float, float* %v4_28, align 4
  %v6_28 = fpext float %v5_28 to x86_fp80
  %v7_28 = fmul x86_fp80 %v4_1d, %v6_28
  %v4_2b = fadd x86_fp80 %v7_23, %v7_28
  %v3_2f = add i32 %v2_23, -76
  %v4_2f = inttoptr i32 %v3_2f to float*
  %v5_2f = load float, float* %v4_2f, align 4
  %v6_2f = fpext float %v5_2f to x86_fp80
  %v7_2f = fmul x86_fp80 %v4_1b, %v6_2f
  %v4_32 = fadd x86_fp80 %v7_2f, %v4_2b
  %v3_36 = add i32 %v2_23, -44
  %v4_36 = inttoptr i32 %v3_36 to float*
  %v5_36 = load float, float* %v4_36, align 4
  %v6_36 = fpext float %v5_36 to x86_fp80
  %v7_36 = fmul x86_fp80 %v4_1f, %v6_36
  %v3_3b = add i32 %v2_23, -48
  %v4_3b = inttoptr i32 %v3_3b to float*
  %v5_3b = load float, float* %v4_3b, align 4
  %v6_3b = fpext float %v5_3b to x86_fp80
  %v7_3b = fmul x86_fp80 %v4_1d, %v6_3b
  %v4_3e = fadd x86_fp80 %v7_36, %v7_3b
  %v3_42 = add i32 %v2_23, -52
  %v4_42 = inttoptr i32 %v3_42 to float*
  %v5_42 = load float, float* %v4_42, align 4
  %v6_42 = fpext float %v5_42 to x86_fp80
  %v7_42 = fmul x86_fp80 %v4_1b, %v6_42
  %v4_45 = fadd x86_fp80 %v4_3e, %v7_42
  store x86_fp80 %v4_45, x86_fp80* %st5.global-to-local, align 4
  %v3_49 = add i32 %v2_23, -56
  %v4_49 = inttoptr i32 %v3_49 to float*
  %v5_49 = load float, float* %v4_49, align 4
  %v6_49 = fpext float %v5_49 to x86_fp80
  %v7_49 = fmul x86_fp80 %v4_1f, %v6_49
  store x86_fp80 %v7_49, x86_fp80* %st6.global-to-local, align 4
  %v3_4e = add i32 %v2_23, -60
  %v4_4e = inttoptr i32 %v3_4e to float*
  %v5_4e = load float, float* %v4_4e, align 4
  %v6_4e = fpext float %v5_4e to x86_fp80
  %v7_4e = fmul x86_fp80 %v4_1d, %v6_4e
  %v4_51 = fadd x86_fp80 %v7_49, %v7_4e
  store x86_fp80 %v4_51, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_32, x86_fp80* %st7.global-to-local, align 4
  %v3_55 = add i32 %v2_23, -64
  %v4_55 = inttoptr i32 %v3_55 to float*
  %v5_55 = load float, float* %v4_55, align 4
  %v6_55 = fpext float %v5_55 to x86_fp80
  %v7_55 = fmul x86_fp80 %v4_1b, %v6_55
  %v4_58 = fadd x86_fp80 %v4_51, %v7_55
  store x86_fp80 %v4_58, x86_fp80* %st6.global-to-local, align 4
  %v7_58 = add i3 %v0_1b, -3
  store i3 %v7_58, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_5c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5c = call i16 @__asm_fnstsw(i32 %v0_5c)
  %v2_5c = sext i16 %v1_5c to i32
  %v3_5c = load i32, i32* @eax, align 8
  %v4_5c = and i32 %v3_5c, -65536
  %tmp272 = udiv i32 %v2_5c, 2
  %v12_5e = and i32 %tmp272, 32512
  %v2_5c.masked = and i32 %v2_5c, -65281
  %v13_5e = or i32 %v4_5c, %v2_5c.masked
  %v14_5e = or i32 %v13_5e, %v12_5e
  store i32 %v14_5e, i32* @eax, align 8
  %v15_5e26 = and i32 %v2_5c, 256
  %v16_5e = icmp ne i32 %v15_5e26, 0
  %v1_60 = icmp eq i1 %v16_5e, false
  br i1 %v1_60, label %dec_label_pc_64, label %dec_label_pc_62

dec_label_pc_62:                                  ; preds = %dec_label_pc_0
  %v2_62 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_62 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_62, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_62, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_64

dec_label_pc_64:                                  ; preds = %dec_label_pc_62, %dec_label_pc_0
  %v0_66 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_66 = call i16 @__asm_fnstsw(i32 %v0_66)
  %v2_66 = sext i16 %v1_66 to i32
  %v3_66 = load i32, i32* @eax, align 8
  %v4_66 = and i32 %v3_66, -65536
  %tmp273 = udiv i32 %v2_66, 2
  %v12_68 = and i32 %tmp273, 32512
  %v2_66.masked = and i32 %v2_66, -65281
  %v13_68 = or i32 %v4_66, %v2_66.masked
  %v14_68 = or i32 %v13_68, %v12_68
  store i32 %v14_68, i32* @eax, align 8
  %v0_72 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_72 = call i16 @__asm_fnstsw(i32 %v0_72)
  %v2_72 = sext i16 %v1_72 to i32
  %v3_72 = load i32, i32* @eax, align 8
  %v4_72 = and i32 %v3_72, -65536
  %tmp274 = udiv i32 %v2_72, 2
  %v12_74 = and i32 %tmp274, 32512
  %v2_72.masked = and i32 %v2_72, -65281
  %v13_74 = or i32 %v4_72, %v2_72.masked
  %v14_74 = or i32 %v13_74, %v12_74
  store i32 %v14_74, i32* @eax, align 8
  %v0_7a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_7a = load i32, i32* %esi.global-to-local, align 4
  %v2_7a = add i32 %v1_7a, -120
  %v3_7a = inttoptr i32 %v2_7a to double*
  %v4_7a = load double, double* %v3_7a, align 4
  %v5_7a = fpext double %v4_7a to x86_fp80
  %v6_7a = add i3 %v0_7a, -1
  store x86_fp80 %v5_7a, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  store i3 %v6_7a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_81 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_81 = call i16 @__asm_fnstsw(i32 %v0_81)
  %v2_81 = sext i16 %v1_81 to i32
  %v3_81 = load i32, i32* @eax, align 8
  %v4_81 = and i32 %v3_81, -65536
  %tmp275 = udiv i32 %v2_81, 2
  %v12_83 = and i32 %tmp275, 32512
  %v2_81.masked = and i32 %v2_81, -65281
  %v13_83 = or i32 %v4_81, %v2_81.masked
  %v14_83 = or i32 %v13_83, %v12_83
  store i32 %v14_83, i32* @eax, align 8
  %v15_8329 = and i32 %v2_81, 256
  %v16_83 = icmp ne i32 %v15_8329, 0
  %v1_85 = icmp eq i1 %v16_83, false
  br i1 %v1_85, label %dec_label_pc_64.dec_label_pc_92_crit_edge, label %dec_label_pc_87

dec_label_pc_64.dec_label_pc_92_crit_edge:        ; preds = %dec_label_pc_64
  %v1_96.pre = load i32, i32* %esi.global-to-local, align 4
  br label %dec_label_pc_92

dec_label_pc_87:                                  ; preds = %dec_label_pc_64
  %v2_87 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_87 = fsub x86_fp80 %v2_87, %v2_87
  %v2_89 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_87)
  %v2_8b = fsub x86_fp80 0xK80000000000000000000, %v2_89
  store x86_fp80 %v2_8b, x86_fp80* %st7.global-to-local, align 4
  %v2_8d = load i32, i32* %esi.global-to-local, align 4
  %v3_8d = add i32 %v2_8d, -120
  %v4_8d = inttoptr i32 %v3_8d to double*
  %v5_8d = load double, double* %v4_8d, align 4
  %v6_8d = fpext double %v5_8d to x86_fp80
  %v7_8d = fsub x86_fp80 %v6_8d, %v2_89
  store x86_fp80 %v7_8d, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_92

dec_label_pc_92:                                  ; preds = %dec_label_pc_64.dec_label_pc_92_crit_edge, %dec_label_pc_87
  %v1_96 = phi i32 [ %v1_96.pre, %dec_label_pc_64.dec_label_pc_92_crit_edge ], [ %v2_8d, %dec_label_pc_87 ]
  %v2_96 = add i32 %v1_96, -128
  %v3_96 = inttoptr i32 %v2_96 to double*
  %v4_96 = load double, double* %v3_96, align 4
  %v5_96 = fpext double %v4_96 to x86_fp80
  store x86_fp80 %v5_96, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v0_9d = load i32, i32* %fpsw.global-to-local, align 4
  %v1_9d = call i16 @__asm_fnstsw(i32 %v0_9d)
  %v2_9d = sext i16 %v1_9d to i32
  %v3_9d = load i32, i32* @eax, align 8
  %v4_9d = and i32 %v3_9d, -65536
  %tmp276 = udiv i32 %v2_9d, 2
  %v12_9f = and i32 %tmp276, 32512
  %v2_9d.masked = and i32 %v2_9d, -65281
  %v13_9f = or i32 %v4_9d, %v2_9d.masked
  %v14_9f = or i32 %v13_9f, %v12_9f
  store i32 %v14_9f, i32* @eax, align 8
  %v15_9f30 = and i32 %v2_9d, 256
  %v16_9f = icmp ne i32 %v15_9f30, 0
  %v1_a1 = icmp eq i1 %v16_9f, false
  %v1_ae.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_a1, label %dec_label_pc_92.dec_label_pc_ae_crit_edge, label %dec_label_pc_a3

dec_label_pc_92.dec_label_pc_ae_crit_edge:        ; preds = %dec_label_pc_92
  %v2_b6.pre = load i32, i32* %esi.global-to-local, align 4
  br label %dec_label_pc_ae

dec_label_pc_a3:                                  ; preds = %dec_label_pc_92
  %v4_a3 = fsub x86_fp80 %v1_ae.pre, %v1_ae.pre
  %v2_a5 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_a3)
  %v2_a7 = fsub x86_fp80 0xK80000000000000000000, %v2_a5
  store x86_fp80 %v2_a7, x86_fp80* %st7.global-to-local, align 4
  %v2_a9 = load i32, i32* %esi.global-to-local, align 4
  %v3_a9 = add i32 %v2_a9, -128
  %v4_a9 = inttoptr i32 %v3_a9 to double*
  %v5_a9 = load double, double* %v4_a9, align 4
  %v6_a9 = fpext double %v5_a9 to x86_fp80
  %v7_a9 = fsub x86_fp80 %v6_a9, %v2_a5
  store x86_fp80 %v7_a9, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_ae

dec_label_pc_ae:                                  ; preds = %dec_label_pc_92.dec_label_pc_ae_crit_edge, %dec_label_pc_a3
  %v2_106 = phi i32 [ %v2_b6.pre, %dec_label_pc_92.dec_label_pc_ae_crit_edge ], [ %v2_a9, %dec_label_pc_a3 ]
  %v1_ae = phi x86_fp80 [ %v1_ae.pre, %dec_label_pc_92.dec_label_pc_ae_crit_edge ], [ %v7_a9, %dec_label_pc_a3 ]
  %v3_b6 = add i32 %v2_106, -104
  %v4_b6 = inttoptr i32 %v3_b6 to float*
  %v5_b6 = load float, float* %v4_b6, align 4
  %v6_b6 = fpext float %v5_b6 to x86_fp80
  %v7_b6 = fmul x86_fp80 %v1_ae, %v6_b6
  store x86_fp80 %v7_b6, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_b6, x86_fp80* %st6.global-to-local, align 4
  %v3_bb = add i32 %v2_106, -108
  %v4_bb = inttoptr i32 %v3_bb to float*
  %v5_bb = load float, float* %v4_bb, align 4
  %v6_bb = fpext float %v5_bb to x86_fp80
  %v7_bb = fmul x86_fp80 %v7_b6, %v6_bb
  %v4_be = fadd x86_fp80 %v7_b6, %v7_bb
  store x86_fp80 %v4_be, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_be, x86_fp80* %st6.global-to-local, align 4
  %v3_c2 = add i32 %v2_106, -112
  %v4_c2 = inttoptr i32 %v3_c2 to float*
  %v5_c2 = load float, float* %v4_c2, align 4
  %v6_c2 = fpext float %v5_c2 to x86_fp80
  %v7_c2 = fmul x86_fp80 %v4_be, %v6_c2
  %v4_c5 = fadd x86_fp80 %v4_be, %v7_c2
  store x86_fp80 %v4_c5, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_c5, x86_fp80* %st6.global-to-local, align 4
  %v3_c9 = add i32 %v2_106, -80
  %v4_c9 = inttoptr i32 %v3_c9 to float*
  %v5_c9 = load float, float* %v4_c9, align 4
  %v6_c9 = fpext float %v5_c9 to x86_fp80
  %v7_c9 = fmul x86_fp80 %v4_c5, %v6_c9
  store x86_fp80 %v7_c9, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_c5, x86_fp80* %st5.global-to-local, align 4
  %v3_ce = add i32 %v2_106, -84
  %v4_ce = inttoptr i32 %v3_ce to float*
  %v5_ce = load float, float* %v4_ce, align 4
  %v6_ce = fpext float %v5_ce to x86_fp80
  %v7_ce = fmul x86_fp80 %v4_c5, %v6_ce
  %v4_d1 = fadd x86_fp80 %v7_c9, %v7_ce
  store x86_fp80 %v4_d1, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_c5, x86_fp80* %st5.global-to-local, align 4
  %v3_d5 = add i32 %v2_106, -88
  %v4_d5 = inttoptr i32 %v3_d5 to float*
  %v5_d5 = load float, float* %v4_d5, align 4
  %v6_d5 = fpext float %v5_d5 to x86_fp80
  %v7_d5 = fmul x86_fp80 %v4_c5, %v6_d5
  store x86_fp80 %v7_d5, x86_fp80* %st5.global-to-local, align 4
  %v4_d8 = fadd x86_fp80 %v4_d1, %v7_d5
  store x86_fp80 %v4_c5, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_d8, x86_fp80* %st7.global-to-local, align 4
  %v3_dc = add i32 %v2_106, -92
  %v4_dc = inttoptr i32 %v3_dc to float*
  %v5_dc = load float, float* %v4_dc, align 4
  %v6_dc = fpext float %v5_dc to x86_fp80
  %v7_dc = fmul x86_fp80 %v4_d8, %v6_dc
  store x86_fp80 %v7_dc, x86_fp80* %st7.global-to-local, align 4
  %v3_e1 = add i32 %v2_106, -96
  %v4_e1 = inttoptr i32 %v3_e1 to float*
  %v5_e1 = load float, float* %v4_e1, align 4
  %v6_e1 = fpext float %v5_e1 to x86_fp80
  %v7_e1 = fmul x86_fp80 %v7_dc, %v6_e1
  %v4_e4 = fadd x86_fp80 %v7_e1, %v7_e1
  store x86_fp80 %v4_e4, x86_fp80* %st7.global-to-local, align 4
  %v3_e8 = add i32 %v2_106, -100
  %v4_e8 = inttoptr i32 %v3_e8 to float*
  %v5_e8 = load float, float* %v4_e8, align 4
  %v6_e8 = fpext float %v5_e8 to x86_fp80
  %v7_e8 = fmul x86_fp80 %v4_e4, %v6_e8
  %v4_eb = fadd x86_fp80 %v7_e8, %v7_e8
  store x86_fp80 %v4_eb, x86_fp80* %st7.global-to-local, align 4
  %v2_ed = add i32 %v2_106, -16
  %v3_ed = inttoptr i32 %v2_ed to double*
  %v4_ed = load double, double* %v3_ed, align 4
  %v5_ed = fpext double %v4_ed to x86_fp80
  store x86_fp80 %v5_ed, x86_fp80* %st7.global-to-local, align 4
  %v1_f0 = load i32, i32* @ecx, align 8
  %v2_f0 = add i32 %v1_f0, 8
  %v3_f0 = inttoptr i32 %v2_f0 to double*
  %v4_f0 = load double, double* %v3_f0, align 4
  %v5_f0 = fpext double %v4_f0 to x86_fp80
  %v4_f3 = fmul x86_fp80 %v5_ed, %v5_f0
  %v4_f5 = fptrunc x86_fp80 %v4_f3 to double
  store double %v4_f5, double* %v3_f0, align 4
  %v2_f8 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_f8 = fmul x86_fp80 %v2_f8, %v2_f8
  %v4_fa = fmul x86_fp80 %v4_f8, %v4_f8
  %v4_fc = fmul x86_fp80 %v4_fa, %v4_fa
  %v4_100 = fadd x86_fp80 %v4_fc, 0xKBFFF8000000000000000
  store x86_fp80 %v4_100, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_100, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_100, x86_fp80* %st5.global-to-local, align 4
  %v3_106 = add i32 %v2_106, -24
  %v4_106 = inttoptr i32 %v3_106 to double*
  %v5_106 = load double, double* %v4_106, align 4
  %v6_106 = fpext double %v5_106 to x86_fp80
  %v7_106 = fmul x86_fp80 %v4_100, %v6_106
  store x86_fp80 %v7_106, x86_fp80* %st5.global-to-local, align 4
  %v4_109 = fsub x86_fp80 %v4_100, %v7_106
  store x86_fp80 %v4_109, x86_fp80* %st7.global-to-local, align 4
  %v3_10b = add i32 %v2_106, -32
  %v4_10b = inttoptr i32 %v3_10b to double*
  %v5_10b = load double, double* %v4_10b, align 4
  %v6_10b = fpext double %v5_10b to x86_fp80
  %v7_10b = fmul x86_fp80 %v4_100, %v6_10b
  store x86_fp80 %v7_10b, x86_fp80* %st6.global-to-local, align 4
  %v4_10e = fsub x86_fp80 %v4_109, %v7_10b
  store x86_fp80 %v4_10e, x86_fp80* %st7.global-to-local, align 4
  %v3_110 = add i32 %v2_106, -40
  %v4_110 = inttoptr i32 %v3_110 to double*
  %v5_110 = load double, double* %v4_110, align 4
  %v6_110 = fpext double %v5_110 to x86_fp80
  %v7_110 = fmul x86_fp80 %v4_10e, %v6_110
  store x86_fp80 %v7_110, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_110, x86_fp80* %st6.global-to-local, align 4
  %v3_115 = add i32 %v2_106, -8
  %v4_115 = inttoptr i32 %v3_115 to double*
  %v5_115 = load double, double* %v4_115, align 4
  %v6_115 = fpext double %v5_115 to x86_fp80
  %v7_115 = fmul x86_fp80 %v7_110, %v6_115
  store x86_fp80 %v7_115, x86_fp80* %st6.global-to-local, align 4
  %v0_11a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_11a = call i16 @__asm_fnstsw(i32 %v0_11a)
  %v2_11a = sext i16 %v1_11a to i32
  %v3_11a = load i32, i32* @eax, align 8
  %v4_11a = and i32 %v3_11a, -65536
  %v1_11c = udiv i32 %v2_11a, 256
  %v2_11c = trunc i32 %v1_11c to i8
  %v3_11c = and i8 %v2_11c, 65
  %v4_11c = icmp eq i8 %v3_11c, 0
  %v9_11c = zext i8 %v3_11c to i32
  %v11_11c = mul i32 %v9_11c, 256
  %v2_11a.masked = and i32 %v2_11a, -65281
  %v12_11c = or i32 %v4_11a, %v2_11a.masked
  %v13_11c = or i32 %v12_11c, %v11_11c
  store i32 %v13_11c, i32* @eax, align 8
  %v1_123.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v4_11c, label %dec_label_pc_123, label %dec_label_pc_121

dec_label_pc_121:                                 ; preds = %dec_label_pc_ae
  %v4_121 = fsub x86_fp80 %v1_123.pre, %v1_123.pre
  store x86_fp80 %v4_121, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_123

dec_label_pc_123:                                 ; preds = %dec_label_pc_ae, %dec_label_pc_121
  %v1_123 = phi x86_fp80 [ %v4_121, %dec_label_pc_121 ], [ %v1_123.pre, %dec_label_pc_ae ]
  %v0_123 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_125 = load i32, i32* @edx, align 8
  %v3_125 = fptrunc x86_fp80 %v1_123 to double
  %v4_125 = inttoptr i32 %v2_125 to double*
  store double %v3_125, double* %v4_125, align 4
  %v1_127 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_127 = load i32, i32* %ebx.global-to-local, align 4
  %v3_127 = fptrunc x86_fp80 %v1_127 to double
  %v4_127 = inttoptr i32 %v2_127 to double*
  store double %v3_127, double* %v4_127, align 4
  %v1_129 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_129 = load i32, i32* @ecx, align 8
  %v3_129 = fptrunc x86_fp80 %v1_129 to double
  %v4_129 = inttoptr i32 %v2_129 to double*
  store double %v3_129, double* %v4_129, align 4
  %v5_129 = xor i3 %v0_123, -4
  store i3 %v5_129, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_127, i32* @eax, align 8
  store i32 %v0_4, i32* %esi.global-to-local, align 4
  store i32 %v0_3, i32* %ebx.global-to-local, align 4
  ret i32 %v2_127
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

attributes #0 = { nounwind readnone speculatable }
