source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp253 = call double @__decompiler_undefined_function_0()
  %stack_var_-60 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-60, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %tmp258 = zext i32 %v1_45 to i80
  %v7_45 = bitcast i80 %tmp258 to x86_fp80
  %v0_4b = load i32, i32* @edi, align 8
  %v1_4b = add i32 %v0_4b, -96
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v10_4b = icmp eq i32 %v3_4b, 0
  br i1 %v10_4b, label %dec_label_pc_5f, label %dec_label_pc_51

dec_label_pc_51:                                  ; preds = %dec_label_pc_40
  %v3_51 = load double, double* %stack_var_-60, align 8
  %v8_51 = fpext double %v3_51 to x86_fp80
  store x86_fp80 %v8_51, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_45, x86_fp80* %st6.global-to-local, align 4
  %tmp259 = fptrunc x86_fp80 %v7_45 to double
  store double %tmp259, double* %stack_var_-60, align 8
  br label %dec_label_pc_5f

dec_label_pc_5f:                                  ; preds = %dec_label_pc_51, %dec_label_pc_40
  %stack_var_-44.0 = phi x86_fp80 [ %v7_45, %dec_label_pc_40 ], [ %v8_51, %dec_label_pc_51 ]
  %v1_5f = add i32 %v0_4b, -100
  %v2_5f = inttoptr i32 %v1_5f to i32*
  %v3_5f = load i32, i32* %v2_5f, align 4
  %v10_5f = icmp eq i32 %v3_5f, 0
  br i1 %v10_5f, label %dec_label_pc_75, label %dec_label_pc_65

dec_label_pc_65:                                  ; preds = %dec_label_pc_5f
  %v5_65 = fpext double %tmp253 to x86_fp80
  store x86_fp80 %v5_65, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %stack_var_-44.0, x86_fp80* %st6.global-to-local, align 4
  %v4_6d = fptrunc x86_fp80 %stack_var_-44.0 to double
  br label %dec_label_pc_75

dec_label_pc_75:                                  ; preds = %dec_label_pc_65, %dec_label_pc_5f
  %stack_var_-52.0 = phi double [ %tmp253, %dec_label_pc_5f ], [ %v4_6d, %dec_label_pc_65 ]
  %stack_var_-44.1 = phi x86_fp80 [ %stack_var_-44.0, %dec_label_pc_5f ], [ %v5_65, %dec_label_pc_65 ]
  %v1_75 = add i32 %v0_4b, -104
  %v2_75 = inttoptr i32 %v1_75 to i32*
  %v3_75 = load i32, i32* %v2_75, align 4
  %v1_78 = urem i32 %v3_75, 2
  %v2_78 = icmp eq i32 %v1_78, 0
  %v1_7b = icmp eq i1 %v2_78, false
  br i1 %v1_7b, label %dec_label_pc_85, label %dec_label_pc_7d

dec_label_pc_7d:                                  ; preds = %dec_label_pc_75
  %v3_7d = load double, double* %stack_var_-60, align 8
  %v8_7d = fpext double %v3_7d to x86_fp80
  %v2_80 = fsub x86_fp80 0xK80000000000000000000, %v8_7d
  store x86_fp80 %v2_80, x86_fp80* %st7.global-to-local, align 4
  %tmp260 = fptrunc x86_fp80 %v2_80 to double
  store double %tmp260, double* %stack_var_-60, align 8
  %v3_85.pre = load i32, i32* %v2_75, align 4
  br label %dec_label_pc_85

dec_label_pc_85:                                  ; preds = %dec_label_pc_7d, %dec_label_pc_75
  %v3_85 = phi i32 [ %v3_85.pre, %dec_label_pc_7d ], [ %v3_75, %dec_label_pc_75 ]
  %v1_88 = and i32 %v3_85, 2
  %v2_88 = icmp eq i32 %v1_88, 0
  %v1_8b = icmp eq i1 %v2_88, false
  %v0_a9.pre.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_8b, label %dec_label_pc_97, label %dec_label_pc_8d

dec_label_pc_8d:                                  ; preds = %dec_label_pc_85
  %v5_8d = fpext double %stack_var_-52.0 to x86_fp80
  %v2_91 = fsub x86_fp80 0xK80000000000000000000, %v5_8d
  store x86_fp80 %v2_91, x86_fp80* %st7.global-to-local, align 4
  %v4_93 = fptrunc x86_fp80 %v2_91 to double
  %v3_97.pre = load i32, i32* %v2_75, align 4
  br label %dec_label_pc_97

dec_label_pc_97:                                  ; preds = %dec_label_pc_85, %dec_label_pc_8d
  %v3_97 = phi i32 [ %v3_97.pre, %dec_label_pc_8d ], [ %v3_85, %dec_label_pc_85 ]
  %stack_var_-52.1 = phi double [ %v4_93, %dec_label_pc_8d ], [ %stack_var_-52.0, %dec_label_pc_85 ]
  %v1_9a = and i32 %v3_97, 4
  %v2_9a = icmp eq i32 %v1_9a, 0
  %v1_9d = icmp eq i1 %v2_9a, false
  br i1 %v1_9d, label %dec_label_pc_a9, label %dec_label_pc_9f

dec_label_pc_9f:                                  ; preds = %dec_label_pc_97
  %v2_a3 = fsub x86_fp80 0xK80000000000000000000, %stack_var_-44.1
  store x86_fp80 %v2_a3, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_a9.pre.pre, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_a9

dec_label_pc_a9:                                  ; preds = %dec_label_pc_97, %dec_label_pc_9f
  %stack_var_-44.2 = phi x86_fp80 [ %v2_a3, %dec_label_pc_9f ], [ %stack_var_-44.1, %dec_label_pc_97 ]
  %v3_a9 = load double, double* %stack_var_-60, align 8
  %v8_a9 = fpext double %v3_a9 to x86_fp80
  %v3_ac = fmul x86_fp80 %v8_a9, %v8_a9
  %v5_ae = fpext double %stack_var_-52.1 to x86_fp80
  %v3_b2 = fmul x86_fp80 %v5_ae, %v5_ae
  %v4_b4 = fadd x86_fp80 %v3_b2, %v3_ac
  %v2_b6 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_b4)
  store x86_fp80 %v2_b6, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v5_ae, x86_fp80* %st6.global-to-local, align 4
  %v9_bc = add i3 %v0_a9.pre.pre, -3
  store i3 %v9_bc, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v8_a9, x86_fp80* %st5.global-to-local, align 4
  %v5_bf = call i32 @__asm_fpatan(x86_fp80 %stack_var_-44.2)
  %v4_c1 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_c1 = fpext double %v4_c1 to x86_fp80
  %v6_c1 = fmul x86_fp80 %v8_a9, %v5_c1
  %v3_c5 = fmul x86_fp80 %v6_c1, %v6_c1
  %v4_c9 = fmul x86_fp80 %v6_c1, %v3_c5
  %v4_cd = fsub x86_fp80 %v3_c5, %v4_c9
  %v4_cf = fadd x86_fp80 %v6_c1, %v4_cd
  store x86_fp80 %v4_cf, x86_fp80* %st5.global-to-local, align 4
  %tmp261 = bitcast double %v4_c1 to i64
  %tmp262 = trunc i64 %tmp261 to i32
  %v2_d1 = add i32 %tmp262, -16
  %v3_d1 = inttoptr i32 %v2_d1 to double*
  %v4_d1 = load double, double* %v3_d1, align 4
  %v5_d1 = fpext double %v4_d1 to x86_fp80
  %v4_d4 = fmul x86_fp80 %v4_cf, %v5_d1
  store x86_fp80 %v4_d4, x86_fp80* %st5.global-to-local, align 4
  %v3_d6 = add i32 %tmp262, -72
  %v4_d6 = inttoptr i32 %v3_d6 to double*
  %v5_d6 = load double, double* %v4_d6, align 4
  %v6_d6 = fpext double %v5_d6 to x86_fp80
  %v7_d6 = fadd x86_fp80 %v4_d4, %v6_d6
  store x86_fp80 %v7_d6, x86_fp80* %st5.global-to-local, align 4
  %v1_dd = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_dd = add i32 %tmp262, -84
  %v4_dd = inttoptr i32 %v3_dd to double*
  %v5_dd = load double, double* %v4_dd, align 4
  %v6_dd = fpext double %v5_dd to x86_fp80
  %v7_dd = fsub x86_fp80 %v1_dd, %v6_dd
  %v3_e0 = fmul x86_fp80 %v7_dd, %v7_dd
  %v3_e6 = fmul x86_fp80 %stack_var_-44.2, %stack_var_-44.2
  %v4_e8 = fadd x86_fp80 %v3_e6, %v3_e0
  %v2_ea = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_e8)
  %v7_ec = fsub x86_fp80 %v2_ea, %v7_d6
  store x86_fp80 %v7_ec, x86_fp80* %st6.global-to-local, align 4
  %v3_f0 = load double, double* %stack_var_-60, align 8
  %v8_f0 = fpext double %v3_f0 to x86_fp80
  store x86_fp80 %v8_f0, x86_fp80* %st5.global-to-local, align 4
  %v5_f3 = load double, double* %v4_dd, align 4
  %v6_f3 = fpext double %v5_f3 to x86_fp80
  %v7_f3 = fadd x86_fp80 %v8_f0, %v6_f3
  %v3_f6 = fmul x86_fp80 %v7_f3, %v7_f3
  %v4_fe = fadd x86_fp80 %v3_b2, %v3_f6
  %v4_106 = fadd x86_fp80 %v3_e6, %v4_fe
  %v2_108 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_106)
  store x86_fp80 %v2_108, x86_fp80* %st5.global-to-local, align 4
  %v3_10a = add i32 %tmp262, -92
  %v4_10a = inttoptr i32 %v3_10a to double*
  %v5_10a = load double, double* %v4_10a, align 4
  %v6_10a = fpext double %v5_10a to x86_fp80
  %v7_10a = fsub x86_fp80 %v2_108, %v6_10a
  store x86_fp80 %v7_10a, x86_fp80* %st5.global-to-local, align 4
  %v2_10f = call i32 @__asm_wait(x86_fp80 %v7_d6)
  %v0_110 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_110 = call i16 @__asm_fnstsw(i32 %v0_110)
  %v2_110 = sext i16 %v1_110 to i32
  %v4_110 = and i32 %v2_10f, -65536
  %tmp265 = udiv i32 %v2_110, 2
  %v12_112 = and i32 %tmp265, 32512
  %v2_110.masked = and i32 %v2_110, -65281
  %v13_112 = or i32 %v4_110, %v2_110.masked
  %v14_112 = or i32 %v13_112, %v12_112
  %v15_1127 = and i32 %v2_110, 256
  %v16_112 = icmp ne i32 %v15_1127, 0
  %v1_114 = icmp eq i1 %v16_112, false
  %v0_11a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_114, label %dec_label_pc_11c, label %dec_label_pc_116

dec_label_pc_116:                                 ; preds = %dec_label_pc_a9
  %v1_11a = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v1_11a, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_11c

dec_label_pc_11c:                                 ; preds = %dec_label_pc_a9, %dec_label_pc_116
  %storemerge = add i3 %v0_11a, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_11c = load i32, i32* @edi, align 8
  %v1_11c = add i32 %v0_11c, -76
  %v2_11c = inttoptr i32 %v1_11c to i32*
  %v3_11c = load i32, i32* %v2_11c, align 4
  %v10_11c = icmp eq i32 %v3_11c, 0
  %v1_120 = icmp eq i1 %v10_11c, false
  %v1_125.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_120, label %dec_label_pc_125, label %dec_label_pc_122

dec_label_pc_122:                                 ; preds = %dec_label_pc_11c
  %v3_122 = add i32 %v0_11c, -32
  %v4_122 = inttoptr i32 %v3_122 to double*
  %v5_122 = load double, double* %v4_122, align 4
  %v6_122 = fpext double %v5_122 to x86_fp80
  %v7_122 = fdiv x86_fp80 %v1_125.pre, %v6_122
  store x86_fp80 %v7_122, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_125

dec_label_pc_125:                                 ; preds = %dec_label_pc_11c, %dec_label_pc_122
  %v1_125 = phi x86_fp80 [ %v7_122, %dec_label_pc_122 ], [ %v1_125.pre, %dec_label_pc_11c ]
  %v2_125 = load i32, i32* %esi.global-to-local, align 4
  %v3_125 = add i32 %v2_125, -32
  %v4_125 = fptrunc x86_fp80 %v1_125 to double
  %v5_125 = inttoptr i32 %v3_125 to double*
  store double %v4_125, double* %v5_125, align 4
  %v6_125 = add i3 %v0_11a, 2
  store i3 %v6_125, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_112
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_fpatan(x86_fp80) local_unnamed_addr

declare i32 @__asm_wait(x86_fp80) local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_0() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
