source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@st7 = internal unnamed_addr global x86_fp80 0xK00000000000000000000
@fpu_stat_TOP = internal unnamed_addr global i3 0
@fpsw = internal unnamed_addr global i32 0
@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0
@ebx = internal unnamed_addr global i32 0
@esi = internal unnamed_addr global i32 0
@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebp.global-to-local = alloca i32, align 4
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %v0_0 = load i32, i32* %ebp.global-to-local, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 8
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_9 = add i32 %arg1, 48
  %v2_9 = inttoptr i32 %v1_9 to i32*
  %v3_9 = load i32, i32* %v2_9, align 4
  store i32 %v3_9, i32* @edi, align 8
  %v0_c = load i32, i32* @eax, align 8
  store i32 %v0_c, i32* @ebx, align 4
  %v1_e = add i32 %arg1, 112
  store i32 %v1_e, i32* @esi, align 4
  %v4_11 = call i32 @function_61(i32 %v0_5, i32 %v0_4, i32 %v0_3, i32 %v0_0)
  store i32 %v4_11, i32* @eax, align 8
  ret i32 %v4_11
}

define i32 @function_16(i32 %arg1) local_unnamed_addr {
dec_label_pc_16:
  %v0_16 = load i32, i32* @eax, align 8
  %v2_16 = udiv i32 %v0_16, 2
  %tmp = icmp ult i32 %v0_16, 2
  store i32 %v2_16, i32* @eax, align 8
  br i1 %tmp, label %dec_label_pc_30, label %dec_label_pc_1a

dec_label_pc_1a:                                  ; preds = %dec_label_pc_16
  %v9_16 = urem i32 %v0_16, 2
  %v10_16 = icmp ne i32 %v9_16, 0
  %v1_1a = icmp eq i1 %v10_16, false
  %v0_20 = load i3, i3* @fpu_stat_TOP, align 1
  br i1 %v1_1a, label %dec_label_pc_20, label %dec_label_pc_1c

dec_label_pc_1c:                                  ; preds = %dec_label_pc_1a
  %v1_1c = load x86_fp80, x86_fp80* @st7, align 4
  br label %dec_label_pc_24.preheader

dec_label_pc_20:                                  ; preds = %dec_label_pc_1a
  br label %dec_label_pc_24.preheader

dec_label_pc_24.preheader:                        ; preds = %dec_label_pc_1c, %dec_label_pc_20
  %storemerge = phi x86_fp80 [ %v1_1c, %dec_label_pc_1c ], [ 0xK3FFF8000000000000000, %dec_label_pc_20 ]
  br label %dec_label_pc_24

dec_label_pc_24:                                  ; preds = %dec_label_pc_24.backedge, %dec_label_pc_24.preheader
  %v2_264 = phi i32 [ %v2_26, %dec_label_pc_24.backedge ], [ %v2_16, %dec_label_pc_24.preheader ]
  %v4_2a2 = phi x86_fp80 [ %v4_2a1, %dec_label_pc_24.backedge ], [ %storemerge, %dec_label_pc_24.preheader ]
  %v3_24 = fmul x86_fp80 %v4_2a2, %v4_2a2
  %v2_26 = udiv i32 %v2_264, 2
  %v9_26 = urem i32 %v2_264, 2
  %v10_26 = icmp ne i32 %v9_26, 0
  %v1_28 = icmp eq i1 %v10_26, false
  br i1 %v1_28, label %dec_label_pc_24.backedge, label %dec_label_pc_2a

dec_label_pc_24.backedge:                         ; preds = %dec_label_pc_24, %dec_label_pc_2a
  %v4_2a1 = phi x86_fp80 [ %v3_24, %dec_label_pc_24 ], [ %v4_2a, %dec_label_pc_2a ]
  br label %dec_label_pc_24

dec_label_pc_2a:                                  ; preds = %dec_label_pc_24
  %tmp7 = icmp ult i32 %v2_264, 2
  %v4_2a = fmul x86_fp80 %v3_24, %v3_24
  %v1_2c = icmp eq i1 %tmp7, false
  br i1 %v1_2c, label %dec_label_pc_24.backedge, label %dec_label_pc_2e

dec_label_pc_2e:                                  ; preds = %dec_label_pc_2a
  store i32 %v2_26, i32* @eax, align 8
  store x86_fp80 %v4_2a, x86_fp80* @st7, align 4
  store i3 %v0_20, i3* @fpu_stat_TOP, align 1
  br label %dec_label_pc_30

dec_label_pc_30:                                  ; preds = %dec_label_pc_2e, %dec_label_pc_16
  %v0_30 = phi i32 [ %v2_26, %dec_label_pc_2e ], [ 0, %dec_label_pc_16 ]
  ret i32 %v0_30
}

define i32 @function_31() local_unnamed_addr {
dec_label_pc_31:
  %v0_31 = load i3, i3* @fpu_stat_TOP, align 1
  %v3_31 = load double, double* bitcast (i32* @eax to double*), align 8
  %tmp3 = call double @llvm.fabs.f64(double %v3_31)
  %v2_33 = fpext double %tmp3 to x86_fp80
  store x86_fp80 %v2_33, x86_fp80* @st7, align 4
  %tmp4 = bitcast double %v3_31 to i64
  %tmp5 = trunc i64 %tmp4 to i32
  %v0_36 = load i32, i32* @edi, align 8
  %v1_36 = add i32 %v0_36, -52
  %v2_36 = inttoptr i32 %v1_36 to i32*
  %v3_36 = load i32, i32* %v2_36, align 4
  store i32 %v3_36, i32* @eax, align 8
  %v2_39 = add i3 %v0_31, -2
  store i3 %v2_39, i3* @fpu_stat_TOP, align 1
  %v1_3b = call i32 @function_16(i32 %tmp5)
  store i32 %tmp5, i32* @eax, align 8
  %v0_46 = load i3, i3* @fpu_stat_TOP, align 1
  %v7_55 = add i3 %v0_46, 1
  store i3 %v7_55, i3* @fpu_stat_TOP, align 1
  %v1_57 = add i32 %tmp5, 7
  %v2_57 = inttoptr i32 %v1_57 to i8*
  %v3_57 = load i8, i8* %v2_57, align 1
  %v6_57 = icmp slt i8 %v3_57, 0
  %v1_5b = icmp eq i1 %v6_57, false
  br i1 %v1_5b, label %dec_label_pc_5f, label %dec_label_pc_5d

dec_label_pc_5d:                                  ; preds = %dec_label_pc_31
  br label %dec_label_pc_5f

dec_label_pc_5f:                                  ; preds = %dec_label_pc_5d, %dec_label_pc_31
  ret i32 %tmp5
}

define i32 @function_61(i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) local_unnamed_addr {
dec_label_pc_61:
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st3.global-to-local = alloca x86_fp80, align 4
  %st4.global-to-local = alloca x86_fp80, align 4
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_61 = call i32 @function_31()
  %v0_66 = load i32, i32* @edx, align 4
  store i32 %v0_66, i32* @eax, align 8
  %v0_68 = call i32 @function_31()
  store i32 %v0_68, i32* @eax, align 8
  %v0_6d = load i3, i3* @fpu_stat_TOP, align 1
  %v3_6d = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_6d = fpext double %v3_6d to x86_fp80
  %v5_6d = add i3 %v0_6d, -1
  store i3 %v5_6d, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_6d, x86_fp80* @st7, align 4
  %v0_74 = load i32, i32* @esi, align 4
  %v1_74 = add i32 %v0_74, 96
  %v2_74 = inttoptr i32 %v1_74 to i32*
  %v3_74 = load i32, i32* %v2_74, align 4
  %v10_74 = icmp eq i32 %v3_74, 0
  %v11_74 = icmp slt i32 %v3_74, 0
  %v3_78 = icmp eq i1 %v11_74, false
  %v4_78 = icmp eq i1 %v10_74, false
  %v5_78 = icmp eq i1 %v3_78, %v4_78
  br i1 %v5_78, label %dec_label_pc_61.dec_label_pc_83_crit_edge, label %dec_label_pc_7a

dec_label_pc_61.dec_label_pc_83_crit_edge:        ; preds = %dec_label_pc_61
  %.pre = add i32 %v0_74, 88
  %.pre14 = inttoptr i32 %.pre to double*
  %v4_83.pre = load double, double* %.pre14, align 4
  %.pre29 = fpext double %v4_83.pre to x86_fp80
  br label %dec_label_pc_83

dec_label_pc_7a:                                  ; preds = %dec_label_pc_61
  %v4_7a = add i32 %v3_74, 1
  store i32 %v4_7a, i32* %v2_74, align 4
  %v1_7d = load i32, i32* @edi, align 8
  %v2_7d = add i32 %v1_7d, -16
  %v3_7d = inttoptr i32 %v2_7d to double*
  %v4_7d = load double, double* %v3_7d, align 4
  %v5_7d = fpext double %v4_7d to x86_fp80
  store x86_fp80 %v5_7d, x86_fp80* %st6.global-to-local, align 4
  %v2_80 = load i32, i32* @esi, align 4
  %v3_80 = add i32 %v2_80, 88
  %v5_80 = inttoptr i32 %v3_80 to double*
  store double %v4_7d, double* %v5_80, align 4
  store i3 %v5_6d, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_83

dec_label_pc_83:                                  ; preds = %dec_label_pc_61.dec_label_pc_83_crit_edge, %dec_label_pc_7a
  %v5_83.pre-phi = phi x86_fp80 [ %.pre29, %dec_label_pc_61.dec_label_pc_83_crit_edge ], [ %v5_7d, %dec_label_pc_7a ]
  %v3_83.pre-phi = phi double* [ %.pre14, %dec_label_pc_61.dec_label_pc_83_crit_edge ], [ %v5_80, %dec_label_pc_7a ]
  store x86_fp80 %v5_83.pre-phi, x86_fp80* %st6.global-to-local, align 4
  %v2_8a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v5_83.pre-phi)
  store x86_fp80 %v2_8a, x86_fp80* %st4.global-to-local, align 4
  %v4_8c = fadd x86_fp80 %v2_8a, 0xKBFFF8000000000000000
  store x86_fp80 %v4_8c, x86_fp80* %st5.global-to-local, align 4
  %v2_8e = load i32, i32* @edi, align 8
  %v3_8e = add i32 %v2_8e, -48
  %v4_8e = inttoptr i32 %v3_8e to double*
  %v5_8e = load double, double* %v4_8e, align 4
  %v6_8e = fpext double %v5_8e to x86_fp80
  %v7_8e = fmul x86_fp80 %v4_8c, %v6_8e
  store x86_fp80 %v7_8e, x86_fp80* %st5.global-to-local, align 4
  %v4_91 = fadd x86_fp80 %v7_8e, %v5_83.pre-phi
  store x86_fp80 %v4_91, x86_fp80* %st6.global-to-local, align 4
  %v4_93 = fptrunc x86_fp80 %v4_91 to double
  store double %v4_93, double* %v3_83.pre-phi, align 4
  %v1_96 = load i32, i32* @edi, align 8
  %v2_96 = add i32 %v1_96, -32
  %v3_96 = inttoptr i32 %v2_96 to double*
  %v4_96 = load double, double* %v3_96, align 4
  %v5_96 = fpext double %v4_96 to x86_fp80
  store x86_fp80 %v5_96, x86_fp80* %st6.global-to-local, align 4
  store i3 %v5_6d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_9b = call i32 @__asm_wait()
  store i32 %v0_9b, i32* @eax, align 8
  %v0_9c = load i32, i32* @fpsw, align 4
  %v1_9c = call i16 @__asm_fnstsw(i32 %v0_9c)
  %v2_9c = sext i16 %v1_9c to i32
  %v3_9c = load i32, i32* @eax, align 8
  %v4_9c = and i32 %v3_9c, -65536
  %tmp30 = udiv i32 %v2_9c, 2
  %v12_9e = and i32 %tmp30, 32512
  %v2_9c.masked = and i32 %v2_9c, -65281
  %v13_9e = or i32 %v4_9c, %v2_9c.masked
  %v14_9e = or i32 %v13_9e, %v12_9e
  store i32 %v14_9e, i32* @eax, align 8
  %v15_9e26 = and i32 %v2_9c, 256
  %v16_9e = icmp eq i32 %v15_9e26, 0
  %v0_a6 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v16_9e, label %dec_label_pc_a2, label %dec_label_pc_a6

dec_label_pc_a2:                                  ; preds = %dec_label_pc_83
  %v1_a2 = add i3 %v0_a6, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_100

dec_label_pc_a6:                                  ; preds = %dec_label_pc_83
  %v2_a6 = load x86_fp80, x86_fp80* @st7, align 4
  %v3_a8 = fmul x86_fp80 %v2_a6, %v2_a6
  %v4_ae = fadd x86_fp80 %v3_a8, %v3_a8
  %v4_b4 = fadd x86_fp80 %v3_a8, %v4_ae
  store x86_fp80 %v4_b4, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st5.global-to-local, align 4
  %v2_b8 = load i32, i32* @edi, align 8
  %v3_b8 = add i32 %v2_b8, -32
  %v4_b8 = inttoptr i32 %v3_b8 to double*
  %v5_b8 = load double, double* %v4_b8, align 4
  %v6_b8 = fpext double %v5_b8 to x86_fp80
  %v7_b8 = fadd x86_fp80 %v6_b8, 0xK3FFF8000000000000000
  store x86_fp80 %v7_b8, x86_fp80* %st5.global-to-local, align 4
  %v3_bb = add i32 %v2_b8, -8
  %v4_bb = inttoptr i32 %v3_bb to double*
  %v5_bb = load double, double* %v4_bb, align 4
  %v6_bb = fpext double %v5_bb to x86_fp80
  %v7_bb = fmul x86_fp80 %v7_b8, %v6_bb
  store x86_fp80 %v7_bb, x86_fp80* %st5.global-to-local, align 4
  %v1_be = add i3 %v0_a6, -3
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st4.global-to-local, align 4
  store i3 %v1_be, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_c0 = load double, double* %v4_b8, align 4
  %v6_c0 = fpext double %v5_c0 to x86_fp80
  %v7_c0 = fsub x86_fp80 0xK3FFF8000000000000000, %v6_c0
  store x86_fp80 %v7_c0, x86_fp80* %st4.global-to-local, align 4
  %v5_c3 = load double, double* %v4_bb, align 4
  %v6_c3 = fpext double %v5_c3 to x86_fp80
  %v7_c3 = fmul x86_fp80 %v7_c0, %v6_c3
  store x86_fp80 %v7_c3, x86_fp80* %st6.global-to-local, align 4
  %v4_c8 = fsub x86_fp80 %v4_b4, %v7_bb
  store x86_fp80 %v4_c8, x86_fp80* %st4.global-to-local, align 4
  %v0_cc = call i32 @__asm_wait()
  store i32 %v0_cc, i32* @eax, align 8
  %v0_cd = load i32, i32* @fpsw, align 4
  %v1_cd = call i16 @__asm_fnstsw(i32 %v0_cd)
  %v2_cd = sext i16 %v1_cd to i32
  %v3_cd = load i32, i32* @eax, align 8
  %v4_cd = and i32 %v3_cd, -65536
  %v5_cd = or i32 %v4_cd, %v2_cd
  store i32 %v5_cd, i32* @eax, align 8
  %v2_d0 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_c8)
  %v3_d2 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_d2 = fdiv x86_fp80 %v2_d0, %v3_d2
  store x86_fp80 %v4_d2, x86_fp80* %st4.global-to-local, align 4
  %v0_d4 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_d4 = add i3 %v0_d4, -1
  store i3 %v2_d4, i3* @fpu_stat_TOP, align 1
  store x86_fp80 %v4_d2, x86_fp80* %st3.global-to-local, align 4
  %v0_d6 = load i32, i32* @edi, align 8
  %v1_d6 = add i32 %v0_d6, -64
  %v2_d6 = inttoptr i32 %v1_d6 to i32*
  %v3_d6 = load i32, i32* %v2_d6, align 4
  %v2_d9 = udiv i32 %v3_d6, 2
  store i32 %v2_d9, i32* @eax, align 8
  %v9_d9 = urem i32 %v3_d6, 2
  %v10_d9 = icmp ne i32 %v9_d9, 0
  %v1_db = icmp eq i1 %v10_d9, false
  br i1 %v1_db, label %dec_label_pc_e1, label %dec_label_pc_dd

dec_label_pc_dd:                                  ; preds = %dec_label_pc_a6
  %v2_dd = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_d2)
  store x86_fp80 %v2_dd, x86_fp80* %st3.global-to-local, align 4
  %v3_df = and i32 %v3_d6, -2
  %v8_df = zext i1 %v10_d9 to i32
  %v10_df = or i32 %v3_df, %v8_df
  store i32 %v10_df, i32* @eax, align 8
  br label %dec_label_pc_e1

dec_label_pc_e1:                                  ; preds = %dec_label_pc_dd, %dec_label_pc_a6
  %v1_e1 = call i32 @function_16(i32 %v5_cd)
  store i32 %v1_e1, i32* @eax, align 8
  %v1_e6 = load x86_fp80, x86_fp80* %st3.global-to-local, align 4
  %v2_e6 = load i32, i32* @edi, align 8
  %v3_e6 = add i32 %v2_e6, -72
  %v4_e6 = inttoptr i32 %v3_e6 to double*
  %v5_e6 = load double, double* %v4_e6, align 4
  %v6_e6 = fpext double %v5_e6 to x86_fp80
  %v7_e6 = fmul x86_fp80 %v1_e6, %v6_e6
  %v0_e9 = load i3, i3* @fpu_stat_TOP, align 1
  %v4_eb = fadd x86_fp80 %v7_e6, 0xK3FFF8000000000000000
  %v3_ed = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  %v4_ef = fadd x86_fp80 %v3_ed, %v7_e6
  store x86_fp80 %v4_ef, x86_fp80* %st3.global-to-local, align 4
  %v4_f1 = fdiv x86_fp80 %v4_ef, %v4_eb
  store x86_fp80 %v4_f1, x86_fp80* %st4.global-to-local, align 4
  %v3_f4 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_f4 = fmul x86_fp80 %v4_f1, %v3_f4
  %v7_f4 = add i3 %v0_e9, 2
  store i3 %v7_f4, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_f6 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v4_f4, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_f6, x86_fp80* %st6.global-to-local, align 4
  %tmp31 = udiv i32 %v2_cd, 2
  %v12_f8 = and i32 %tmp31, 32512
  %v13_f8 = and i32 %v5_cd, -65281
  %v14_f8 = or i32 %v13_f8, %v12_f8
  store i32 %v14_f8, i32* @eax, align 8
  %v15_f827 = and i32 %v2_cd, 256
  %v16_f8 = icmp ne i32 %v15_f827, 0
  %v1_fa = icmp eq i1 %v16_f8, false
  br i1 %v1_fa, label %dec_label_pc_fe, label %dec_label_pc_fc

dec_label_pc_fc:                                  ; preds = %dec_label_pc_e1
  %v2_fc = fsub x86_fp80 0xK80000000000000000000, %v4_f4
  store x86_fp80 %v2_fc, x86_fp80* %st5.global-to-local, align 4
  br label %dec_label_pc_fe

dec_label_pc_fe:                                  ; preds = %dec_label_pc_fc, %dec_label_pc_e1
  %v2_fe = phi x86_fp80 [ %v2_fc, %dec_label_pc_fc ], [ %v4_f4, %dec_label_pc_e1 ]
  %v4_fe = fadd x86_fp80 %v2_f6, %v2_fe
  store x86_fp80 %v4_fe, x86_fp80* %st6.global-to-local, align 4
  %v7_fe = add i3 %v0_e9, 3
  br label %dec_label_pc_100

dec_label_pc_100:                                 ; preds = %dec_label_pc_fe, %dec_label_pc_a2
  %v3_103 = phi x86_fp80 [ %v4_fe, %dec_label_pc_fe ], [ 0xK3FFF8000000000000000, %dec_label_pc_a2 ]
  %storemerge = phi i3 [ %v7_fe, %dec_label_pc_fe ], [ %v1_a2, %dec_label_pc_a2 ]
  %v1_100 = load i32, i32* @esi, align 4
  %v2_100 = add i32 %v1_100, 88
  %v3_100 = inttoptr i32 %v2_100 to double*
  %v4_100 = load double, double* %v3_100, align 4
  %v5_100 = fpext double %v4_100 to x86_fp80
  store x86_fp80 %v5_100, x86_fp80* %st5.global-to-local, align 4
  %v4_103 = fdiv x86_fp80 %v5_100, %v3_103
  store x86_fp80 %v4_103, x86_fp80* %st6.global-to-local, align 4
  %v1_105 = load i32, i32* @ecx, align 8
  %v2_105 = add i32 %v1_105, 8
  %v3_105 = inttoptr i32 %v2_105 to double*
  %v4_105 = load double, double* %v3_105, align 4
  %v5_105 = fpext double %v4_105 to x86_fp80
  %v4_108 = fmul x86_fp80 %v4_103, %v5_105
  store x86_fp80 %v4_108, x86_fp80* %st5.global-to-local, align 4
  %v4_10a = fptrunc x86_fp80 %v4_108 to double
  store double %v4_10a, double* %v3_105, align 4
  %v2_10d = load x86_fp80, x86_fp80* @st7, align 4
  %v3_10d = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_10d = fmul x86_fp80 %v2_10d, %v3_10d
  %v4_10f = fmul x86_fp80 %v4_10d, %v4_10d
  %v4_111 = fmul x86_fp80 %v4_10f, %v4_10f
  store x86_fp80 %v4_111, x86_fp80* %st7.global-to-local, align 4
  %v2_116 = load i32, i32* @edi, align 8
  %v3_116 = add i32 %v2_116, -100
  %v4_116 = inttoptr i32 %v3_116 to float*
  %v5_116 = load float, float* %v4_116, align 4
  %v6_116 = fpext float %v5_116 to x86_fp80
  %v7_116 = fmul x86_fp80 %v4_111, %v6_116
  store x86_fp80 %v7_116, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_116, x86_fp80* %st6.global-to-local, align 4
  %v3_11b = add i32 %v2_116, -104
  %v4_11b = inttoptr i32 %v3_11b to float*
  %v5_11b = load float, float* %v4_11b, align 4
  %v6_11b = fpext float %v5_11b to x86_fp80
  %v7_11b = fmul x86_fp80 %v7_116, %v6_11b
  %v4_11e = fadd x86_fp80 %v7_116, %v7_11b
  store x86_fp80 %v4_11e, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_11e, x86_fp80* %st6.global-to-local, align 4
  %v3_122 = add i32 %v2_116, -108
  %v4_122 = inttoptr i32 %v3_122 to float*
  %v5_122 = load float, float* %v4_122, align 4
  %v6_122 = fpext float %v5_122 to x86_fp80
  %v7_122 = fmul x86_fp80 %v4_11e, %v6_122
  %v4_125 = fadd x86_fp80 %v4_11e, %v7_122
  store x86_fp80 %v4_125, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_125, x86_fp80* %st6.global-to-local, align 4
  %v3_129 = add i32 %v2_116, -76
  %v4_129 = inttoptr i32 %v3_129 to float*
  %v5_129 = load float, float* %v4_129, align 4
  %v6_129 = fpext float %v5_129 to x86_fp80
  %v7_129 = fmul x86_fp80 %v4_125, %v6_129
  store x86_fp80 %v7_129, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_125, x86_fp80* %st5.global-to-local, align 4
  %v3_12e = add i32 %v2_116, -80
  %v4_12e = inttoptr i32 %v3_12e to float*
  %v5_12e = load float, float* %v4_12e, align 4
  %v6_12e = fpext float %v5_12e to x86_fp80
  %v7_12e = fmul x86_fp80 %v4_125, %v6_12e
  %v4_131 = fadd x86_fp80 %v7_129, %v7_12e
  store x86_fp80 %v4_131, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_125, x86_fp80* %st5.global-to-local, align 4
  %v3_135 = add i32 %v2_116, -84
  %v4_135 = inttoptr i32 %v3_135 to float*
  %v5_135 = load float, float* %v4_135, align 4
  %v6_135 = fpext float %v5_135 to x86_fp80
  %v7_135 = fmul x86_fp80 %v4_125, %v6_135
  store x86_fp80 %v7_135, x86_fp80* %st5.global-to-local, align 4
  %v4_138 = fadd x86_fp80 %v4_131, %v7_135
  store x86_fp80 %v4_125, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_138, x86_fp80* %st7.global-to-local, align 4
  %v3_13c = add i32 %v2_116, -88
  %v4_13c = inttoptr i32 %v3_13c to float*
  %v5_13c = load float, float* %v4_13c, align 4
  %v6_13c = fpext float %v5_13c to x86_fp80
  %v7_13c = fmul x86_fp80 %v4_138, %v6_13c
  store x86_fp80 %v7_13c, x86_fp80* %st7.global-to-local, align 4
  %v3_141 = add i32 %v2_116, -92
  %v4_141 = inttoptr i32 %v3_141 to float*
  %v5_141 = load float, float* %v4_141, align 4
  %v6_141 = fpext float %v5_141 to x86_fp80
  %v7_141 = fmul x86_fp80 %v7_13c, %v6_141
  %v4_144 = fadd x86_fp80 %v7_141, %v7_141
  store x86_fp80 %v4_144, x86_fp80* %st7.global-to-local, align 4
  %v3_148 = add i32 %v2_116, -96
  %v4_148 = inttoptr i32 %v3_148 to float*
  %v5_148 = load float, float* %v4_148, align 4
  %v6_148 = fpext float %v5_148 to x86_fp80
  %v7_148 = fmul x86_fp80 %v4_144, %v6_148
  %v4_14b = fadd x86_fp80 %v7_148, %v7_148
  store x86_fp80 %v4_14b, x86_fp80* %st7.global-to-local, align 4
  %v3_14e = add i32 %v1_100, -72
  %v4_14e = inttoptr i32 %v3_14e to double*
  %v5_14e = load double, double* %v4_14e, align 4
  %v6_14e = fpext double %v5_14e to x86_fp80
  %v7_14e = fadd x86_fp80 %v4_14b, %v6_14e
  store x86_fp80 %v7_14e, x86_fp80* %st7.global-to-local, align 4
  %v2_151 = load i32, i32* @ecx, align 8
  %v3_151 = fptrunc x86_fp80 %v7_14e to double
  %v4_151 = inttoptr i32 %v2_151 to double*
  store double %v3_151, double* %v4_151, align 4
  %v1_153 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_153 = add i32 %v1_100, -80
  %v4_153 = inttoptr i32 %v3_153 to double*
  %v5_153 = load double, double* %v4_153, align 4
  %v6_153 = fpext double %v5_153 to x86_fp80
  %v7_153 = fadd x86_fp80 %v1_153, %v6_153
  store x86_fp80 %v7_153, x86_fp80* %st7.global-to-local, align 4
  %v2_156 = load i32, i32* @edx, align 4
  %v3_156 = fptrunc x86_fp80 %v7_153 to double
  %v4_156 = inttoptr i32 %v2_156 to double*
  store double %v3_156, double* %v4_156, align 4
  %v1_158 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_158 = add i32 %v1_100, -88
  %v4_158 = inttoptr i32 %v3_158 to double*
  %v5_158 = load double, double* %v4_158, align 4
  %v6_158 = fpext double %v5_158 to x86_fp80
  %v7_158 = fadd x86_fp80 %v1_158, %v6_158
  store x86_fp80 %v7_158, x86_fp80* %st7.global-to-local, align 4
  %v2_15b = load i32, i32* @ebx, align 4
  %v3_15b = fptrunc x86_fp80 %v7_158 to double
  %v4_15b = inttoptr i32 %v2_15b to double*
  store double %v3_15b, double* %v4_15b, align 4
  %v5_15b = xor i3 %storemerge, -4
  store i3 %v5_15b, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_15b, i32* @eax, align 8
  ret i32 %v2_15b
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
