source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define x86_fp80 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %edi.global-to-local, align 4
  %v0_e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_e = add i32 %arg1, 56
  %v3_e = inttoptr i32 %v2_e to double*
  %v4_e = load double, double* %v3_e, align 4
  %v5_e = fpext double %v4_e to x86_fp80
  %v6_e = add i3 %v0_e, -1
  store i3 %v6_e, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_e, x86_fp80* %st7.global-to-local, align 4
  %v0_14 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_14 = call i16 @__asm_fnstsw(i32 %v0_14)
  %v2_14 = sext i16 %v1_14 to i32
  %v3_14 = load i32, i32* @eax, align 8
  %v4_14 = and i32 %v3_14, -65536
  %tmp245 = udiv i32 %v2_14, 2
  %v12_16 = and i32 %tmp245, 32512
  %v2_14.masked = and i32 %v2_14, -65281
  %v13_16 = or i32 %v4_14, %v2_14.masked
  %v14_16 = or i32 %v13_16, %v12_16
  store i32 %v14_16, i32* @eax, align 8
  %v15_1611 = and i32 %v2_14, 256
  %v16_16 = icmp eq i32 %v15_1611, 0
  br i1 %v16_16, label %dec_label_pc_1a, label %dec_label_pc_1f

dec_label_pc_1a:                                  ; preds = %dec_label_pc_0
  %v2_1f = load i32, i32* %edi.global-to-local, align 4
  %v1_1f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_1a = add i32 %v2_1f, -24
  %v4_1a = inttoptr i32 %v3_1a to double*
  %v5_1a = load double, double* %v4_1a, align 4
  %v6_1a = fpext double %v5_1a to x86_fp80
  %v7_1a = fsub x86_fp80 %v6_1a, %v1_1f
  br label %dec_label_pc_2b

dec_label_pc_1f:                                  ; preds = %dec_label_pc_0
  %v0_22 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_22 = call i16 @__asm_fnstsw(i32 %v0_22)
  %v2_22 = sext i16 %v1_22 to i32
  %v3_22 = load i32, i32* @eax, align 8
  %v4_22 = and i32 %v3_22, -65536
  %tmp246 = udiv i32 %v2_22, 2
  %v12_24 = and i32 %tmp246, 32512
  %v2_22.masked = and i32 %v2_22, -65281
  %v13_24 = or i32 %v4_22, %v2_22.masked
  %v14_24 = or i32 %v13_24, %v12_24
  store i32 %v14_24, i32* @eax, align 8
  %v15_2412 = and i32 %v2_22, 256
  %v16_24 = icmp ne i32 %v15_2412, 0
  %v1_26 = icmp eq i1 %v16_24, false
  br i1 %v1_26, label %dec_label_pc_1f.dec_label_pc_42_crit_edge, label %dec_label_pc_28

dec_label_pc_1f.dec_label_pc_42_crit_edge:        ; preds = %dec_label_pc_1f
  %v0_42.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_42

dec_label_pc_28:                                  ; preds = %dec_label_pc_1f
  %v1_28 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_28 = load i32, i32* %edi.global-to-local, align 4
  %v3_28 = add i32 %v2_28, -40
  %v4_28 = inttoptr i32 %v3_28 to double*
  %v5_28 = load double, double* %v4_28, align 4
  %v6_28 = fpext double %v5_28 to x86_fp80
  %v7_28 = fsub x86_fp80 %v6_28, %v1_28
  br label %dec_label_pc_2b

dec_label_pc_2b:                                  ; preds = %dec_label_pc_28, %dec_label_pc_1a
  %storemerge8.in.in = phi x86_fp80 [ %v7_1a, %dec_label_pc_1a ], [ %v7_28, %dec_label_pc_28 ]
  store x86_fp80 %storemerge8.in.in, x86_fp80* %st7.global-to-local, align 4
  %v2_2b = load i32, i32* %esi.global-to-local, align 4
  %v3_2b = add i32 %v2_2b, 56
  %v4_2b = inttoptr i32 %v3_2b to double*
  %v5_2b = load double, double* %v4_2b, align 4
  %v6_2b = fpext double %v5_2b to x86_fp80
  %v7_2b = fdiv x86_fp80 %storemerge8.in.in, %v6_2b
  store x86_fp80 %v7_2b, x86_fp80* %st7.global-to-local, align 4
  %v0_2e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_2e = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_2e = fpext double %v3_2e to x86_fp80
  store x86_fp80 %v4_2e, x86_fp80* %st6.global-to-local, align 4
  %v3_30 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_30 = fpext double %v3_30 to x86_fp80
  store x86_fp80 %v4_30, x86_fp80* %st5.global-to-local, align 4
  %v3_32 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_32 = fpext double %v3_32 to x86_fp80
  %v4_34 = fmul x86_fp80 %v7_2b, %v4_32
  %v2_36 = load i32, i32* %ebx.global-to-local, align 4
  %v3_36 = fptrunc x86_fp80 %v4_34 to double
  %v4_36 = inttoptr i32 %v2_36 to double*
  store double %v3_36, double* %v4_36, align 4
  %v2_38 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_38 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_38 = fmul x86_fp80 %v2_38, %v3_38
  store x86_fp80 %v4_38, x86_fp80* %st5.global-to-local, align 4
  %v2_3a = load i32, i32* @edx, align 8
  %v3_3a = fptrunc x86_fp80 %v4_38 to double
  %v4_3a = inttoptr i32 %v2_3a to double*
  store double %v3_3a, double* %v4_3a, align 4
  %v2_3c = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_3c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_3c = fmul x86_fp80 %v2_3c, %v3_3c
  store x86_fp80 %v4_3c, x86_fp80* %st6.global-to-local, align 4
  store i32 %v2_36, i32* @eax, align 8
  %v2_40 = load i32, i32* @ecx, align 8
  %v3_40 = fptrunc x86_fp80 %v4_3c to double
  %v4_40 = inttoptr i32 %v2_40 to double*
  store double %v3_40, double* %v4_40, align 4
  br label %dec_label_pc_42

dec_label_pc_42:                                  ; preds = %dec_label_pc_1f.dec_label_pc_42_crit_edge, %dec_label_pc_2b
  %v0_42 = phi i3 [ %v0_42.pre, %dec_label_pc_1f.dec_label_pc_42_crit_edge ], [ %v0_2e, %dec_label_pc_2b ]
  %v4_42 = add i3 %v0_42, 1
  store i3 %v4_42, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  %v0_48 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  ret x86_fp80 %v0_48
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr
