source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_0 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_0 = load i32, i32* %esi.global-to-local, align 4
  %v2_0 = add i32 %v1_0, -104
  %v3_0 = inttoptr i32 %v2_0 to double*
  %v4_0 = load double, double* %v3_0, align 4
  %v5_0 = fpext double %v4_0 to x86_fp80
  store x86_fp80 %v5_0, x86_fp80* %st7.global-to-local, align 4
  %v2_3 = add i32 %v1_0, -112
  %v3_3 = inttoptr i32 %v2_3 to double*
  %v4_3 = load double, double* %v3_3, align 4
  %v5_3 = fpext double %v4_3 to x86_fp80
  store x86_fp80 %v5_3, x86_fp80* %st6.global-to-local, align 4
  %v2_6 = add i32 %v1_0, -120
  %v3_6 = inttoptr i32 %v2_6 to double*
  %v4_6 = load double, double* %v3_6, align 4
  %v5_6 = fpext double %v4_6 to x86_fp80
  store x86_fp80 %v5_6, x86_fp80* %st5.global-to-local, align 4
  %v10_14 = add i3 %v0_0, -3
  store i3 %v10_14, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_17 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_17 = call i16 @__asm_fnstsw(i32 %v0_17)
  %v2_17 = sext i16 %v1_17 to i32
  %v3_17 = load i32, i32* %eax.global-to-local, align 4
  %v4_17 = and i32 %v3_17, -65536
  %tmp245 = udiv i32 %v2_17, 2
  %v12_19 = and i32 %tmp245, 32512
  %v2_17.masked = and i32 %v2_17, -65281
  %v13_19 = or i32 %v4_17, %v2_17.masked
  %v14_19 = or i32 %v13_19, %v12_19
  store i32 %v14_19, i32* %eax.global-to-local, align 4
  %v15_1914 = and i32 %v2_17, 256
  %v16_19 = icmp eq i32 %v15_1914, 0
  %v2_63 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  br i1 %v16_19, label %dec_label_pc_1d, label %dec_label_pc_63

dec_label_pc_1d:                                  ; preds = %dec_label_pc_0
  %v2_1d = load i32, i32* %edi.global-to-local, align 4
  %v3_1d = add i32 %v2_1d, -12
  %v4_1d = inttoptr i32 %v3_1d to float*
  %v5_1d = load float, float* %v4_1d, align 4
  %v6_1d = fpext float %v5_1d to x86_fp80
  %v7_1d = fadd x86_fp80 %v2_63, %v6_1d
  store x86_fp80 %v7_1d, x86_fp80* %st5.global-to-local, align 4
  %v0_20 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_20 = load i32, i32* %esi.global-to-local, align 4
  %v2_20 = add i32 %v1_20, 112
  %v3_20 = inttoptr i32 %v2_20 to double*
  %v4_20 = load double, double* %v3_20, align 4
  %v5_20 = fpext double %v4_20 to x86_fp80
  %v2_23 = add i32 %v2_1d, -16
  %v3_23 = inttoptr i32 %v2_23 to float*
  %v4_23 = load float, float* %v3_23, align 4
  %v5_23 = fpext float %v4_23 to x86_fp80
  %v2_26 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_26 = fmul x86_fp80 %v2_26, %v5_23
  store x86_fp80 %v4_26, x86_fp80* %st7.global-to-local, align 4
  %v2_28 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_28 = fmul x86_fp80 %v2_28, %v5_23
  store x86_fp80 %v4_28, x86_fp80* %st6.global-to-local, align 4
  %v4_2a = fmul x86_fp80 %v7_1d, %v5_23
  store x86_fp80 %v4_2a, x86_fp80* %st5.global-to-local, align 4
  %v4_2c = fmul x86_fp80 %v5_20, %v5_23
  %v4_2e = fptrunc x86_fp80 %v4_2c to double
  store double %v4_2e, double* %v3_20, align 4
  %v2_31 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_33 = add i32 %v2_1d, -24
  %v4_33 = inttoptr i32 %v3_33 to float*
  %v5_33 = load float, float* %v4_33, align 4
  %v6_33 = fpext float %v5_33 to x86_fp80
  %v7_33 = fmul x86_fp80 %v2_31, %v6_33
  %v2_36 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_38 = add i32 %v2_1d, -20
  %v4_38 = inttoptr i32 %v3_38 to float*
  %v5_38 = load float, float* %v4_38, align 4
  %v6_38 = fpext float %v5_38 to x86_fp80
  %v7_38 = fmul x86_fp80 %v2_36, %v6_38
  %v4_3b = fsub x86_fp80 %v7_33, %v7_38
  store x86_fp80 %v4_3b, x86_fp80* %st6.global-to-local, align 4
  %v5_3f = load float, float* %v4_38, align 4
  %v6_3f = fpext float %v5_3f to x86_fp80
  %v7_3f = fmul x86_fp80 %v2_31, %v6_3f
  store x86_fp80 %v7_3f, x86_fp80* %st5.global-to-local, align 4
  %v5_44 = load float, float* %v4_33, align 4
  %v6_44 = fpext float %v5_44 to x86_fp80
  %v7_44 = fmul x86_fp80 %v2_36, %v6_44
  %v4_47 = fadd x86_fp80 %v7_3f, %v7_44
  store x86_fp80 %v4_47, x86_fp80* %st5.global-to-local, align 4
  %v2_49 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_4b = add i32 %v2_1d, -32
  %v4_4b = inttoptr i32 %v3_4b to float*
  %v5_4b = load float, float* %v4_4b, align 4
  %v6_4b = fpext float %v5_4b to x86_fp80
  %v7_4b = fmul x86_fp80 %v2_49, %v6_4b
  %v3_50 = add i32 %v2_1d, -28
  %v4_50 = inttoptr i32 %v3_50 to float*
  %v5_50 = load float, float* %v4_50, align 4
  %v6_50 = fpext float %v5_50 to x86_fp80
  %v7_50 = fmul x86_fp80 %v4_47, %v6_50
  %v4_53 = fsub x86_fp80 %v7_4b, %v7_50
  store x86_fp80 %v4_53, x86_fp80* %st7.global-to-local, align 4
  %v5_57 = load float, float* %v4_50, align 4
  %v6_57 = fpext float %v5_57 to x86_fp80
  %v7_57 = fmul x86_fp80 %v2_49, %v6_57
  store x86_fp80 %v7_57, x86_fp80* %st5.global-to-local, align 4
  %v5_5c = load float, float* %v4_4b, align 4
  %v6_5c = fpext float %v5_5c to x86_fp80
  %v7_5c = fmul x86_fp80 %v4_47, %v6_5c
  %v4_5f = fadd x86_fp80 %v7_57, %v7_5c
  store x86_fp80 %v4_5f, x86_fp80* %st5.global-to-local, align 4
  br label %dec_label_pc_d5

dec_label_pc_63:                                  ; preds = %dec_label_pc_0
  %v3_63 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_63, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_63, x86_fp80* %st6.global-to-local, align 4
  %v0_67 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_67 = call i16 @__asm_fnstsw(i32 %v0_67)
  %v2_67 = sext i16 %v1_67 to i32
  %v3_67 = load i32, i32* %eax.global-to-local, align 4
  %v4_67 = and i32 %v3_67, -65536
  %tmp246 = udiv i32 %v2_67, 2
  %v12_69 = and i32 %tmp246, 32512
  %v2_67.masked = and i32 %v2_67, -65281
  %v13_69 = or i32 %v4_67, %v2_67.masked
  %v14_69 = or i32 %v13_69, %v12_69
  store i32 %v14_69, i32* %eax.global-to-local, align 4
  %v15_6915 = and i32 %v2_67, 256
  %v16_69 = icmp eq i32 %v15_6915, 0
  %v1_9d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_69, label %dec_label_pc_6d, label %dec_label_pc_9d

dec_label_pc_6d:                                  ; preds = %dec_label_pc_63
  %v2_6f = load i32, i32* %edi.global-to-local, align 4
  %v3_6f = add i32 %v2_6f, -64
  %v4_6f = inttoptr i32 %v3_6f to float*
  %v5_6f = load float, float* %v4_6f, align 4
  %v6_6f = fpext float %v5_6f to x86_fp80
  %v7_6f = fadd x86_fp80 %v1_9d, %v6_6f
  store x86_fp80 %v7_6f, x86_fp80* %st7.global-to-local, align 4
  %v0_72 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_6f, x86_fp80* %st6.global-to-local, align 4
  %v3_74 = add i32 %v2_6f, -56
  %v4_74 = inttoptr i32 %v3_74 to float*
  %v5_74 = load float, float* %v4_74, align 4
  %v6_74 = fpext float %v5_74 to x86_fp80
  %v7_74 = fmul x86_fp80 %v7_6f, %v6_74
  store x86_fp80 %v7_74, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v7_6f, x86_fp80* %st5.global-to-local, align 4
  %v3_79 = add i32 %v2_6f, -52
  %v4_79 = inttoptr i32 %v3_79 to float*
  %v5_79 = load float, float* %v4_79, align 4
  %v6_79 = fpext float %v5_79 to x86_fp80
  %v7_79 = fmul x86_fp80 %v7_6f, %v6_79
  store x86_fp80 %v7_79, x86_fp80* %st5.global-to-local, align 4
  %v4_7c = fsub x86_fp80 %v7_74, %v7_79
  store x86_fp80 %v7_6f, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_7c, x86_fp80* %st7.global-to-local, align 4
  %v5_80 = load float, float* %v4_79, align 4
  %v6_80 = fpext float %v5_80 to x86_fp80
  %v7_80 = fmul x86_fp80 %v4_7c, %v6_80
  store x86_fp80 %v7_80, x86_fp80* %st7.global-to-local, align 4
  %v5_85 = load float, float* %v4_74, align 4
  %v6_85 = fpext float %v5_85 to x86_fp80
  %v7_85 = fmul x86_fp80 %v7_80, %v6_85
  %v4_88 = fadd x86_fp80 %v7_85, %v7_85
  store x86_fp80 %v4_88, x86_fp80* %st7.global-to-local, align 4
  %v1_8a = load i32, i32* %esi.global-to-local, align 4
  %v2_8a = add i32 %v1_8a, 112
  %v3_8a = inttoptr i32 %v2_8a to double*
  %v4_8a = load double, double* %v3_8a, align 4
  %v5_8a = fpext double %v4_8a to x86_fp80
  store x86_fp80 %v5_8a, x86_fp80* %st7.global-to-local, align 4
  %v2_8d = add i32 %v2_6f, -48
  %v3_8d = inttoptr i32 %v2_8d to float*
  %v4_8d = load float, float* %v3_8d, align 4
  %v5_8d = fpext float %v4_8d to x86_fp80
  store x86_fp80 %v5_8d, x86_fp80* %st6.global-to-local, align 4
  %v4_90 = fmul x86_fp80 %v5_8a, %v5_8d
  %v4_92 = fmul x86_fp80 %v4_90, %v4_90
  %v4_94 = fmul x86_fp80 %v4_92, %v4_92
  %v4_96 = fmul x86_fp80 %v4_94, %v4_94
  store x86_fp80 %v4_96, x86_fp80* %st7.global-to-local, align 4
  %v4_98 = fptrunc x86_fp80 %v4_96 to double
  store double %v4_98, double* %v3_8a, align 4
  br label %dec_label_pc_d5

dec_label_pc_9d:                                  ; preds = %dec_label_pc_63
  %v2_9d = fsub x86_fp80 0xK80000000000000000000, %v1_9d
  store x86_fp80 %v2_9d, x86_fp80* %st7.global-to-local, align 4
  %v0_a1 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_a1 = call i16 @__asm_fnstsw(i32 %v0_a1)
  %v2_a1 = sext i16 %v1_a1 to i32
  %v3_a1 = load i32, i32* %eax.global-to-local, align 4
  %v4_a1 = and i32 %v3_a1, -65536
  %tmp247 = udiv i32 %v2_a1, 2
  %v12_a3 = and i32 %tmp247, 32512
  %v2_a1.masked = and i32 %v2_a1, -65281
  %v13_a3 = or i32 %v4_a1, %v2_a1.masked
  %v14_a3 = or i32 %v13_a3, %v12_a3
  store i32 %v14_a3, i32* %eax.global-to-local, align 4
  %v15_a316 = and i32 %v2_a1, 256
  %v16_a3 = icmp eq i32 %v15_a316, 0
  br i1 %v16_a3, label %dec_label_pc_a7, label %dec_label_pc_9d.dec_label_pc_d5_crit_edge

dec_label_pc_9d.dec_label_pc_d5_crit_edge:        ; preds = %dec_label_pc_9d
  %v0_d5.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_d5.pre = load i32, i32* %esi.global-to-local, align 4
  br label %dec_label_pc_d5

dec_label_pc_a7:                                  ; preds = %dec_label_pc_9d
  %v2_a7 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_a9 = load i32, i32* %edi.global-to-local, align 4
  %v3_a9 = add i32 %v2_a9, -60
  %v4_a9 = inttoptr i32 %v3_a9 to float*
  %v5_a9 = load float, float* %v4_a9, align 4
  %v6_a9 = fpext float %v5_a9 to x86_fp80
  %v7_a9 = fadd x86_fp80 %v2_a7, %v6_a9
  store x86_fp80 %v7_a9, x86_fp80* %st7.global-to-local, align 4
  %v0_ac = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_a9, x86_fp80* %st6.global-to-local, align 4
  %v3_ae = add i32 %v2_a9, -44
  %v4_ae = inttoptr i32 %v3_ae to float*
  %v5_ae = load float, float* %v4_ae, align 4
  %v6_ae = fpext float %v5_ae to x86_fp80
  %v7_ae = fmul x86_fp80 %v7_a9, %v6_ae
  store x86_fp80 %v7_ae, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v7_a9, x86_fp80* %st5.global-to-local, align 4
  %v3_b3 = add i32 %v2_a9, -40
  %v4_b3 = inttoptr i32 %v3_b3 to float*
  %v5_b3 = load float, float* %v4_b3, align 4
  %v6_b3 = fpext float %v5_b3 to x86_fp80
  %v7_b3 = fmul x86_fp80 %v7_a9, %v6_b3
  store x86_fp80 %v7_b3, x86_fp80* %st5.global-to-local, align 4
  %v4_b6 = fsub x86_fp80 %v7_ae, %v7_b3
  store x86_fp80 %v7_a9, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_b6, x86_fp80* %st7.global-to-local, align 4
  %v5_ba = load float, float* %v4_b3, align 4
  %v6_ba = fpext float %v5_ba to x86_fp80
  %v7_ba = fmul x86_fp80 %v4_b6, %v6_ba
  store x86_fp80 %v7_ba, x86_fp80* %st7.global-to-local, align 4
  %v5_bf = load float, float* %v4_ae, align 4
  %v6_bf = fpext float %v5_bf to x86_fp80
  %v7_bf = fmul x86_fp80 %v7_ba, %v6_bf
  %v4_c2 = fadd x86_fp80 %v7_bf, %v7_bf
  store x86_fp80 %v4_c2, x86_fp80* %st7.global-to-local, align 4
  %v1_c4 = load i32, i32* %esi.global-to-local, align 4
  %v2_c4 = add i32 %v1_c4, 112
  %v3_c4 = inttoptr i32 %v2_c4 to double*
  %v4_c4 = load double, double* %v3_c4, align 4
  %v5_c4 = fpext double %v4_c4 to x86_fp80
  store x86_fp80 %v5_c4, x86_fp80* %st7.global-to-local, align 4
  %v2_c7 = add i32 %v2_a9, -36
  %v3_c7 = inttoptr i32 %v2_c7 to float*
  %v4_c7 = load float, float* %v3_c7, align 4
  %v5_c7 = fpext float %v4_c7 to x86_fp80
  store x86_fp80 %v5_c7, x86_fp80* %st6.global-to-local, align 4
  %v4_ca = fmul x86_fp80 %v5_c4, %v5_c7
  %v4_cc = fmul x86_fp80 %v4_ca, %v4_ca
  %v4_ce = fmul x86_fp80 %v4_cc, %v4_cc
  %v4_d0 = fmul x86_fp80 %v4_ce, %v4_ce
  store x86_fp80 %v4_d0, x86_fp80* %st7.global-to-local, align 4
  %v4_d2 = fptrunc x86_fp80 %v4_d0 to double
  store double %v4_d2, double* %v3_c4, align 4
  br label %dec_label_pc_d5

dec_label_pc_d5:                                  ; preds = %dec_label_pc_9d.dec_label_pc_d5_crit_edge, %dec_label_pc_a7, %dec_label_pc_6d, %dec_label_pc_1d
  %v2_d5 = phi i32 [ %v2_d5.pre, %dec_label_pc_9d.dec_label_pc_d5_crit_edge ], [ %v1_c4, %dec_label_pc_a7 ], [ %v1_8a, %dec_label_pc_6d ], [ %v1_20, %dec_label_pc_1d ]
  %v0_de = phi i32 [ %v14_a3, %dec_label_pc_9d.dec_label_pc_d5_crit_edge ], [ %v14_a3, %dec_label_pc_a7 ], [ %v14_69, %dec_label_pc_6d ], [ %v14_19, %dec_label_pc_1d ]
  %v0_d5 = phi i3 [ %v0_d5.pre, %dec_label_pc_9d.dec_label_pc_d5_crit_edge ], [ %v0_ac, %dec_label_pc_a7 ], [ %v0_72, %dec_label_pc_6d ], [ %v0_20, %dec_label_pc_1d ]
  %v1_d5 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_d5 = add i32 %v2_d5, -120
  %v4_d5 = fptrunc x86_fp80 %v1_d5 to double
  %v5_d5 = inttoptr i32 %v3_d5 to double*
  store double %v4_d5, double* %v5_d5, align 4
  %v1_d8 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_d8 = add i32 %v2_d5, -112
  %v4_d8 = fptrunc x86_fp80 %v1_d8 to double
  %v5_d8 = inttoptr i32 %v3_d8 to double*
  store double %v4_d8, double* %v5_d8, align 4
  %v1_db = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_db = add i32 %v2_d5, -104
  %v4_db = fptrunc x86_fp80 %v1_db to double
  %v5_db = inttoptr i32 %v3_db to double*
  store double %v4_db, double* %v5_db, align 4
  %v6_db = add i3 %v0_d5, 3
  store i3 %v6_db, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v0_de
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr
