source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %stack_var_-28 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -68
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-28, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_4b = load double, double* %stack_var_-28, align 8
  %tmp262 = call double @llvm.fabs.f64(double %v3_4b)
  %v2_4e = fpext double %tmp262 to x86_fp80
  store x86_fp80 %v2_4e, x86_fp80* %st7.global-to-local, align 4
  %v8_56 = add i3 %v0_4b, -3
  store i3 %v8_56, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_5e = call i32 @__asm_wait()
  %v0_5f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5f = call i16 @__asm_fnstsw(i32 %v0_5f)
  %v0_6a = call i32 @__asm_wait()
  %v1_6b = call i16 @__asm_fnstsw(i32 %v0_5f)
  %v0_78 = call i32 @__asm_wait()
  %v1_79 = call i16 @__asm_fnstsw(i32 %v0_5f)
  %v0_82 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_82 = load i32, i32* %edi.global-to-local, align 4
  %v2_82 = add i32 %v1_82, -92
  %v3_82 = inttoptr i32 %v2_82 to double*
  %v4_82 = load double, double* %v3_82, align 4
  %v5_82 = fpext double %v4_82 to x86_fp80
  %v4_85 = fmul x86_fp80 %v5_82, %v5_82
  store x86_fp80 %v4_85, x86_fp80* %st7.global-to-local, align 4
  %v2_89 = add i32 %v1_82, -84
  %v3_89 = inttoptr i32 %v2_89 to double*
  %v4_89 = load double, double* %v3_89, align 4
  %v5_89 = fpext double %v4_89 to x86_fp80
  %v4_8c = fmul x86_fp80 %v5_89, %v5_89
  store x86_fp80 %v4_8c, x86_fp80* %st7.global-to-local, align 4
  %v2_90 = add i32 %v1_82, -100
  %v3_90 = inttoptr i32 %v2_90 to double*
  %v4_90 = load double, double* %v3_90, align 4
  %v5_90 = fpext double %v4_90 to x86_fp80
  %v4_93 = fmul x86_fp80 %v5_90, %v5_90
  %v4_97 = fadd x86_fp80 %v4_93, %v4_93
  %v4_99 = fadd x86_fp80 %v4_97, %v4_97
  store x86_fp80 %v4_99, x86_fp80* %st7.global-to-local, align 4
  %v3_9b = add i32 %v1_82, -16
  %v4_9b = inttoptr i32 %v3_9b to double*
  %v5_9b = load double, double* %v4_9b, align 4
  %v6_9b = fpext double %v5_9b to x86_fp80
  %v7_9b = fsub x86_fp80 %v4_99, %v6_9b
  store x86_fp80 %v7_9b, x86_fp80* %st7.global-to-local, align 4
  %v9_9e = add i3 %v0_82, 1
  store i3 %v9_9e, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_db = call i32 @__asm_wait()
  %v0_dc = load i32, i32* %fpsw.global-to-local, align 4
  %v1_dc = call i16 @__asm_fnstsw(i32 %v0_dc)
  %v2_dc = sext i16 %v1_dc to i32
  %v4_dc = and i32 %v0_db, -65536
  %v3_de = and i32 %v2_dc, 16640
  %v2_dc.masked = and i32 %v2_dc, -65281
  %v12_de = or i32 %v4_dc, %v2_dc.masked
  %v13_de = or i32 %v12_de, %v3_de
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_e9 = load i32, i32* %edi.global-to-local, align 4
  %v1_e9 = add i32 %v0_e9, -68
  %v2_e9 = inttoptr i32 %v1_e9 to i32*
  %v3_e9 = load i32, i32* %v2_e9, align 4
  %v10_e9 = icmp eq i32 %v3_e9, 0
  %v1_ed = icmp eq i1 %v10_e9, false
  %v1_f2.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_ed, label %dec_label_pc_f2, label %dec_label_pc_ef

dec_label_pc_ef:                                  ; preds = %dec_label_pc_40
  %v3_ef = add i32 %v0_e9, -32
  %v4_ef = inttoptr i32 %v3_ef to double*
  %v5_ef = load double, double* %v4_ef, align 4
  %v6_ef = fpext double %v5_ef to x86_fp80
  %v7_ef = fdiv x86_fp80 %v1_f2.pre, %v6_ef
  store x86_fp80 %v7_ef, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f2

dec_label_pc_f2:                                  ; preds = %dec_label_pc_40, %dec_label_pc_ef
  %v1_f2 = phi x86_fp80 [ %v7_ef, %dec_label_pc_ef ], [ %v1_f2.pre, %dec_label_pc_40 ]
  %v2_f2 = load i32, i32* %esi.global-to-local, align 4
  %v3_f2 = add i32 %v2_f2, -32
  %v4_f2 = fptrunc x86_fp80 %v1_f2 to double
  %v5_f2 = inttoptr i32 %v3_f2 to double*
  store double %v4_f2, double* %v5_f2, align 4
  %v6_f2 = add i3 %storemerge.in, 2
  store i3 %v6_f2, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v13_de
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
