source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %stack_var_-64 = alloca i32, align 4
  %stack_var_-16 = alloca i32, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %v0_5, i32* %stack_var_-16, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %edi.global-to-local, align 4
  %v1_11 = add i32 %arg1, 208
  %v2_11 = inttoptr i32 %v1_11 to i32*
  %v3_11 = load i32, i32* %v2_11, align 4
  %v4_11 = add i32 %v3_11, 1
  store i32 %v4_11, i32* %v2_11, align 4
  %v0_17 = load i32, i32* @edx, align 8
  %v0_1c = load i32, i32* %esi.global-to-local, align 4
  %v1_1c = add i32 %v0_1c, 208
  %v2_1c = inttoptr i32 %v1_1c to i32*
  %v3_1c = load i32, i32* %v2_1c, align 4
  %v2_22 = add i32 %v3_1c, 49913
  %v17_22 = urem i32 %v2_22, 65536
  %v19_22 = and i32 %v3_1c, -65536
  %v20_22 = or i32 %v17_22, %v19_22
  %v2_26 = zext i32 %v20_22 to i64
  %v4_26 = mul nuw i64 %v2_26, %v2_26
  %v5_26 = trunc i64 %v4_26 to i32
  %v6_26 = udiv i64 %v4_26, 4294967296
  %v7_26 = trunc i64 %v6_26 to i32
  store i32 %v5_26, i32* @eax, align 8
  store i32 %v7_26, i32* @edx, align 8
  %v0_2c = load i32, i32* %edi.global-to-local, align 4
  %v1_2c = add i32 %v0_2c, -36
  %v2_2c = inttoptr i32 %v1_2c to i32*
  %v3_2c = load i32, i32* %v2_2c, align 4
  %v5_2f = urem i32 %v5_26, 65536
  %v6_2f = urem i32 %v3_2c, 65536
  %v7_2f = mul nuw i32 %v5_2f, %v6_2f
  %v8_2f = udiv i32 %v7_2f, 65536
  %v17_2f = and i32 %v7_26, -65536
  %v18_2f = or i32 %v8_2f, %v17_2f
  store i32 %v18_2f, i32* @edx, align 8
  %v1_34 = urem i32 %v7_2f, 16384
  store i32 %v1_34, i32* @eax, align 8
  store i32 %v1_34, i32* %stack_var_-64, align 4
  %v1_3c = add i32 %v0_2c, -40
  %v2_3c = inttoptr i32 %v1_3c to i32*
  %v3_3c = load i32, i32* %v2_3c, align 4
  %v6_3f = urem i32 %v3_3c, 65536
  %v7_3f = mul nuw i32 %v6_3f, %v5_2f
  %v8_3f = udiv i32 %v7_3f, 65536
  %v18_3f = or i32 %v8_3f, %v17_2f
  store i32 %v18_3f, i32* @edx, align 8
  %v1_44 = urem i32 %v7_3f, 16384
  store i32 %v1_44, i32* @eax, align 8
  %v1_4d = add i32 %v0_2c, -44
  %v2_4d = inttoptr i32 %v1_4d to i32*
  %v3_4d = load i32, i32* %v2_4d, align 4
  %v6_50 = urem i32 %v3_4d, 65536
  %v7_50 = mul nuw i32 %v6_50, %v5_2f
  %v8_50 = udiv i32 %v7_50, 65536
  %v18_50 = or i32 %v8_50, %v17_2f
  store i32 %v18_50, i32* @edx, align 8
  %v1_55 = urem i32 %v7_50, 16384
  store i32 %v1_55, i32* @eax, align 8
  %v2_5f = add i32 %v0_2c, -16
  %v3_5f = inttoptr i32 %v2_5f to double*
  %v4_5f = load double, double* %v3_5f, align 4
  %tmp313 = call double @llvm.fabs.f64(double %v4_5f)
  %v2_62 = fpext double %tmp313 to x86_fp80
  store x86_fp80 %v2_62, x86_fp80* %st7.global-to-local, align 4
  %v0_68 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_68 = call i16 @__asm_fnstsw(i32 %v0_68)
  %v2_68 = sext i16 %v1_68 to i32
  %v3_68 = load i32, i32* @eax, align 8
  %v4_68 = and i32 %v3_68, -65536
  %tmp329 = udiv i32 %v2_68, 2
  %v12_6a = and i32 %tmp329, 32512
  %v2_68.masked = and i32 %v2_68, -65281
  %v13_6a = or i32 %v4_68, %v2_68.masked
  %v14_6a = or i32 %v13_6a, %v12_6a
  store i32 %v14_6a, i32* @eax, align 8
  %v15_6a45 = and i32 %v2_68, 256
  %v16_6a = icmp eq i32 %v15_6a45, 0
  br i1 %v16_6a, label %dec_label_pc_6e, label %dec_label_pc_0.dec_label_pc_dc_crit_edge

dec_label_pc_0.dec_label_pc_dc_crit_edge:         ; preds = %dec_label_pc_0
  %v0_dd.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_dc

dec_label_pc_6e:                                  ; preds = %dec_label_pc_0
  %v0_6e = load i32, i32* @edx, align 8
  %v1_6e = and i32 %v0_6e, -65536
  store i32 %v1_6e, i32* @edx, align 8
  %v0_72 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_72 = load i32, i32* %stack_var_-64, align 4
  %v4_72 = sitofp i32 %v3_72 to x86_fp80
  %v5_72 = add i3 %v0_72, -1
  store x86_fp80 %v4_72, x86_fp80* %st7.global-to-local, align 4
  %v2_75 = load i32, i32* %edi.global-to-local, align 4
  %v3_75 = add i32 %v2_75, 8
  %v4_75 = inttoptr i32 %v3_75 to double*
  %v5_75 = load double, double* %v4_75, align 4
  %v6_75 = fpext double %v5_75 to x86_fp80
  %v7_75 = fmul x86_fp80 %v4_72, %v6_75
  store x86_fp80 %v7_75, x86_fp80* %st7.global-to-local, align 4
  %v3_78 = add i32 %v2_75, 16
  %v4_78 = inttoptr i32 %v3_78 to double*
  %v5_78 = load double, double* %v4_78, align 4
  %v6_78 = fpext double %v5_78 to x86_fp80
  %v7_78 = fsub x86_fp80 %v7_75, %v6_78
  store x86_fp80 %v7_78, x86_fp80* %st7.global-to-local, align 4
  %v3_7b = add i32 %v2_75, -16
  %v4_7b = inttoptr i32 %v3_7b to double*
  %v5_7b = load double, double* %v4_7b, align 4
  %v6_7b = fpext double %v5_7b to x86_fp80
  %v7_7b = fmul x86_fp80 %v7_78, %v6_7b
  store x86_fp80 %v7_7b, x86_fp80* %st7.global-to-local, align 4
  store i3 %v5_72, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_82 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_82 = call i16 @__asm_fnstsw(i32 %v0_82)
  %v2_82 = sext i16 %v1_82 to i32
  %v3_82 = load i32, i32* @eax, align 8
  %v4_82 = and i32 %v3_82, -65536
  %tmp330 = udiv i32 %v2_82, 2
  %v12_84 = and i32 %tmp330, 32512
  %v2_82.masked = and i32 %v2_82, -65281
  %v13_84 = or i32 %v4_82, %v2_82.masked
  %v14_84 = or i32 %v13_84, %v12_84
  store i32 %v14_84, i32* @eax, align 8
  %v15_8446 = and i32 %v2_82, 256
  %v16_84 = icmp ne i32 %v15_8446, 0
  %v1_86 = icmp eq i1 %v16_84, false
  br i1 %v1_86, label %dec_label_pc_92, label %dec_label_pc_88

dec_label_pc_88:                                  ; preds = %dec_label_pc_6e
  %v0_92 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_88 = load i32, i32* %edi.global-to-local, align 4
  %v2_88 = inttoptr i32 %v1_88 to double*
  %v3_88 = load double, double* %v2_88, align 4
  %v4_88 = fpext double %v3_88 to x86_fp80
  %v3_8a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_8a = fsub x86_fp80 %v4_88, %v3_8a
  store x86_fp80 %v4_8a, x86_fp80* %st7.global-to-local, align 4
  %v0_8c = load i32, i32* @edx, align 8
  %v1_8c = and i32 %v0_8c, -65536
  %v2_8c = or i32 %v1_8c, 1
  store i32 %v2_8c, i32* @edx, align 8
  br label %dec_label_pc_a8

dec_label_pc_92:                                  ; preds = %dec_label_pc_6e
  %v0_98 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_98 = call i16 @__asm_fnstsw(i32 %v0_98)
  %v2_98 = sext i16 %v1_98 to i32
  %v3_98 = load i32, i32* @eax, align 8
  %v4_98 = and i32 %v3_98, -65536
  %tmp331 = udiv i32 %v2_98, 2
  %v12_9a = and i32 %tmp331, 32512
  %v2_98.masked = and i32 %v2_98, -65281
  %v13_9a = or i32 %v4_98, %v2_98.masked
  %v14_9a = or i32 %v13_9a, %v12_9a
  store i32 %v14_9a, i32* @eax, align 8
  %v15_9a53 = and i32 %v2_98, 256
  %v16_9a = icmp eq i32 %v15_9a53, 0
  %v0_9e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v16_9a, label %dec_label_pc_9e, label %dec_label_pc_92.dec_label_pc_a8_crit_edge

dec_label_pc_92.dec_label_pc_a8_crit_edge:        ; preds = %dec_label_pc_92
  %v1_a8.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v0_b2.pre = load i32, i32* @edx, align 8
  br label %dec_label_pc_a8

dec_label_pc_9e:                                  ; preds = %dec_label_pc_92
  %v1_9e = load i32, i32* %edi.global-to-local, align 4
  %v2_9e = inttoptr i32 %v1_9e to double*
  %v3_9e = load double, double* %v2_9e, align 4
  %v4_9e = fpext double %v3_9e to x86_fp80
  %v4_a0 = fadd x86_fp80 %v4_9e, %v4_9e
  %v2_a2 = fsub x86_fp80 0xK80000000000000000000, %v4_a0
  store x86_fp80 %v2_a2, x86_fp80* %st7.global-to-local, align 4
  %v0_a4 = load i32, i32* @edx, align 8
  %v1_a4 = and i32 %v0_a4, -65536
  %v2_a4 = or i32 %v1_a4, 1
  store i32 %v2_a4, i32* @edx, align 8
  br label %dec_label_pc_a8

dec_label_pc_a8:                                  ; preds = %dec_label_pc_92.dec_label_pc_a8_crit_edge, %dec_label_pc_9e, %dec_label_pc_88
  %v2_a8.pre-phi.in = phi i3 [ %v0_9e, %dec_label_pc_92.dec_label_pc_a8_crit_edge ], [ %v0_9e, %dec_label_pc_9e ], [ %v0_92, %dec_label_pc_88 ]
  %v0_b2 = phi i32 [ %v0_b2.pre, %dec_label_pc_92.dec_label_pc_a8_crit_edge ], [ %v2_a4, %dec_label_pc_9e ], [ %v2_8c, %dec_label_pc_88 ]
  %v3_ce = phi x86_fp80 [ %v1_a8.pre, %dec_label_pc_92.dec_label_pc_a8_crit_edge ], [ %v2_a2, %dec_label_pc_9e ], [ %v4_8a, %dec_label_pc_88 ]
  %v3_aa = fmul x86_fp80 %v3_ce, %v3_ce
  %v4_ae = fsub x86_fp80 0xK3FFF8000000000000000, %v3_aa
  %v2_b0 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_ae)
  %v1_b2 = trunc i32 %v0_b2 to i16
  %v8_b2 = icmp eq i16 %v1_b2, 0
  %v2_b8 = fsub x86_fp80 0xK80000000000000000000, %v2_b0
  %spec.select = select i1 %v8_b2, x86_fp80 %v2_b0, x86_fp80 %v2_b8
  store i32 %v0_17, i32* @edx, align 8
  %v3_be = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_be = fpext double %v3_be to x86_fp80
  %v4_c0 = fmul x86_fp80 %v3_ce, %v4_be
  %v3_c2 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_c2 = fpext double %v3_c2 to x86_fp80
  %v4_c4 = fmul x86_fp80 %spec.select, %v4_c2
  %v4_c6 = fsub x86_fp80 %v4_c4, %v4_c0
  store x86_fp80 %v4_c6, x86_fp80* %st5.global-to-local, align 4
  %v4_ca = fmul x86_fp80 %spec.select, %v4_be
  %v4_ce = fmul x86_fp80 %v3_ce, %v4_c2
  %v4_d0 = fadd x86_fp80 %v4_ca, %v4_ce
  %v2_d2 = load i32, i32* %ebx.global-to-local, align 4
  %v3_d2 = fptrunc x86_fp80 %v4_d0 to double
  %v4_d2 = inttoptr i32 %v2_d2 to double*
  store double %v3_d2, double* %v4_d2, align 4
  %v1_d4 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v2_d4 = load i32, i32* @edx, align 8
  %v3_d4 = fptrunc x86_fp80 %v1_d4 to double
  %v4_d4 = inttoptr i32 %v2_d4 to double*
  store double %v3_d4, double* %v4_d4, align 4
  %v4_da = add i3 %v2_a8.pre-phi.in, 2
  store i3 %v4_da, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_dc

dec_label_pc_dc:                                  ; preds = %dec_label_pc_0.dec_label_pc_dc_crit_edge, %dec_label_pc_a8
  %v0_dd = phi i3 [ %v0_dd.pre, %dec_label_pc_0.dec_label_pc_dc_crit_edge ], [ %v4_da, %dec_label_pc_a8 ]
  %v1_dd = load i32, i32* %edi.global-to-local, align 4
  %v2_dd = add i32 %v1_dd, -24
  %v3_dd = inttoptr i32 %v2_dd to double*
  %v4_dd = load double, double* %v3_dd, align 4
  %tmp317 = call double @llvm.fabs.f64(double %v4_dd)
  %v2_e0 = fpext double %tmp317 to x86_fp80
  store x86_fp80 %v2_e0, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_dd, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_e6 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_e6 = call i16 @__asm_fnstsw(i32 %v0_e6)
  %v2_e6 = sext i16 %v1_e6 to i32
  %v3_e6 = load i32, i32* @eax, align 8
  %v4_e6 = and i32 %v3_e6, -65536
  %tmp332 = udiv i32 %v2_e6, 2
  %v12_e8 = and i32 %tmp332, 32512
  %v2_e6.masked = and i32 %v2_e6, -65281
  %v13_e8 = or i32 %v4_e6, %v2_e6.masked
  %v14_e8 = or i32 %v13_e8, %v12_e8
  store i32 %v14_e8, i32* @eax, align 8
  %v15_e847 = and i32 %v2_e6, 256
  %v16_e8 = icmp eq i32 %v15_e847, 0
  br i1 %v16_e8, label %dec_label_pc_ec, label %dec_label_pc_dc.dec_label_pc_157_crit_edge

dec_label_pc_dc.dec_label_pc_157_crit_edge:       ; preds = %dec_label_pc_dc
  %v0_158.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_157

dec_label_pc_ec:                                  ; preds = %dec_label_pc_dc
  %v0_ec = load i32, i32* @edx, align 8
  %v1_ec = and i32 %v0_ec, -65536
  store i32 %v1_ec, i32* @edx, align 8
  %v0_f0 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_f0 = sitofp i32 %v1_44 to x86_fp80
  %v6_f0 = add i3 %v0_f0, -1
  store x86_fp80 %v5_f0, x86_fp80* %st7.global-to-local, align 4
  %v2_f4 = load i32, i32* %edi.global-to-local, align 4
  %v3_f4 = add i32 %v2_f4, 8
  %v4_f4 = inttoptr i32 %v3_f4 to double*
  %v5_f4 = load double, double* %v4_f4, align 4
  %v6_f4 = fpext double %v5_f4 to x86_fp80
  %v7_f4 = fmul x86_fp80 %v5_f0, %v6_f4
  store x86_fp80 %v7_f4, x86_fp80* %st7.global-to-local, align 4
  %v3_f7 = add i32 %v2_f4, 16
  %v4_f7 = inttoptr i32 %v3_f7 to double*
  %v5_f7 = load double, double* %v4_f7, align 4
  %v6_f7 = fpext double %v5_f7 to x86_fp80
  %v7_f7 = fsub x86_fp80 %v7_f4, %v6_f7
  store x86_fp80 %v7_f7, x86_fp80* %st7.global-to-local, align 4
  %v3_fa = add i32 %v2_f4, -24
  %v4_fa = inttoptr i32 %v3_fa to double*
  %v5_fa = load double, double* %v4_fa, align 4
  %v6_fa = fpext double %v5_fa to x86_fp80
  %v7_fa = fmul x86_fp80 %v7_f7, %v6_fa
  store x86_fp80 %v7_fa, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_f0, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_101 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_101 = call i16 @__asm_fnstsw(i32 %v0_101)
  %v2_101 = sext i16 %v1_101 to i32
  %v3_101 = load i32, i32* @eax, align 8
  %v4_101 = and i32 %v3_101, -65536
  %tmp333 = udiv i32 %v2_101, 2
  %v12_103 = and i32 %tmp333, 32512
  %v2_101.masked = and i32 %v2_101, -65281
  %v13_103 = or i32 %v4_101, %v2_101.masked
  %v14_103 = or i32 %v13_103, %v12_103
  store i32 %v14_103, i32* @eax, align 8
  %v15_10348 = and i32 %v2_101, 256
  %v16_103 = icmp ne i32 %v15_10348, 0
  %v1_105 = icmp eq i1 %v16_103, false
  br i1 %v1_105, label %dec_label_pc_111, label %dec_label_pc_107

dec_label_pc_107:                                 ; preds = %dec_label_pc_ec
  %v0_111 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_107 = load i32, i32* %edi.global-to-local, align 4
  %v2_107 = inttoptr i32 %v1_107 to double*
  %v3_107 = load double, double* %v2_107, align 4
  %v4_107 = fpext double %v3_107 to x86_fp80
  %v3_109 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_109 = fsub x86_fp80 %v4_107, %v3_109
  store x86_fp80 %v4_109, x86_fp80* %st7.global-to-local, align 4
  %v0_10b = load i32, i32* @edx, align 8
  %v1_10b = and i32 %v0_10b, -65536
  %v2_10b = or i32 %v1_10b, 1
  store i32 %v2_10b, i32* @edx, align 8
  br label %dec_label_pc_127

dec_label_pc_111:                                 ; preds = %dec_label_pc_ec
  %v0_117 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_117 = call i16 @__asm_fnstsw(i32 %v0_117)
  %v2_117 = sext i16 %v1_117 to i32
  %v3_117 = load i32, i32* @eax, align 8
  %v4_117 = and i32 %v3_117, -65536
  %tmp334 = udiv i32 %v2_117, 2
  %v12_119 = and i32 %tmp334, 32512
  %v2_117.masked = and i32 %v2_117, -65281
  %v13_119 = or i32 %v4_117, %v2_117.masked
  %v14_119 = or i32 %v13_119, %v12_119
  store i32 %v14_119, i32* @eax, align 8
  %v15_11952 = and i32 %v2_117, 256
  %v16_119 = icmp eq i32 %v15_11952, 0
  %v0_11d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v16_119, label %dec_label_pc_11d, label %dec_label_pc_111.dec_label_pc_127_crit_edge

dec_label_pc_111.dec_label_pc_127_crit_edge:      ; preds = %dec_label_pc_111
  %v1_127.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v0_131.pre = load i32, i32* @edx, align 8
  br label %dec_label_pc_127

dec_label_pc_11d:                                 ; preds = %dec_label_pc_111
  %v1_11d = load i32, i32* %edi.global-to-local, align 4
  %v2_11d = inttoptr i32 %v1_11d to double*
  %v3_11d = load double, double* %v2_11d, align 4
  %v4_11d = fpext double %v3_11d to x86_fp80
  %v3_11f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_11f = fadd x86_fp80 %v3_11f, %v4_11d
  %v2_121 = fsub x86_fp80 0xK80000000000000000000, %v4_11f
  store x86_fp80 %v2_121, x86_fp80* %st7.global-to-local, align 4
  %v0_123 = load i32, i32* @edx, align 8
  %v1_123 = and i32 %v0_123, -65536
  %v2_123 = or i32 %v1_123, 1
  store i32 %v2_123, i32* @edx, align 8
  br label %dec_label_pc_127

dec_label_pc_127:                                 ; preds = %dec_label_pc_111.dec_label_pc_127_crit_edge, %dec_label_pc_11d, %dec_label_pc_107
  %v2_127.pre-phi.in = phi i3 [ %v0_11d, %dec_label_pc_111.dec_label_pc_127_crit_edge ], [ %v0_11d, %dec_label_pc_11d ], [ %v0_111, %dec_label_pc_107 ]
  %v0_131 = phi i32 [ %v0_131.pre, %dec_label_pc_111.dec_label_pc_127_crit_edge ], [ %v2_123, %dec_label_pc_11d ], [ %v2_10b, %dec_label_pc_107 ]
  %v3_149 = phi x86_fp80 [ %v1_127.pre, %dec_label_pc_111.dec_label_pc_127_crit_edge ], [ %v2_121, %dec_label_pc_11d ], [ %v4_109, %dec_label_pc_107 ]
  %v3_129 = fmul x86_fp80 %v3_149, %v3_149
  %v4_12d = fsub x86_fp80 0xK3FFF8000000000000000, %v3_129
  %v2_12f = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_12d)
  %v1_131 = trunc i32 %v0_131 to i16
  %v8_131 = icmp eq i16 %v1_131, 0
  %v2_137 = fsub x86_fp80 0xK80000000000000000000, %v2_12f
  %spec.select327 = select i1 %v8_131, x86_fp80 %v2_12f, x86_fp80 %v2_137
  %v3_139 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_139 = fpext double %v3_139 to x86_fp80
  %v4_13b = fmul x86_fp80 %v3_149, %v4_139
  %v3_13d = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_13d = fpext double %v3_13d to x86_fp80
  %v4_13f = fmul x86_fp80 %spec.select327, %v4_13d
  %v4_141 = fsub x86_fp80 %v4_13f, %v4_13b
  store x86_fp80 %v4_141, x86_fp80* %st5.global-to-local, align 4
  %v4_145 = fmul x86_fp80 %spec.select327, %v4_139
  %v4_149 = fmul x86_fp80 %v3_149, %v4_13d
  %v4_14b = fadd x86_fp80 %v4_145, %v4_149
  %v2_14d = load i32, i32* %ebx.global-to-local, align 4
  %v3_14d = fptrunc x86_fp80 %v4_14b to double
  %v4_14d = inttoptr i32 %v2_14d to double*
  store double %v3_14d, double* %v4_14d, align 4
  %v1_14f = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v2_14f = load i32, i32* @ecx, align 8
  %v3_14f = fptrunc x86_fp80 %v1_14f to double
  %v4_14f = inttoptr i32 %v2_14f to double*
  store double %v3_14f, double* %v4_14f, align 4
  %v4_155 = add i3 %v2_127.pre-phi.in, 2
  store i3 %v4_155, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_157

dec_label_pc_157:                                 ; preds = %dec_label_pc_dc.dec_label_pc_157_crit_edge, %dec_label_pc_127
  %v0_158 = phi i3 [ %v0_158.pre, %dec_label_pc_dc.dec_label_pc_157_crit_edge ], [ %v4_155, %dec_label_pc_127 ]
  %v1_158 = load i32, i32* %edi.global-to-local, align 4
  %v2_158 = add i32 %v1_158, -32
  %v3_158 = inttoptr i32 %v2_158 to double*
  %v4_158 = load double, double* %v3_158, align 4
  %tmp321 = call double @llvm.fabs.f64(double %v4_158)
  %v2_15b = fpext double %tmp321 to x86_fp80
  store x86_fp80 %v2_15b, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_158, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_161 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_161 = call i16 @__asm_fnstsw(i32 %v0_161)
  %v2_161 = sext i16 %v1_161 to i32
  %v3_161 = load i32, i32* @eax, align 8
  %v4_161 = and i32 %v3_161, -65536
  %tmp335 = udiv i32 %v2_161, 2
  %v12_163 = and i32 %tmp335, 32512
  %v2_161.masked = and i32 %v2_161, -65281
  %v13_163 = or i32 %v4_161, %v2_161.masked
  %v14_163 = or i32 %v13_163, %v12_163
  store i32 %v14_163, i32* @eax, align 8
  %v15_16349 = and i32 %v2_161, 256
  %v16_163 = icmp eq i32 %v15_16349, 0
  br i1 %v16_163, label %dec_label_pc_167, label %dec_label_pc_1d6

dec_label_pc_167:                                 ; preds = %dec_label_pc_157
  %v0_167 = load i32, i32* @edx, align 8
  %v1_167 = and i32 %v0_167, -65536
  store i32 %v1_167, i32* @edx, align 8
  %v0_16b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_16b = sitofp i32 %v1_55 to x86_fp80
  %v6_16b = add i3 %v0_16b, -1
  store x86_fp80 %v5_16b, x86_fp80* %st7.global-to-local, align 4
  %v2_16f = load i32, i32* %edi.global-to-local, align 4
  %v3_16f = add i32 %v2_16f, 8
  %v4_16f = inttoptr i32 %v3_16f to double*
  %v5_16f = load double, double* %v4_16f, align 4
  %v6_16f = fpext double %v5_16f to x86_fp80
  %v7_16f = fmul x86_fp80 %v5_16b, %v6_16f
  store x86_fp80 %v7_16f, x86_fp80* %st7.global-to-local, align 4
  %v3_172 = add i32 %v2_16f, 16
  %v4_172 = inttoptr i32 %v3_172 to double*
  %v5_172 = load double, double* %v4_172, align 4
  %v6_172 = fpext double %v5_172 to x86_fp80
  %v7_172 = fsub x86_fp80 %v7_16f, %v6_172
  store x86_fp80 %v7_172, x86_fp80* %st7.global-to-local, align 4
  %v3_175 = add i32 %v2_16f, -32
  %v4_175 = inttoptr i32 %v3_175 to double*
  %v5_175 = load double, double* %v4_175, align 4
  %v6_175 = fpext double %v5_175 to x86_fp80
  %v7_175 = fmul x86_fp80 %v7_172, %v6_175
  store x86_fp80 %v7_175, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_16b, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_17c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_17c = call i16 @__asm_fnstsw(i32 %v0_17c)
  %v2_17c = sext i16 %v1_17c to i32
  %v3_17c = load i32, i32* @eax, align 8
  %v4_17c = and i32 %v3_17c, -65536
  %tmp336 = udiv i32 %v2_17c, 2
  %v12_17e = and i32 %tmp336, 32512
  %v2_17c.masked = and i32 %v2_17c, -65281
  %v13_17e = or i32 %v4_17c, %v2_17c.masked
  %v14_17e = or i32 %v13_17e, %v12_17e
  store i32 %v14_17e, i32* @eax, align 8
  %v15_17e50 = and i32 %v2_17c, 256
  %v16_17e = icmp ne i32 %v15_17e50, 0
  %v1_180 = icmp eq i1 %v16_17e, false
  br i1 %v1_180, label %dec_label_pc_18c, label %dec_label_pc_182

dec_label_pc_182:                                 ; preds = %dec_label_pc_167
  %v0_18c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_182 = load i32, i32* %edi.global-to-local, align 4
  %v2_182 = inttoptr i32 %v1_182 to double*
  %v3_182 = load double, double* %v2_182, align 4
  %v4_182 = fpext double %v3_182 to x86_fp80
  %v3_184 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_184 = fsub x86_fp80 %v4_182, %v3_184
  store x86_fp80 %v4_184, x86_fp80* %st7.global-to-local, align 4
  %v0_186 = load i32, i32* @edx, align 8
  %v1_186 = and i32 %v0_186, -65536
  %v2_186 = or i32 %v1_186, 1
  store i32 %v2_186, i32* @edx, align 8
  br label %dec_label_pc_1a2

dec_label_pc_18c:                                 ; preds = %dec_label_pc_167
  %v0_192 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_192 = call i16 @__asm_fnstsw(i32 %v0_192)
  %v2_192 = sext i16 %v1_192 to i32
  %v3_192 = load i32, i32* @eax, align 8
  %v4_192 = and i32 %v3_192, -65536
  %tmp337 = udiv i32 %v2_192, 2
  %v12_194 = and i32 %tmp337, 32512
  %v2_192.masked = and i32 %v2_192, -65281
  %v13_194 = or i32 %v4_192, %v2_192.masked
  %v14_194 = or i32 %v13_194, %v12_194
  store i32 %v14_194, i32* @eax, align 8
  %v15_19451 = and i32 %v2_192, 256
  %v16_194 = icmp eq i32 %v15_19451, 0
  %v0_198 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v16_194, label %dec_label_pc_198, label %dec_label_pc_18c.dec_label_pc_1a2_crit_edge

dec_label_pc_18c.dec_label_pc_1a2_crit_edge:      ; preds = %dec_label_pc_18c
  %v1_1a2.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v0_1ac.pre = load i32, i32* @edx, align 8
  br label %dec_label_pc_1a2

dec_label_pc_198:                                 ; preds = %dec_label_pc_18c
  %v1_198 = load i32, i32* %edi.global-to-local, align 4
  %v2_198 = inttoptr i32 %v1_198 to double*
  %v3_198 = load double, double* %v2_198, align 4
  %v4_198 = fpext double %v3_198 to x86_fp80
  %v4_19a = fadd x86_fp80 %v4_198, %v4_198
  %v2_19c = fsub x86_fp80 0xK80000000000000000000, %v4_19a
  store x86_fp80 %v2_19c, x86_fp80* %st7.global-to-local, align 4
  %v0_19e = load i32, i32* @edx, align 8
  %v1_19e = and i32 %v0_19e, -65536
  %v2_19e = or i32 %v1_19e, 1
  store i32 %v2_19e, i32* @edx, align 8
  br label %dec_label_pc_1a2

dec_label_pc_1a2:                                 ; preds = %dec_label_pc_18c.dec_label_pc_1a2_crit_edge, %dec_label_pc_198, %dec_label_pc_182
  %v2_1a2.pre-phi.in = phi i3 [ %v0_198, %dec_label_pc_18c.dec_label_pc_1a2_crit_edge ], [ %v0_198, %dec_label_pc_198 ], [ %v0_18c, %dec_label_pc_182 ]
  %v0_1ac = phi i32 [ %v0_1ac.pre, %dec_label_pc_18c.dec_label_pc_1a2_crit_edge ], [ %v2_19e, %dec_label_pc_198 ], [ %v2_186, %dec_label_pc_182 ]
  %v3_1c8 = phi x86_fp80 [ %v1_1a2.pre, %dec_label_pc_18c.dec_label_pc_1a2_crit_edge ], [ %v2_19c, %dec_label_pc_198 ], [ %v4_184, %dec_label_pc_182 ]
  %v3_1a4 = fmul x86_fp80 %v3_1c8, %v3_1c8
  %v4_1a8 = fsub x86_fp80 0xK3FFF8000000000000000, %v3_1a4
  %v2_1aa = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_1a8)
  %v1_1ac = trunc i32 %v0_1ac to i16
  %v8_1ac = icmp eq i16 %v1_1ac, 0
  %v2_1b2 = fsub x86_fp80 0xK80000000000000000000, %v2_1aa
  %spec.select328 = select i1 %v8_1ac, x86_fp80 %v2_1aa, x86_fp80 %v2_1b2
  store i32 %v0_17, i32* @edx, align 8
  %v3_1b8 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_1b8 = fpext double %v3_1b8 to x86_fp80
  %v4_1ba = fmul x86_fp80 %v3_1c8, %v4_1b8
  %v3_1bc = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_1bc = fpext double %v3_1bc to x86_fp80
  %v4_1be = fmul x86_fp80 %spec.select328, %v4_1bc
  %v4_1c0 = fsub x86_fp80 %v4_1be, %v4_1ba
  store x86_fp80 %v4_1c0, x86_fp80* %st5.global-to-local, align 4
  %v4_1c4 = fmul x86_fp80 %spec.select328, %v4_1b8
  %v4_1c8 = fmul x86_fp80 %v3_1c8, %v4_1bc
  %v4_1ca = fadd x86_fp80 %v4_1c4, %v4_1c8
  %tmp325 = bitcast double %v3_1b8 to i64
  %tmp326 = trunc i64 %tmp325 to i32
  %v3_1cc = fptrunc x86_fp80 %v4_1ca to double
  %v4_1cc = inttoptr i32 %tmp326 to double*
  store double %v3_1cc, double* %v4_1cc, align 4
  %v1_1ce = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v2_1ce = load i32, i32* @ecx, align 8
  %v3_1ce = fptrunc x86_fp80 %v1_1ce to double
  %v4_1ce = inttoptr i32 %v2_1ce to double*
  store double %v3_1ce, double* %v4_1ce, align 4
  %v4_1d4 = add i3 %v2_1a2.pre-phi.in, 2
  store i3 %v4_1d4, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_1d6

dec_label_pc_1d6:                                 ; preds = %dec_label_pc_157, %dec_label_pc_1a2
  %v0_1d9 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %v0_1d9, i32* @eax, align 8
  %v2_1db = load i32, i32* %stack_var_-16, align 4
  store i32 %v2_1db, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v0_1d9
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
