source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@st7 = internal unnamed_addr global x86_fp80 0xK00000000000000000000
@fpu_stat_TOP = internal unnamed_addr global i3 0
@eax = internal unnamed_addr global i32 0
@esp = internal unnamed_addr global i32 0
@esi = internal unnamed_addr global i32 0
@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp267 = call double @__decompiler_undefined_function_3()
  %stack_var_-28 = alloca i128, align 8
  %v0_3 = load i32, i32* @esi, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v0_8 = load i32, i32* @esi, align 4
  %v1_8 = add i32 %v0_8, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* @esi, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* @esi, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v2_36 = load i32, i32* @esi, align 4
  %v3_36 = add i32 %v2_36, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* @esi, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load i128, i128* %stack_var_-28, align 8
  call void @__asm_movupd.1(i128 %v2_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v0_4b = load i32, i32* @edi, align 8
  %v1_4b = add i32 %v0_4b, -84
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v1_4e = mul i32 %v3_4b, 16
  %v2_51 = and i32 %v1_4e, 16
  store i32 %v2_51, i32* %edx.global-to-local, align 4
  %v2_54 = add i32 %v0_4b, -80
  %v3_54 = inttoptr i32 %v2_54 to i32*
  %v4_54 = load i32, i32* %v3_54, align 4
  %v5_54 = sitofp i32 %v4_54 to x86_fp80
  store x86_fp80 %v5_54, x86_fp80* %st7.global-to-local, align 4
  %v1_5c = load i32, i32* @esp, align 4
  %v4_5c = add nuw nsw i32 %v2_51, 16
  %v5_5c = add i32 %v4_5c, %v1_5c
  %v6_5c = inttoptr i32 %v5_5c to double*
  %v7_5c = load double, double* %v6_5c, align 4
  %tmp274 = call double @llvm.fabs.f64(double %v7_5c)
  %v2_60 = fpext double %tmp274 to x86_fp80
  store x86_fp80 %v2_60, x86_fp80* %st7.global-to-local, align 4
  %v2_62 = add i32 %v0_4b, -72
  %v3_62 = inttoptr i32 %v2_62 to double*
  %v4_62 = load double, double* %v3_62, align 4
  %tmp275 = call double @llvm.fabs.f64(double %v4_62)
  %v2_65 = fpext double %tmp275 to x86_fp80
  store x86_fp80 %v2_65, x86_fp80* %st6.global-to-local, align 4
  %v3_67 = add i32 %v0_4b, 8
  %v4_67 = inttoptr i32 %v3_67 to double*
  %v5_67 = load double, double* %v4_67, align 4
  %v6_67 = fpext double %v5_67 to x86_fp80
  %v7_67 = fadd x86_fp80 %v2_65, %v6_67
  %v4_6a = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_6a = fpext double %v4_6a to x86_fp80
  %v6_6a = fmul x86_fp80 %v7_67, %v5_6a
  store x86_fp80 %v6_6a, x86_fp80* %st6.global-to-local, align 4
  %v2_6c = load i32, i32* @esi, align 4
  %v3_6c = add i32 %v2_6c, -136
  %v4_6c = inttoptr i32 %v3_6c to double*
  %v5_6c = load double, double* %v4_6c, align 4
  %v6_6c = fpext double %v5_6c to x86_fp80
  %v7_6c = fadd x86_fp80 %v6_6a, %v6_6c
  store x86_fp80 %v7_6c, x86_fp80* %st6.global-to-local, align 4
  %v0_74 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_74 = call i16 @__asm_fnstsw(i32 %v0_74)
  %v2_74 = sext i16 %v1_74 to i32
  %v3_74 = load i32, i32* %eax.global-to-local, align 4
  %v4_74 = and i32 %v3_74, -65536
  %tmp282 = udiv i32 %v2_74, 2
  %v12_76 = and i32 %tmp282, 32512
  %v2_74.masked = and i32 %v2_74, -65281
  %v13_76 = or i32 %v4_74, %v2_74.masked
  %v14_76 = or i32 %v13_76, %v12_76
  store i32 %v14_76, i32* @eax, align 4
  %v15_76280 = and i32 %v2_74, 256
  %v16_76 = icmp ne i32 %v15_76280, 0
  %v1_78 = icmp eq i1 %v16_76, false
  %v0_85 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_78, label %dec_label_pc_85, label %dec_label_pc_7a

dec_label_pc_7a:                                  ; preds = %dec_label_pc_40
  %v1_7a = load i32, i32* @esp, align 4
  %v2_7a = load i32, i32* %edx.global-to-local, align 4
  %v4_7a = add i32 %v1_7a, 16
  %v5_7a = add i32 %v4_7a, %v2_7a
  %v6_7a = inttoptr i32 %v5_7a to double*
  %v7_7a = load double, double* %v6_7a, align 4
  %v8_7a = fpext double %v7_7a to x86_fp80
  %v9_7a = add i3 %v0_85, -1
  store i3 %v9_7a, i3* @fpu_stat_TOP, align 1
  %v2_7e = fsub x86_fp80 0xK80000000000000000000, %v8_7a
  store x86_fp80 %v2_7e, x86_fp80* @st7, align 4
  %v0_80 = call i32 @function_15f()
  store i32 %v0_80, i32* %eax.global-to-local, align 4
  ret i32 %v0_80

dec_label_pc_85:                                  ; preds = %dec_label_pc_40
  %v5_85 = fpext double %tmp267 to x86_fp80
  store x86_fp80 %v5_85, x86_fp80* %st7.global-to-local, align 4
  %v1_89 = load i32, i32* @esp, align 4
  %v2_89 = load i32, i32* %edx.global-to-local, align 4
  %v4_89 = add i32 %v2_89, %v1_89
  %v5_89 = inttoptr i32 %v4_89 to double*
  %v6_89 = load double, double* %v5_89, align 4
  %v7_89 = fpext double %v6_89 to x86_fp80
  %v8_89 = add i3 %v0_85, -2
  store i3 %v8_89, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_89, x86_fp80* %st6.global-to-local, align 4
  %v2_8e.pre = load i32, i32* @edi, align 8
  %v3_8e = add i32 %v2_8e.pre, -16
  %v4_8e = inttoptr i32 %v3_8e to double*
  %v3_95 = add i32 %v2_8e.pre, -92
  %v4_95 = inttoptr i32 %v3_95 to double*
  %v3_9e = add i32 %v2_8e.pre, -100
  %v4_9e = inttoptr i32 %v3_9e to double*
  %v3_b5 = add i32 %v2_8e.pre, -108
  %v4_b5 = inttoptr i32 %v3_b5 to double*
  br label %dec_label_pc_8c

dec_label_pc_8c:                                  ; preds = %dec_label_pc_8c, %dec_label_pc_85
  %v2_9a = phi x86_fp80 [ %v5_85, %dec_label_pc_85 ], [ %v4_b8, %dec_label_pc_8c ]
  %stack_var_-4.0 = phi i32 [ %v4_54, %dec_label_pc_85 ], [ %v4_be, %dec_label_pc_8c ]
  %v4_9a = fadd x86_fp80 %v2_9a, %v2_9a
  %v2_9c = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_9a)
  %v3_9c = fcmp olt x86_fp80 %v2_9c, 0xK403E8000000000000000
  %v4_9c = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_9a)
  %storemerge12 = select i1 %v3_9c, x86_fp80 %v4_9c, x86_fp80 %v4_9a
  store x86_fp80 %storemerge12, x86_fp80* %st7.global-to-local, align 4
  %v5_9e = load double, double* %v4_9e, align 4
  %v6_9e = fpext double %v5_9e to x86_fp80
  %v7_9e = fmul x86_fp80 %storemerge12, %v6_9e
  %v4_a1 = fadd x86_fp80 %v7_9e, %v7_9e
  store x86_fp80 %v4_a1, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_a1, x86_fp80* %st6.global-to-local, align 4
  %v5_a5 = load double, double* %v4_8e, align 4
  %v6_a5 = fpext double %v5_a5 to x86_fp80
  %v7_a5 = fmul x86_fp80 %v4_a1, %v6_a5
  %v2_a8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_a5)
  %v3_a8 = fcmp olt x86_fp80 %v2_a8, 0xK403E8000000000000000
  %v4_a8 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_a5)
  %storemerge11 = select i1 %v3_a8, x86_fp80 %v4_a8, x86_fp80 %v7_a5
  store x86_fp80 %storemerge11, x86_fp80* %st6.global-to-local, align 4
  %v4_aa = fadd x86_fp80 %v4_a1, %v4_a1
  store x86_fp80 %v4_aa, x86_fp80* %st7.global-to-local, align 4
  %v5_ac = load double, double* %v4_95, align 4
  %v6_ac = fpext double %v5_ac to x86_fp80
  %v7_ac = fmul x86_fp80 %v4_aa, %v6_ac
  %v2_af = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_ac)
  %v3_af = fcmp olt x86_fp80 %v2_af, 0xK403E8000000000000000
  %v4_af = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_ac)
  %storemerge10 = select i1 %v3_af, x86_fp80 %v4_af, x86_fp80 %v7_ac
  %v4_b1 = fadd x86_fp80 %storemerge10, %storemerge10
  %v2_b3 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_b1)
  %v3_b3 = fcmp olt x86_fp80 %v2_b3, 0xK403E8000000000000000
  %v4_b3 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_b1)
  %storemerge = select i1 %v3_b3, x86_fp80 %v4_b3, x86_fp80 %v4_b1
  store x86_fp80 %storemerge, x86_fp80* %st7.global-to-local, align 4
  %v5_b5 = load double, double* %v4_b5, align 4
  %v6_b5 = fpext double %v5_b5 to x86_fp80
  %v7_b5 = fmul x86_fp80 %storemerge, %v6_b5
  %v4_b8 = fadd x86_fp80 %v7_b5, %v7_b5
  store x86_fp80 %v4_b8, x86_fp80* %st7.global-to-local, align 4
  %v4_be = add i32 %stack_var_-4.0, -1
  %v8_c2 = icmp sgt i32 %stack_var_-4.0, 1
  br i1 %v8_c2, label %dec_label_pc_8c, label %dec_label_pc_c4

dec_label_pc_c4:                                  ; preds = %dec_label_pc_8c
  %v3_c4 = fmul x86_fp80 %v4_b8, %v4_b8
  %v3_c8 = fmul x86_fp80 %v3_c4, %v3_c4
  %v4_ca = fadd x86_fp80 %v3_c8, %v3_c8
  %v2_cc = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_ca)
  store x86_fp80 %v2_cc, x86_fp80* %st7.global-to-local, align 4
  %v3_d2 = fmul x86_fp80 %v5_85, %v5_85
  store x86_fp80 %v3_d2, x86_fp80* %st6.global-to-local, align 4
  %v6_d4 = load double, double* %v5_89, align 4
  %v7_d4 = fpext double %v6_d4 to x86_fp80
  %v3_d7 = fmul x86_fp80 %v7_d4, %v7_d4
  %v4_d9 = fadd x86_fp80 %v3_d2, %v3_d7
  %v2_db = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_d9)
  %v4_df = fsub x86_fp80 %v2_cc, %v2_db
  store x86_fp80 %v4_df, x86_fp80* %st7.global-to-local, align 4
  %v1_e1 = sub i32 0, %v2_89
  store i32 %v1_e1, i32* %edx.global-to-local, align 4
  store x86_fp80 %v4_df, x86_fp80* %st6.global-to-local, align 4
  store i3 %v8_89, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ec = load i32, i32* %fpsw.global-to-local, align 4
  %v1_ec = call i16 @__asm_fnstsw(i32 %v0_ec)
  %v2_ec = sext i16 %v1_ec to i32
  %v3_ec = load i32, i32* @eax, align 4
  %v4_ec = and i32 %v3_ec, -65536
  %tmp283 = udiv i32 %v2_ec, 2
  %v12_ee = and i32 %tmp283, 32512
  %v2_ec.masked = and i32 %v2_ec, -65281
  %v13_ee = or i32 %v4_ec, %v2_ec.masked
  %v14_ee = or i32 %v13_ee, %v12_ee
  store i32 %v14_ee, i32* %eax.global-to-local, align 4
  %v15_ee281 = and i32 %v2_ec, 256
  %v16_ee = icmp eq i32 %v15_ee281, 0
  br i1 %v16_ee, label %dec_label_pc_f2, label %dec_label_pc_c4.dec_label_pc_fc_crit_edge

dec_label_pc_c4.dec_label_pc_fc_crit_edge:        ; preds = %dec_label_pc_c4
  %v1_fc.pre = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v0_101.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_fc

dec_label_pc_f2:                                  ; preds = %dec_label_pc_c4
  %v0_f2 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_f4 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_f4 = fadd x86_fp80 %v2_f4, 0xK3FFF8000000000000000
  %v4_f6 = fadd x86_fp80 %v4_f4, 0xK3FFF8000000000000000
  %v2_f8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_f6)
  %v2_fa = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_f8)
  store x86_fp80 %v2_fa, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_fc

dec_label_pc_fc:                                  ; preds = %dec_label_pc_c4.dec_label_pc_fc_crit_edge, %dec_label_pc_f2
  %v0_101 = phi i3 [ %v0_101.pre, %dec_label_pc_c4.dec_label_pc_fc_crit_edge ], [ %v0_f2, %dec_label_pc_f2 ]
  %v1_fc = phi x86_fp80 [ %v1_fc.pre, %dec_label_pc_c4.dec_label_pc_fc_crit_edge ], [ %v2_fa, %dec_label_pc_f2 ]
  %v2_fc = load i32, i32* @edi, align 8
  %v3_fc = add i32 %v2_fc, -116
  %v4_fc = inttoptr i32 %v3_fc to double*
  %v5_fc = load double, double* %v4_fc, align 4
  %v6_fc = fpext double %v5_fc to x86_fp80
  %v7_fc = fmul x86_fp80 %v1_fc, %v6_fc
  %v2_ff = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_fc)
  store x86_fp80 %v2_ff, x86_fp80* %st6.global-to-local, align 4
  %v2_101 = load i32, i32* @esi, align 4
  %v3_101 = add i32 %v2_101, 128
  %tmp278 = fptrunc x86_fp80 %v7_fc to double
  %v4_101 = call double @llvm.fabs.f64(double %tmp278)
  %v5_101 = inttoptr i32 %v3_101 to double*
  store double %v4_101, double* %v5_101, align 4
  %v6_101 = add i3 %v0_101, 1
  store i3 %v6_101, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_107 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_107 = load i32, i32* @edi, align 8
  %v3_107 = add i32 %v2_107, -72
  %v4_107 = inttoptr i32 %v3_107 to double*
  %v5_107 = load double, double* %v4_107, align 4
  %v6_107 = fpext double %v5_107 to x86_fp80
  %v7_107 = fmul x86_fp80 %v1_107, %v6_107
  store x86_fp80 %v7_107, x86_fp80* %st7.global-to-local, align 4
  %v2_10a = load i32, i32* @esp, align 4
  %v3_10a = load i32, i32* %edx.global-to-local, align 4
  %v5_10a = add i32 %v2_10a, 16
  %v6_10a = add i32 %v5_10a, %v3_10a
  %v7_10a = inttoptr i32 %v6_10a to double*
  %v8_10a = load double, double* %v7_10a, align 4
  %v9_10a = fpext double %v8_10a to x86_fp80
  %v10_10a = fsub x86_fp80 %v7_107, %v9_10a
  store x86_fp80 %v10_10a, x86_fp80* %st7.global-to-local, align 4
  %v1_10e = add i32 %v2_107, -76
  %v2_10e = inttoptr i32 %v1_10e to i32*
  %v3_10e = load i32, i32* %v2_10e, align 4
  %v10_10e = icmp eq i32 %v3_10e, 0
  %v1_112 = icmp eq i1 %v10_10e, false
  br i1 %v1_112, label %dec_label_pc_117, label %dec_label_pc_114

dec_label_pc_114:                                 ; preds = %dec_label_pc_fc
  %v3_114 = add i32 %v2_107, -32
  %v4_114 = inttoptr i32 %v3_114 to double*
  %v5_114 = load double, double* %v4_114, align 4
  %v6_114 = fpext double %v5_114 to x86_fp80
  %v7_114 = fdiv x86_fp80 %v10_10a, %v6_114
  store x86_fp80 %v7_114, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_117

dec_label_pc_117:                                 ; preds = %dec_label_pc_114, %dec_label_pc_fc
  %v1_117 = phi x86_fp80 [ %v7_114, %dec_label_pc_114 ], [ %v10_10a, %dec_label_pc_fc ]
  %v3_117 = add i32 %v2_101, -32
  %v4_117 = fptrunc x86_fp80 %v1_117 to double
  %v5_117 = inttoptr i32 %v3_117 to double*
  store double %v4_117, double* %v5_117, align 4
  %v6_117 = add i3 %v0_101, 2
  store i3 %v6_117, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_ee
}

define i32 @function_11e() local_unnamed_addr {
dec_label_pc_11e:
  %eax.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_11e = load i32, i32* @edi, align 8
  %v1_11e = add i32 %v0_11e, 1
  store i32 %v1_11e, i32* @edi, align 8
  %v0_121 = load i32, i32* %edx.global-to-local, align 4
  %v1_121 = trunc i32 %v0_121 to i16
  %v2_121 = load i32, i32* %eax.global-to-local, align 4
  %v3_121 = trunc i32 %v2_121 to i8
  call void @__asm_out(i16 %v1_121, i8 %v3_121)
  %v0_122 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v8_122 = add i3 %v0_122, 2
  store i3 %v8_122, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_124 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_124 = call i16 @__asm_fnstsw(i32 %v0_124)
  %v2_124 = sext i16 %v1_124 to i32
  %v3_124 = load i32, i32* %eax.global-to-local, align 4
  %v4_124 = and i32 %v3_124, -65536
  %tmp241 = udiv i32 %v2_124, 2
  %v12_126 = and i32 %tmp241, 32512
  %v2_124.masked = and i32 %v2_124, -65281
  %v13_126 = or i32 %v4_124, %v2_124.masked
  %v14_126 = or i32 %v13_126, %v12_126
  store i32 %v14_126, i32* %eax.global-to-local, align 4
  %v15_126240 = and i32 %v2_124, 256
  %v16_126 = icmp eq i32 %v15_126240, 0
  br i1 %v16_126, label %dec_label_pc_12a, label %dec_label_pc_11e.dec_label_pc_134_crit_edge

dec_label_pc_11e.dec_label_pc_134_crit_edge:      ; preds = %dec_label_pc_11e
  %v1_134.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v0_139.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_134

dec_label_pc_12a:                                 ; preds = %dec_label_pc_11e
  %v0_12a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_132 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 0xK40018000000000000000)
  store x86_fp80 %v2_132, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_134

dec_label_pc_134:                                 ; preds = %dec_label_pc_11e.dec_label_pc_134_crit_edge, %dec_label_pc_12a
  %v0_139 = phi i3 [ %v0_139.pre, %dec_label_pc_11e.dec_label_pc_134_crit_edge ], [ %v0_12a, %dec_label_pc_12a ]
  %v1_134 = phi x86_fp80 [ %v1_134.pre, %dec_label_pc_11e.dec_label_pc_134_crit_edge ], [ %v2_132, %dec_label_pc_12a ]
  %v2_134 = load i32, i32* @edi, align 8
  %v3_134 = add i32 %v2_134, -116
  %v4_134 = inttoptr i32 %v3_134 to double*
  %v5_134 = load double, double* %v4_134, align 4
  %v6_134 = fpext double %v5_134 to x86_fp80
  %v7_134 = fmul x86_fp80 %v1_134, %v6_134
  %v2_137 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_134)
  store x86_fp80 %v2_137, x86_fp80* %st7.global-to-local, align 4
  %v2_139 = load i32, i32* %esi.global-to-local, align 4
  %v3_139 = add i32 %v2_139, 128
  %tmp238 = fptrunc x86_fp80 %v7_134 to double
  %v4_139 = call double @llvm.fabs.f64(double %tmp238)
  %v5_139 = inttoptr i32 %v3_139 to double*
  store double %v4_139, double* %v5_139, align 4
  %v6_139 = add i3 %v0_139, 1
  store i3 %v6_139, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_13f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_13f = load i32, i32* @edi, align 8
  %v3_13f = add i32 %v2_13f, -72
  %v4_13f = inttoptr i32 %v3_13f to double*
  %v5_13f = load double, double* %v4_13f, align 4
  %v6_13f = fpext double %v5_13f to x86_fp80
  %v7_13f = fmul x86_fp80 %v1_13f, %v6_13f
  store x86_fp80 %v7_13f, x86_fp80* %st7.global-to-local, align 4
  %v2_142 = load i32, i32* @esp, align 4
  %v3_142 = load i32, i32* %edx.global-to-local, align 4
  %v5_142 = add i32 %v2_142, 16
  %v6_142 = add i32 %v5_142, %v3_142
  %v7_142 = inttoptr i32 %v6_142 to double*
  %v8_142 = load double, double* %v7_142, align 4
  %v9_142 = fpext double %v8_142 to x86_fp80
  %v10_142 = fsub x86_fp80 %v7_13f, %v9_142
  store x86_fp80 %v10_142, x86_fp80* %st7.global-to-local, align 4
  %v1_146 = add i32 %v2_13f, -76
  %v2_146 = inttoptr i32 %v1_146 to i32*
  %v3_146 = load i32, i32* %v2_146, align 4
  %v10_146 = icmp eq i32 %v3_146, 0
  %v1_14a = icmp eq i1 %v10_146, false
  br i1 %v1_14a, label %dec_label_pc_14f, label %dec_label_pc_14c

dec_label_pc_14c:                                 ; preds = %dec_label_pc_134
  %v3_14c = add i32 %v2_13f, -32
  %v4_14c = inttoptr i32 %v3_14c to double*
  %v5_14c = load double, double* %v4_14c, align 4
  %v6_14c = fpext double %v5_14c to x86_fp80
  %v7_14c = fdiv x86_fp80 %v10_142, %v6_14c
  store x86_fp80 %v7_14c, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_14f

dec_label_pc_14f:                                 ; preds = %dec_label_pc_14c, %dec_label_pc_134
  %v1_14f = phi x86_fp80 [ %v7_14c, %dec_label_pc_14c ], [ %v10_142, %dec_label_pc_134 ]
  %v3_14f = add i32 %v2_139, -32
  %v4_14f = fptrunc x86_fp80 %v1_14f to double
  %v5_14f = inttoptr i32 %v3_14f to double*
  store double %v4_14f, double* %v5_14f, align 4
  %v6_14f = add i3 %v0_139, 2
  store i3 %v6_14f, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_126
}

define i32 @function_15f() local_unnamed_addr {
dec_label_pc_15f:
  %v0_15f = load i32, i32* @edi, align 8
  %v1_15f = add i32 %v0_15f, -76
  %v2_15f = inttoptr i32 %v1_15f to i32*
  %v3_15f = load i32, i32* %v2_15f, align 4
  %v10_15f = icmp eq i32 %v3_15f, 0
  %v1_163 = icmp eq i1 %v10_15f, false
  %v1_168.pre = load x86_fp80, x86_fp80* @st7, align 4
  br i1 %v1_163, label %dec_label_pc_168, label %dec_label_pc_165

dec_label_pc_165:                                 ; preds = %dec_label_pc_15f
  %v3_165 = add i32 %v0_15f, -32
  %v4_165 = inttoptr i32 %v3_165 to double*
  %v5_165 = load double, double* %v4_165, align 4
  %v6_165 = fpext double %v5_165 to x86_fp80
  %v7_165 = fdiv x86_fp80 %v1_168.pre, %v6_165
  br label %dec_label_pc_168

dec_label_pc_168:                                 ; preds = %dec_label_pc_15f, %dec_label_pc_165
  %v1_168 = phi x86_fp80 [ %v7_165, %dec_label_pc_165 ], [ %v1_168.pre, %dec_label_pc_15f ]
  %v2_168 = load i32, i32* @esi, align 4
  %v3_168 = add i32 %v2_168, -32
  %v4_168 = fptrunc x86_fp80 %v1_168 to double
  %v5_168 = inttoptr i32 %v3_168 to double*
  store double %v4_168, double* %v5_168, align 4
  %v0_16e = load i32, i32* @eax, align 4
  ret i32 %v0_16e
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare void @__asm_out(i16, i8) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
