source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %ebx.global-to-local, align 4
  %v0_4 = load i32, i32* %esi.global-to-local, align 4
  %v0_5 = load i32, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  store i32 2147483647, i32* @eax, align 8
  %v0_12 = load i32, i32* @ecx, align 8
  %v1_12 = add i32 %v0_12, 4
  %v2_12 = inttoptr i32 %v1_12 to i32*
  %v3_12 = load i32, i32* %v2_12, align 4
  %tmp258 = urem i32 %v3_12, -2147483648
  store i32 %tmp258, i32* %v2_12, align 4
  %v0_15 = load i32, i32* @edx, align 8
  %v1_15 = add i32 %v0_15, 4
  %v2_15 = inttoptr i32 %v1_15 to i32*
  %v3_15 = load i32, i32* %v2_15, align 4
  %v4_15 = load i32, i32* @eax, align 8
  %v5_15 = and i32 %v4_15, %v3_15
  store i32 %v5_15, i32* %v2_15, align 4
  %v0_18 = load i32, i32* %ebx.global-to-local, align 4
  %v1_18 = add i32 %v0_18, 4
  %v2_18 = inttoptr i32 %v1_18 to i32*
  %v3_18 = load i32, i32* %v2_18, align 4
  %v4_18 = load i32, i32* @eax, align 8
  %v5_18 = and i32 %v4_18, %v3_18
  store i32 %v5_18, i32* %v2_18, align 4
  %v0_1b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_1b = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_1b = fpext double %v3_1b to x86_fp80
  store x86_fp80 %v4_1b, x86_fp80* %st7.global-to-local, align 4
  %v3_1d = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_1d = fpext double %v3_1d to x86_fp80
  store x86_fp80 %v4_1d, x86_fp80* %st6.global-to-local, align 4
  %v3_1f = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_1f = fpext double %v3_1f to x86_fp80
  store x86_fp80 %v4_1f, x86_fp80* %st5.global-to-local, align 4
  %v2_23 = load i32, i32* %esi.global-to-local, align 4
  %v3_23 = add i32 %v2_23, -68
  %v4_23 = inttoptr i32 %v3_23 to float*
  %v5_23 = load float, float* %v4_23, align 4
  %v6_23 = fpext float %v5_23 to x86_fp80
  %v7_23 = fmul x86_fp80 %v4_1f, %v6_23
  %v3_28 = add i32 %v2_23, -72
  %v4_28 = inttoptr i32 %v3_28 to float*
  %v5_28 = load float, float* %v4_28, align 4
  %v6_28 = fpext float %v5_28 to x86_fp80
  %v7_28 = fmul x86_fp80 %v4_1d, %v6_28
  %v4_2b = fadd x86_fp80 %v7_23, %v7_28
  %v3_2f = add i32 %v2_23, -76
  %v4_2f = inttoptr i32 %v3_2f to float*
  %v5_2f = load float, float* %v4_2f, align 4
  %v6_2f = fpext float %v5_2f to x86_fp80
  %v7_2f = fmul x86_fp80 %v4_1b, %v6_2f
  %v4_32 = fadd x86_fp80 %v7_2f, %v4_2b
  %v3_36 = add i32 %v2_23, -44
  %v4_36 = inttoptr i32 %v3_36 to float*
  %v5_36 = load float, float* %v4_36, align 4
  %v6_36 = fpext float %v5_36 to x86_fp80
  %v7_36 = fmul x86_fp80 %v4_1f, %v6_36
  %v3_3b = add i32 %v2_23, -48
  %v4_3b = inttoptr i32 %v3_3b to float*
  %v5_3b = load float, float* %v4_3b, align 4
  %v6_3b = fpext float %v5_3b to x86_fp80
  %v7_3b = fmul x86_fp80 %v4_1d, %v6_3b
  %v4_3e = fadd x86_fp80 %v7_36, %v7_3b
  %v3_42 = add i32 %v2_23, -52
  %v4_42 = inttoptr i32 %v3_42 to float*
  %v5_42 = load float, float* %v4_42, align 4
  %v6_42 = fpext float %v5_42 to x86_fp80
  %v7_42 = fmul x86_fp80 %v4_1b, %v6_42
  %v4_45 = fadd x86_fp80 %v4_3e, %v7_42
  store x86_fp80 %v4_45, x86_fp80* %st5.global-to-local, align 4
  %v3_49 = add i32 %v2_23, -56
  %v4_49 = inttoptr i32 %v3_49 to float*
  %v5_49 = load float, float* %v4_49, align 4
  %v6_49 = fpext float %v5_49 to x86_fp80
  %v7_49 = fmul x86_fp80 %v4_1f, %v6_49
  store x86_fp80 %v7_49, x86_fp80* %st6.global-to-local, align 4
  %v3_4e = add i32 %v2_23, -60
  %v4_4e = inttoptr i32 %v3_4e to float*
  %v5_4e = load float, float* %v4_4e, align 4
  %v6_4e = fpext float %v5_4e to x86_fp80
  %v7_4e = fmul x86_fp80 %v4_1d, %v6_4e
  %v4_51 = fadd x86_fp80 %v7_49, %v7_4e
  store x86_fp80 %v4_51, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_32, x86_fp80* %st7.global-to-local, align 4
  %v3_55 = add i32 %v2_23, -64
  %v4_55 = inttoptr i32 %v3_55 to float*
  %v5_55 = load float, float* %v4_55, align 4
  %v6_55 = fpext float %v5_55 to x86_fp80
  %v7_55 = fmul x86_fp80 %v4_1b, %v6_55
  %v4_58 = fadd x86_fp80 %v4_51, %v7_55
  store x86_fp80 %v4_58, x86_fp80* %st6.global-to-local, align 4
  %v7_58 = add i3 %v0_1b, -3
  store i3 %v7_58, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_5c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5c = call i16 @__asm_fnstsw(i32 %v0_5c)
  %v2_5c = sext i16 %v1_5c to i32
  %v3_5c = load i32, i32* @eax, align 8
  %v4_5c = and i32 %v3_5c, -65536
  %tmp255 = udiv i32 %v2_5c, 2
  %v12_5e = and i32 %tmp255, 32512
  %v2_5c.masked = and i32 %v2_5c, -65281
  %v13_5e = or i32 %v4_5c, %v2_5c.masked
  %v14_5e = or i32 %v13_5e, %v12_5e
  store i32 %v14_5e, i32* @eax, align 8
  %v15_5e16 = and i32 %v2_5c, 256
  %v16_5e = icmp ne i32 %v15_5e16, 0
  %v1_60 = icmp eq i1 %v16_5e, false
  br i1 %v1_60, label %dec_label_pc_64, label %dec_label_pc_62

dec_label_pc_62:                                  ; preds = %dec_label_pc_0
  %v2_62 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_62 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_62, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_62, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_64

dec_label_pc_64:                                  ; preds = %dec_label_pc_62, %dec_label_pc_0
  %v0_66 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_66 = call i16 @__asm_fnstsw(i32 %v0_66)
  %v2_66 = sext i16 %v1_66 to i32
  %v3_66 = load i32, i32* @eax, align 8
  %v4_66 = and i32 %v3_66, -65536
  %tmp256 = udiv i32 %v2_66, 2
  %v12_68 = and i32 %tmp256, 32512
  %v2_66.masked = and i32 %v2_66, -65281
  %v13_68 = or i32 %v4_66, %v2_66.masked
  %v14_68 = or i32 %v13_68, %v12_68
  store i32 %v14_68, i32* @eax, align 8
  %v0_72 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_72 = call i16 @__asm_fnstsw(i32 %v0_72)
  %v2_72 = sext i16 %v1_72 to i32
  %v3_72 = load i32, i32* @eax, align 8
  %v4_72 = and i32 %v3_72, -65536
  %tmp257 = udiv i32 %v2_72, 2
  %v12_74 = and i32 %tmp257, 32512
  %v2_72.masked = and i32 %v2_72, -65281
  %v13_74 = or i32 %v4_72, %v2_72.masked
  %v14_74 = or i32 %v13_74, %v12_74
  store i32 %v14_74, i32* @eax, align 8
  %v0_7a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_7a = load i32, i32* %esi.global-to-local, align 4
  %v2_7a = add i32 %v1_7a, -120
  %v3_7a = inttoptr i32 %v2_7a to double*
  %v4_7a = load double, double* %v3_7a, align 4
  %v5_7a = fpext double %v4_7a to x86_fp80
  %v6_7a = add i3 %v0_7a, -1
  %v4_7d = fsub x86_fp80 %v5_7a, %v5_7a
  %v2_7f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_7d)
  store x86_fp80 %v2_7f, x86_fp80* %st7.global-to-local, align 4
  %v3_85 = add i32 %v1_7a, -128
  %v4_85 = inttoptr i32 %v3_85 to double*
  %v5_85 = load double, double* %v4_85, align 4
  %v6_85 = fpext double %v5_85 to x86_fp80
  %v7_85 = fsub x86_fp80 %v2_7f, %v6_85
  %v2_88 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_85)
  store x86_fp80 %v2_88, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v2_88, x86_fp80* %st6.global-to-local, align 4
  %v3_8e = add i32 %v1_7a, -104
  %v4_8e = inttoptr i32 %v3_8e to float*
  %v5_8e = load float, float* %v4_8e, align 4
  %v6_8e = fpext float %v5_8e to x86_fp80
  %v7_8e = fmul x86_fp80 %v2_88, %v6_8e
  store x86_fp80 %v7_8e, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_88, x86_fp80* %st5.global-to-local, align 4
  %v3_93 = add i32 %v1_7a, -108
  %v4_93 = inttoptr i32 %v3_93 to float*
  %v5_93 = load float, float* %v4_93, align 4
  %v6_93 = fpext float %v5_93 to x86_fp80
  %v7_93 = fmul x86_fp80 %v2_88, %v6_93
  %v4_96 = fadd x86_fp80 %v7_8e, %v7_93
  store x86_fp80 %v4_96, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_88, x86_fp80* %st5.global-to-local, align 4
  %v3_9a = add i32 %v1_7a, -112
  %v4_9a = inttoptr i32 %v3_9a to float*
  %v5_9a = load float, float* %v4_9a, align 4
  %v6_9a = fpext float %v5_9a to x86_fp80
  %v7_9a = fmul x86_fp80 %v2_88, %v6_9a
  %v4_9d = fadd x86_fp80 %v4_96, %v7_9a
  store x86_fp80 %v4_9d, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_88, x86_fp80* %st5.global-to-local, align 4
  %v3_a1 = add i32 %v1_7a, -80
  %v4_a1 = inttoptr i32 %v3_a1 to float*
  %v5_a1 = load float, float* %v4_a1, align 4
  %v6_a1 = fpext float %v5_a1 to x86_fp80
  %v7_a1 = fmul x86_fp80 %v2_88, %v6_a1
  store x86_fp80 %v7_a1, x86_fp80* %st5.global-to-local, align 4
  %v3_a6 = add i32 %v1_7a, -84
  %v4_a6 = inttoptr i32 %v3_a6 to float*
  %v5_a6 = load float, float* %v4_a6, align 4
  %v6_a6 = fpext float %v5_a6 to x86_fp80
  %v7_a6 = fmul x86_fp80 %v2_88, %v6_a6
  %v4_a9 = fadd x86_fp80 %v7_a1, %v7_a6
  store x86_fp80 %v4_a9, x86_fp80* %st5.global-to-local, align 4
  %v3_ad = add i32 %v1_7a, -88
  %v4_ad = inttoptr i32 %v3_ad to float*
  %v5_ad = load float, float* %v4_ad, align 4
  %v6_ad = fpext float %v5_ad to x86_fp80
  %v7_ad = fmul x86_fp80 %v2_88, %v6_ad
  %v4_b0 = fadd x86_fp80 %v4_a9, %v7_ad
  store x86_fp80 %v2_88, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v4_b0, x86_fp80* %st7.global-to-local, align 4
  %v3_b4 = add i32 %v1_7a, -92
  %v4_b4 = inttoptr i32 %v3_b4 to float*
  %v5_b4 = load float, float* %v4_b4, align 4
  %v6_b4 = fpext float %v5_b4 to x86_fp80
  %v7_b4 = fmul x86_fp80 %v4_b0, %v6_b4
  store x86_fp80 %v7_b4, x86_fp80* %st7.global-to-local, align 4
  %v3_b9 = add i32 %v1_7a, -96
  %v4_b9 = inttoptr i32 %v3_b9 to float*
  %v5_b9 = load float, float* %v4_b9, align 4
  %v6_b9 = fpext float %v5_b9 to x86_fp80
  %v7_b9 = fmul x86_fp80 %v7_b4, %v6_b9
  %v4_bc = fadd x86_fp80 %v7_b9, %v7_b9
  store x86_fp80 %v4_bc, x86_fp80* %st7.global-to-local, align 4
  %v3_c0 = add i32 %v1_7a, -100
  %v4_c0 = inttoptr i32 %v3_c0 to float*
  %v5_c0 = load float, float* %v4_c0, align 4
  %v6_c0 = fpext float %v5_c0 to x86_fp80
  %v7_c0 = fmul x86_fp80 %v4_bc, %v6_c0
  %v4_c3 = fadd x86_fp80 %v7_c0, %v7_c0
  store x86_fp80 %v4_c3, x86_fp80* %st7.global-to-local, align 4
  %v2_c5 = add i32 %v1_7a, -16
  %v3_c5 = inttoptr i32 %v2_c5 to double*
  %v4_c5 = load double, double* %v3_c5, align 4
  %v5_c5 = fpext double %v4_c5 to x86_fp80
  store x86_fp80 %v5_c5, x86_fp80* %st7.global-to-local, align 4
  %v1_c8 = load i32, i32* @ecx, align 8
  %v2_c8 = add i32 %v1_c8, 8
  %v3_c8 = inttoptr i32 %v2_c8 to double*
  %v4_c8 = load double, double* %v3_c8, align 4
  %v5_c8 = fpext double %v4_c8 to x86_fp80
  %v4_cb = fmul x86_fp80 %v5_c5, %v5_c8
  %v4_cd = fptrunc x86_fp80 %v4_cb to double
  store double %v4_cd, double* %v3_c8, align 4
  %v2_d0 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_d0 = fmul x86_fp80 %v2_d0, %v2_d0
  %v4_d2 = fmul x86_fp80 %v4_d0, %v4_d0
  %v4_d4 = fmul x86_fp80 %v4_d2, %v4_d2
  %v4_d8 = fadd x86_fp80 %v4_d4, 0xKBFFF8000000000000000
  store x86_fp80 %v4_d8, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_d8, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_d8, x86_fp80* %st5.global-to-local, align 4
  %v3_de = add i32 %v1_7a, -24
  %v4_de = inttoptr i32 %v3_de to double*
  %v5_de = load double, double* %v4_de, align 4
  %v6_de = fpext double %v5_de to x86_fp80
  %v7_de = fmul x86_fp80 %v4_d8, %v6_de
  store x86_fp80 %v7_de, x86_fp80* %st5.global-to-local, align 4
  %v4_e1 = fsub x86_fp80 %v4_d8, %v7_de
  store x86_fp80 %v4_e1, x86_fp80* %st7.global-to-local, align 4
  %v3_e3 = add i32 %v1_7a, -32
  %v4_e3 = inttoptr i32 %v3_e3 to double*
  %v5_e3 = load double, double* %v4_e3, align 4
  %v6_e3 = fpext double %v5_e3 to x86_fp80
  %v7_e3 = fmul x86_fp80 %v4_d8, %v6_e3
  store x86_fp80 %v7_e3, x86_fp80* %st6.global-to-local, align 4
  %v4_e6 = fsub x86_fp80 %v4_e1, %v7_e3
  store x86_fp80 %v4_e6, x86_fp80* %st7.global-to-local, align 4
  %v3_e8 = add i32 %v1_7a, -40
  %v4_e8 = inttoptr i32 %v3_e8 to double*
  %v5_e8 = load double, double* %v4_e8, align 4
  %v6_e8 = fpext double %v5_e8 to x86_fp80
  %v7_e8 = fmul x86_fp80 %v4_e6, %v6_e8
  store x86_fp80 %v7_e8, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_e8, x86_fp80* %st6.global-to-local, align 4
  %v3_ed = add i32 %v1_7a, -8
  %v4_ed = inttoptr i32 %v3_ed to double*
  %v5_ed = load double, double* %v4_ed, align 4
  %v6_ed = fpext double %v5_ed to x86_fp80
  %v7_ed = fmul x86_fp80 %v7_e8, %v6_ed
  store x86_fp80 %v7_ed, x86_fp80* %st6.global-to-local, align 4
  store i3 %v6_7a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_f2 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_f2 = call i16 @__asm_fnstsw(i32 %v0_f2)
  %v2_f2 = sext i16 %v1_f2 to i32
  %v3_f2 = load i32, i32* @eax, align 8
  %v4_f2 = and i32 %v3_f2, -65536
  %v1_f4 = udiv i32 %v2_f2, 256
  %v2_f4 = trunc i32 %v1_f4 to i8
  %v3_f4 = and i8 %v2_f4, 65
  %v4_f4 = icmp eq i8 %v3_f4, 0
  %v9_f4 = zext i8 %v3_f4 to i32
  %v11_f4 = mul i32 %v9_f4, 256
  %v2_f2.masked = and i32 %v2_f2, -65281
  %v12_f4 = or i32 %v4_f2, %v2_f2.masked
  %v13_f4 = or i32 %v12_f4, %v11_f4
  store i32 %v13_f4, i32* @eax, align 8
  %v1_fb.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v4_f4, label %dec_label_pc_fb, label %dec_label_pc_f9

dec_label_pc_f9:                                  ; preds = %dec_label_pc_64
  %v4_f9 = fsub x86_fp80 %v1_fb.pre, %v1_fb.pre
  store x86_fp80 %v4_f9, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_fb

dec_label_pc_fb:                                  ; preds = %dec_label_pc_64, %dec_label_pc_f9
  %v1_fb = phi x86_fp80 [ %v4_f9, %dec_label_pc_f9 ], [ %v1_fb.pre, %dec_label_pc_64 ]
  %v0_fb = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_fd = load i32, i32* @edx, align 8
  %v3_fd = fptrunc x86_fp80 %v1_fb to double
  %v4_fd = inttoptr i32 %v2_fd to double*
  store double %v3_fd, double* %v4_fd, align 4
  %v1_ff = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_ff = load i32, i32* %ebx.global-to-local, align 4
  %v3_ff = fptrunc x86_fp80 %v1_ff to double
  %v4_ff = inttoptr i32 %v2_ff to double*
  store double %v3_ff, double* %v4_ff, align 4
  %v1_101 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_101 = load i32, i32* @ecx, align 8
  %v3_101 = fptrunc x86_fp80 %v1_101 to double
  %v4_101 = inttoptr i32 %v2_101 to double*
  store double %v3_101, double* %v4_101, align 4
  %v5_101 = xor i3 %v0_fb, -4
  store i3 %v5_101, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_ff, i32* @eax, align 8
  store i32 %v0_4, i32* %esi.global-to-local, align 4
  store i32 %v0_3, i32* %ebx.global-to-local, align 4
  ret i32 %v2_ff
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

attributes #0 = { nounwind readnone speculatable }
