source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8
@global_var_1.1 = constant i8 -117

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_9 = load i32, i32* %ebx.global-to-local, align 4
  %v0_a = load i32, i32* %esi.global-to-local, align 4
  %v0_b = load i32, i32* %edi.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_f = add i32 %arg1, 48
  %v2_f = inttoptr i32 %v1_f to i32*
  %v3_f = load i32, i32* %v2_f, align 4
  store i32 %v3_f, i32* %edi.global-to-local, align 4
  %v0_12 = load i32, i32* @eax, align 8
  store i32 %v0_12, i32* %ebx.global-to-local, align 4
  %v0_16 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_16 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_16 = fpext double %v3_16 to x86_fp80
  %v5_16 = sub i3 %v0_16, ptrtoint (i8* @global_var_1.1 to i3)
  store x86_fp80 %v4_16, x86_fp80* %st7.global-to-local, align 4
  %v3_18 = add i32 %v3_f, -16
  %v4_18 = inttoptr i32 %v3_18 to double*
  %v5_18 = load double, double* %v4_18, align 4
  %v6_18 = fpext double %v5_18 to x86_fp80
  %v7_18 = fadd x86_fp80 %v4_16, %v6_18
  %v3_1b = fptrunc x86_fp80 %v7_18 to double
  %v4_1b = inttoptr i32 %v0_12 to double*
  store double %v3_1b, double* %v4_1b, align 4
  %v3_1d = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_1d = fpext double %v3_1d to x86_fp80
  store x86_fp80 %v4_1d, x86_fp80* %st7.global-to-local, align 4
  %v3_1f = add i32 %v3_f, -24
  %v4_1f = inttoptr i32 %v3_1f to double*
  %v5_1f = load double, double* %v4_1f, align 4
  %v6_1f = fpext double %v5_1f to x86_fp80
  %v7_1f = fadd x86_fp80 %v4_1d, %v6_1f
  %tmp316 = bitcast double %v3_1d to i64
  %tmp317 = trunc i64 %tmp316 to i32
  %v3_22 = fptrunc x86_fp80 %v7_1f to double
  %v4_22 = inttoptr i32 %tmp317 to double*
  store double %v3_22, double* %v4_22, align 4
  %v3_24 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_24 = fpext double %v3_24 to x86_fp80
  store x86_fp80 %v4_24, x86_fp80* %st7.global-to-local, align 4
  %v3_26 = add i32 %v3_f, -32
  %v4_26 = inttoptr i32 %v3_26 to double*
  %v5_26 = load double, double* %v4_26, align 4
  %v6_26 = fpext double %v5_26 to x86_fp80
  %v7_26 = fadd x86_fp80 %v4_24, %v6_26
  %tmp318 = bitcast double %v3_24 to i64
  %tmp319 = trunc i64 %tmp318 to i32
  %v3_29 = fptrunc x86_fp80 %v7_26 to double
  %v4_29 = inttoptr i32 %tmp319 to double*
  store double %v3_29, double* %v4_29, align 4
  %v3_2d = load double, double* bitcast (i32* @edx to double*), align 8
  %v3_32 = load double, double* bitcast (i32* @ecx to double*), align 8
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st7.global-to-local, align 4
  %v2_41 = add i32 %v3_f, -64
  %v3_41 = inttoptr i32 %v2_41 to double*
  %v4_41 = load double, double* %v3_41, align 4
  %v5_41 = fpext double %v4_41 to x86_fp80
  store i3 %v5_16, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_41, x86_fp80* %st7.global-to-local, align 4
  %v3_44 = add i32 %v3_f, 16
  %v4_44 = inttoptr i32 %v3_44 to double*
  %v5_44 = load double, double* %v4_44, align 4
  %v6_44 = fpext double %v5_44 to x86_fp80
  %v7_44 = fmul x86_fp80 %v5_41, %v6_44
  store x86_fp80 %v7_44, x86_fp80* %st7.global-to-local, align 4
  %v2_47 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_44)
  %v3_47 = fcmp olt x86_fp80 %v2_47, 0xK403E8000000000000000
  br i1 %v3_47, label %bb, label %dec_label_pc_0._crit_edge

dec_label_pc_0._crit_edge:                        ; preds = %dec_label_pc_0
  %v1_49.pre = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  br label %bb320

bb:                                               ; preds = %dec_label_pc_0
  %v4_47 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_44)
  store x86_fp80 %v4_47, x86_fp80* %st7.global-to-local, align 4
  %v7_47 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_44)
  %v8_47 = sub i3 %v5_16, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v8_47, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_47, x86_fp80* %st6.global-to-local, align 4
  br label %bb320

bb320:                                            ; preds = %dec_label_pc_0._crit_edge, %bb
  %v1_4c = phi x86_fp80 [ %v7_44, %dec_label_pc_0._crit_edge ], [ %v4_47, %bb ]
  %v1_49 = phi x86_fp80 [ %v1_49.pre, %dec_label_pc_0._crit_edge ], [ %v7_47, %bb ]
  %v0_49 = phi i3 [ %v5_16, %dec_label_pc_0._crit_edge ], [ %v8_47, %bb ]
  %v3_50 = load double, double* bitcast (i32* @eax to double*), align 8
  %tmp321 = call double @llvm.fabs.f64(double %v3_50)
  %v2_55 = fpext double %tmp321 to x86_fp80
  store x86_fp80 %v2_55, x86_fp80* %st7.global-to-local, align 4
  %v2_57 = add i32 %v3_f, -56
  %v3_57 = inttoptr i32 %v2_57 to double*
  %v4_57 = load double, double* %v3_57, align 4
  %v5_57 = fpext double %v4_57 to x86_fp80
  store x86_fp80 %v5_57, x86_fp80* %st6.global-to-local, align 4
  %v8_5a = add i3 %v0_49, add (i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3)))), i3 2)
  store i3 %v8_5a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_5c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5c = call i16 @__asm_fnstsw(i32 %v0_5c)
  %v2_5c = sext i16 %v1_5c to i32
  %v3_5c = load i32, i32* @eax, align 8
  %v4_5c = and i32 %v3_5c, -65536
  %v1_5e = udiv i32 %v2_5c, 256
  %v2_5e = trunc i32 %v1_5e to i8
  %v3_5e = and i8 %v2_5e, 65
  %v4_5e = icmp eq i8 %v3_5e, 0
  %v9_5e = zext i8 %v3_5e to i32
  %v11_5e = mul i32 %v9_5e, 256
  %v2_5c.masked = and i32 %v2_5c, -65281
  %v12_5e = or i32 %v4_5c, %v2_5c.masked
  %v13_5e = or i32 %v12_5e, %v11_5e
  store i32 %v13_5e, i32* @eax, align 8
  br i1 %v4_5e, label %dec_label_pc_67, label %dec_label_pc_2ee

dec_label_pc_67:                                  ; preds = %bb320
  %tmp322 = call double @llvm.fabs.f64(double %v3_2d)
  %v2_6c = fpext double %tmp322 to x86_fp80
  store x86_fp80 %v2_6c, x86_fp80* %st7.global-to-local, align 4
  %v1_6e = load i32, i32* %edi.global-to-local, align 4
  %v2_6e = add i32 %v1_6e, -56
  %v3_6e = inttoptr i32 %v2_6e to double*
  %v4_6e = load double, double* %v3_6e, align 4
  %v5_6e = fpext double %v4_6e to x86_fp80
  store x86_fp80 %v5_6e, x86_fp80* %st6.global-to-local, align 4
  %v0_73 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_73 = call i16 @__asm_fnstsw(i32 %v0_73)
  %v2_73 = sext i16 %v1_73 to i32
  %v3_73 = load i32, i32* @eax, align 8
  %v4_73 = and i32 %v3_73, -65536
  %v1_75 = udiv i32 %v2_73, 256
  %v2_75 = trunc i32 %v1_75 to i8
  %v3_75 = and i8 %v2_75, 65
  %v4_75 = icmp eq i8 %v3_75, 0
  %v9_75 = zext i8 %v3_75 to i32
  %v11_75 = mul i32 %v9_75, 256
  %v2_73.masked = and i32 %v2_73, -65281
  %v12_75 = or i32 %v4_73, %v2_73.masked
  %v13_75 = or i32 %v12_75, %v11_75
  store i32 %v13_75, i32* @eax, align 8
  br i1 %v4_75, label %dec_label_pc_7e, label %dec_label_pc_95.preheader

dec_label_pc_7e:                                  ; preds = %dec_label_pc_67
  %tmp323 = call double @llvm.fabs.f64(double %v3_32)
  %v2_83 = fpext double %tmp323 to x86_fp80
  store x86_fp80 %v2_83, x86_fp80* %st7.global-to-local, align 4
  %v1_85 = load i32, i32* %edi.global-to-local, align 4
  %v2_85 = add i32 %v1_85, -56
  %v3_85 = inttoptr i32 %v2_85 to double*
  %v4_85 = load double, double* %v3_85, align 4
  %v5_85 = fpext double %v4_85 to x86_fp80
  store x86_fp80 %v5_85, x86_fp80* %st6.global-to-local, align 4
  %v0_8a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_8a = call i16 @__asm_fnstsw(i32 %v0_8a)
  %v2_8a = sext i16 %v1_8a to i32
  %v3_8a = load i32, i32* @eax, align 8
  %v4_8a = and i32 %v3_8a, -65536
  %v1_8c = udiv i32 %v2_8a, 256
  %v2_8c = trunc i32 %v1_8c to i8
  %v3_8c = and i8 %v2_8c, 65
  %v4_8c = icmp eq i8 %v3_8c, 0
  %v9_8c = zext i8 %v3_8c to i32
  %v11_8c = mul i32 %v9_8c, 256
  %v2_8a.masked = and i32 %v2_8a, -65281
  %v12_8c = or i32 %v4_8a, %v2_8a.masked
  %v13_8c = or i32 %v12_8c, %v11_8c
  store i32 %v13_8c, i32* @eax, align 8
  br i1 %v4_8c, label %dec_label_pc_2ee, label %dec_label_pc_95.preheader

dec_label_pc_95.preheader:                        ; preds = %dec_label_pc_7e, %dec_label_pc_67
  %v0_95.pre = load i32, i32* %edi.global-to-local, align 4
  %v0_182.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_95

dec_label_pc_95:                                  ; preds = %dec_label_pc_95.preheader, %dec_label_pc_2b5
  %v0_182 = phi i3 [ %v0_29b, %dec_label_pc_2b5 ], [ %v0_182.pre, %dec_label_pc_95.preheader ]
  %v1_a4 = phi i32 [ %v0_2aa, %dec_label_pc_2b5 ], [ %v0_95.pre, %dec_label_pc_95.preheader ]
  %stack_var_-20.0 = phi double [ %v4_250, %dec_label_pc_2b5 ], [ %v3_2d, %dec_label_pc_95.preheader ]
  %stack_var_-28.0 = phi double [ %v4_259, %dec_label_pc_2b5 ], [ %v3_32, %dec_label_pc_95.preheader ]
  %stack_var_-64.0 = phi i32 [ %v5_2b5, %dec_label_pc_2b5 ], [ 0, %dec_label_pc_95.preheader ]
  %stack_var_-72.0 = phi double [ %v4_2bf, %dec_label_pc_2b5 ], [ %v3_50, %dec_label_pc_95.preheader ]
  %v1_95 = add i32 %v1_a4, -72
  %v2_95 = inttoptr i32 %v1_95 to i32*
  %v3_95 = load i32, i32* %v2_95, align 4
  %v5_99 = icmp slt i32 %v3_95, 4
  br i1 %v5_99, label %dec_label_pc_182, label %dec_label_pc_9f

dec_label_pc_9f:                                  ; preds = %dec_label_pc_95
  %tmp324 = call double @llvm.fabs.f64(double %stack_var_-20.0)
  %v2_a2 = fpext double %tmp324 to x86_fp80
  store x86_fp80 %v2_a2, x86_fp80* %st7.global-to-local, align 4
  %v2_a4 = add i32 %v1_a4, -56
  %v3_a4 = inttoptr i32 %v2_a4 to double*
  %v4_a4 = load double, double* %v3_a4, align 4
  %v5_a4 = fpext double %v4_a4 to x86_fp80
  store x86_fp80 %v5_a4, x86_fp80* %st6.global-to-local, align 4
  store i3 %v0_182, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_a9 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_a9 = call i16 @__asm_fnstsw(i32 %v0_a9)
  %v2_a9 = sext i16 %v1_a9 to i32
  %v3_a9 = load i32, i32* @eax, align 8
  %v4_a9 = and i32 %v3_a9, -65536
  %v1_ab = udiv i32 %v2_a9, 256
  %v2_ab = trunc i32 %v1_ab to i8
  %v3_ab = and i8 %v2_ab, 65
  %v4_ab = icmp eq i8 %v3_ab, 0
  %v9_ab = zext i8 %v3_ab to i32
  %v11_ab = mul i32 %v9_ab, 256
  %v2_a9.masked = and i32 %v2_a9, -65281
  %v12_ab = or i32 %v4_a9, %v2_a9.masked
  %v13_ab = or i32 %v12_ab, %v11_ab
  store i32 %v13_ab, i32* @eax, align 8
  br i1 %v4_ab, label %dec_label_pc_b4, label %dec_label_pc_cb

dec_label_pc_b4:                                  ; preds = %dec_label_pc_9f
  %tmp325 = call double @llvm.fabs.f64(double %stack_var_-28.0)
  %v2_b9 = fpext double %tmp325 to x86_fp80
  store x86_fp80 %v2_b9, x86_fp80* %st7.global-to-local, align 4
  %v1_bb = load i32, i32* %edi.global-to-local, align 4
  %v2_bb = add i32 %v1_bb, -56
  %v3_bb = inttoptr i32 %v2_bb to double*
  %v4_bb = load double, double* %v3_bb, align 4
  %v5_bb = fpext double %v4_bb to x86_fp80
  store x86_fp80 %v5_bb, x86_fp80* %st6.global-to-local, align 4
  %v0_c0 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_c0 = call i16 @__asm_fnstsw(i32 %v0_c0)
  %v2_c0 = sext i16 %v1_c0 to i32
  %v3_c0 = load i32, i32* @eax, align 8
  %v4_c0 = and i32 %v3_c0, -65536
  %v1_c2 = udiv i32 %v2_c0, 256
  %v2_c2 = trunc i32 %v1_c2 to i8
  %v3_c2 = and i8 %v2_c2, 65
  %v4_c2 = icmp eq i8 %v3_c2, 0
  %v9_c2 = zext i8 %v3_c2 to i32
  %v11_c2 = mul i32 %v9_c2, 256
  %v2_c0.masked = and i32 %v2_c0, -65281
  %v12_c2 = or i32 %v4_c0, %v2_c0.masked
  %v13_c2 = or i32 %v12_c2, %v11_c2
  store i32 %v13_c2, i32* @eax, align 8
  br i1 %v4_c2, label %dec_label_pc_b4.dec_label_pc_211_crit_edge, label %dec_label_pc_cb

dec_label_pc_b4.dec_label_pc_211_crit_edge:       ; preds = %dec_label_pc_b4
  %v0_211.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_211.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_211

dec_label_pc_cb:                                  ; preds = %dec_label_pc_9f, %dec_label_pc_b4
  store x86_fp80 %v2_a2, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v0_d9 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_d9 = call i16 @__asm_fnstsw(i32 %v0_d9)
  %v2_d9 = sext i16 %v1_d9 to i32
  %v3_d9 = load i32, i32* @eax, align 8
  %v4_d9 = and i32 %v3_d9, -65536
  %v1_db = udiv i32 %v2_d9, 256
  %v2_db = trunc i32 %v1_db to i8
  %v3_db = and i8 %v2_db, 65
  %v2_d9.masked = and i32 %v2_d9, -65281
  %v12_db = or i32 %v4_d9, %v2_d9.masked
  %v3_de = xor i8 %v3_db, 64
  %v4_de = icmp eq i8 %v3_de, 0
  %v9_de = zext i8 %v3_de to i32
  %v11_de = mul i32 %v9_de, 256
  %v13_de = or i32 %v12_db, %v11_de
  store i32 %v13_de, i32* @eax, align 8
  %v0_ed.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %.pre59 = fpext double %stack_var_-20.0 to x86_fp80
  br i1 %v4_de, label %dec_label_pc_ec, label %dec_label_pc_e3

dec_label_pc_e3:                                  ; preds = %dec_label_pc_cb
  %v7_e6 = fdiv x86_fp80 %v2_a2, %.pre59
  store x86_fp80 %v7_e6, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_ec

dec_label_pc_ec:                                  ; preds = %dec_label_pc_cb, %dec_label_pc_e3
  %v5_ed.pre-phi = phi x86_fp80 [ %v7_e6, %dec_label_pc_e3 ], [ %v2_a2, %dec_label_pc_cb ]
  store x86_fp80 %v5_ed.pre-phi, x86_fp80* %st7.global-to-local, align 4
  %v2_f0 = load i32, i32* %edi.global-to-local, align 4
  %v3_f0 = add i32 %v2_f0, -48
  %v4_f0 = inttoptr i32 %v3_f0 to double*
  %v5_f0 = load double, double* %v4_f0, align 4
  %v6_f0 = fpext double %v5_f0 to x86_fp80
  %v7_f0 = fmul x86_fp80 %v5_ed.pre-phi, %v6_f0
  %v7_f5 = fsub x86_fp80 %.pre59, %v7_f0
  store x86_fp80 %v7_f5, x86_fp80* %st7.global-to-local, align 4
  %v4_fd = load double, double* %v4_f0, align 4
  %v5_fd = fpext double %v4_fd to x86_fp80
  store x86_fp80 %v5_fd, x86_fp80* %st7.global-to-local, align 4
  %v3_100 = inttoptr i32 %v2_f0 to double*
  %v4_100 = load double, double* %v3_100, align 4
  %v5_100 = fpext double %v4_100 to x86_fp80
  %v6_100 = fmul x86_fp80 %v5_fd, %v5_100
  %v6_104 = fpext double %stack_var_-28.0 to x86_fp80
  %v7_104 = fsub x86_fp80 %v6_104, %v6_100
  %v6_107 = add i3 %v0_ed.pre, add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 1)
  store x86_fp80 %v5_ed.pre-phi, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  store i3 %v6_107, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_111 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_111 = call i16 @__asm_fnstsw(i32 %v0_111)
  %v2_111 = sext i16 %v1_111 to i32
  %v3_111 = load i32, i32* @eax, align 8
  %v4_111 = and i32 %v3_111, -65536
  %v1_113 = udiv i32 %v2_111, 256
  %v2_113 = trunc i32 %v1_113 to i8
  %v3_113 = and i8 %v2_113, 65
  %v4_113 = icmp eq i8 %v3_113, 0
  %v9_113 = zext i8 %v3_113 to i32
  %v11_113 = mul i32 %v9_113, 256
  %v2_111.masked = and i32 %v2_111, -65281
  %v12_113 = or i32 %v4_111, %v2_111.masked
  %v13_113 = or i32 %v12_113, %v11_113
  store i32 %v13_113, i32* @eax, align 8
  %v0_14f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_152 = fmul x86_fp80 %v1_49, %v7_f5
  store x86_fp80 %v7_152, x86_fp80* %st7.global-to-local, align 4
  %v6_157 = add i3 %v0_14f, -2
  store i3 %v6_157, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_15a = fmul x86_fp80 %v1_4c, %v7_104
  store x86_fp80 %v7_15a, x86_fp80* %st6.global-to-local, align 4
  br i1 %v4_113, label %dec_label_pc_14f, label %dec_label_pc_118

dec_label_pc_118:                                 ; preds = %dec_label_pc_ec
  %v4_12c = fsub x86_fp80 %v7_152, %v7_15a
  %v7_136 = fmul x86_fp80 %v1_4c, %v7_f5
  store x86_fp80 %v7_136, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_157, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_13e = fmul x86_fp80 %v1_49, %v7_104
  store x86_fp80 %v7_13e, x86_fp80* %st6.global-to-local, align 4
  %v4_143 = fadd x86_fp80 %v7_136, %v7_13e
  br label %dec_label_pc_17b

dec_label_pc_14f:                                 ; preds = %dec_label_pc_ec
  %v4_15f = fadd x86_fp80 %v7_152, %v7_15a
  %v7_169 = fmul x86_fp80 %v1_4c, %v7_f5
  %v2_16c = fsub x86_fp80 0xK80000000000000000000, %v7_169
  store x86_fp80 %v2_16c, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_157, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_171 = fmul x86_fp80 %v1_49, %v7_104
  store x86_fp80 %v7_171, x86_fp80* %st6.global-to-local, align 4
  %v4_176 = fsub x86_fp80 %v7_171, %v7_169
  br label %dec_label_pc_17b

dec_label_pc_17b:                                 ; preds = %dec_label_pc_14f, %dec_label_pc_118
  %stack_var_-20.1.in = phi x86_fp80 [ %v4_15f, %dec_label_pc_14f ], [ %v4_12c, %dec_label_pc_118 ]
  %storemerge28 = phi x86_fp80 [ %v4_176, %dec_label_pc_14f ], [ %v4_143, %dec_label_pc_118 ]
  %stack_var_-20.1 = fptrunc x86_fp80 %stack_var_-20.1.in to double
  store x86_fp80 %storemerge28, x86_fp80* %st7.global-to-local, align 4
  %storemerge22 = fptrunc x86_fp80 %storemerge28 to double
  store i3 %v0_14f, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_24a

dec_label_pc_182:                                 ; preds = %dec_label_pc_95
  %v6_184 = add i3 %v0_182, add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 1)
  %v5_189 = fpext double %stack_var_-20.0 to x86_fp80
  store x86_fp80 %v5_189, x86_fp80* %st7.global-to-local, align 4
  %v5_18c = fpext double %stack_var_-28.0 to x86_fp80
  store x86_fp80 %v5_18c, x86_fp80* %st6.global-to-local, align 4
  store i3 %v6_184, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_191 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_191 = call i16 @__asm_fnstsw(i32 %v0_191)
  %v2_191 = sext i16 %v1_191 to i32
  %v3_191 = load i32, i32* @eax, align 8
  %v4_191 = and i32 %v3_191, -65536
  %v1_193 = udiv i32 %v2_191, 256
  %v2_193 = trunc i32 %v1_193 to i8
  %v3_193 = and i8 %v2_193, 65
  %v4_193 = icmp eq i8 %v3_193, 0
  %v9_193 = zext i8 %v3_193 to i32
  %v11_193 = mul i32 %v9_193, 256
  %v2_191.masked = and i32 %v2_191, -65281
  %v12_193 = or i32 %v4_191, %v2_191.masked
  %v13_193 = or i32 %v12_193, %v11_193
  store i32 %v13_193, i32* @eax, align 8
  %v0_1ae = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_1ae = add i3 %v0_1ae, -1
  store i3 %v6_1ae, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v4_193, label %dec_label_pc_1ae, label %dec_label_pc_19c

dec_label_pc_19c:                                 ; preds = %dec_label_pc_182
  store x86_fp80 %v5_189, x86_fp80* %st7.global-to-local, align 4
  %v1_19f = load i32, i32* %edi.global-to-local, align 4
  %v2_19f = add i32 %v1_19f, -48
  %v3_19f = inttoptr i32 %v2_19f to double*
  %v4_19f = load double, double* %v3_19f, align 4
  %v5_19f = fpext double %v4_19f to x86_fp80
  store x86_fp80 %v5_19f, x86_fp80* %st6.global-to-local, align 4
  %v3_1a2 = add i32 %v1_19f, 8
  %v4_1a2 = inttoptr i32 %v3_1a2 to double*
  %v5_1a2 = load double, double* %v4_1a2, align 4
  %v6_1a2 = fpext double %v5_1a2 to x86_fp80
  %v7_1a2 = fmul x86_fp80 %v5_19f, %v6_1a2
  %v2_1a5 = fsub x86_fp80 0xK80000000000000000000, %v7_1a2
  store x86_fp80 %v2_1a5, x86_fp80* %st6.global-to-local, align 4
  %v4_1a7 = fsub x86_fp80 %v5_189, %v7_1a2
  store x86_fp80 %v4_1a7, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_1ae, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_1c6

dec_label_pc_1ae:                                 ; preds = %dec_label_pc_182
  store x86_fp80 %v5_18c, x86_fp80* %st7.global-to-local, align 4
  %v1_1b1 = load i32, i32* %edi.global-to-local, align 4
  %v2_1b1 = add i32 %v1_1b1, -48
  %v3_1b1 = inttoptr i32 %v2_1b1 to double*
  %v4_1b1 = load double, double* %v3_1b1, align 4
  %v5_1b1 = fpext double %v4_1b1 to x86_fp80
  store x86_fp80 %v5_1b1, x86_fp80* %st6.global-to-local, align 4
  %v3_1b4 = add i32 %v1_1b1, 8
  %v4_1b4 = inttoptr i32 %v3_1b4 to double*
  %v5_1b4 = load double, double* %v4_1b4, align 4
  %v6_1b4 = fpext double %v5_1b4 to x86_fp80
  %v7_1b4 = fmul x86_fp80 %v5_1b1, %v6_1b4
  %v2_1b7 = fsub x86_fp80 0xK80000000000000000000, %v7_1b4
  store x86_fp80 %v2_1b7, x86_fp80* %st6.global-to-local, align 4
  %v4_1b9 = fsub x86_fp80 %v5_18c, %v7_1b4
  store i3 %v6_1ae, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 0xKBFFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  %v6_1c3 = add i3 %v0_1ae, add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 -1)
  br label %dec_label_pc_1c6

dec_label_pc_1c6:                                 ; preds = %dec_label_pc_1ae, %dec_label_pc_19c
  %v5_1ce.pre-phi = phi x86_fp80 [ %v4_1b9, %dec_label_pc_1ae ], [ %v5_18c, %dec_label_pc_19c ]
  %v5_1c6.pre-phi = phi x86_fp80 [ %v5_189, %dec_label_pc_1ae ], [ %v4_1a7, %dec_label_pc_19c ]
  %storemerge10 = phi i3 [ %v6_1c3, %dec_label_pc_1ae ], [ %v0_1ae, %dec_label_pc_19c ]
  %stack_var_-12.1 = phi x86_fp80 [ 0xKBFFF8000000000000000, %dec_label_pc_1ae ], [ 0xK3FFF8000000000000000, %dec_label_pc_19c ]
  %v7_1c9 = fmul x86_fp80 %v5_1c6.pre-phi, %v1_4c
  %v2_1cc = fsub x86_fp80 0xK80000000000000000000, %v7_1c9
  %v7_1d1 = fmul x86_fp80 %v5_1ce.pre-phi, %v1_49
  %v4_1d6 = fsub x86_fp80 %v2_1cc, %v7_1d1
  %v7_1dd = fmul x86_fp80 %v5_1c6.pre-phi, %v1_49
  %v7_1e5 = fmul x86_fp80 %v5_1ce.pre-phi, %v1_4c
  %v4_1ea = fsub x86_fp80 %v7_1dd, %v7_1e5
  %v4_1ec = fptrunc x86_fp80 %v4_1ea to double
  %v4_1f1 = fptrunc x86_fp80 %v4_1d6 to double
  %v6_1f1 = add i3 %storemerge10, add (i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3))), i3 2)
  store x86_fp80 %stack_var_-12.1, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  store i3 %v6_1f1, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1fb = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1fb = call i16 @__asm_fnstsw(i32 %v0_1fb)
  %v2_1fb = sext i16 %v1_1fb to i32
  %v3_1fb = load i32, i32* @eax, align 8
  %v4_1fb = and i32 %v3_1fb, -65536
  %v1_1fd = udiv i32 %v2_1fb, 256
  %v2_1fd = trunc i32 %v1_1fd to i8
  %v3_1fd = and i8 %v2_1fd, 65
  %v4_1fd = icmp eq i8 %v3_1fd, 0
  %v9_1fd = zext i8 %v3_1fd to i32
  %v11_1fd = mul i32 %v9_1fd, 256
  %v2_1fb.masked = and i32 %v2_1fb, -65281
  %v12_1fd = or i32 %v4_1fb, %v2_1fb.masked
  %v13_1fd = or i32 %v12_1fd, %v11_1fd
  store i32 %v13_1fd, i32* @eax, align 8
  br i1 %v4_1fd, label %dec_label_pc_206, label %dec_label_pc_24a

dec_label_pc_206:                                 ; preds = %dec_label_pc_1c6
  %v0_206 = load i32, i32* %edi.global-to-local, align 4
  %v1_206 = add i32 %v0_206, -72
  %v2_206 = inttoptr i32 %v1_206 to i32*
  %v3_206 = load i32, i32* %v2_206, align 4
  %v13_206 = icmp eq i32 %v3_206, 1
  %v1_20a = icmp eq i1 %v13_206, false
  br i1 %v1_20a, label %dec_label_pc_21e, label %dec_label_pc_20c

dec_label_pc_20c:                                 ; preds = %dec_label_pc_206
  %v0_20c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_20c = add i3 %v0_20c, -1
  store i3 %v6_20c, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_20f = fsub x86_fp80 0xK80000000000000000000, %v4_1d6
  store x86_fp80 %v2_20f, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_211

dec_label_pc_211:                                 ; preds = %dec_label_pc_b4.dec_label_pc_211_crit_edge, %dec_label_pc_20c
  %v1_211 = phi x86_fp80 [ %v2_20f, %dec_label_pc_20c ], [ %v1_211.pre, %dec_label_pc_b4.dec_label_pc_211_crit_edge ]
  %v0_211 = phi i3 [ %v6_20c, %dec_label_pc_20c ], [ %v0_211.pre, %dec_label_pc_b4.dec_label_pc_211_crit_edge ]
  %stack_var_-28.2 = phi double [ %v4_1ec, %dec_label_pc_20c ], [ %stack_var_-28.0, %dec_label_pc_b4.dec_label_pc_211_crit_edge ]
  %v4_211 = fptrunc x86_fp80 %v1_211 to double
  %v5_214 = fpext double %stack_var_-28.2 to x86_fp80
  %v2_217 = fsub x86_fp80 0xK80000000000000000000, %v5_214
  store x86_fp80 %v2_217, x86_fp80* %st7.global-to-local, align 4
  %v4_219 = fptrunc x86_fp80 %v2_217 to double
  %v6_219 = add i3 %v0_211, 1
  store i3 %v6_219, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_24a

dec_label_pc_21e:                                 ; preds = %dec_label_pc_206
  %v13_21e = icmp eq i32 %v3_206, 2
  %v1_222 = icmp eq i1 %v13_21e, false
  br i1 %v1_222, label %dec_label_pc_232, label %dec_label_pc_224

dec_label_pc_224:                                 ; preds = %dec_label_pc_21e
  store x86_fp80 %v4_1d6, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_1ea, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_24a

dec_label_pc_232:                                 ; preds = %dec_label_pc_21e
  %v13_232 = icmp eq i32 %v3_206, 3
  %v1_236 = icmp eq i1 %v13_232, false
  br i1 %v1_236, label %dec_label_pc_24a, label %dec_label_pc_238

dec_label_pc_238:                                 ; preds = %dec_label_pc_232
  %v2_23e = fsub x86_fp80 0xK80000000000000000000, %v4_1ea
  store x86_fp80 %v2_23e, x86_fp80* %st6.global-to-local, align 4
  %v4_240 = fptrunc x86_fp80 %v2_23e to double
  %v2_243 = fsub x86_fp80 0xK80000000000000000000, %v4_1d6
  store x86_fp80 %v2_243, x86_fp80* %st7.global-to-local, align 4
  %v4_245 = fptrunc x86_fp80 %v2_243 to double
  br label %dec_label_pc_24a

dec_label_pc_24a:                                 ; preds = %dec_label_pc_211, %dec_label_pc_224, %dec_label_pc_232, %dec_label_pc_238, %dec_label_pc_1c6, %dec_label_pc_17b
  %stack_var_-20.3 = phi double [ %v4_1f1, %dec_label_pc_232 ], [ %v4_240, %dec_label_pc_238 ], [ %v4_1ec, %dec_label_pc_224 ], [ %v4_211, %dec_label_pc_211 ], [ %v4_1f1, %dec_label_pc_1c6 ], [ %stack_var_-20.1, %dec_label_pc_17b ]
  %stack_var_-28.3 = phi double [ %v4_1ec, %dec_label_pc_232 ], [ %v4_245, %dec_label_pc_238 ], [ %v4_1f1, %dec_label_pc_224 ], [ %v4_219, %dec_label_pc_211 ], [ %v4_1ec, %dec_label_pc_1c6 ], [ %storemerge22, %dec_label_pc_17b ]
  %v0_24a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_24a = fpext double %stack_var_-20.3 to x86_fp80
  store x86_fp80 %v5_24a, x86_fp80* %st7.global-to-local, align 4
  %v2_24d = load i32, i32* %edi.global-to-local, align 4
  %v3_24d = add i32 %v2_24d, 8
  %v4_24d = inttoptr i32 %v3_24d to double*
  %v5_24d = load double, double* %v4_24d, align 4
  %v6_24d = fpext double %v5_24d to x86_fp80
  %v7_24d = fdiv x86_fp80 %v5_24a, %v6_24d
  %v4_250 = fptrunc x86_fp80 %v7_24d to double
  %v5_253 = fpext double %stack_var_-28.3 to x86_fp80
  store x86_fp80 %v5_253, x86_fp80* %st7.global-to-local, align 4
  %v5_256 = load double, double* %v4_24d, align 4
  %v6_256 = fpext double %v5_256 to x86_fp80
  %v7_256 = fdiv x86_fp80 %v5_253, %v6_256
  %v4_259 = fptrunc x86_fp80 %v7_256 to double
  %tmp326 = call double @llvm.fabs.f64(double %v4_250)
  %v2_261 = fpext double %tmp326 to x86_fp80
  store x86_fp80 %v2_261, x86_fp80* %st7.global-to-local, align 4
  %v2_263 = add i32 %v2_24d, -56
  %v3_263 = inttoptr i32 %v2_263 to double*
  %v4_263 = load double, double* %v3_263, align 4
  %v5_263 = fpext double %v4_263 to x86_fp80
  store x86_fp80 %v5_263, x86_fp80* %st6.global-to-local, align 4
  %v8_266 = add i3 %v0_24a, add (i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3))), i3 2)
  store i3 %v8_266, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_268 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_268 = call i16 @__asm_fnstsw(i32 %v0_268)
  %v2_268 = sext i16 %v1_268 to i32
  %v3_268 = load i32, i32* @eax, align 8
  %v4_268 = and i32 %v3_268, -65536
  %v1_26a = udiv i32 %v2_268, 256
  %v2_26a = trunc i32 %v1_26a to i8
  %v3_26a = and i8 %v2_26a, 65
  %v4_26a = icmp eq i8 %v3_26a, 0
  %v9_26a = zext i8 %v3_26a to i32
  %v11_26a = mul i32 %v9_26a, 256
  %v2_268.masked = and i32 %v2_268, -65281
  %v12_26a = or i32 %v4_268, %v2_268.masked
  %v13_26a = or i32 %v12_26a, %v11_26a
  store i32 %v13_26a, i32* @eax, align 8
  br i1 %v4_26a, label %dec_label_pc_26f, label %dec_label_pc_29b

dec_label_pc_26f:                                 ; preds = %dec_label_pc_24a
  %tmp327 = call double @llvm.fabs.f64(double %v4_259)
  %v2_272 = fpext double %tmp327 to x86_fp80
  store x86_fp80 %v2_272, x86_fp80* %st7.global-to-local, align 4
  %v1_274 = load i32, i32* %edi.global-to-local, align 4
  %v2_274 = add i32 %v1_274, -56
  %v3_274 = inttoptr i32 %v2_274 to double*
  %v4_274 = load double, double* %v3_274, align 4
  %v5_274 = fpext double %v4_274 to x86_fp80
  store x86_fp80 %v5_274, x86_fp80* %st6.global-to-local, align 4
  %v0_279 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_279 = call i16 @__asm_fnstsw(i32 %v0_279)
  %v2_279 = sext i16 %v1_279 to i32
  %v3_279 = load i32, i32* @eax, align 8
  %v4_279 = and i32 %v3_279, -65536
  %v1_27b = udiv i32 %v2_279, 256
  %v2_27b = trunc i32 %v1_27b to i8
  %v3_27b = and i8 %v2_27b, 65
  %v4_27b = icmp eq i8 %v3_27b, 0
  %v9_27b = zext i8 %v3_27b to i32
  %v11_27b = mul i32 %v9_27b, 256
  %v2_279.masked = and i32 %v2_279, -65281
  %v12_27b = or i32 %v4_279, %v2_279.masked
  %v13_27b = or i32 %v12_27b, %v11_27b
  store i32 %v13_27b, i32* @eax, align 8
  br i1 %v4_27b, label %dec_label_pc_2c8, label %dec_label_pc_29b

dec_label_pc_29b:                                 ; preds = %dec_label_pc_26f, %dec_label_pc_24a
  %v0_29b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_256, x86_fp80* %st7.global-to-local, align 4
  %sext = mul i32 %stack_var_-64.0, 16777216
  %v4_2a7 = sdiv i32 %sext, 16777216
  store i32 %v4_2a7, i32* @eax, align 8
  %v0_2aa = load i32, i32* %edi.global-to-local, align 4
  %v1_2aa = add i32 %v0_2aa, 28
  %v2_2aa = inttoptr i32 %v1_2aa to i32*
  %v3_2aa = load i32, i32* %v2_2aa, align 4
  %tmp328 = icmp ugt i32 %v3_2aa, %v4_2a7
  br i1 %tmp328, label %dec_label_pc_2af, label %dec_label_pc_2ce

dec_label_pc_2af:                                 ; preds = %dec_label_pc_29b
  %v1_2af = add i32 %v0_2aa, -68
  %v2_2af = inttoptr i32 %v1_2af to i32*
  %v3_2af = load i32, i32* %v2_2af, align 4
  %tmp329 = icmp ugt i32 %v3_2af, %v4_2a7
  br i1 %tmp329, label %dec_label_pc_2b5, label %dec_label_pc_2ce

dec_label_pc_2b5:                                 ; preds = %dec_label_pc_2af
  %v5_2b5 = add i32 %v4_2a7, ptrtoint (i8* @global_var_1.1 to i32)
  %v5_2b9 = fpext double %stack_var_-72.0 to x86_fp80
  store x86_fp80 %v5_2b9, x86_fp80* %st7.global-to-local, align 4
  %v3_2bc = add i32 %v0_2aa, 8
  %v4_2bc = inttoptr i32 %v3_2bc to double*
  %v5_2bc = load double, double* %v4_2bc, align 4
  %v6_2bc = fpext double %v5_2bc to x86_fp80
  %v7_2bc = fdiv x86_fp80 %v5_2b9, %v6_2bc
  store x86_fp80 %v7_2bc, x86_fp80* %st7.global-to-local, align 4
  %v4_2bf = fptrunc x86_fp80 %v7_2bc to double
  br label %dec_label_pc_95

dec_label_pc_2c8:                                 ; preds = %dec_label_pc_26f
  %v0_280 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_283 = load i32, i32* @edx, align 8
  %v4_283 = inttoptr i32 %v2_283 to double*
  store double %v4_250, double* %v4_283, align 4
  %v2_288 = load i32, i32* @ecx, align 8
  %v4_288 = inttoptr i32 %v2_288 to double*
  store double %v4_259, double* %v4_288, align 4
  %v5_28a = fpext double %stack_var_-72.0 to x86_fp80
  store x86_fp80 %v5_28a, x86_fp80* %st7.global-to-local, align 4
  %v2_28d = load i32, i32* %edi.global-to-local, align 4
  %v3_28d = add i32 %v2_28d, 8
  %v4_28d = inttoptr i32 %v3_28d to double*
  %v5_28d = load double, double* %v4_28d, align 4
  %v6_28d = fpext double %v5_28d to x86_fp80
  %v7_28d = fdiv x86_fp80 %v5_28a, %v6_28d
  %v4_290 = fptrunc x86_fp80 %v7_28d to double
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  br i1 icmp eq (i32 ptrtoint (i8* @global_var_1.1 to i32), i32 1), label %dec_label_pc_2ee, label %dec_label_pc_2ce

dec_label_pc_2ce:                                 ; preds = %dec_label_pc_2af, %dec_label_pc_29b, %dec_label_pc_2c8
  %v0_2d263 = phi i3 [ %v0_280, %dec_label_pc_2c8 ], [ %v0_29b, %dec_label_pc_29b ], [ %v0_29b, %dec_label_pc_2af ]
  %v1_2e062 = phi i32 [ %v2_28d, %dec_label_pc_2c8 ], [ %v0_2aa, %dec_label_pc_29b ], [ %v0_2aa, %dec_label_pc_2af ]
  %v2_2d2 = add i32 %v1_2e062, 24
  %v3_2d2 = inttoptr i32 %v2_2d2 to double*
  %v4_2d2 = load double, double* %v3_2d2, align 4
  %v5_2d2 = fpext double %v4_2d2 to x86_fp80
  %v4_2d5 = load double, double* bitcast (i32* @edx to double*), align 8
  %v5_2d5 = fpext double %v4_2d5 to x86_fp80
  %v6_2d5 = fmul x86_fp80 %v5_2d2, %v5_2d5
  store x86_fp80 %v6_2d5, x86_fp80* %st7.global-to-local, align 4
  %tmp330 = bitcast double %v4_2d5 to i64
  %tmp331 = trunc i64 %tmp330 to i32
  %v3_2d7 = fptrunc x86_fp80 %v6_2d5 to double
  %v4_2d7 = inttoptr i32 %tmp331 to double*
  store double %v3_2d7, double* %v4_2d7, align 4
  %v4_2d9 = load double, double* %v3_2d2, align 4
  %v5_2d9 = fpext double %v4_2d9 to x86_fp80
  %v6_2d9 = add i3 %v0_2d263, add (i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 -1), i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)))
  %v4_2dc = load double, double* bitcast (i32* @ecx to double*), align 8
  %v5_2dc = fpext double %v4_2dc to x86_fp80
  %v6_2dc = fmul x86_fp80 %v5_2d9, %v5_2dc
  store x86_fp80 %v6_2dc, x86_fp80* %st7.global-to-local, align 4
  %tmp332 = bitcast double %v4_2dc to i64
  %tmp333 = trunc i64 %tmp332 to i32
  %v3_2de = fptrunc x86_fp80 %v6_2dc to double
  %v4_2de = inttoptr i32 %tmp333 to double*
  store double %v3_2de, double* %v4_2de, align 4
  %v4_2e0 = load double, double* %v3_2d2, align 4
  %v5_2e0 = fpext double %v4_2e0 to x86_fp80
  store i3 %v6_2d9, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_2e3 = load double, double* bitcast (i32* @eax to double*), align 8
  %v5_2e3 = fpext double %v4_2e3 to x86_fp80
  %v6_2e3 = fmul x86_fp80 %v5_2e0, %v5_2e3
  store x86_fp80 %v6_2e3, x86_fp80* %st7.global-to-local, align 4
  %v2_2e6 = load i32, i32* %ebx.global-to-local, align 4
  %v3_2e6 = fptrunc x86_fp80 %v6_2e3 to double
  %v4_2e6 = inttoptr i32 %v2_2e6 to double*
  store double %v3_2e6, double* %v4_2e6, align 4
  br label %dec_label_pc_311

dec_label_pc_2ee:                                 ; preds = %bb320, %dec_label_pc_2c8, %dec_label_pc_7e
  %stack_var_-72.2 = phi double [ %v3_50, %dec_label_pc_7e ], [ %v4_290, %dec_label_pc_2c8 ], [ %v3_50, %bb320 ]
  %v0_2ee = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_2ee = fpext double %stack_var_-72.2 to x86_fp80
  %v6_2ee = sub i3 %v0_2ee, ptrtoint (i8* @global_var_1.1 to i3)
  store x86_fp80 %v5_2ee, x86_fp80* %st7.global-to-local, align 4
  %v2_2f1 = load i32, i32* %edi.global-to-local, align 4
  %v3_2f1 = add i32 %v2_2f1, -40
  %v4_2f1 = inttoptr i32 %v3_2f1 to double*
  %v5_2f1 = load double, double* %v4_2f1, align 4
  %v6_2f1 = fpext double %v5_2f1 to x86_fp80
  %v7_2f1 = fmul x86_fp80 %v5_2ee, %v6_2f1
  store x86_fp80 %v7_2f1, x86_fp80* %st7.global-to-local, align 4
  %v3_2f4 = add i32 %v2_2f1, -16
  %v4_2f4 = inttoptr i32 %v3_2f4 to double*
  %v5_2f4 = load double, double* %v4_2f4, align 4
  %v6_2f4 = fpext double %v5_2f4 to x86_fp80
  %v7_2f4 = fsub x86_fp80 %v7_2f1, %v6_2f4
  %v2_2f7 = load i32, i32* %ebx.global-to-local, align 4
  %v3_2f7 = fptrunc x86_fp80 %v7_2f4 to double
  %v4_2f7 = inttoptr i32 %v2_2f7 to double*
  store double %v3_2f7, double* %v4_2f7, align 4
  %v3_2f9 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_2f9 = fpext double %v3_2f9 to x86_fp80
  store x86_fp80 %v4_2f9, x86_fp80* %st7.global-to-local, align 4
  %v5_2fb = load double, double* %v4_2f1, align 4
  %v6_2fb = fpext double %v5_2fb to x86_fp80
  %v7_2fb = fmul x86_fp80 %v4_2f9, %v6_2fb
  store x86_fp80 %v7_2fb, x86_fp80* %st7.global-to-local, align 4
  %v3_2fe = add i32 %v2_2f1, -24
  %v4_2fe = inttoptr i32 %v3_2fe to double*
  %v5_2fe = load double, double* %v4_2fe, align 4
  %v6_2fe = fpext double %v5_2fe to x86_fp80
  %v7_2fe = fsub x86_fp80 %v7_2fb, %v6_2fe
  %tmp334 = bitcast double %v3_2f9 to i64
  %tmp335 = trunc i64 %tmp334 to i32
  %v3_301 = fptrunc x86_fp80 %v7_2fe to double
  %v4_301 = inttoptr i32 %tmp335 to double*
  store double %v3_301, double* %v4_301, align 4
  %v3_303 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_303 = fpext double %v3_303 to x86_fp80
  store i3 %v6_2ee, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_303, x86_fp80* %st7.global-to-local, align 4
  %v5_305 = load double, double* %v4_2f1, align 4
  %v6_305 = fpext double %v5_305 to x86_fp80
  %v7_305 = fmul x86_fp80 %v4_303, %v6_305
  store x86_fp80 %v7_305, x86_fp80* %st7.global-to-local, align 4
  %v3_308 = add i32 %v2_2f1, -32
  %v4_308 = inttoptr i32 %v3_308 to double*
  %v5_308 = load double, double* %v4_308, align 4
  %v6_308 = fpext double %v5_308 to x86_fp80
  %v7_308 = fsub x86_fp80 %v7_305, %v6_308
  store x86_fp80 %v7_308, x86_fp80* %st7.global-to-local, align 4
  %tmp336 = bitcast double %v3_303 to i64
  %tmp337 = trunc i64 %tmp336 to i32
  %v3_30b = fptrunc x86_fp80 %v7_308 to double
  %v4_30b = inttoptr i32 %tmp337 to double*
  store double %v3_30b, double* %v4_30b, align 4
  br label %dec_label_pc_311

dec_label_pc_311:                                 ; preds = %dec_label_pc_2ee, %dec_label_pc_2ce
  %v0_311 = phi i32 [ %v2_2f7, %dec_label_pc_2ee ], [ %v2_2e6, %dec_label_pc_2ce ]
  %storemerge = phi i3 [ %v0_2ee, %dec_label_pc_2ee ], [ %v0_2d263, %dec_label_pc_2ce ]
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_311, i32* @eax, align 8
  store i32 %v0_b, i32* %edi.global-to-local, align 4
  store i32 %v0_a, i32* %esi.global-to-local, align 4
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  ret i32 %v0_311
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
