source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st0.global-to-local = alloca x86_fp80, align 4
  %st5.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_8 = load i32, i32* @eax, align 8
  store i32 %v0_8, i32* %ebx.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  %v3_d = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_d = fpext double %v3_d to x86_fp80
  %v3_f = fmul x86_fp80 %v4_d, %v4_d
  %v3_11 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_11 = fpext double %v3_11 to x86_fp80
  %v3_13 = fmul x86_fp80 %v4_11, %v4_11
  %v4_15 = fadd x86_fp80 %v3_f, %v3_13
  %v2_17 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_15)
  store x86_fp80 %v2_17, x86_fp80* %st7.global-to-local, align 4
  %v3_19 = add i32 %v3_a, -24
  %v4_19 = inttoptr i32 %v3_19 to double*
  %v5_19 = load double, double* %v4_19, align 4
  %v6_19 = fpext double %v5_19 to x86_fp80
  %v7_19 = fmul x86_fp80 %v2_17, %v6_19
  store x86_fp80 %v7_19, x86_fp80* %st7.global-to-local, align 4
  %v3_1c = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_1c = fpext double %v3_1c to x86_fp80
  %v3_1e = add i32 %v3_a, -16
  %v4_1e = inttoptr i32 %v3_1e to double*
  %v5_1e = load double, double* %v4_1e, align 4
  %v6_1e = fpext double %v5_1e to x86_fp80
  %v7_1e = fmul x86_fp80 %v4_1c, %v6_1e
  %v4_21 = fadd x86_fp80 %v7_19, %v7_1e
  %tmp245 = bitcast double %v3_1c to i64
  %tmp246 = trunc i64 %tmp245 to i32
  %v3_23 = fptrunc x86_fp80 %v4_21 to double
  %v4_23 = inttoptr i32 %tmp246 to double*
  store double %v3_23, double* %v4_23, align 4
  %v3_25 = load double, double* bitcast (i32* @ecx to double*), align 8
  %tmp247 = call double @llvm.fabs.f64(double %v3_25)
  %v2_27 = fpext double %tmp247 to x86_fp80
  store x86_fp80 %v2_27, x86_fp80* %st7.global-to-local, align 4
  %v0_2d = load i32, i32* %fpsw.global-to-local, align 4
  %v1_2d = call i16 @__asm_fnstsw(i32 %v0_2d)
  %v2_2d = sext i16 %v1_2d to i32
  %v3_2d = load i32, i32* @eax, align 8
  %v4_2d = and i32 %v3_2d, -65536
  %v1_2f = udiv i32 %v2_2d, 256
  %v2_2f = trunc i32 %v1_2f to i8
  %v3_2f = and i8 %v2_2f, 65
  %v4_2f = icmp eq i8 %v3_2f, 0
  %v9_2f = zext i8 %v3_2f to i32
  %v11_2f = mul i32 %v9_2f, 256
  %v2_2d.masked = and i32 %v2_2d, -65281
  %v12_2f = or i32 %v4_2d, %v2_2d.masked
  %v13_2f = or i32 %v12_2f, %v11_2f
  store i32 %v13_2f, i32* @eax, align 8
  %v4_32 = icmp eq i1 %v4_2f, false
  %v0_44 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_46 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_46 = fpext double %v3_46 to x86_fp80
  br i1 %v4_32, label %dec_label_pc_44, label %dec_label_pc_34

dec_label_pc_34:                                  ; preds = %dec_label_pc_0
  store x86_fp80 %v4_46, x86_fp80* %st7.global-to-local, align 4
  %v2_36 = add i3 %v0_44, -2
  %v3_38 = fmul x86_fp80 %v4_46, %v4_46
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st5.global-to-local, align 4
  %v4_3e = fsub x86_fp80 0xK3FFF8000000000000000, %v3_38
  store i3 %v2_36, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_40 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_3e)
  br label %dec_label_pc_56

dec_label_pc_44:                                  ; preds = %dec_label_pc_0
  %v5_46 = add i3 %v0_44, -2
  %v4_48 = fdiv x86_fp80 0xK3FFF8000000000000000, %v4_46
  store x86_fp80 %v4_48, x86_fp80* %st7.global-to-local, align 4
  %v3_4c = fmul x86_fp80 %v4_48, %v4_48
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st5.global-to-local, align 4
  %v4_52 = fsub x86_fp80 0xK3FFF8000000000000000, %v3_4c
  store i3 %v5_46, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_54 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_52)
  br label %dec_label_pc_56

dec_label_pc_56:                                  ; preds = %dec_label_pc_44, %dec_label_pc_34
  %v3_90 = phi x86_fp80 [ %v4_46, %dec_label_pc_34 ], [ %v4_48, %dec_label_pc_44 ]
  %v0_58 = phi i3 [ %v2_36, %dec_label_pc_34 ], [ %v5_46, %dec_label_pc_44 ]
  %storemerge3.in.in = phi x86_fp80 [ %v2_40, %dec_label_pc_34 ], [ %v2_54, %dec_label_pc_44 ]
  %v3_58 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_58 = fpext double %v3_58 to x86_fp80
  store x86_fp80 %v4_58, x86_fp80* %st5.global-to-local, align 4
  %v2_5a = load i32, i32* %esi.global-to-local, align 4
  %v3_5a = add i32 %v2_5a, -32
  %v4_5a = inttoptr i32 %v3_5a to double*
  %v5_5a = load double, double* %v4_5a, align 4
  %v6_5a = fpext double %v5_5a to x86_fp80
  %v7_5a = fmul x86_fp80 %v4_58, %v6_5a
  store x86_fp80 %v7_5a, x86_fp80* %st5.global-to-local, align 4
  %v3_5d = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_5d = fpext double %v3_5d to x86_fp80
  %v3_5f = add i32 %v2_5a, -40
  %v4_5f = inttoptr i32 %v3_5f to double*
  %v5_5f = load double, double* %v4_5f, align 4
  %v6_5f = fpext double %v5_5f to x86_fp80
  %v7_5f = fmul x86_fp80 %v4_5d, %v6_5f
  %v4_62 = fadd x86_fp80 %v7_5a, %v7_5f
  store x86_fp80 %v4_62, x86_fp80* %st5.global-to-local, align 4
  %v3_66 = fmul x86_fp80 %v4_58, %v4_58
  %v3_68 = add i32 %v2_5a, -48
  %v4_68 = inttoptr i32 %v3_68 to double*
  %v5_68 = load double, double* %v4_68, align 4
  %v6_68 = fpext double %v5_68 to x86_fp80
  %v7_68 = fmul x86_fp80 %v3_66, %v6_68
  %v4_6b = fadd x86_fp80 %v4_62, %v7_68
  store x86_fp80 %v4_6b, x86_fp80* %st5.global-to-local, align 4
  %v3_6f = fmul x86_fp80 %v4_5d, %v4_5d
  %v3_71 = add i32 %v2_5a, -56
  %v4_71 = inttoptr i32 %v3_71 to double*
  %v5_71 = load double, double* %v4_71, align 4
  %v6_71 = fpext double %v5_71 to x86_fp80
  %v7_71 = fmul x86_fp80 %v3_6f, %v6_71
  %v4_74 = fadd x86_fp80 %v4_6b, %v7_71
  store x86_fp80 %v4_74, x86_fp80* %st5.global-to-local, align 4
  %v6_78 = fmul x86_fp80 %v4_58, %v4_5d
  %v3_7a = add i32 %v2_5a, -64
  %v4_7a = inttoptr i32 %v3_7a to double*
  %v5_7a = load double, double* %v4_7a, align 4
  %v6_7a = fpext double %v5_7a to x86_fp80
  %v7_7a = fmul x86_fp80 %v6_78, %v6_7a
  %v4_7d = fadd x86_fp80 %v4_74, %v7_7a
  store x86_fp80 %v4_7d, x86_fp80* %st5.global-to-local, align 4
  %v4_87 = fadd x86_fp80 %v3_66, %v3_6f
  %v2_89 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_87)
  %v3_8b = add i32 %v2_5a, -72
  %v4_8b = inttoptr i32 %v3_8b to double*
  %v5_8b = load double, double* %v4_8b, align 4
  %v6_8b = fpext double %v5_8b to x86_fp80
  %v7_8b = fmul x86_fp80 %v2_89, %v6_8b
  %v4_8e = fadd x86_fp80 %v4_7d, %v7_8b
  %v4_90 = fmul x86_fp80 %v3_90, %v4_8e
  store x86_fp80 %v4_90, x86_fp80* %st5.global-to-local, align 4
  %v3_96 = add i32 %v2_5a, -80
  %v4_96 = inttoptr i32 %v3_96 to double*
  %v5_96 = load double, double* %v4_96, align 4
  %v6_96 = fpext double %v5_96 to x86_fp80
  %v7_96 = fmul x86_fp80 %v4_58, %v6_96
  %v3_9b = add i32 %v2_5a, -88
  %v4_9b = inttoptr i32 %v3_9b to double*
  %v5_9b = load double, double* %v4_9b, align 4
  %v6_9b = fpext double %v5_9b to x86_fp80
  %v7_9b = fmul x86_fp80 %v4_5d, %v6_9b
  %v4_9e = fadd x86_fp80 %v7_96, %v7_9b
  %v3_a4 = add i32 %v2_5a, -96
  %v4_a4 = inttoptr i32 %v3_a4 to double*
  %v5_a4 = load double, double* %v4_a4, align 4
  %v6_a4 = fpext double %v5_a4 to x86_fp80
  %v7_a4 = fmul x86_fp80 %v3_66, %v6_a4
  %v4_a7 = fadd x86_fp80 %v4_9e, %v7_a4
  %v3_ad = add i32 %v2_5a, -104
  %v4_ad = inttoptr i32 %v3_ad to double*
  %v5_ad = load double, double* %v4_ad, align 4
  %v6_ad = fpext double %v5_ad to x86_fp80
  %v7_ad = fmul x86_fp80 %v3_6f, %v6_ad
  %v4_b0 = fadd x86_fp80 %v4_a7, %v7_ad
  %v3_b6 = add i32 %v2_5a, -112
  %v4_b6 = inttoptr i32 %v3_b6 to double*
  %v5_b6 = load double, double* %v4_b6, align 4
  %v6_b6 = fpext double %v5_b6 to x86_fp80
  %v7_b6 = fmul x86_fp80 %v6_78, %v6_b6
  %v4_b9 = fadd x86_fp80 %v7_b6, %v4_b0
  %v3_c7 = add i32 %v2_5a, -120
  %v4_c7 = inttoptr i32 %v3_c7 to double*
  %v5_c7 = load double, double* %v4_c7, align 4
  %v6_c7 = fpext double %v5_c7 to x86_fp80
  %v7_c7 = fmul x86_fp80 %v2_89, %v6_c7
  %v4_ca = fadd x86_fp80 %v7_c7, %v4_b9
  %v4_cc = fmul x86_fp80 %storemerge3.in.in, %v4_ca
  %v4_ce = fadd x86_fp80 %v4_90, %v4_cc
  store x86_fp80 %v4_ce, x86_fp80* %st5.global-to-local, align 4
  %v5_d4 = load double, double* %v4_5a, align 4
  %v6_d4 = fpext double %v5_d4 to x86_fp80
  %v7_d4 = fmul x86_fp80 %v4_58, %v6_d4
  %v5_d9 = load double, double* %v4_5f, align 4
  %v6_d9 = fpext double %v5_d9 to x86_fp80
  %v7_d9 = fmul x86_fp80 %v4_5d, %v6_d9
  %v4_dc = fadd x86_fp80 %v7_d4, %v7_d9
  %v5_e2 = load double, double* %v4_68, align 4
  %v6_e2 = fpext double %v5_e2 to x86_fp80
  %v7_e2 = fmul x86_fp80 %v3_66, %v6_e2
  %v4_e5 = fadd x86_fp80 %v7_e2, %v4_dc
  %v5_eb = load double, double* %v4_71, align 4
  %v6_eb = fpext double %v5_eb to x86_fp80
  %v7_eb = fmul x86_fp80 %v3_6f, %v6_eb
  %v4_ee = fadd x86_fp80 %v7_eb, %v4_e5
  %v3_f0 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_f0 = fpext double %v3_f0 to x86_fp80
  %v6_f2 = fmul x86_fp80 %v4_5d, %v4_f0
  %v2_f4 = load i32, i32* %esi.global-to-local, align 4
  %v3_f4 = add i32 %v2_f4, -64
  %v4_f4 = inttoptr i32 %v3_f4 to double*
  %v5_f4 = load double, double* %v4_f4, align 4
  %v6_f4 = fpext double %v5_f4 to x86_fp80
  %v7_f4 = fmul x86_fp80 %v6_f2, %v6_f4
  %v4_f7 = fadd x86_fp80 %v4_ee, %v7_f4
  %v3_fb = fmul x86_fp80 %v4_f0, %v4_f0
  %v3_fd = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_fd = fpext double %v3_fd to x86_fp80
  %v3_ff = fmul x86_fp80 %v4_fd, %v4_fd
  %v4_101 = fadd x86_fp80 %v3_fb, %v3_ff
  %v2_103 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_101)
  %v3_105 = add i32 %v2_f4, -72
  %v4_105 = inttoptr i32 %v3_105 to double*
  %v5_105 = load double, double* %v4_105, align 4
  %v6_105 = fpext double %v5_105 to x86_fp80
  %v7_105 = fmul x86_fp80 %v2_103, %v6_105
  %v4_108 = fadd x86_fp80 %v4_f7, %v7_105
  %v4_10a = fmul x86_fp80 %storemerge3.in.in, %v4_108
  %v3_110 = add i32 %v2_f4, -80
  %v4_110 = inttoptr i32 %v3_110 to double*
  %v5_110 = load double, double* %v4_110, align 4
  %v6_110 = fpext double %v5_110 to x86_fp80
  %v7_110 = fmul x86_fp80 %v4_f0, %v6_110
  %v3_115 = add i32 %v2_f4, -88
  %v4_115 = inttoptr i32 %v3_115 to double*
  %v5_115 = load double, double* %v4_115, align 4
  %v6_115 = fpext double %v5_115 to x86_fp80
  %v7_115 = fmul x86_fp80 %v4_fd, %v6_115
  %v4_118 = fadd x86_fp80 %v7_110, %v7_115
  %v3_11e = add i32 %v2_f4, -96
  %v4_11e = inttoptr i32 %v3_11e to double*
  %v5_11e = load double, double* %v4_11e, align 4
  %v6_11e = fpext double %v5_11e to x86_fp80
  %v7_11e = fmul x86_fp80 %v3_fb, %v6_11e
  %v4_121 = fadd x86_fp80 %v7_11e, %v4_118
  %v3_127 = add i32 %v2_f4, -104
  %v4_127 = inttoptr i32 %v3_127 to double*
  %v5_127 = load double, double* %v4_127, align 4
  %v6_127 = fpext double %v5_127 to x86_fp80
  %v7_127 = fmul x86_fp80 %v3_ff, %v6_127
  %v4_12a = fadd x86_fp80 %v7_127, %v4_121
  %v6_12e = fmul x86_fp80 %v4_f0, %v4_fd
  %v3_130 = add i32 %v2_f4, -112
  %v4_130 = inttoptr i32 %v3_130 to double*
  %v5_130 = load double, double* %v4_130, align 4
  %v6_130 = fpext double %v5_130 to x86_fp80
  %v7_130 = fmul x86_fp80 %v6_12e, %v6_130
  %v4_133 = fadd x86_fp80 %v7_130, %v4_12a
  %v3_141 = add i32 %v2_f4, -120
  %v4_141 = inttoptr i32 %v3_141 to double*
  %v5_141 = load double, double* %v4_141, align 4
  %v6_141 = fpext double %v5_141 to x86_fp80
  %v7_141 = fmul x86_fp80 %v2_103, %v6_141
  %v4_144 = fadd x86_fp80 %v7_141, %v4_133
  %v3_146 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_146 = fmul x86_fp80 %v3_146, %v4_144
  %v4_148 = fadd x86_fp80 %v4_10a, %v4_146
  %tmp248 = bitcast double %v3_fd to i64
  %tmp249 = trunc i64 %tmp248 to i32
  %v3_14c = fptrunc x86_fp80 %v4_148 to double
  %v4_14c = inttoptr i32 %tmp249 to double*
  store double %v3_14c, double* %v4_14c, align 4
  %v1_14e = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v2_14e = load i32, i32* %ebx.global-to-local, align 4
  %v3_14e = fptrunc x86_fp80 %v1_14e to double
  %v4_14e = inttoptr i32 %v2_14e to double*
  store double %v3_14e, double* %v4_14e, align 4
  store i3 %v0_58, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_150 = load x86_fp80, x86_fp80* %st0.global-to-local, align 4
  call void @__asm_ffree(x86_fp80 %v0_150)
  call void @__asm_ffree(x86_fp80 %v3_ff)
  %v1_156 = add i3 %v0_58, 2
  store i3 %v1_156, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_158 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %v0_158, i32* @eax, align 8
  store i32 %v0_4, i32* %ebx.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v0_158
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare void @__asm_ffree(x86_fp80) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
