source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp271 = call double @__decompiler_undefined_function_3()
  %stack_var_-28 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-28, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i32, i32* %edi.global-to-local, align 4
  %v1_4b = add i32 %v0_4b, -100
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v10_4b = icmp eq i32 %v3_4b, 0
  %v0_5f.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_6b.pre = load double, double* %stack_var_-28, align 8
  br i1 %v10_4b, label %dec_label_pc_40.dec_label_pc_5f_crit_edge, label %dec_label_pc_51

dec_label_pc_40.dec_label_pc_5f_crit_edge:        ; preds = %dec_label_pc_40
  %.pre = fpext double %v6_45 to x86_fp80
  %.pre28 = fpext double %v3_6b.pre to x86_fp80
  br label %dec_label_pc_5f

dec_label_pc_51:                                  ; preds = %dec_label_pc_40
  %v8_51 = fpext double %v3_6b.pre to x86_fp80
  store x86_fp80 %v8_51, x86_fp80* %st7.global-to-local, align 4
  %v7_54 = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_54, x86_fp80* %st6.global-to-local, align 4
  store double %v6_45, double* %stack_var_-28, align 8
  br label %dec_label_pc_5f

dec_label_pc_5f:                                  ; preds = %dec_label_pc_40.dec_label_pc_5f_crit_edge, %dec_label_pc_51
  %v8_6b.pre-phi = phi x86_fp80 [ %.pre28, %dec_label_pc_40.dec_label_pc_5f_crit_edge ], [ %v7_54, %dec_label_pc_51 ]
  %v7_5f.pre-phi = phi x86_fp80 [ %.pre, %dec_label_pc_40.dec_label_pc_5f_crit_edge ], [ %v8_51, %dec_label_pc_51 ]
  %stack_var_-12.0 = phi double [ %v6_45, %dec_label_pc_40.dec_label_pc_5f_crit_edge ], [ %v3_6b.pre, %dec_label_pc_51 ]
  %v3_63 = fmul x86_fp80 %v7_5f.pre-phi, %v7_5f.pre-phi
  store x86_fp80 %v3_63, x86_fp80* %st7.global-to-local, align 4
  %v5_65 = fpext double %tmp271 to x86_fp80
  %v3_69 = fmul x86_fp80 %v5_65, %v5_65
  store x86_fp80 %v3_69, x86_fp80* %st6.global-to-local, align 4
  %v3_6e = fmul x86_fp80 %v8_6b.pre-phi, %v8_6b.pre-phi
  %v3_70 = add i32 %v0_4b, -84
  %v4_70 = inttoptr i32 %v3_70 to double*
  %v5_70 = load double, double* %v4_70, align 4
  %v6_70 = fpext double %v5_70 to x86_fp80
  %v7_70 = fmul x86_fp80 %v3_6e, %v6_70
  %v4_73 = fadd x86_fp80 %v3_69, %v7_70
  store x86_fp80 %v4_73, x86_fp80* %st6.global-to-local, align 4
  %v4_75 = fadd x86_fp80 %v3_63, %v4_73
  store x86_fp80 %v4_75, x86_fp80* %st7.global-to-local, align 4
  %v3_77 = add i32 %v0_4b, -92
  %v4_77 = inttoptr i32 %v3_77 to double*
  %v5_77 = load double, double* %v4_77, align 4
  %v6_77 = fpext double %v5_77 to x86_fp80
  %v7_77 = fsub x86_fp80 %v4_75, %v6_77
  %v2_7a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_77)
  %v2_7c = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_7a)
  store x86_fp80 %v2_7c, x86_fp80* %st7.global-to-local, align 4
  %v3_7e = add i32 %v0_4b, -72
  %v4_7e = inttoptr i32 %v3_7e to double*
  %v5_7e = load double, double* %v4_7e, align 4
  %v6_7e = fpext double %v5_7e to x86_fp80
  %v7_7e = fsub x86_fp80 %v2_7c, %v6_7e
  store x86_fp80 %v7_7e, x86_fp80* %st7.global-to-local, align 4
  %v9_81 = add i3 %v0_5f.pre, -2
  store i3 %v9_81, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v8_6b.pre-phi, x86_fp80* %st6.global-to-local, align 4
  %v1_84 = add i32 %v0_4b, -96
  %v2_84 = inttoptr i32 %v1_84 to i32*
  %v3_84 = load i32, i32* %v2_84, align 4
  %v10_84 = icmp eq i32 %v3_84, 0
  %v1_88 = icmp eq i1 %v10_84, false
  br i1 %v1_88, label %dec_label_pc_5f.dec_label_pc_8f_crit_edge, label %dec_label_pc_8a

dec_label_pc_5f.dec_label_pc_8f_crit_edge:        ; preds = %dec_label_pc_5f
  %.pre29 = add i32 %v0_4b, -16
  %.pre30 = inttoptr i32 %.pre29 to double*
  br label %dec_label_pc_8f

dec_label_pc_8a:                                  ; preds = %dec_label_pc_5f
  %v2_8a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_7e)
  store x86_fp80 %v2_8a, x86_fp80* %st7.global-to-local, align 4
  %v3_8c = add i32 %v0_4b, -16
  %v4_8c = inttoptr i32 %v3_8c to double*
  %v5_8c = load double, double* %v4_8c, align 4
  %v6_8c = fpext double %v5_8c to x86_fp80
  %v7_8c = fsub x86_fp80 %v2_8a, %v6_8c
  store x86_fp80 %v7_8c, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_8f

dec_label_pc_8f:                                  ; preds = %dec_label_pc_5f.dec_label_pc_8f_crit_edge, %dec_label_pc_8a
  %v4_95.pre-phi = phi double* [ %.pre30, %dec_label_pc_5f.dec_label_pc_8f_crit_edge ], [ %v4_8c, %dec_label_pc_8a ]
  %v6_8f = add i3 %v0_5f.pre, -3
  store i3 %v6_8f, i3* %fpu_stat_TOP.global-to-local, align 1
  %tmp276 = call double @llvm.fabs.f64(double %tmp271)
  %v2_93 = fpext double %tmp276 to x86_fp80
  store x86_fp80 %v2_93, x86_fp80* %st6.global-to-local, align 4
  %v5_95 = load double, double* %v4_95.pre-phi, align 4
  %v6_95 = fpext double %v5_95 to x86_fp80
  %v7_95 = fsub x86_fp80 %v2_93, %v6_95
  store x86_fp80 %v7_95, x86_fp80* %st6.global-to-local, align 4
  %v0_9a = call i32 @__asm_wait()
  %v0_9b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_9b = call i16 @__asm_fnstsw(i32 %v0_9b)
  %tmp284 = and i16 %v1_9b, 256
  %v16_9d = icmp ne i16 %tmp284, 0
  %v1_9f = icmp eq i1 %v16_9d, false
  br i1 %v1_9f, label %dec_label_pc_a5, label %dec_label_pc_a7

dec_label_pc_a5:                                  ; preds = %dec_label_pc_8f
  %v1_a5 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v1_a5, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_a7

dec_label_pc_a7:                                  ; preds = %dec_label_pc_8f, %dec_label_pc_a5
  %tmp278 = call double @llvm.fabs.f64(double %stack_var_-12.0)
  %v2_ab = fpext double %tmp278 to x86_fp80
  store x86_fp80 %v2_ab, x86_fp80* %st6.global-to-local, align 4
  %v2_ad = load i32, i32* %edi.global-to-local, align 4
  %v3_ad = add i32 %v2_ad, -16
  %v4_ad = inttoptr i32 %v3_ad to double*
  %v5_ad = load double, double* %v4_ad, align 4
  %v6_ad = fpext double %v5_ad to x86_fp80
  %v7_ad = fsub x86_fp80 %v2_ab, %v6_ad
  store x86_fp80 %v7_ad, x86_fp80* %st6.global-to-local, align 4
  %v0_b2 = call i32 @__asm_wait()
  %v0_b3 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_b3 = call i16 @__asm_fnstsw(i32 %v0_b3)
  %storemerge10.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge10 = add i3 %storemerge10.in, 1
  store i3 %storemerge10, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_c1 = call i32 @__asm_wait()
  %v1_c2 = call i16 @__asm_fnstsw(i32 %v0_b3)
  %v2_c2 = sext i16 %v1_c2 to i32
  %v4_c2 = and i32 %v0_c1, -65536
  %tmp280 = udiv i32 %v2_c2, 2
  %v12_c4 = and i32 %tmp280, 32512
  %v2_c2.masked = and i32 %v2_c2, -65281
  %v13_c4 = or i32 %v4_c2, %v2_c2.masked
  %v14_c4 = or i32 %v13_c4, %v12_c4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ce = load i32, i32* %edi.global-to-local, align 4
  %v1_ce = add i32 %v0_ce, -76
  %v2_ce = inttoptr i32 %v1_ce to i32*
  %v3_ce = load i32, i32* %v2_ce, align 4
  %v10_ce = icmp eq i32 %v3_ce, 0
  %v1_d2 = icmp eq i1 %v10_ce, false
  %v1_d7.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_d2, label %dec_label_pc_d7, label %dec_label_pc_d4

dec_label_pc_d4:                                  ; preds = %dec_label_pc_a7
  %v3_d4 = add i32 %v0_ce, -32
  %v4_d4 = inttoptr i32 %v3_d4 to double*
  %v5_d4 = load double, double* %v4_d4, align 4
  %v6_d4 = fpext double %v5_d4 to x86_fp80
  %v7_d4 = fdiv x86_fp80 %v1_d7.pre, %v6_d4
  store x86_fp80 %v7_d4, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_d7

dec_label_pc_d7:                                  ; preds = %dec_label_pc_a7, %dec_label_pc_d4
  %v1_d7 = phi x86_fp80 [ %v7_d4, %dec_label_pc_d4 ], [ %v1_d7.pre, %dec_label_pc_a7 ]
  %v2_d7 = load i32, i32* %esi.global-to-local, align 4
  %v3_d7 = add i32 %v2_d7, -32
  %v4_d7 = fptrunc x86_fp80 %v1_d7 to double
  %v5_d7 = inttoptr i32 %v3_d7 to double*
  store double %v4_d7, double* %v5_d7, align 4
  %v6_d7 = add i3 %storemerge.in, 2
  store i3 %v6_d7, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_c4
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
