source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %ebx.global-to-local = alloca i32, align 4
  %ecx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %edi.global-to-local, align 4
  %v0_9 = load i32, i32* %eax.global-to-local, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %esi.global-to-local, align 4
  %v1_e = add i32 %arg1, 128
  store i32 %v1_e, i32* %edi.global-to-local, align 4
  %v1_14 = add i32 %arg1, 208
  %v2_14 = inttoptr i32 %v1_14 to i32*
  %v3_14 = load i32, i32* %v2_14, align 4
  %v10_14 = icmp eq i32 %v3_14, 0
  %v11_14 = icmp slt i32 %v3_14, 0
  %v3_18 = icmp eq i1 %v11_14, false
  %v4_18 = icmp eq i1 %v10_14, false
  %v5_18 = icmp eq i1 %v3_18, %v4_18
  br i1 %v5_18, label %dec_label_pc_0.dec_label_pc_23_crit_edge, label %dec_label_pc_1a

dec_label_pc_0.dec_label_pc_23_crit_edge:         ; preds = %dec_label_pc_0
  %v0_23.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %.pre = add i32 %arg1, 200
  %.pre55 = inttoptr i32 %.pre to double*
  %v4_23.pre = load double, double* %.pre55, align 4
  %.pre307 = fpext double %v4_23.pre to x86_fp80
  br label %dec_label_pc_23

dec_label_pc_1a:                                  ; preds = %dec_label_pc_0
  %v4_1a = add i32 %v3_14, 1
  store i32 %v4_1a, i32* %v2_14, align 4
  %v0_1d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_1d = load i32, i32* %esi.global-to-local, align 4
  %v2_1d = add i32 %v1_1d, -16
  %v3_1d = inttoptr i32 %v2_1d to double*
  %v4_1d = load double, double* %v3_1d, align 4
  %v5_1d = fpext double %v4_1d to x86_fp80
  store x86_fp80 %v5_1d, x86_fp80* %st7.global-to-local, align 4
  %v2_20 = load i32, i32* %edi.global-to-local, align 4
  %v3_20 = add i32 %v2_20, 72
  %v5_20 = inttoptr i32 %v3_20 to double*
  store double %v4_1d, double* %v5_20, align 4
  br label %dec_label_pc_23

dec_label_pc_23:                                  ; preds = %dec_label_pc_0.dec_label_pc_23_crit_edge, %dec_label_pc_1a
  %v5_23.pre-phi = phi x86_fp80 [ %.pre307, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_1d, %dec_label_pc_1a ]
  %v3_23.pre-phi = phi double* [ %.pre55, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_20, %dec_label_pc_1a ]
  %v1_36 = phi i32 [ %v3_b, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v1_1d, %dec_label_pc_1a ]
  %v0_23 = phi i3 [ %v0_23.pre, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v0_1d, %dec_label_pc_1a ]
  store x86_fp80 %v5_23.pre-phi, x86_fp80* %st7.global-to-local, align 4
  %v2_2a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v5_23.pre-phi)
  %v4_2c = fadd x86_fp80 %v2_2a, 0xKBFFF8000000000000000
  %v3_2e = add i32 %v1_36, -40
  %v4_2e = inttoptr i32 %v3_2e to double*
  %v5_2e = load double, double* %v4_2e, align 4
  %v6_2e = fpext double %v5_2e to x86_fp80
  %v7_2e = fmul x86_fp80 %v4_2c, %v6_2e
  %v4_31 = fadd x86_fp80 %v7_2e, %v5_23.pre-phi
  store x86_fp80 %v4_31, x86_fp80* %st7.global-to-local, align 4
  %v4_33 = fptrunc x86_fp80 %v4_31 to double
  store double %v4_33, double* %v3_23.pre-phi, align 4
  %v2_36 = add i32 %v1_36, -32
  %v3_36 = inttoptr i32 %v2_36 to double*
  %v4_36 = load double, double* %v3_36, align 4
  %v5_36 = fpext double %v4_36 to x86_fp80
  %v4_3d = fadd x86_fp80 %v5_36, %v5_36
  store x86_fp80 %v4_3d, x86_fp80* %st7.global-to-local, align 4
  %v5_41 = xor i3 %v0_23, -4
  store i3 %v5_41, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_45 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_45 = call i16 @__asm_fnstsw(i32 %v0_45)
  %v2_45 = sext i16 %v1_45 to i32
  %v3_45 = load i32, i32* %eax.global-to-local, align 8
  %v4_45 = and i32 %v3_45, -65536
  %tmp308 = udiv i32 %v2_45, 2
  %v12_47 = and i32 %tmp308, 32512
  %v2_45.masked = and i32 %v2_45, -65281
  %v13_47 = or i32 %v4_45, %v2_45.masked
  %v14_47 = or i32 %v13_47, %v12_47
  store i32 %v14_47, i32* %eax.global-to-local, align 8
  %v15_47298 = and i32 %v2_45, 256
  %v16_47 = icmp eq i32 %v15_47298, 0
  %v2_51 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_47, label %dec_label_pc_4b, label %dec_label_pc_51

dec_label_pc_4b:                                  ; preds = %dec_label_pc_23
  %v2_4b = fsub x86_fp80 0xK80000000000000000000, %v2_51
  %v4_4d = fsub x86_fp80 %v2_4b, %v2_51
  store x86_fp80 %v4_4d, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_5d

dec_label_pc_51:                                  ; preds = %dec_label_pc_23
  %v0_53 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_53 = call i16 @__asm_fnstsw(i32 %v0_53)
  %v2_53 = sext i16 %v1_53 to i32
  %v3_53 = load i32, i32* %eax.global-to-local, align 8
  %v4_53 = and i32 %v3_53, -65536
  %tmp309 = udiv i32 %v2_53, 2
  %v12_55 = and i32 %tmp309, 32512
  %v2_53.masked = and i32 %v2_53, -65281
  %v13_55 = or i32 %v4_53, %v2_53.masked
  %v14_55 = or i32 %v13_55, %v12_55
  store i32 %v14_55, i32* %eax.global-to-local, align 8
  %v15_55299 = and i32 %v2_53, 256
  %v16_55 = icmp ne i32 %v15_55299, 0
  %v1_57 = icmp eq i1 %v16_55, false
  br i1 %v1_57, label %dec_label_pc_5d, label %dec_label_pc_59

dec_label_pc_59:                                  ; preds = %dec_label_pc_51
  %v1_59 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_5b = fsub x86_fp80 %v1_59, %v1_59
  store x86_fp80 %v4_5b, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_5d

dec_label_pc_5d:                                  ; preds = %dec_label_pc_59, %dec_label_pc_51, %dec_label_pc_4b
  %v0_5d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_5d = add i3 %v0_5d, -1
  store i3 %v5_5d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_61 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_61 = call i16 @__asm_fnstsw(i32 %v0_61)
  %v2_61 = sext i16 %v1_61 to i32
  %v3_61 = load i32, i32* %eax.global-to-local, align 8
  %v4_61 = and i32 %v3_61, -65536
  %tmp310 = udiv i32 %v2_61, 2
  %v12_63 = and i32 %tmp310, 32512
  %v2_61.masked = and i32 %v2_61, -65281
  %v13_63 = or i32 %v4_61, %v2_61.masked
  %v14_63 = or i32 %v13_63, %v12_63
  store i32 %v14_63, i32* %eax.global-to-local, align 8
  %v15_63300 = and i32 %v2_61, 256
  %v16_63 = icmp eq i32 %v15_63300, 0
  %v2_6d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_63, label %dec_label_pc_67, label %dec_label_pc_6d

dec_label_pc_67:                                  ; preds = %dec_label_pc_5d
  %v2_67 = fsub x86_fp80 0xK80000000000000000000, %v2_6d
  %v4_69 = fsub x86_fp80 %v2_67, %v2_6d
  store x86_fp80 %v4_69, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_79

dec_label_pc_6d:                                  ; preds = %dec_label_pc_5d
  %v0_6f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_6f = call i16 @__asm_fnstsw(i32 %v0_6f)
  %v2_6f = sext i16 %v1_6f to i32
  %v3_6f = load i32, i32* %eax.global-to-local, align 8
  %v4_6f = and i32 %v3_6f, -65536
  %tmp311 = udiv i32 %v2_6f, 2
  %v12_71 = and i32 %tmp311, 32512
  %v2_6f.masked = and i32 %v2_6f, -65281
  %v13_71 = or i32 %v4_6f, %v2_6f.masked
  %v14_71 = or i32 %v13_71, %v12_71
  store i32 %v14_71, i32* %eax.global-to-local, align 8
  %v15_71301 = and i32 %v2_6f, 256
  %v16_71 = icmp ne i32 %v15_71301, 0
  %v1_73 = icmp eq i1 %v16_71, false
  br i1 %v1_73, label %dec_label_pc_79, label %dec_label_pc_75

dec_label_pc_75:                                  ; preds = %dec_label_pc_6d
  %v1_75 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_77 = fsub x86_fp80 %v1_75, %v1_75
  store x86_fp80 %v4_77, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_79

dec_label_pc_79:                                  ; preds = %dec_label_pc_75, %dec_label_pc_6d, %dec_label_pc_67
  %v0_79 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_79 = add i3 %v0_79, -1
  store i3 %v5_79, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_7d = load i32, i32* %fpsw.global-to-local, align 4
  %v1_7d = call i16 @__asm_fnstsw(i32 %v0_7d)
  %v2_7d = sext i16 %v1_7d to i32
  %v3_7d = load i32, i32* %eax.global-to-local, align 8
  %v4_7d = and i32 %v3_7d, -65536
  %tmp312 = udiv i32 %v2_7d, 2
  %v12_7f = and i32 %tmp312, 32512
  %v2_7d.masked = and i32 %v2_7d, -65281
  %v13_7f = or i32 %v4_7d, %v2_7d.masked
  %v14_7f = or i32 %v13_7f, %v12_7f
  store i32 %v14_7f, i32* %eax.global-to-local, align 8
  %v15_7f302 = and i32 %v2_7d, 256
  %v16_7f = icmp eq i32 %v15_7f302, 0
  %v2_89 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_7f, label %dec_label_pc_83, label %dec_label_pc_89

dec_label_pc_83:                                  ; preds = %dec_label_pc_79
  %v2_83 = fsub x86_fp80 0xK80000000000000000000, %v2_89
  %v4_85 = fsub x86_fp80 %v2_83, %v2_89
  store x86_fp80 %v4_85, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_95

dec_label_pc_89:                                  ; preds = %dec_label_pc_79
  %v0_8b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_8b = call i16 @__asm_fnstsw(i32 %v0_8b)
  %v2_8b = sext i16 %v1_8b to i32
  %v3_8b = load i32, i32* %eax.global-to-local, align 8
  %v4_8b = and i32 %v3_8b, -65536
  %tmp313 = udiv i32 %v2_8b, 2
  %v12_8d = and i32 %tmp313, 32512
  %v2_8b.masked = and i32 %v2_8b, -65281
  %v13_8d = or i32 %v4_8b, %v2_8b.masked
  %v14_8d = or i32 %v13_8d, %v12_8d
  store i32 %v14_8d, i32* %eax.global-to-local, align 8
  %v15_8d303 = and i32 %v2_8b, 256
  %v16_8d = icmp ne i32 %v15_8d303, 0
  %v1_8f = icmp eq i1 %v16_8d, false
  %v2_95.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_8f, label %dec_label_pc_95, label %dec_label_pc_91

dec_label_pc_91:                                  ; preds = %dec_label_pc_89
  %v4_93 = fsub x86_fp80 %v2_95.pre, %v2_95.pre
  store x86_fp80 %v4_93, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_95

dec_label_pc_95:                                  ; preds = %dec_label_pc_89, %dec_label_pc_91, %dec_label_pc_83
  %v2_95 = phi x86_fp80 [ %v4_93, %dec_label_pc_91 ], [ %v4_85, %dec_label_pc_83 ], [ %v2_95.pre, %dec_label_pc_89 ]
  %v0_97 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v2_95, x86_fp80* %st7.global-to-local, align 4
  %v4_9f = add i3 %v0_97, 3
  store i3 %v4_9f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_a1 = load i32, i32* %esi.global-to-local, align 4
  %v1_a1 = add i32 %v0_a1, -76
  %v2_a1 = inttoptr i32 %v1_a1 to i32*
  %v3_a1 = load i32, i32* %v2_a1, align 4
  %v10_a1 = icmp eq i32 %v3_a1, 0
  %v1_a5 = icmp eq i1 %v10_a1, false
  br i1 %v1_a5, label %dec_label_pc_c1, label %dec_label_pc_a7

dec_label_pc_a7:                                  ; preds = %dec_label_pc_95
  %v2_a7 = add i32 %v0_a1, -56
  %v3_a7 = inttoptr i32 %v2_a7 to double*
  %v4_a7 = load double, double* %v3_a7, align 4
  %v5_a7 = fpext double %v4_a7 to x86_fp80
  %v6_a7 = add i3 %v0_97, 2
  %v4_aa = fadd x86_fp80 %v5_a7, %v5_a7
  store x86_fp80 %v4_aa, x86_fp80* %st7.global-to-local, align 4
  %v2_af = add i32 %v0_a1, -64
  %v3_af = inttoptr i32 %v2_af to double*
  %v4_af = load double, double* %v3_af, align 4
  %v5_af = fpext double %v4_af to x86_fp80
  %v4_b2 = fadd x86_fp80 %v5_af, %v5_af
  store x86_fp80 %v4_b2, x86_fp80* %st7.global-to-local, align 4
  %v2_b7 = add i32 %v0_a1, -72
  %v3_b7 = inttoptr i32 %v2_b7 to double*
  %v4_b7 = load double, double* %v3_b7, align 4
  %v5_b7 = fpext double %v4_b7 to x86_fp80
  store i3 %v6_a7, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_b7, x86_fp80* %st7.global-to-local, align 4
  %v4_ba = fadd x86_fp80 %v5_b7, %v5_b7
  br label %dec_label_pc_d9

dec_label_pc_c1:                                  ; preds = %dec_label_pc_95
  %v1_c1 = load i32, i32* %edi.global-to-local, align 4
  %v2_c1 = add i32 %v1_c1, -104
  %v3_c1 = inttoptr i32 %v2_c1 to double*
  %v4_c1 = load double, double* %v3_c1, align 4
  %v5_c1 = fpext double %v4_c1 to x86_fp80
  %v6_c1 = add i3 %v0_97, 2
  %v4_c4 = fadd x86_fp80 %v5_c1, %v5_c1
  store x86_fp80 %v4_c4, x86_fp80* %st7.global-to-local, align 4
  %v2_c9 = add i32 %v1_c1, -96
  %v3_c9 = inttoptr i32 %v2_c9 to double*
  %v4_c9 = load double, double* %v3_c9, align 4
  %v5_c9 = fpext double %v4_c9 to x86_fp80
  %v4_cc = fadd x86_fp80 %v5_c9, %v5_c9
  store x86_fp80 %v4_cc, x86_fp80* %st7.global-to-local, align 4
  %v2_d1 = add i32 %v1_c1, -88
  %v3_d1 = inttoptr i32 %v2_d1 to double*
  %v4_d1 = load double, double* %v3_d1, align 4
  %v5_d1 = fpext double %v4_d1 to x86_fp80
  store i3 %v6_c1, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_d1, x86_fp80* %st7.global-to-local, align 4
  %v4_d4 = fadd x86_fp80 %v5_d1, %v5_d1
  br label %dec_label_pc_d9

dec_label_pc_d9:                                  ; preds = %dec_label_pc_c1, %dec_label_pc_a7
  %storemerge14.in = phi i3 [ %v6_c1, %dec_label_pc_c1 ], [ %v6_a7, %dec_label_pc_a7 ]
  %storemerge39.in.in = phi x86_fp80 [ %v4_d4, %dec_label_pc_c1 ], [ %v4_ba, %dec_label_pc_a7 ]
  %v4_db = fmul x86_fp80 %storemerge39.in.in, %storemerge39.in.in
  %v4_e1 = fadd x86_fp80 %v4_db, %v4_db
  %v4_e5 = fmul x86_fp80 %v4_e1, %v4_e1
  %v4_e7 = fadd x86_fp80 %v4_e5, %v4_e5
  store x86_fp80 %v4_e7, x86_fp80* %st7.global-to-local, align 4
  %v2_e9 = add i32 %v0_a1, -24
  %v3_e9 = inttoptr i32 %v2_e9 to double*
  %v4_e9 = load double, double* %v3_e9, align 4
  %v5_e9 = fpext double %v4_e9 to x86_fp80
  %v3_ec = fmul x86_fp80 %v5_e9, %v5_e9
  store x86_fp80 %v3_ec, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge14.in, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_f1 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_f1 = call i16 @__asm_fnstsw(i32 %v0_f1)
  %v2_f1 = sext i16 %v1_f1 to i32
  %v3_f1 = load i32, i32* %eax.global-to-local, align 8
  %v4_f1 = and i32 %v3_f1, -65536
  %tmp314 = udiv i32 %v2_f1, 2
  %v12_f3 = and i32 %tmp314, 32512
  %v2_f1.masked = and i32 %v2_f1, -65281
  %v13_f3 = or i32 %v4_f1, %v2_f1.masked
  %v14_f3 = or i32 %v13_f3, %v12_f3
  store i32 %v14_f3, i32* %eax.global-to-local, align 8
  %v15_f3304 = and i32 %v2_f1, 256
  %v16_f3 = icmp eq i32 %v15_f3304, 0
  %v0_10a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v16_f3, label %dec_label_pc_f7, label %dec_label_pc_10a

dec_label_pc_f7:                                  ; preds = %dec_label_pc_d9
  %v1_f9 = load i32, i32* %edi.global-to-local, align 4
  %v2_f9 = add i32 %v1_f9, 72
  %v3_f9 = inttoptr i32 %v2_f9 to double*
  %v4_f9 = load double, double* %v3_f9, align 4
  %v5_f9 = fpext double %v4_f9 to x86_fp80
  store x86_fp80 %v5_f9, x86_fp80* %st7.global-to-local, align 4
  %v2_fc = load i32, i32* %esi.global-to-local, align 4
  %v3_fc = add i32 %v2_fc, -48
  %v4_fc = inttoptr i32 %v3_fc to double*
  %v5_fc = load double, double* %v4_fc, align 4
  %v6_fc = fpext double %v5_fc to x86_fp80
  %v7_fc = fmul x86_fp80 %v5_f9, %v6_fc
  store x86_fp80 %v7_fc, x86_fp80* %st7.global-to-local, align 4
  %v2_ff = add i32 %v2_fc, -24
  %v3_ff = inttoptr i32 %v2_ff to double*
  %v4_ff = load double, double* %v3_ff, align 4
  %v5_ff = fpext double %v4_ff to x86_fp80
  %v3_102 = fmul x86_fp80 %v5_ff, %v5_ff
  %v4_104 = fdiv x86_fp80 %v7_fc, %v3_102
  store x86_fp80 %v4_104, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_124

dec_label_pc_10a:                                 ; preds = %dec_label_pc_d9
  %v1_10a = load i32, i32* %esi.global-to-local, align 4
  %v2_10a = add i32 %v1_10a, -48
  %v3_10a = inttoptr i32 %v2_10a to double*
  %v4_10a = load double, double* %v3_10a, align 4
  %v5_10a = fpext double %v4_10a to x86_fp80
  %v6_10a = add i3 %v0_10a, -1
  store i3 %v6_10a, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_10a, x86_fp80* %st7.global-to-local, align 4
  %v0_10f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_10f = call i16 @__asm_fnstsw(i32 %v0_10f)
  %v2_10f = sext i16 %v1_10f to i32
  %v3_10f = load i32, i32* %eax.global-to-local, align 8
  %v4_10f = and i32 %v3_10f, -65536
  %tmp315 = udiv i32 %v2_10f, 2
  %v12_111 = and i32 %tmp315, 32512
  %v2_10f.masked = and i32 %v2_10f, -65281
  %v13_111 = or i32 %v4_10f, %v2_10f.masked
  %v14_111 = or i32 %v13_111, %v12_111
  store i32 %v14_111, i32* %eax.global-to-local, align 8
  %v15_111305 = and i32 %v2_10f, 256
  %v16_111 = icmp eq i32 %v15_111305, 0
  %v0_11f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_115 = add i3 %v0_11f, 1
  br i1 %v16_111, label %dec_label_pc_115, label %dec_label_pc_11f

dec_label_pc_115:                                 ; preds = %dec_label_pc_10a
  %v2_11f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_115, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_117 = load i32, i32* %esi.global-to-local, align 4
  %v3_117 = add i32 %v2_117, -48
  %v4_117 = inttoptr i32 %v3_117 to double*
  %v5_117 = load double, double* %v4_117, align 4
  %v6_117 = fpext double %v5_117 to x86_fp80
  %v7_117 = fdiv x86_fp80 %v2_11f, %v6_117
  store x86_fp80 %v7_117, x86_fp80* %st7.global-to-local, align 4
  %v2_11a = load i32, i32* %edi.global-to-local, align 4
  %v3_11a = add i32 %v2_11a, 72
  %v4_11a = inttoptr i32 %v3_11a to double*
  %v5_11a = load double, double* %v4_11a, align 4
  %v6_11a = fpext double %v5_11a to x86_fp80
  %v7_11a = fdiv x86_fp80 %v6_11a, %v7_117
  store x86_fp80 %v7_11a, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_124

dec_label_pc_11f:                                 ; preds = %dec_label_pc_10a
  %v1_121 = load i32, i32* %edi.global-to-local, align 4
  %v2_121 = add i32 %v1_121, 72
  %v3_121 = inttoptr i32 %v2_121 to double*
  %v4_121 = load double, double* %v3_121, align 4
  %v5_121 = fpext double %v4_121 to x86_fp80
  store i3 %v4_115, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_121, x86_fp80* %st7.global-to-local, align 4
  %v0_132.pre = load i32, i32* %esi.global-to-local, align 4
  br label %dec_label_pc_124

dec_label_pc_124:                                 ; preds = %dec_label_pc_11f, %dec_label_pc_115, %dec_label_pc_f7
  %v2_162 = phi i32 [ %v1_121, %dec_label_pc_11f ], [ %v2_11a, %dec_label_pc_115 ], [ %v1_f9, %dec_label_pc_f7 ]
  %v2_165 = phi i32 [ %v0_132.pre, %dec_label_pc_11f ], [ %v2_117, %dec_label_pc_115 ], [ %v2_fc, %dec_label_pc_f7 ]
  %v3_127 = phi x86_fp80 [ %v5_121, %dec_label_pc_11f ], [ %v7_11a, %dec_label_pc_115 ], [ %v4_104, %dec_label_pc_f7 ]
  %v0_124 = phi i3 [ %v4_115, %dec_label_pc_11f ], [ %v4_115, %dec_label_pc_115 ], [ %v0_10a, %dec_label_pc_f7 ]
  %v1_124 = load i32, i32* %ecx.global-to-local, align 8
  %v2_124 = add i32 %v1_124, 8
  %v3_124 = inttoptr i32 %v2_124 to double*
  %v4_124 = load double, double* %v3_124, align 4
  %v5_124 = fpext double %v4_124 to x86_fp80
  %v4_127 = fmul x86_fp80 %v3_127, %v5_124
  %v4_129 = fptrunc x86_fp80 %v4_127 to double
  store double %v4_129, double* %v3_124, align 4
  %v2_12c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_12c = fmul x86_fp80 %v2_12c, %v2_12c
  %v4_12e = fmul x86_fp80 %v4_12c, %v4_12c
  %v4_130 = fmul x86_fp80 %v4_12e, %v4_12e
  store x86_fp80 %v4_130, x86_fp80* %st7.global-to-local, align 4
  %v7_130 = add i3 %v0_124, 1
  store i3 %v7_130, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_132 = add i32 %v2_165, -76
  %v2_132 = inttoptr i32 %v1_132 to i32*
  %v3_132 = load i32, i32* %v2_132, align 4
  %v10_132 = icmp eq i32 %v3_132, 0
  %v1_136 = icmp eq i1 %v10_132, false
  %v3_152 = add i32 %v2_162, -88
  %v4_152 = inttoptr i32 %v3_152 to double*
  %v5_152 = load double, double* %v4_152, align 4
  %v6_152 = fpext double %v5_152 to x86_fp80
  br i1 %v1_136, label %dec_label_pc_152, label %dec_label_pc_138

dec_label_pc_138:                                 ; preds = %dec_label_pc_124
  %v7_138 = fadd x86_fp80 %v4_130, %v6_152
  store x86_fp80 %v7_138, x86_fp80* %st7.global-to-local, align 4
  %v3_13b = add i32 %v2_165, -72
  %v4_13b = inttoptr i32 %v3_13b to double*
  %v5_13b = load double, double* %v4_13b, align 4
  %v6_13b = fpext double %v5_13b to x86_fp80
  %v7_13b = fsub x86_fp80 %v7_138, %v6_13b
  store x86_fp80 %v7_13b, x86_fp80* %st7.global-to-local, align 4
  %v2_13e = load i32, i32* %ecx.global-to-local, align 8
  %v3_13e = fptrunc x86_fp80 %v7_13b to double
  %v4_13e = inttoptr i32 %v2_13e to double*
  store double %v3_13e, double* %v4_13e, align 4
  %v1_140 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_140 = add i32 %v2_162, -96
  %v4_140 = inttoptr i32 %v3_140 to double*
  %v5_140 = load double, double* %v4_140, align 4
  %v6_140 = fpext double %v5_140 to x86_fp80
  %v7_140 = fadd x86_fp80 %v1_140, %v6_140
  store x86_fp80 %v7_140, x86_fp80* %st7.global-to-local, align 4
  %v3_143 = add i32 %v2_165, -64
  %v4_143 = inttoptr i32 %v3_143 to double*
  %v5_143 = load double, double* %v4_143, align 4
  %v6_143 = fpext double %v5_143 to x86_fp80
  %v7_143 = fsub x86_fp80 %v7_140, %v6_143
  store x86_fp80 %v7_143, x86_fp80* %st7.global-to-local, align 4
  %v2_146 = load i32, i32* %edx.global-to-local, align 8
  %v3_146 = fptrunc x86_fp80 %v7_143 to double
  %v4_146 = inttoptr i32 %v2_146 to double*
  store double %v3_146, double* %v4_146, align 4
  %v5_146 = add i3 %v0_124, 3
  store i3 %v5_146, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_148 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_148 = add i32 %v2_162, -104
  %v4_148 = inttoptr i32 %v3_148 to double*
  %v5_148 = load double, double* %v4_148, align 4
  %v6_148 = fpext double %v5_148 to x86_fp80
  %v7_148 = fadd x86_fp80 %v1_148, %v6_148
  store x86_fp80 %v7_148, x86_fp80* %st7.global-to-local, align 4
  %v3_14b = add i32 %v2_165, -56
  %v4_14b = inttoptr i32 %v3_14b to double*
  %v5_14b = load double, double* %v4_14b, align 4
  %v6_14b = fpext double %v5_14b to x86_fp80
  %v7_14b = fsub x86_fp80 %v7_148, %v6_14b
  store x86_fp80 %v7_14b, x86_fp80* %st7.global-to-local, align 4
  %v2_14e = load i32, i32* %ebx.global-to-local, align 4
  %v3_14e = fptrunc x86_fp80 %v7_14b to double
  %v4_14e = inttoptr i32 %v2_14e to double*
  store double %v3_14e, double* %v4_14e, align 4
  br label %dec_label_pc_16a

dec_label_pc_152:                                 ; preds = %dec_label_pc_124
  %v7_152 = fsub x86_fp80 %v4_130, %v6_152
  store x86_fp80 %v7_152, x86_fp80* %st7.global-to-local, align 4
  %v3_155 = add i32 %v2_165, -72
  %v4_155 = inttoptr i32 %v3_155 to double*
  %v5_155 = load double, double* %v4_155, align 4
  %v6_155 = fpext double %v5_155 to x86_fp80
  %v7_155 = fadd x86_fp80 %v7_152, %v6_155
  store x86_fp80 %v7_155, x86_fp80* %st7.global-to-local, align 4
  %v2_158 = load i32, i32* %ecx.global-to-local, align 8
  %v3_158 = fptrunc x86_fp80 %v7_155 to double
  %v4_158 = inttoptr i32 %v2_158 to double*
  store double %v3_158, double* %v4_158, align 4
  %v1_15a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_15a = add i32 %v2_162, -96
  %v4_15a = inttoptr i32 %v3_15a to double*
  %v5_15a = load double, double* %v4_15a, align 4
  %v6_15a = fpext double %v5_15a to x86_fp80
  %v7_15a = fsub x86_fp80 %v1_15a, %v6_15a
  store x86_fp80 %v7_15a, x86_fp80* %st7.global-to-local, align 4
  %v3_15d = add i32 %v2_165, -64
  %v4_15d = inttoptr i32 %v3_15d to double*
  %v5_15d = load double, double* %v4_15d, align 4
  %v6_15d = fpext double %v5_15d to x86_fp80
  %v7_15d = fadd x86_fp80 %v7_15a, %v6_15d
  store x86_fp80 %v7_15d, x86_fp80* %st7.global-to-local, align 4
  %v2_160 = load i32, i32* %edx.global-to-local, align 8
  %v3_160 = fptrunc x86_fp80 %v7_15d to double
  %v4_160 = inttoptr i32 %v2_160 to double*
  store double %v3_160, double* %v4_160, align 4
  %v5_160 = add i3 %v0_124, 3
  store i3 %v5_160, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_162 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_162 = add i32 %v2_162, -104
  %v4_162 = inttoptr i32 %v3_162 to double*
  %v5_162 = load double, double* %v4_162, align 4
  %v6_162 = fpext double %v5_162 to x86_fp80
  %v7_162 = fsub x86_fp80 %v1_162, %v6_162
  store x86_fp80 %v7_162, x86_fp80* %st7.global-to-local, align 4
  %v3_165 = add i32 %v2_165, -56
  %v4_165 = inttoptr i32 %v3_165 to double*
  %v5_165 = load double, double* %v4_165, align 4
  %v6_165 = fpext double %v5_165 to x86_fp80
  %v7_165 = fadd x86_fp80 %v7_162, %v6_165
  store x86_fp80 %v7_165, x86_fp80* %st7.global-to-local, align 4
  %v2_168 = load i32, i32* %ebx.global-to-local, align 4
  %v3_168 = fptrunc x86_fp80 %v7_165 to double
  %v4_168 = inttoptr i32 %v2_168 to double*
  store double %v3_168, double* %v4_168, align 4
  br label %dec_label_pc_16a

dec_label_pc_16a:                                 ; preds = %dec_label_pc_152, %dec_label_pc_138
  %v0_16a = phi i32 [ %v2_168, %dec_label_pc_152 ], [ %v2_14e, %dec_label_pc_138 ]
  %storemerge.in = phi i3 [ %v5_160, %dec_label_pc_152 ], [ %v5_146, %dec_label_pc_138 ]
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_16a, i32* %eax.global-to-local, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v0_16a
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
