source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %esp.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st2.global-to-local = alloca x86_fp80, align 4
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  store i32 0, i32* %esp.global-to-local, align 4
  %tmp262 = call double @__decompiler_undefined_function_3()
  %stack_var_-28 = alloca i128, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load i128, i128* %stack_var_-28, align 8
  call void @__asm_movupd.1(i128 %v2_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v0_4b = load i32, i32* @edi, align 8
  %v1_4b = add i32 %v0_4b, -84
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v1_4e = mul i32 %v3_4b, 16
  %v2_51 = and i32 %v1_4e, 16
  store i32 %v2_51, i32* %edx.global-to-local, align 4
  %v2_54 = add i32 %v0_4b, -80
  %v3_54 = inttoptr i32 %v2_54 to i32*
  %v4_54 = load i32, i32* %v3_54, align 4
  %v5_54 = sitofp i32 %v4_54 to x86_fp80
  store x86_fp80 %v5_54, x86_fp80* %st7.global-to-local, align 4
  %v1_5c = load i32, i32* %esp.global-to-local, align 4
  %v4_5c = add nuw nsw i32 %v2_51, 16
  %v5_5c = add i32 %v4_5c, %v1_5c
  %v6_5c = inttoptr i32 %v5_5c to double*
  %v7_5c = load double, double* %v6_5c, align 4
  %tmp269 = call double @llvm.fabs.f64(double %v7_5c)
  %v2_60 = fpext double %tmp269 to x86_fp80
  store x86_fp80 %v2_60, x86_fp80* %st7.global-to-local, align 4
  %v2_62 = add i32 %v0_4b, -72
  %v3_62 = inttoptr i32 %v2_62 to double*
  %v4_62 = load double, double* %v3_62, align 4
  %tmp270 = call double @llvm.fabs.f64(double %v4_62)
  %v2_65 = fpext double %tmp270 to x86_fp80
  store x86_fp80 %v2_65, x86_fp80* %st6.global-to-local, align 4
  %v3_67 = add i32 %v0_4b, 16
  %v4_67 = inttoptr i32 %v3_67 to double*
  %v5_67 = load double, double* %v4_67, align 4
  %v6_67 = fpext double %v5_67 to x86_fp80
  %v7_67 = fadd x86_fp80 %v2_65, %v6_67
  store x86_fp80 %v7_67, x86_fp80* %st6.global-to-local, align 4
  %v3_6a = add i32 %v0_4b, 8
  %v4_6a = inttoptr i32 %v3_6a to double*
  %v5_6a = load double, double* %v4_6a, align 4
  %v6_6a = fpext double %v5_6a to x86_fp80
  %v7_6a = fmul x86_fp80 %v7_67, %v6_6a
  store x86_fp80 %v7_6a, x86_fp80* %st6.global-to-local, align 4
  %v2_6e = load i32, i32* %esi.global-to-local, align 4
  %v3_6e = add i32 %v2_6e, -136
  %v4_6e = inttoptr i32 %v3_6e to double*
  %v5_6e = load double, double* %v4_6e, align 4
  %v6_6e = fpext double %v5_6e to x86_fp80
  %v7_6e = fadd x86_fp80 %v7_6a, %v6_6e
  store x86_fp80 %v7_6e, x86_fp80* %st6.global-to-local, align 4
  %v0_76 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_76 = call i16 @__asm_fnstsw(i32 %v0_76)
  %v2_76 = sext i16 %v1_76 to i32
  %v3_76 = load i32, i32* %eax.global-to-local, align 4
  %v4_76 = and i32 %v3_76, -65536
  %tmp280 = udiv i32 %v2_76, 2
  %v12_78 = and i32 %tmp280, 32512
  %v2_76.masked = and i32 %v2_76, -65281
  %v13_78 = or i32 %v4_76, %v2_76.masked
  %v14_78 = or i32 %v13_78, %v12_78
  store i32 %v14_78, i32* %eax.global-to-local, align 4
  %v15_78278 = and i32 %v2_76, 256
  %v16_78 = icmp ne i32 %v15_78278, 0
  %v1_7a = icmp eq i1 %v16_78, false
  %v0_87 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_7a, label %dec_label_pc_87, label %dec_label_pc_7c

dec_label_pc_7c:                                  ; preds = %dec_label_pc_40
  %v1_7c = load i32, i32* %esp.global-to-local, align 4
  %v2_7c = load i32, i32* %edx.global-to-local, align 4
  %v4_7c = add i32 %v1_7c, 16
  %v5_7c = add i32 %v4_7c, %v2_7c
  %v6_7c = inttoptr i32 %v5_7c to double*
  %v7_7c = load double, double* %v6_7c, align 4
  %v8_7c = fpext double %v7_7c to x86_fp80
  %v9_7c = add i3 %v0_87, -1
  store i3 %v9_7c, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v8_7c, x86_fp80* %st7.global-to-local, align 4
  %v2_80 = fsub x86_fp80 0xK80000000000000000000, %v8_7c
  %v0_12b.pre = load i32, i32* @edi, align 8
  br label %dec_label_pc_12b

dec_label_pc_87:                                  ; preds = %dec_label_pc_40
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st7.global-to-local, align 4
  %v1_89 = load i32, i32* %esp.global-to-local, align 4
  %v2_89 = load i32, i32* %edx.global-to-local, align 4
  %v4_89 = add i32 %v2_89, %v1_89
  %v5_89 = inttoptr i32 %v4_89 to double*
  %v6_89 = load double, double* %v5_89, align 4
  %v7_89 = fpext double %v6_89 to x86_fp80
  store x86_fp80 %v7_89, x86_fp80* %st6.global-to-local, align 4
  %v5_8c = fpext double %tmp262 to x86_fp80
  %v6_8c = add i3 %v0_87, -3
  store i3 %v6_8c, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_8c, x86_fp80* %st5.global-to-local, align 4
  br label %dec_label_pc_90

dec_label_pc_90:                                  ; preds = %dec_label_pc_90.dec_label_pc_90_crit_edge, %dec_label_pc_87
  %v0_90 = phi i3 [ %v6_8c, %dec_label_pc_87 ], [ %v4_e7, %dec_label_pc_90.dec_label_pc_90_crit_edge ]
  %stack_var_-4.0 = phi i32 [ %v4_54, %dec_label_pc_87 ], [ %v4_e9, %dec_label_pc_90.dec_label_pc_90_crit_edge ]
  %v3_94 = add i3 %v0_90, -2
  store i3 %v3_94, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_9e = call i32 @__asm_fyl2x()
  store i32 %v0_9e, i32* %eax.global-to-local, align 4
  store x86_fp80 0xK3FFEB17217F7D1CF7800, x86_fp80* %st2.global-to-local, align 4
  %v2_a9 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_a9 = xor i3 %v0_90, -4
  store i3 %v3_a9, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ab = call i32 @__asm_fpatan()
  store i32 %v0_ab, i32* %eax.global-to-local, align 4
  %v2_ad = load i32, i32* @edi, align 8
  %v3_ad = add i32 %v2_ad, -100
  %v4_ad = inttoptr i32 %v3_ad to double*
  %v5_ad = load double, double* %v4_ad, align 4
  %v6_ad = fpext double %v5_ad to x86_fp80
  %v7_ad = fadd x86_fp80 %v2_a9, %v6_ad
  %v0_b0 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_b2 = load x86_fp80, x86_fp80* %st2.global-to-local, align 4
  %v3_b6 = add i32 %v2_ad, -108
  %v4_b6 = inttoptr i32 %v3_b6 to float*
  %v5_b6 = load float, float* %v4_b6, align 4
  %v6_b6 = fpext float %v5_b6 to x86_fp80
  %v7_b6 = fmul x86_fp80 %v1_b2, %v6_b6
  store x86_fp80 %v7_b6, x86_fp80* %st2.global-to-local, align 4
  %v3_bb = add i32 %v2_ad, -104
  %v4_bb = inttoptr i32 %v3_bb to float*
  %v5_bb = load float, float* %v4_bb, align 4
  %v6_bb = fpext float %v5_bb to x86_fp80
  %v7_bb = fmul x86_fp80 %v7_ad, %v6_bb
  %v4_c0 = fsub x86_fp80 %v7_b6, %v7_bb
  store x86_fp80 %v4_c0, x86_fp80* %st2.global-to-local, align 4
  %v5_c4 = load float, float* %v4_bb, align 4
  %v6_c4 = fpext float %v5_c4 to x86_fp80
  %v7_c4 = fmul x86_fp80 %v1_b2, %v6_c4
  %v5_c9 = load float, float* %v4_b6, align 4
  %v6_c9 = fpext float %v5_c9 to x86_fp80
  %v7_c9 = fmul x86_fp80 %v7_ad, %v6_c9
  %v4_cc = fadd x86_fp80 %v7_c4, %v7_c9
  %v3_d4 = fmul x86_fp80 %v4_cc, %v4_cc
  %v3_d8 = fmul x86_fp80 %v4_c0, %v4_c0
  %v4_da = fadd x86_fp80 %v3_d8, %v3_d4
  %v2_dc = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_da)
  %v3_de = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v3_de, x86_fp80* %st2.global-to-local, align 4
  store x86_fp80 %v2_dc, x86_fp80* %st5.global-to-local, align 4
  %v3_e0 = add i32 %v2_ad, -16
  %v4_e0 = inttoptr i32 %v3_e0 to double*
  %v5_e0 = load double, double* %v4_e0, align 4
  %v6_e0 = fpext double %v5_e0 to x86_fp80
  %v7_e0 = fmul x86_fp80 %v3_de, %v6_e0
  %v4_e5 = fadd x86_fp80 %v2_dc, %v7_e0
  store x86_fp80 %v4_e5, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_dc, x86_fp80* %st2.global-to-local, align 4
  %v4_e7 = add i3 %v0_b0, 2
  store i3 %v4_e7, i3* %fpu_stat_TOP.global-to-local, align 1
  %v8_ed = icmp sgt i32 %stack_var_-4.0, 1
  br i1 %v8_ed, label %dec_label_pc_90.dec_label_pc_90_crit_edge, label %dec_label_pc_ef

dec_label_pc_90.dec_label_pc_90_crit_edge:        ; preds = %dec_label_pc_90
  %v4_e9 = add i32 %stack_var_-4.0, -1
  br label %dec_label_pc_90

dec_label_pc_ef:                                  ; preds = %dec_label_pc_90
  %v4_ef = add i3 %v0_b0, 3
  store i3 %v4_ef, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 0xK3FFEB17217F7D1CF7800, x86_fp80* %st7.global-to-local, align 4
  %v0_fb = call i32 @__asm_fyl2x()
  store i32 %v0_fb, i32* %eax.global-to-local, align 4
  %v2_fd = add i3 %v0_b0, 2
  store x86_fp80 0xK3FFEB17217F7D1CF7800, x86_fp80* %st6.global-to-local, align 4
  %v1_ff = load i32, i32* @edi, align 8
  %v2_ff = add i32 %v1_ff, -116
  %v3_ff = inttoptr i32 %v2_ff to double*
  %v4_ff = load double, double* %v3_ff, align 4
  %v5_ff = fpext double %v4_ff to x86_fp80
  store x86_fp80 %v5_ff, x86_fp80* %st5.global-to-local, align 4
  store i3 %v2_fd, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_106 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_106 = call i16 @__asm_fnstsw(i32 %v0_106)
  %v2_106 = sext i16 %v1_106 to i32
  %v3_106 = load i32, i32* %eax.global-to-local, align 4
  %v4_106 = and i32 %v3_106, -65536
  %tmp281 = udiv i32 %v2_106, 2
  %v12_108 = and i32 %tmp281, 32512
  %v2_106.masked = and i32 %v2_106, -65281
  %v13_108 = or i32 %v4_106, %v2_106.masked
  %v14_108 = or i32 %v13_108, %v12_108
  store i32 %v14_108, i32* %eax.global-to-local, align 4
  %v15_108279 = and i32 %v2_106, 256
  %v16_108 = icmp eq i32 %v15_108279, 0
  %v1_10c = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  br i1 %v16_108, label %dec_label_pc_10c, label %dec_label_pc_114

dec_label_pc_10c:                                 ; preds = %dec_label_pc_ef
  %v3_10c = fmul x86_fp80 %v1_10c, %v1_10c
  store x86_fp80 %v3_10c, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_114

dec_label_pc_114:                                 ; preds = %dec_label_pc_ef, %dec_label_pc_10c
  %v1_114 = phi x86_fp80 [ %v3_10c, %dec_label_pc_10c ], [ %v1_10c, %dec_label_pc_ef ]
  %v2_114 = load i32, i32* @edi, align 8
  %v3_114 = add i32 %v2_114, -116
  %v4_114 = inttoptr i32 %v3_114 to double*
  %v5_114 = load double, double* %v4_114, align 4
  %v6_114 = fpext double %v5_114 to x86_fp80
  %v7_114 = fmul x86_fp80 %v1_114, %v6_114
  %v2_117 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_114)
  store x86_fp80 %v2_117, x86_fp80* %st6.global-to-local, align 4
  %v0_119 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_119 = load i32, i32* %esi.global-to-local, align 4
  %v3_119 = add i32 %v2_119, 128
  %tmp276 = fptrunc x86_fp80 %v7_114 to double
  %v4_119 = call double @llvm.fabs.f64(double %tmp276)
  %v5_119 = inttoptr i32 %v3_119 to double*
  store double %v4_119, double* %v5_119, align 4
  %v6_119 = add i3 %v0_119, 1
  store i3 %v6_119, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_11f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_11f = load i32, i32* @edi, align 8
  %v3_11f = add i32 %v2_11f, -80
  %v4_11f = inttoptr i32 %v3_11f to i32*
  %v5_11f = load i32, i32* %v4_11f, align 4
  %v6_11f = sitofp i32 %v5_11f to x86_fp80
  %v7_11f = fdiv x86_fp80 %v1_11f, %v6_11f
  store x86_fp80 %v7_11f, x86_fp80* %st7.global-to-local, align 4
  %v0_122 = load i32, i32* %edx.global-to-local, align 4
  %v1_122 = sub i32 0, %v0_122
  store i32 %v1_122, i32* %edx.global-to-local, align 4
  %v3_124 = add i32 %v2_11f, -72
  %v4_124 = inttoptr i32 %v3_124 to double*
  %v5_124 = load double, double* %v4_124, align 4
  %v6_124 = fpext double %v5_124 to x86_fp80
  %v7_124 = fmul x86_fp80 %v7_11f, %v6_124
  store x86_fp80 %v7_124, x86_fp80* %st7.global-to-local, align 4
  %v2_127 = load i32, i32* %esp.global-to-local, align 4
  %v5_127 = sub i32 16, %v0_122
  %v6_127 = add i32 %v5_127, %v2_127
  %v7_127 = inttoptr i32 %v6_127 to double*
  %v8_127 = load double, double* %v7_127, align 4
  %v9_127 = fpext double %v8_127 to x86_fp80
  %v10_127 = fsub x86_fp80 %v7_124, %v9_127
  br label %dec_label_pc_12b

dec_label_pc_12b:                                 ; preds = %dec_label_pc_114, %dec_label_pc_7c
  %v0_13a = phi i32 [ %v14_78, %dec_label_pc_7c ], [ %v14_108, %dec_label_pc_114 ]
  %v0_134 = phi i3 [ %v9_7c, %dec_label_pc_7c ], [ %v6_119, %dec_label_pc_114 ]
  %v2_131 = phi i32 [ %v0_12b.pre, %dec_label_pc_7c ], [ %v2_11f, %dec_label_pc_114 ]
  %v1_131 = phi x86_fp80 [ %v2_80, %dec_label_pc_7c ], [ %v10_127, %dec_label_pc_114 ]
  store x86_fp80 %v1_131, x86_fp80* %st7.global-to-local, align 4
  %v1_12b = add i32 %v2_131, -76
  %v2_12b = inttoptr i32 %v1_12b to i32*
  %v3_12b = load i32, i32* %v2_12b, align 4
  %v10_12b = icmp eq i32 %v3_12b, 0
  %v1_12f = icmp eq i1 %v10_12b, false
  br i1 %v1_12f, label %dec_label_pc_134, label %dec_label_pc_131

dec_label_pc_131:                                 ; preds = %dec_label_pc_12b
  %v3_131 = add i32 %v2_131, -32
  %v4_131 = inttoptr i32 %v3_131 to double*
  %v5_131 = load double, double* %v4_131, align 4
  %v6_131 = fpext double %v5_131 to x86_fp80
  %v7_131 = fdiv x86_fp80 %v1_131, %v6_131
  store x86_fp80 %v7_131, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_134

dec_label_pc_134:                                 ; preds = %dec_label_pc_131, %dec_label_pc_12b
  %v1_134 = phi x86_fp80 [ %v7_131, %dec_label_pc_131 ], [ %v1_131, %dec_label_pc_12b ]
  %v2_134 = load i32, i32* %esi.global-to-local, align 4
  %v3_134 = add i32 %v2_134, -32
  %v4_134 = fptrunc x86_fp80 %v1_134 to double
  %v5_134 = inttoptr i32 %v3_134 to double*
  store double %v4_134, double* %v5_134, align 4
  %v6_134 = add i3 %v0_134, 1
  store i3 %v6_134, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v0_13a
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare i32 @__asm_fyl2x() local_unnamed_addr

declare i32 @__asm_fpatan() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
