source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st4.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %edi.global-to-local, align 4
  %v0_e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_e = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_e = fpext double %v3_e to x86_fp80
  store x86_fp80 %v4_e, x86_fp80* %st7.global-to-local, align 4
  %v3_10 = add i32 %v3_b, -32
  %v4_10 = inttoptr i32 %v3_10 to double*
  %v5_10 = load double, double* %v4_10, align 4
  %v6_10 = fpext double %v5_10 to x86_fp80
  %v7_10 = fadd x86_fp80 %v4_e, %v6_10
  store x86_fp80 %v7_10, x86_fp80* %st7.global-to-local, align 4
  %v3_13 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_13 = fpext double %v3_13 to x86_fp80
  %v3_15 = add i32 %v3_b, -24
  %v4_15 = inttoptr i32 %v3_15 to double*
  %v5_15 = load double, double* %v4_15, align 4
  %v6_15 = fpext double %v5_15 to x86_fp80
  %v7_15 = fadd x86_fp80 %v4_13, %v6_15
  %v3_18 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_18 = fpext double %v3_18 to x86_fp80
  %v3_1a = add i32 %v3_b, -16
  %v4_1a = inttoptr i32 %v3_1a to double*
  %v5_1a = load double, double* %v4_1a, align 4
  %v6_1a = fpext double %v5_1a to x86_fp80
  %v7_1a = fadd x86_fp80 %v4_18, %v6_1a
  %v2_1d = xor i3 %v0_e, -4
  %v3_1f = fmul x86_fp80 %v7_1a, %v7_1a
  %v3_23 = fmul x86_fp80 %v7_15, %v7_15
  %v4_25 = fadd x86_fp80 %v3_23, %v3_1f
  %v3_29 = fmul x86_fp80 %v7_10, %v7_10
  %v4_2b = fadd x86_fp80 %v3_29, %v4_25
  store x86_fp80 %v4_2b, x86_fp80* %st4.global-to-local, align 4
  store i3 %v2_1d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_2d = add i32 %v3_b, -40
  %v4_2d = inttoptr i32 %v3_2d to double*
  %v5_2d = load double, double* %v4_2d, align 4
  %v6_2d = fpext double %v5_2d to x86_fp80
  %v7_2d = fmul x86_fp80 %v4_2b, %v6_2d
  store x86_fp80 %v7_2d, x86_fp80* %st4.global-to-local, align 4
  %v1_30 = add i32 %v3_b, -60
  %v2_30 = inttoptr i32 %v1_30 to i32*
  %v3_30 = load i32, i32* %v2_30, align 4
  %v10_30 = icmp eq i32 %v3_30, 0
  br i1 %v10_30, label %dec_label_pc_41, label %dec_label_pc_36

dec_label_pc_36:                                  ; preds = %dec_label_pc_0
  %v0_3a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_3a = call i16 @__asm_fnstsw(i32 %v0_3a)
  %v2_3a = sext i16 %v1_3a to i32
  %v3_3a = load i32, i32* @eax, align 8
  %v4_3a = and i32 %v3_3a, -65536
  %v1_3c = udiv i32 %v2_3a, 256
  %v2_3c = trunc i32 %v1_3c to i8
  %v3_3c = and i8 %v2_3c, 65
  %v4_3c = icmp eq i8 %v3_3c, 0
  %v9_3c = zext i8 %v3_3c to i32
  %v11_3c = mul i32 %v9_3c, 256
  %v2_3a.masked = and i32 %v2_3a, -65281
  %v12_3c = or i32 %v4_3a, %v2_3a.masked
  %v13_3c = or i32 %v12_3c, %v11_3c
  store i32 %v13_3c, i32* @eax, align 8
  br i1 %v4_3c, label %dec_label_pc_41, label %dec_label_pc_88

dec_label_pc_41:                                  ; preds = %dec_label_pc_36, %dec_label_pc_0
  %v0_44 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_44 = call i16 @__asm_fnstsw(i32 %v0_44)
  %v2_44 = sext i16 %v1_44 to i32
  %v3_44 = load i32, i32* @eax, align 8
  %v4_44 = and i32 %v3_44, -65536
  %v1_46 = udiv i32 %v2_44, 256
  %v2_46 = trunc i32 %v1_46 to i8
  %v3_46 = and i8 %v2_46, 65
  %v4_46 = icmp eq i8 %v3_46, 0
  %v9_46 = zext i8 %v3_46 to i32
  %v11_46 = mul i32 %v9_46, 256
  %v2_44.masked = and i32 %v2_44, -65281
  %v12_46 = or i32 %v4_44, %v2_44.masked
  %v13_46 = or i32 %v12_46, %v11_46
  store i32 %v13_46, i32* @eax, align 8
  br i1 %v4_46, label %dec_label_pc_41.dec_label_pc_4b_crit_edge, label %dec_label_pc_70

dec_label_pc_41.dec_label_pc_4b_crit_edge:        ; preds = %dec_label_pc_41
  %v2_4f.pre.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_57.pre.pre = load i32, i32* %edi.global-to-local, align 4
  br label %dec_label_pc_4b

dec_label_pc_4b:                                  ; preds = %dec_label_pc_41.dec_label_pc_4b_crit_edge, %dec_label_pc_7d
  %v2_57.pre = phi i32 [ %v2_57.pre.pre, %dec_label_pc_41.dec_label_pc_4b_crit_edge ], [ %v0_70, %dec_label_pc_7d ]
  %v2_4f.pre = phi x86_fp80 [ %v2_4f.pre.pre, %dec_label_pc_41.dec_label_pc_4b_crit_edge ], [ %v7_82, %dec_label_pc_7d ]
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_4d = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  %v4_4d = fdiv x86_fp80 0xK3FFF8000000000000000, %v3_4d
  store x86_fp80 %v4_4d, x86_fp80* %st4.global-to-local, align 4
  br label %dec_label_pc_4f

dec_label_pc_4f:                                  ; preds = %dec_label_pc_76, %dec_label_pc_4b
  %v4_55.pre-phi.in = phi i3 [ %v0_76, %dec_label_pc_76 ], [ %v0_4b, %dec_label_pc_4b ]
  %v2_61 = phi i32 [ %v0_70, %dec_label_pc_76 ], [ %v2_57.pre, %dec_label_pc_4b ]
  %v2_4f = phi x86_fp80 [ %v5_78, %dec_label_pc_76 ], [ %v2_4f.pre, %dec_label_pc_4b ]
  %v4_4f = fmul x86_fp80 %v2_4f, %v2_4f
  %v4_51 = fmul x86_fp80 %v4_4f, %v4_4f
  %v4_53 = fmul x86_fp80 %v4_51, %v4_51
  store x86_fp80 %v4_53, x86_fp80* %st7.global-to-local, align 4
  %v3_57 = add i32 %v2_61, -16
  %v4_57 = inttoptr i32 %v3_57 to double*
  %v5_57 = load double, double* %v4_57, align 4
  %v6_57 = fpext double %v5_57 to x86_fp80
  %v7_57 = fsub x86_fp80 %v4_53, %v6_57
  store x86_fp80 %v7_57, x86_fp80* %st7.global-to-local, align 4
  %v2_5a = load i32, i32* %ebx.global-to-local, align 4
  %v3_5a = fptrunc x86_fp80 %v7_57 to double
  %v4_5a = inttoptr i32 %v2_5a to double*
  store double %v3_5a, double* %v4_5a, align 4
  %v1_5c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_5c = add i32 %v2_61, -24
  %v4_5c = inttoptr i32 %v3_5c to double*
  %v5_5c = load double, double* %v4_5c, align 4
  %v6_5c = fpext double %v5_5c to x86_fp80
  %v7_5c = fsub x86_fp80 %v1_5c, %v6_5c
  store x86_fp80 %v7_5c, x86_fp80* %st7.global-to-local, align 4
  %v2_5f = load i32, i32* @edx, align 8
  %v3_5f = fptrunc x86_fp80 %v7_5c to double
  %v4_5f = inttoptr i32 %v2_5f to double*
  store double %v3_5f, double* %v4_5f, align 4
  %v5_5f = add i3 %v4_55.pre-phi.in, 3
  store i3 %v5_5f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_61 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_61 = add i32 %v2_61, -32
  %v4_61 = inttoptr i32 %v3_61 to double*
  %v5_61 = load double, double* %v4_61, align 4
  %v6_61 = fpext double %v5_61 to x86_fp80
  %v7_61 = fsub x86_fp80 %v1_61, %v6_61
  store x86_fp80 %v7_61, x86_fp80* %st7.global-to-local, align 4
  %v2_64 = load i32, i32* @ecx, align 8
  %v3_64 = fptrunc x86_fp80 %v7_61 to double
  %v4_64 = inttoptr i32 %v2_64 to double*
  store double %v3_64, double* %v4_64, align 4
  br label %dec_label_pc_66

dec_label_pc_66:                                  ; preds = %dec_label_pc_88, %dec_label_pc_4f
  %v0_66 = phi i32 [ %v0_66.pre, %dec_label_pc_88 ], [ %v2_5a, %dec_label_pc_4f ]
  %storemerge1.in = phi i3 [ %v0_88, %dec_label_pc_88 ], [ %v4_55.pre-phi.in, %dec_label_pc_4f ]
  %storemerge1 = xor i3 %storemerge1.in, -4
  store i3 %storemerge1, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_66, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v0_66

dec_label_pc_70:                                  ; preds = %dec_label_pc_41
  %v0_70 = load i32, i32* %edi.global-to-local, align 4
  %v1_70 = add i32 %v0_70, -60
  %v2_70 = inttoptr i32 %v1_70 to i32*
  %v3_70 = load i32, i32* %v2_70, align 4
  %v13_70 = icmp eq i32 %v3_70, 2
  br i1 %v13_70, label %dec_label_pc_7d, label %dec_label_pc_76

dec_label_pc_76:                                  ; preds = %dec_label_pc_70
  %v0_76 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_78 = add i32 %v0_70, -56
  %v3_78 = inttoptr i32 %v2_78 to double*
  %v4_78 = load double, double* %v3_78, align 4
  %v5_78 = fpext double %v4_78 to x86_fp80
  store x86_fp80 %v5_78, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_4f

dec_label_pc_7d:                                  ; preds = %dec_label_pc_70
  %v1_7d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_7d = fsub x86_fp80 0xK80000000000000000000, %v1_7d
  store x86_fp80 %v2_7d, x86_fp80* %st7.global-to-local, align 4
  %v3_7f = add i32 %v0_70, -48
  %v4_7f = inttoptr i32 %v3_7f to double*
  %v5_7f = load double, double* %v4_7f, align 4
  %v6_7f = fpext double %v5_7f to x86_fp80
  %v7_7f = fsub x86_fp80 %v6_7f, %v1_7d
  store x86_fp80 %v7_7f, x86_fp80* %st7.global-to-local, align 4
  %v5_82 = load double, double* %v4_7f, align 4
  %v6_82 = fpext double %v5_82 to x86_fp80
  %v7_82 = fadd x86_fp80 %v7_7f, %v6_82
  store x86_fp80 %v7_82, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_4b

dec_label_pc_88:                                  ; preds = %dec_label_pc_36
  %v0_88 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_8c = add i3 %v0_88, 3
  store i3 %v4_8c, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_66.pre = load i32, i32* %ebx.global-to-local, align 4
  br label %dec_label_pc_66
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr
