source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %edi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %esi.global-to-local, align 4
  %v1_e = add i32 %arg1, 128
  store i32 %v1_e, i32* %edi.global-to-local, align 4
  %v1_14 = add i32 %arg1, 208
  %v2_14 = inttoptr i32 %v1_14 to i32*
  %v3_14 = load i32, i32* %v2_14, align 4
  %v10_14 = icmp eq i32 %v3_14, 0
  %v11_14 = icmp slt i32 %v3_14, 0
  %v3_18 = icmp eq i1 %v11_14, false
  %v4_18 = icmp eq i1 %v10_14, false
  %v5_18 = icmp eq i1 %v3_18, %v4_18
  br i1 %v5_18, label %dec_label_pc_0.dec_label_pc_23_crit_edge, label %dec_label_pc_1a

dec_label_pc_0.dec_label_pc_23_crit_edge:         ; preds = %dec_label_pc_0
  %v0_23.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %.pre = add i32 %arg1, 200
  %.pre16 = inttoptr i32 %.pre to double*
  %v4_23.pre = load double, double* %.pre16, align 4
  %.pre262 = fpext double %v4_23.pre to x86_fp80
  br label %dec_label_pc_23

dec_label_pc_1a:                                  ; preds = %dec_label_pc_0
  %v4_1a = add i32 %v3_14, 1
  store i32 %v4_1a, i32* %v2_14, align 4
  %v0_1d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_1d = load i32, i32* %esi.global-to-local, align 4
  %v2_1d = add i32 %v1_1d, -16
  %v3_1d = inttoptr i32 %v2_1d to double*
  %v4_1d = load double, double* %v3_1d, align 4
  %v5_1d = fpext double %v4_1d to x86_fp80
  store x86_fp80 %v5_1d, x86_fp80* %st7.global-to-local, align 4
  %v2_20 = load i32, i32* %edi.global-to-local, align 4
  %v3_20 = add i32 %v2_20, 72
  %v5_20 = inttoptr i32 %v3_20 to double*
  store double %v4_1d, double* %v5_20, align 4
  %v2_63.pre = load i32, i32* %ebx.global-to-local, align 4
  br label %dec_label_pc_23

dec_label_pc_23:                                  ; preds = %dec_label_pc_0.dec_label_pc_23_crit_edge, %dec_label_pc_1a
  %v5_23.pre-phi = phi x86_fp80 [ %.pre262, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_1d, %dec_label_pc_1a ]
  %v3_23.pre-phi = phi double* [ %.pre16, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_20, %dec_label_pc_1a ]
  %v2_63 = phi i32 [ %v0_9, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v2_63.pre, %dec_label_pc_1a ]
  %v0_6b = phi i32 [ %v3_b, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v1_1d, %dec_label_pc_1a ]
  %v0_23 = phi i3 [ %v0_23.pre, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v0_1d, %dec_label_pc_1a ]
  store x86_fp80 %v5_23.pre-phi, x86_fp80* %st7.global-to-local, align 4
  %v2_2a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v5_23.pre-phi)
  store x86_fp80 %v2_2a, x86_fp80* %st5.global-to-local, align 4
  %v4_2c = fadd x86_fp80 %v2_2a, 0xKBFFF8000000000000000
  store x86_fp80 %v4_2c, x86_fp80* %st6.global-to-local, align 4
  %v3_2e = add i32 %v0_6b, -84
  %v4_2e = inttoptr i32 %v3_2e to double*
  %v5_2e = load double, double* %v4_2e, align 4
  %v6_2e = fpext double %v5_2e to x86_fp80
  %v7_2e = fmul x86_fp80 %v4_2c, %v6_2e
  store x86_fp80 %v7_2e, x86_fp80* %st6.global-to-local, align 4
  %v4_31 = fadd x86_fp80 %v7_2e, %v5_23.pre-phi
  store x86_fp80 %v4_31, x86_fp80* %st7.global-to-local, align 4
  %v4_33 = fptrunc x86_fp80 %v4_31 to double
  store double %v4_33, double* %v3_23.pre-phi, align 4
  %v2_36 = add i32 %v0_6b, -40
  %v3_36 = inttoptr i32 %v2_36 to double*
  %v4_36 = load double, double* %v3_36, align 4
  %v5_36 = fpext double %v4_36 to x86_fp80
  %v3_39 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_39 = fpext double %v3_39 to x86_fp80
  %v4_3d = fsub x86_fp80 %v4_39, %v5_36
  %v2_3f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_3d)
  %v4_41 = fadd x86_fp80 %v2_3f, %v4_39
  %v4_45 = fadd x86_fp80 %v5_36, %v4_39
  %v2_47 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_45)
  %v4_49 = fsub x86_fp80 %v2_47, %v4_41
  store x86_fp80 %v4_49, x86_fp80* %st6.global-to-local, align 4
  %v3_4b = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_4b = fpext double %v3_4b to x86_fp80
  %v4_4f = fsub x86_fp80 %v4_4b, %v5_36
  %v2_51 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_4f)
  %v4_53 = fadd x86_fp80 %v2_51, %v4_4b
  %v4_57 = fadd x86_fp80 %v5_36, %v4_4b
  %v2_59 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_57)
  %v4_5b = fsub x86_fp80 %v2_59, %v4_53
  store x86_fp80 %v4_5b, x86_fp80* %st5.global-to-local, align 4
  %tmp255 = bitcast double %v3_4b to i64
  %tmp256 = trunc i64 %tmp255 to i32
  %v3_5d = fptrunc x86_fp80 %v4_5b to double
  %v4_5d = inttoptr i32 %tmp256 to double*
  store double %v3_5d, double* %v4_5d, align 4
  %v1_5f = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_5f = fmul x86_fp80 %v1_5f, %v1_5f
  %v3_61 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_61, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v3_5f, x86_fp80* %st6.global-to-local, align 4
  %v3_63 = fptrunc x86_fp80 %v3_61 to double
  %v4_63 = inttoptr i32 %v2_63 to double*
  store double %v3_63, double* %v4_63, align 4
  %v1_65 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_65 = fmul x86_fp80 %v1_65, %v1_65
  store x86_fp80 %v3_65, x86_fp80* %st5.global-to-local, align 4
  %v3_67 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_67 = fadd x86_fp80 %v3_65, %v3_67
  store x86_fp80 %v4_67, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_67, x86_fp80* %st7.global-to-local, align 4
  %v5_69 = add i3 %v0_23, -1
  store i3 %v5_69, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_6b = add i32 %v0_6b, -88
  %v2_6b = inttoptr i32 %v1_6b to i32*
  %v3_6b = load i32, i32* %v2_6b, align 4
  %v10_6b = icmp eq i32 %v3_6b, 0
  %v1_6f = icmp eq i1 %v10_6b, false
  br i1 %v1_6f, label %dec_label_pc_77, label %dec_label_pc_71

dec_label_pc_71:                                  ; preds = %dec_label_pc_23
  %v3_71 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_71 = fpext double %v3_71 to x86_fp80
  %v3_73 = fmul x86_fp80 %v4_71, %v4_71
  store x86_fp80 %v3_73, x86_fp80* %st6.global-to-local, align 4
  %v4_75 = fadd x86_fp80 %v4_67, %v3_73
  store x86_fp80 %v4_75, x86_fp80* %st7.global-to-local, align 4
  store i3 %v5_69, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_77

dec_label_pc_77:                                  ; preds = %dec_label_pc_71, %dec_label_pc_23
  %v0_7a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_7a = call i16 @__asm_fnstsw(i32 %v0_7a)
  %v2_7a = sext i16 %v1_7a to i32
  %v3_7a = load i32, i32* @eax, align 8
  %v4_7a = and i32 %v3_7a, -65536
  %tmp263 = udiv i32 %v2_7a, 2
  %v12_7c = and i32 %tmp263, 32512
  %v2_7a.masked = and i32 %v2_7a, -65281
  %v13_7c = or i32 %v4_7a, %v2_7a.masked
  %v14_7c = or i32 %v13_7c, %v12_7c
  store i32 %v14_7c, i32* @eax, align 8
  %v15_7c259 = and i32 %v2_7a, 256
  %v16_7c = icmp ne i32 %v15_7c259, 0
  %v1_7e = icmp eq i1 %v16_7c, false
  %v0_87 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_7e, label %dec_label_pc_87, label %dec_label_pc_80

dec_label_pc_80:                                  ; preds = %dec_label_pc_77
  %v1_82 = load i32, i32* %esi.global-to-local, align 4
  %v2_82 = add i32 %v1_82, -24
  %v3_82 = inttoptr i32 %v2_82 to double*
  %v4_82 = load double, double* %v3_82, align 4
  %v5_82 = fpext double %v4_82 to x86_fp80
  store x86_fp80 %v5_82, x86_fp80* %st7.global-to-local, align 4
  %v2_a9.pre = load i32, i32* %edi.global-to-local, align 4
  br label %dec_label_pc_9d

dec_label_pc_87:                                  ; preds = %dec_label_pc_77
  %v1_87 = add i3 %v0_87, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v1_87, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_8b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_8b = call i16 @__asm_fnstsw(i32 %v0_8b)
  %v2_8b = sext i16 %v1_8b to i32
  %v3_8b = load i32, i32* @eax, align 8
  %v4_8b = and i32 %v3_8b, -65536
  %tmp264 = udiv i32 %v2_8b, 2
  %v12_8d = and i32 %tmp264, 32512
  %v2_8b.masked = and i32 %v2_8b, -65281
  %v13_8d = or i32 %v4_8b, %v2_8b.masked
  %v14_8d = or i32 %v13_8d, %v12_8d
  store i32 %v14_8d, i32* @eax, align 8
  %v15_8d260 = and i32 %v2_8b, 256
  %v16_8d = icmp eq i32 %v15_8d260, 0
  %v0_98 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_91 = add i3 %v0_98, 1
  br i1 %v16_8d, label %dec_label_pc_91, label %dec_label_pc_98

dec_label_pc_91:                                  ; preds = %dec_label_pc_87
  %v2_98 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_91, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_93 = load i32, i32* %edi.global-to-local, align 4
  %v3_93 = add i32 %v2_93, 72
  %v4_93 = inttoptr i32 %v3_93 to double*
  %v5_93 = load double, double* %v4_93, align 4
  %v6_93 = fpext double %v5_93 to x86_fp80
  %v7_93 = fdiv x86_fp80 %v6_93, %v2_98
  store x86_fp80 %v7_93, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_9d

dec_label_pc_98:                                  ; preds = %dec_label_pc_87
  %v1_9a = load i32, i32* %edi.global-to-local, align 4
  %v2_9a = add i32 %v1_9a, 72
  %v3_9a = inttoptr i32 %v2_9a to double*
  %v4_9a = load double, double* %v3_9a, align 4
  %v5_9a = fpext double %v4_9a to x86_fp80
  store i3 %v4_91, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_9a, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_9d

dec_label_pc_9d:                                  ; preds = %dec_label_pc_98, %dec_label_pc_91, %dec_label_pc_80
  %v2_b7 = phi i32 [ %v1_9a, %dec_label_pc_98 ], [ %v2_93, %dec_label_pc_91 ], [ %v2_a9.pre, %dec_label_pc_80 ]
  %v3_a0 = phi x86_fp80 [ %v5_9a, %dec_label_pc_98 ], [ %v7_93, %dec_label_pc_91 ], [ %v5_82, %dec_label_pc_80 ]
  %v0_9d = phi i3 [ %v4_91, %dec_label_pc_98 ], [ %v4_91, %dec_label_pc_91 ], [ %v0_87, %dec_label_pc_80 ]
  %v1_9d = load i32, i32* @ecx, align 8
  %v2_9d = add i32 %v1_9d, 8
  %v3_9d = inttoptr i32 %v2_9d to double*
  %v4_9d = load double, double* %v3_9d, align 4
  %v5_9d = fpext double %v4_9d to x86_fp80
  %v4_a0 = fmul x86_fp80 %v3_a0, %v5_9d
  %v4_a2 = fptrunc x86_fp80 %v4_a0 to double
  store double %v4_a2, double* %v3_9d, align 4
  %v3_a5 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_a5 = fpext double %v3_a5 to x86_fp80
  %v3_a7 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_a7 = fmul x86_fp80 %v3_a7, %v4_a5
  store x86_fp80 %v4_a7, x86_fp80* %st6.global-to-local, align 4
  %v3_a9 = add i32 %v2_b7, -88
  %v4_a9 = inttoptr i32 %v3_a9 to double*
  %v5_a9 = load double, double* %v4_a9, align 4
  %v6_a9 = fpext double %v5_a9 to x86_fp80
  %v7_a9 = fadd x86_fp80 %v4_a7, %v6_a9
  store x86_fp80 %v7_a9, x86_fp80* %st6.global-to-local, align 4
  %v3_ac = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_ac = fpext double %v3_ac to x86_fp80
  %v4_ae = fmul x86_fp80 %v3_a7, %v4_ac
  store x86_fp80 %v4_ae, x86_fp80* %st5.global-to-local, align 4
  %v3_b0 = add i32 %v2_b7, -96
  %v4_b0 = inttoptr i32 %v3_b0 to double*
  %v5_b0 = load double, double* %v4_b0, align 4
  %v6_b0 = fpext double %v5_b0 to x86_fp80
  %v7_b0 = fadd x86_fp80 %v4_ae, %v6_b0
  store x86_fp80 %v7_b0, x86_fp80* %st5.global-to-local, align 4
  %v3_b3 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_b3 = fpext double %v3_b3 to x86_fp80
  %v4_b5 = fmul x86_fp80 %v3_a7, %v4_b3
  %v3_b7 = add i32 %v2_b7, -104
  %v4_b7 = inttoptr i32 %v3_b7 to double*
  %v5_b7 = load double, double* %v4_b7, align 4
  %v6_b7 = fpext double %v5_b7 to x86_fp80
  %v7_b7 = fadd x86_fp80 %v4_b5, %v6_b7
  %v2_bc = load i32, i32* %esi.global-to-local, align 4
  %v3_bc = add i32 %v2_bc, -68
  %v4_bc = inttoptr i32 %v3_bc to float*
  %v5_bc = load float, float* %v4_bc, align 4
  %v6_bc = fpext float %v5_bc to x86_fp80
  %v7_bc = fmul x86_fp80 %v7_b7, %v6_bc
  %v3_c1 = add i32 %v2_bc, -72
  %v4_c1 = inttoptr i32 %v3_c1 to float*
  %v5_c1 = load float, float* %v4_c1, align 4
  %v6_c1 = fpext float %v5_c1 to x86_fp80
  %v7_c1 = fmul x86_fp80 %v7_b0, %v6_c1
  %v4_c4 = fadd x86_fp80 %v7_bc, %v7_c1
  %v3_c8 = add i32 %v2_bc, -76
  %v4_c8 = inttoptr i32 %v3_c8 to float*
  %v5_c8 = load float, float* %v4_c8, align 4
  %v6_c8 = fpext float %v5_c8 to x86_fp80
  %v7_c8 = fmul x86_fp80 %v7_a9, %v6_c8
  %v4_cb = fadd x86_fp80 %v7_c8, %v4_c4
  %v3_cf = add i32 %v2_bc, -44
  %v4_cf = inttoptr i32 %v3_cf to float*
  %v5_cf = load float, float* %v4_cf, align 4
  %v6_cf = fpext float %v5_cf to x86_fp80
  %v7_cf = fmul x86_fp80 %v7_b7, %v6_cf
  %v3_d4 = add i32 %v2_bc, -48
  %v4_d4 = inttoptr i32 %v3_d4 to float*
  %v5_d4 = load float, float* %v4_d4, align 4
  %v6_d4 = fpext float %v5_d4 to x86_fp80
  %v7_d4 = fmul x86_fp80 %v7_b0, %v6_d4
  %v4_d7 = fadd x86_fp80 %v7_cf, %v7_d4
  %v3_db = add i32 %v2_bc, -52
  %v4_db = inttoptr i32 %v3_db to float*
  %v5_db = load float, float* %v4_db, align 4
  %v6_db = fpext float %v5_db to x86_fp80
  %v7_db = fmul x86_fp80 %v7_a9, %v6_db
  %v4_de = fadd x86_fp80 %v4_d7, %v7_db
  %v3_e2 = add i32 %v2_bc, -56
  %v4_e2 = inttoptr i32 %v3_e2 to float*
  %v5_e2 = load float, float* %v4_e2, align 4
  %v6_e2 = fpext float %v5_e2 to x86_fp80
  %v7_e2 = fmul x86_fp80 %v7_b7, %v6_e2
  store x86_fp80 %v7_e2, x86_fp80* %st5.global-to-local, align 4
  %v3_e7 = add i32 %v2_bc, -60
  %v4_e7 = inttoptr i32 %v3_e7 to float*
  %v5_e7 = load float, float* %v4_e7, align 4
  %v6_e7 = fpext float %v5_e7 to x86_fp80
  %v7_e7 = fmul x86_fp80 %v7_b0, %v6_e7
  %v4_ea = fadd x86_fp80 %v7_e2, %v7_e7
  store x86_fp80 %v4_ea, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v4_cb, x86_fp80* %st6.global-to-local, align 4
  %v3_ee = add i32 %v2_bc, -64
  %v4_ee = inttoptr i32 %v3_ee to float*
  %v5_ee = load float, float* %v4_ee, align 4
  %v6_ee = fpext float %v5_ee to x86_fp80
  %v7_ee = fmul x86_fp80 %v7_a9, %v6_ee
  %v4_f1 = fadd x86_fp80 %v4_ea, %v7_ee
  store x86_fp80 %v4_f1, x86_fp80* %st5.global-to-local, align 4
  %v2_f3 = load i32, i32* %ebx.global-to-local, align 4
  %v3_f3 = fptrunc x86_fp80 %v4_de to double
  %v4_f3 = inttoptr i32 %v2_f3 to double*
  store double %v3_f3, double* %v4_f3, align 4
  %v1_f5 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v2_f5 = load i32, i32* @edx, align 8
  %v3_f5 = fptrunc x86_fp80 %v1_f5 to double
  %v4_f5 = inttoptr i32 %v2_f5 to double*
  store double %v3_f5, double* %v4_f5, align 4
  %v1_f7 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v2_f7 = load i32, i32* @ecx, align 8
  %v3_f7 = fptrunc x86_fp80 %v1_f7 to double
  %v4_f7 = inttoptr i32 %v2_f7 to double*
  store double %v3_f7, double* %v4_f7, align 4
  %v4_f9 = add i3 %v0_9d, 1
  store i3 %v4_f9, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_f3, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v2_f3
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
