source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8
@global_var_1.1 = constant i8 -117

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_9 = load i32, i32* %esi.global-to-local, align 4
  %v0_a = load i32, i32* %edi.global-to-local, align 4
  %v0_b = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %edi.global-to-local, align 4
  %v0_f = load i32, i32* %eax.global-to-local, align 8
  store i32 %v0_f, i32* %ebx.global-to-local, align 4
  %v1_11 = add i32 %arg1, 48
  %v2_11 = inttoptr i32 %v1_11 to i32*
  %v3_11 = load i32, i32* %v2_11, align 4
  store i32 %v3_11, i32* %esi.global-to-local, align 4
  %v1_14 = add i32 %arg1, 128
  store i32 %v1_14, i32* %edi.global-to-local, align 4
  %v1_1a = add i32 %arg1, 208
  %v2_1a = inttoptr i32 %v1_1a to i32*
  %v3_1a = load i32, i32* %v2_1a, align 4
  %v10_1a = icmp eq i32 %v3_1a, 0
  %v11_1a = icmp slt i32 %v3_1a, 0
  %v3_1e = icmp eq i1 %v11_1a, false
  %v4_1e = icmp eq i1 %v10_1a, false
  %v5_1e = icmp eq i1 %v3_1e, %v4_1e
  br i1 %v5_1e, label %dec_label_pc_0.dec_label_pc_29_crit_edge, label %dec_label_pc_20

dec_label_pc_0.dec_label_pc_29_crit_edge:         ; preds = %dec_label_pc_0
  %v0_29.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %.pre = add i32 %arg1, 200
  %.pre58 = inttoptr i32 %.pre to double*
  %v4_29.pre = load double, double* %.pre58, align 4
  %.pre326 = fpext double %v4_29.pre to x86_fp80
  br label %dec_label_pc_29

dec_label_pc_20:                                  ; preds = %dec_label_pc_0
  %v4_20 = add i32 %v3_1a, 1
  store i32 %v4_20, i32* %v2_1a, align 4
  %v0_23 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_23 = load i32, i32* %esi.global-to-local, align 4
  %v2_23 = add i32 %v1_23, -16
  %v3_23 = inttoptr i32 %v2_23 to double*
  %v4_23 = load double, double* %v3_23, align 4
  %v5_23 = fpext double %v4_23 to x86_fp80
  store x86_fp80 %v5_23, x86_fp80* %st7.global-to-local, align 4
  %v2_26 = load i32, i32* %edi.global-to-local, align 4
  %v3_26 = add i32 %v2_26, 72
  %v5_26 = inttoptr i32 %v3_26 to double*
  store double %v4_23, double* %v5_26, align 4
  br label %dec_label_pc_29

dec_label_pc_29:                                  ; preds = %dec_label_pc_0.dec_label_pc_29_crit_edge, %dec_label_pc_20
  %v5_29.pre-phi = phi x86_fp80 [ %.pre326, %dec_label_pc_0.dec_label_pc_29_crit_edge ], [ %v5_23, %dec_label_pc_20 ]
  %v6_29.pre-phi.in = phi i3 [ %v0_29.pre, %dec_label_pc_0.dec_label_pc_29_crit_edge ], [ %v0_23, %dec_label_pc_20 ]
  %v3_29.pre-phi = phi double* [ %.pre58, %dec_label_pc_0.dec_label_pc_29_crit_edge ], [ %v5_26, %dec_label_pc_20 ]
  %v1_3c = phi i32 [ %v3_11, %dec_label_pc_0.dec_label_pc_29_crit_edge ], [ %v1_23, %dec_label_pc_20 ]
  store x86_fp80 %v5_29.pre-phi, x86_fp80* %st7.global-to-local, align 4
  %v2_30 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v5_29.pre-phi)
  %v4_32 = fadd x86_fp80 %v2_30, 0xKBFFF8000000000000000
  store x86_fp80 %v4_32, x86_fp80* %st6.global-to-local, align 4
  %v3_34 = add i32 %v1_3c, -48
  %v4_34 = inttoptr i32 %v3_34 to double*
  %v5_34 = load double, double* %v4_34, align 4
  %v6_34 = fpext double %v5_34 to x86_fp80
  %v7_34 = fmul x86_fp80 %v4_32, %v6_34
  store x86_fp80 %v7_34, x86_fp80* %st6.global-to-local, align 4
  %v4_37 = fadd x86_fp80 %v7_34, %v5_29.pre-phi
  store x86_fp80 %v4_37, x86_fp80* %st7.global-to-local, align 4
  %v4_39 = fptrunc x86_fp80 %v4_37 to double
  store double %v4_39, double* %v3_29.pre-phi, align 4
  %v2_3c = add i32 %v1_3c, -40
  %v3_3c = inttoptr i32 %v2_3c to double*
  %v4_3c = load double, double* %v3_3c, align 4
  %v5_3c = fpext double %v4_3c to x86_fp80
  store x86_fp80 %v5_3c, x86_fp80* %st6.global-to-local, align 4
  %v4_43 = fadd x86_fp80 %v5_3c, %v5_3c
  store x86_fp80 %v4_43, x86_fp80* %st7.global-to-local, align 4
  %v5_47 = add i3 %v6_29.pre-phi.in, add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3))))))))
  store i3 %v5_47, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_4b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_4b = call i16 @__asm_fnstsw(i32 %v0_4b)
  %v2_4b = sext i16 %v1_4b to i32
  %v3_4b = load i32, i32* %eax.global-to-local, align 8
  %v4_4b = and i32 %v3_4b, -65536
  %tmp327 = udiv i32 %v2_4b, 2
  %v12_4d = and i32 %tmp327, 32512
  %v2_4b.masked = and i32 %v2_4b, -65281
  %v13_4d = or i32 %v4_4b, %v2_4b.masked
  %v14_4d = or i32 %v13_4d, %v12_4d
  store i32 %v14_4d, i32* %eax.global-to-local, align 8
  %v15_4d317 = and i32 %v2_4b, 256
  %v16_4d = icmp eq i32 %v15_4d317, 0
  %v2_57 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_4d, label %dec_label_pc_51, label %dec_label_pc_57

dec_label_pc_51:                                  ; preds = %dec_label_pc_29
  %v2_51 = fsub x86_fp80 0xK80000000000000000000, %v2_57
  %v4_53 = fsub x86_fp80 %v2_51, %v2_57
  store x86_fp80 %v4_53, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_63

dec_label_pc_57:                                  ; preds = %dec_label_pc_29
  %v0_59 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_59 = call i16 @__asm_fnstsw(i32 %v0_59)
  %v2_59 = sext i16 %v1_59 to i32
  %v3_59 = load i32, i32* %eax.global-to-local, align 8
  %v4_59 = and i32 %v3_59, -65536
  %tmp328 = udiv i32 %v2_59, 2
  %v12_5b = and i32 %tmp328, 32512
  %v2_59.masked = and i32 %v2_59, -65281
  %v13_5b = or i32 %v4_59, %v2_59.masked
  %v14_5b = or i32 %v13_5b, %v12_5b
  store i32 %v14_5b, i32* %eax.global-to-local, align 8
  %v15_5b318 = and i32 %v2_59, 256
  %v16_5b = icmp ne i32 %v15_5b318, 0
  %v1_5d = icmp eq i1 %v16_5b, false
  br i1 %v1_5d, label %dec_label_pc_63, label %dec_label_pc_5f

dec_label_pc_5f:                                  ; preds = %dec_label_pc_57
  %v1_5f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_61 = fsub x86_fp80 %v1_5f, %v1_5f
  store x86_fp80 %v4_61, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_63

dec_label_pc_63:                                  ; preds = %dec_label_pc_5f, %dec_label_pc_57, %dec_label_pc_51
  %v0_63 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_63 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_63 = fpext double %v3_63 to x86_fp80
  %v5_63 = sub i3 %v0_63, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v5_63, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_63, x86_fp80* %st6.global-to-local, align 4
  %v0_67 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_67 = call i16 @__asm_fnstsw(i32 %v0_67)
  %v2_67 = sext i16 %v1_67 to i32
  %v3_67 = load i32, i32* %eax.global-to-local, align 8
  %v4_67 = and i32 %v3_67, -65536
  %tmp329 = udiv i32 %v2_67, 2
  %v12_69 = and i32 %tmp329, 32512
  %v2_67.masked = and i32 %v2_67, -65281
  %v13_69 = or i32 %v4_67, %v2_67.masked
  %v14_69 = or i32 %v13_69, %v12_69
  store i32 %v14_69, i32* %eax.global-to-local, align 8
  %v15_69319 = and i32 %v2_67, 256
  %v16_69 = icmp eq i32 %v15_69319, 0
  %v2_73 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_69, label %dec_label_pc_6d, label %dec_label_pc_73

dec_label_pc_6d:                                  ; preds = %dec_label_pc_63
  %v2_6d = fsub x86_fp80 0xK80000000000000000000, %v2_73
  %v4_6f = fsub x86_fp80 %v2_6d, %v2_73
  store x86_fp80 %v4_6f, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_7f

dec_label_pc_73:                                  ; preds = %dec_label_pc_63
  %v0_75 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_75 = call i16 @__asm_fnstsw(i32 %v0_75)
  %v2_75 = sext i16 %v1_75 to i32
  %v3_75 = load i32, i32* %eax.global-to-local, align 8
  %v4_75 = and i32 %v3_75, -65536
  %tmp330 = udiv i32 %v2_75, 2
  %v12_77 = and i32 %tmp330, 32512
  %v2_75.masked = and i32 %v2_75, -65281
  %v13_77 = or i32 %v4_75, %v2_75.masked
  %v14_77 = or i32 %v13_77, %v12_77
  store i32 %v14_77, i32* %eax.global-to-local, align 8
  %v15_77320 = and i32 %v2_75, 256
  %v16_77 = icmp ne i32 %v15_77320, 0
  %v1_79 = icmp eq i1 %v16_77, false
  br i1 %v1_79, label %dec_label_pc_7f, label %dec_label_pc_7b

dec_label_pc_7b:                                  ; preds = %dec_label_pc_73
  %v1_7b = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_7d = fsub x86_fp80 %v1_7b, %v1_7b
  store x86_fp80 %v4_7d, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_7f

dec_label_pc_7f:                                  ; preds = %dec_label_pc_7b, %dec_label_pc_73, %dec_label_pc_6d
  %v0_7f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_7f = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_7f = fpext double %v3_7f to x86_fp80
  %v5_7f = sub i3 %v0_7f, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v5_7f, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_7f, x86_fp80* %st6.global-to-local, align 4
  %v0_83 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_83 = call i16 @__asm_fnstsw(i32 %v0_83)
  %v2_83 = sext i16 %v1_83 to i32
  %v3_83 = load i32, i32* %eax.global-to-local, align 8
  %v4_83 = and i32 %v3_83, -65536
  %tmp331 = udiv i32 %v2_83, 2
  %v12_85 = and i32 %tmp331, 32512
  %v2_83.masked = and i32 %v2_83, -65281
  %v13_85 = or i32 %v4_83, %v2_83.masked
  %v14_85 = or i32 %v13_85, %v12_85
  store i32 %v14_85, i32* %eax.global-to-local, align 8
  %v15_85321 = and i32 %v2_83, 256
  %v16_85 = icmp eq i32 %v15_85321, 0
  %v2_8f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_85, label %dec_label_pc_89, label %dec_label_pc_8f

dec_label_pc_89:                                  ; preds = %dec_label_pc_7f
  %v2_89 = fsub x86_fp80 0xK80000000000000000000, %v2_8f
  %v4_8b = fsub x86_fp80 %v2_89, %v2_8f
  store x86_fp80 %v4_8b, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_9b

dec_label_pc_8f:                                  ; preds = %dec_label_pc_7f
  %v0_91 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_91 = call i16 @__asm_fnstsw(i32 %v0_91)
  %v2_91 = sext i16 %v1_91 to i32
  %v3_91 = load i32, i32* %eax.global-to-local, align 8
  %v4_91 = and i32 %v3_91, -65536
  %tmp332 = udiv i32 %v2_91, 2
  %v12_93 = and i32 %tmp332, 32512
  %v2_91.masked = and i32 %v2_91, -65281
  %v13_93 = or i32 %v4_91, %v2_91.masked
  %v14_93 = or i32 %v13_93, %v12_93
  store i32 %v14_93, i32* %eax.global-to-local, align 8
  %v15_93322 = and i32 %v2_91, 256
  %v16_93 = icmp ne i32 %v15_93322, 0
  %v1_95 = icmp eq i1 %v16_93, false
  %v2_9b.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_95, label %dec_label_pc_9b, label %dec_label_pc_97

dec_label_pc_97:                                  ; preds = %dec_label_pc_8f
  %v4_99 = fsub x86_fp80 %v2_9b.pre, %v2_9b.pre
  store x86_fp80 %v4_99, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_9b

dec_label_pc_9b:                                  ; preds = %dec_label_pc_8f, %dec_label_pc_97, %dec_label_pc_89
  %v2_9b = phi x86_fp80 [ %v4_99, %dec_label_pc_97 ], [ %v4_8b, %dec_label_pc_89 ], [ %v2_9b.pre, %dec_label_pc_8f ]
  %v0_9d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_a1 = add i3 %v0_9d, add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3))
  store i3 %v4_a1, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v2_9b, x86_fp80* %st7.global-to-local, align 4
  %v2_a9 = load i32, i32* %esi.global-to-local, align 4
  %v3_a9 = add i32 %v2_a9, -64
  %v4_a9 = inttoptr i32 %v3_a9 to double*
  %v5_a9 = load double, double* %v4_a9, align 4
  %v6_a9 = fpext double %v5_a9 to x86_fp80
  %v7_a9 = fmul x86_fp80 %v2_9b, %v6_a9
  store x86_fp80 %v7_a9, x86_fp80* %st7.global-to-local, align 4
  %v2_ac = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_a9)
  %v3_ac = fcmp olt x86_fp80 %v2_ac, 0xK403E8000000000000000
  br i1 %v3_ac, label %bb, label %bb309

bb:                                               ; preds = %dec_label_pc_9b
  %v4_ac = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_a9)
  store x86_fp80 %v4_ac, x86_fp80* %st7.global-to-local, align 4
  %v7_ac = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_a9)
  %v8_ac = sub i3 %v4_a1, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v8_ac, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_ac, x86_fp80* %st6.global-to-local, align 4
  br label %bb309

bb309:                                            ; preds = %dec_label_pc_9b, %bb
  %v1_ae = phi x86_fp80 [ %v7_a9, %dec_label_pc_9b ], [ %v4_ac, %bb ]
  %v0_ae = phi i3 [ %v4_a1, %dec_label_pc_9b ], [ %v8_ac, %bb ]
  %v3_b4 = add i3 %v0_ae, add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3)))
  store i3 %v3_b4, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v1_ae, x86_fp80* %st7.global-to-local, align 4
  %v5_b6 = load double, double* %v4_a9, align 4
  %v6_b6 = fpext double %v5_b6 to x86_fp80
  %v7_b6 = fmul x86_fp80 %v1_ae, %v6_b6
  store x86_fp80 %v7_b6, x86_fp80* %st7.global-to-local, align 4
  %v2_b9 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_b6)
  %v3_b9 = fcmp olt x86_fp80 %v2_b9, 0xK403E8000000000000000
  br i1 %v3_b9, label %bb310, label %._crit_edge

._crit_edge:                                      ; preds = %bb309
  %v1_bb.pre = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  br label %bb311

bb310:                                            ; preds = %bb309
  %v4_b9 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_b6)
  store x86_fp80 %v4_b9, x86_fp80* %st7.global-to-local, align 4
  %v7_b9 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_b6)
  %v8_b9 = sub i3 %v3_b4, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v8_b9, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_b9, x86_fp80* %st6.global-to-local, align 4
  br label %bb311

bb311:                                            ; preds = %._crit_edge, %bb310
  %v1_be = phi x86_fp80 [ %v7_b6, %._crit_edge ], [ %v4_b9, %bb310 ]
  %v1_bb = phi x86_fp80 [ %v1_bb.pre, %._crit_edge ], [ %v7_b9, %bb310 ]
  %v0_bb = phi i3 [ %v3_b4, %._crit_edge ], [ %v8_b9, %bb310 ]
  %v2_c1 = add i3 %v0_bb, add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3)))
  store i3 %v2_c1, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v1_be, x86_fp80* %st7.global-to-local, align 4
  %v5_c3 = load double, double* %v4_a9, align 4
  %v6_c3 = fpext double %v5_c3 to x86_fp80
  %v7_c3 = fmul x86_fp80 %v1_be, %v6_c3
  store x86_fp80 %v7_c3, x86_fp80* %st7.global-to-local, align 4
  %v2_c6 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_c3)
  %v3_c6 = fcmp olt x86_fp80 %v2_c6, 0xK403E8000000000000000
  br i1 %v3_c6, label %bb312, label %bb313

bb312:                                            ; preds = %bb311
  %v4_c6 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_c3)
  store x86_fp80 %v4_c6, x86_fp80* %st7.global-to-local, align 4
  %v7_c6 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_c3)
  %v8_c6 = sub i3 %v2_c1, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v8_c6, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_c6, x86_fp80* %st6.global-to-local, align 4
  br label %bb313

bb313:                                            ; preds = %bb311, %bb312
  %v4_c8.pre-phi.in = phi x86_fp80 [ %v1_bb, %bb311 ], [ %v7_c6, %bb312 ]
  %v1_cb = phi x86_fp80 [ %v7_c3, %bb311 ], [ %v4_c6, %bb312 ]
  %v0_c8 = phi i3 [ %v2_c1, %bb311 ], [ %v8_c6, %bb312 ]
  %v3_d1 = fmul x86_fp80 %v1_cb, %v1_cb
  %v3_d5 = fmul x86_fp80 %v3_d1, %v3_d1
  %v4_d7 = fadd x86_fp80 %v3_d1, %v3_d5
  %v3_db = fmul x86_fp80 %v4_d7, %v4_d7
  %v4_dd = fadd x86_fp80 %v4_d7, %v3_db
  %v2_df = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_dd)
  %v6_e5 = add i3 %v0_c8, add (i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3))), i3 add (i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 ptrtoint (i8* @global_var_1.1 to i3))), i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3))))
  %v7_e8 = fmul x86_fp80 %v1_ae, %v1_be
  %v6_eb = sub i3 %v6_e5, ptrtoint (i8* @global_var_1.1 to i3)
  %v7_ee = fmul x86_fp80 %v1_bb, %v1_cb
  %v4_f1 = fadd x86_fp80 %v7_e8, %v7_ee
  %v7_f6 = fmul x86_fp80 %v1_ae, %v4_c8.pre-phi.in
  store x86_fp80 %v7_f6, x86_fp80* %st6.global-to-local, align 4
  %v4_f9 = fadd x86_fp80 %v7_f6, %v4_f1
  store x86_fp80 %v4_f9, x86_fp80* %st7.global-to-local, align 4
  %v3_fb = add i32 %v2_a9, -56
  %v4_fb = inttoptr i32 %v3_fb to double*
  %v5_fb = load double, double* %v4_fb, align 4
  %v6_fb = fpext double %v5_fb to x86_fp80
  %v7_fb = fmul x86_fp80 %v4_f9, %v6_fb
  store x86_fp80 %v7_fb, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_eb, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_102 = fadd x86_fp80 %v1_ae, %v1_bb
  %v7_105 = fadd x86_fp80 %v7_102, %v4_c8.pre-phi.in
  store x86_fp80 %v7_105, x86_fp80* %st6.global-to-local, align 4
  %v3_108 = add i32 %v2_a9, -72
  %v4_108 = inttoptr i32 %v3_108 to double*
  %v5_108 = load double, double* %v4_108, align 4
  %v6_108 = fpext double %v5_108 to x86_fp80
  %v7_108 = fmul x86_fp80 %v7_105, %v6_108
  store x86_fp80 %v7_108, x86_fp80* %st6.global-to-local, align 4
  %v1_10b = add i32 %v2_a9, -84
  %v2_10b = inttoptr i32 %v1_10b to i32*
  %v3_10b = load i32, i32* %v2_10b, align 4
  %v13_10b = icmp eq i32 %v3_10b, 1
  br i1 %v13_10b, label %dec_label_pc_11f, label %dec_label_pc_111

dec_label_pc_111:                                 ; preds = %bb313
  %v4_111 = fadd x86_fp80 %v7_fb, %v7_108
  store x86_fp80 %v4_111, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_eb, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v2_df, x86_fp80* %st6.global-to-local, align 4
  %v3_116 = add i32 %v2_a9, -80
  %v4_116 = inttoptr i32 %v3_116 to double*
  %v5_116 = load double, double* %v4_116, align 4
  %v6_116 = fpext double %v5_116 to x86_fp80
  %v7_116 = fmul x86_fp80 %v2_df, %v6_116
  store x86_fp80 %v7_116, x86_fp80* %st6.global-to-local, align 4
  %v4_119 = fadd x86_fp80 %v4_111, %v7_116
  br label %dec_label_pc_127

dec_label_pc_11f:                                 ; preds = %bb313
  %v3_11f = add i32 %v2_a9, -80
  %v4_11f = inttoptr i32 %v3_11f to double*
  %v5_11f = load double, double* %v4_11f, align 4
  %v6_11f = fpext double %v5_11f to x86_fp80
  %v7_11f = fadd x86_fp80 %v7_108, %v6_11f
  %v7_122 = fmul x86_fp80 %v7_11f, %v2_df
  store x86_fp80 %v7_122, x86_fp80* %st6.global-to-local, align 4
  %v4_125 = fadd x86_fp80 %v7_fb, %v7_122
  br label %dec_label_pc_127

dec_label_pc_127:                                 ; preds = %dec_label_pc_11f, %dec_label_pc_111
  %storemerge31 = phi x86_fp80 [ %v4_119, %dec_label_pc_111 ], [ %v4_125, %dec_label_pc_11f ]
  store i3 %v6_e5, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_127 = fmul x86_fp80 %storemerge31, %storemerge31
  store x86_fp80 %v3_127, x86_fp80* %st7.global-to-local, align 4
  %v0_12c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_12c = call i16 @__asm_fnstsw(i32 %v0_12c)
  %v2_12c = sext i16 %v1_12c to i32
  %v3_12c = load i32, i32* %eax.global-to-local, align 8
  %v4_12c = and i32 %v3_12c, -65536
  %tmp333 = udiv i32 %v2_12c, 2
  %v12_12e = and i32 %tmp333, 32512
  %v2_12c.masked = and i32 %v2_12c, -65281
  %v13_12e = or i32 %v4_12c, %v2_12c.masked
  %v14_12e = or i32 %v13_12e, %v12_12e
  store i32 %v14_12e, i32* %eax.global-to-local, align 8
  %v15_12e323 = and i32 %v2_12c, 256
  %v16_12e = icmp ne i32 %v15_12e323, 0
  %v1_130 = icmp eq i1 %v16_12e, false
  %v0_139 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_130, label %dec_label_pc_139, label %dec_label_pc_132

dec_label_pc_132:                                 ; preds = %dec_label_pc_127
  %v1_134 = load i32, i32* %esi.global-to-local, align 4
  %v2_134 = add i32 %v1_134, -24
  %v3_134 = inttoptr i32 %v2_134 to double*
  %v4_134 = load double, double* %v3_134, align 4
  %v5_134 = fpext double %v4_134 to x86_fp80
  store x86_fp80 %v5_134, x86_fp80* %st7.global-to-local, align 4
  %v2_15d.pre = load i32, i32* %edi.global-to-local, align 4
  br label %dec_label_pc_14f

dec_label_pc_139:                                 ; preds = %dec_label_pc_127
  %v1_139 = sub i3 %v0_139, ptrtoint (i8* @global_var_1.1 to i3)
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v1_139, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_13d = load i32, i32* %fpsw.global-to-local, align 4
  %v1_13d = call i16 @__asm_fnstsw(i32 %v0_13d)
  %v2_13d = sext i16 %v1_13d to i32
  %v3_13d = load i32, i32* %eax.global-to-local, align 8
  %v4_13d = and i32 %v3_13d, -65536
  %tmp334 = udiv i32 %v2_13d, 2
  %v12_13f = and i32 %tmp334, 32512
  %v2_13d.masked = and i32 %v2_13d, -65281
  %v13_13f = or i32 %v4_13d, %v2_13d.masked
  %v14_13f = or i32 %v13_13f, %v12_13f
  store i32 %v14_13f, i32* %eax.global-to-local, align 8
  %v15_13f324 = and i32 %v2_13d, 256
  %v16_13f = icmp eq i32 %v15_13f324, 0
  %v0_14a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v16_13f, label %dec_label_pc_143, label %dec_label_pc_14a

dec_label_pc_143:                                 ; preds = %dec_label_pc_139
  %v2_14a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_143 = add i3 %v0_14a, ptrtoint (i8* @global_var_1.1 to i3)
  store i3 %v4_143, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_145 = load i32, i32* %edi.global-to-local, align 4
  %v3_145 = add i32 %v2_145, 72
  %v4_145 = inttoptr i32 %v3_145 to double*
  %v5_145 = load double, double* %v4_145, align 4
  %v6_145 = fpext double %v5_145 to x86_fp80
  %v7_145 = fdiv x86_fp80 %v6_145, %v2_14a
  store x86_fp80 %v7_145, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_14f

dec_label_pc_14a:                                 ; preds = %dec_label_pc_139
  %v1_14c = load i32, i32* %edi.global-to-local, align 4
  %v2_14c = add i32 %v1_14c, 72
  %v3_14c = inttoptr i32 %v2_14c to double*
  %v4_14c = load double, double* %v3_14c, align 4
  %v5_14c = fpext double %v4_14c to x86_fp80
  %v6_14c = add i3 %v0_14a, 1
  store i3 %v6_14c, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_14c, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_14f

dec_label_pc_14f:                                 ; preds = %dec_label_pc_14a, %dec_label_pc_143, %dec_label_pc_132
  %v2_167 = phi i32 [ %v1_14c, %dec_label_pc_14a ], [ %v2_145, %dec_label_pc_143 ], [ %v2_15d.pre, %dec_label_pc_132 ]
  %v3_152 = phi x86_fp80 [ %v5_14c, %dec_label_pc_14a ], [ %v7_145, %dec_label_pc_143 ], [ %v5_134, %dec_label_pc_132 ]
  %v0_14f = phi i3 [ %v6_14c, %dec_label_pc_14a ], [ %v4_143, %dec_label_pc_143 ], [ %v0_139, %dec_label_pc_132 ]
  %v1_14f = load i32, i32* @ecx, align 8
  %v2_14f = add i32 %v1_14f, 8
  %v3_14f = inttoptr i32 %v2_14f to double*
  %v4_14f = load double, double* %v3_14f, align 4
  %v5_14f = fpext double %v4_14f to x86_fp80
  %v4_152 = fmul x86_fp80 %v3_152, %v5_14f
  store x86_fp80 %v4_152, x86_fp80* %st6.global-to-local, align 4
  %v4_154 = fptrunc x86_fp80 %v4_152 to double
  store double %v4_154, double* %v3_14f, align 4
  %v2_157 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_157 = fmul x86_fp80 %v2_157, %v2_157
  %v4_159 = fmul x86_fp80 %v4_157, %v4_157
  %v4_15b = fmul x86_fp80 %v4_159, %v4_159
  store x86_fp80 %v4_15b, x86_fp80* %st7.global-to-local, align 4
  %v3_15d = add i32 %v2_167, -88
  %v4_15d = inttoptr i32 %v3_15d to double*
  %v5_15d = load double, double* %v4_15d, align 4
  %v6_15d = fpext double %v5_15d to x86_fp80
  %v7_15d = fadd x86_fp80 %v4_15b, %v6_15d
  store x86_fp80 %v7_15d, x86_fp80* %st7.global-to-local, align 4
  %v2_160 = load i32, i32* @ecx, align 8
  %v3_160 = fptrunc x86_fp80 %v7_15d to double
  %v4_160 = inttoptr i32 %v2_160 to double*
  store double %v3_160, double* %v4_160, align 4
  %v1_162 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_162 = add i32 %v2_167, -96
  %v4_162 = inttoptr i32 %v3_162 to double*
  %v5_162 = load double, double* %v4_162, align 4
  %v6_162 = fpext double %v5_162 to x86_fp80
  %v7_162 = fadd x86_fp80 %v1_162, %v6_162
  store x86_fp80 %v7_162, x86_fp80* %st7.global-to-local, align 4
  %v2_165 = load i32, i32* @edx, align 8
  %v3_165 = fptrunc x86_fp80 %v7_162 to double
  %v4_165 = inttoptr i32 %v2_165 to double*
  store double %v3_165, double* %v4_165, align 4
  %v1_167 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_167 = add i32 %v2_167, -104
  %v4_167 = inttoptr i32 %v3_167 to double*
  %v5_167 = load double, double* %v4_167, align 4
  %v6_167 = fpext double %v5_167 to x86_fp80
  %v7_167 = fadd x86_fp80 %v1_167, %v6_167
  store x86_fp80 %v7_167, x86_fp80* %st7.global-to-local, align 4
  %v2_16a = load i32, i32* %ebx.global-to-local, align 4
  %v3_16a = fptrunc x86_fp80 %v7_167 to double
  %v4_16a = inttoptr i32 %v2_16a to double*
  store double %v3_16a, double* %v4_16a, align 4
  %v5_16a = add i3 %v0_14f, add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 -3)
  store i3 %v5_16a, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_16a, i32* %eax.global-to-local, align 8
  store i32 %v0_b, i32* %ebx.global-to-local, align 4
  store i32 %v0_a, i32* %edi.global-to-local, align 4
  store i32 %v0_9, i32* %esi.global-to-local, align 4
  ret i32 %v2_16a
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

attributes #0 = { nounwind readnone speculatable }
