source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %ecx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %esp.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  store i32 0, i32* %esp.global-to-local, align 4
  %stack_var_-36 = alloca double, align 8
  %v0_0 = load i32, i32* %ecx.global-to-local, align 4
  %v15_1 = ptrtoint double* %stack_var_-36 to i32
  %v0_4 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_4 = load i32, i32* %esi.global-to-local, align 4
  %v2_4 = add i32 %v1_4, -104
  %v3_4 = inttoptr i32 %v2_4 to double*
  %v4_4 = load double, double* %v3_4, align 4
  %v5_4 = fpext double %v4_4 to x86_fp80
  store x86_fp80 %v5_4, x86_fp80* %st7.global-to-local, align 4
  %v2_7 = load i32, i32* @edi, align 8
  %v3_7 = add i32 %v2_7, -28
  %v4_7 = inttoptr i32 %v3_7 to float*
  %v5_7 = load float, float* %v4_7, align 4
  %v6_7 = fpext float %v5_7 to x86_fp80
  %v7_7 = fsub x86_fp80 %v5_4, %v6_7
  store x86_fp80 %v7_7, x86_fp80* %st7.global-to-local, align 4
  %v2_a = add i32 %v1_4, -112
  %v3_a = inttoptr i32 %v2_a to double*
  %v4_a = load double, double* %v3_a, align 4
  %v5_a = fpext double %v4_a to x86_fp80
  store x86_fp80 %v5_a, x86_fp80* %st6.global-to-local, align 4
  %v3_d = add i32 %v2_7, -24
  %v4_d = inttoptr i32 %v3_d to float*
  %v5_d = load float, float* %v4_d, align 4
  %v6_d = fpext float %v5_d to x86_fp80
  %v7_d = fsub x86_fp80 %v5_a, %v6_d
  store x86_fp80 %v7_d, x86_fp80* %st6.global-to-local, align 4
  %v2_10 = add i32 %v1_4, -120
  %v3_10 = inttoptr i32 %v2_10 to double*
  %v4_10 = load double, double* %v3_10, align 4
  %v5_10 = fpext double %v4_10 to x86_fp80
  store x86_fp80 %v5_10, x86_fp80* %st5.global-to-local, align 4
  %v3_13 = add i32 %v2_7, -20
  %v4_13 = inttoptr i32 %v3_13 to float*
  %v5_13 = load float, float* %v4_13, align 4
  %v6_13 = fpext float %v5_13 to x86_fp80
  %v7_13 = fsub x86_fp80 %v5_10, %v6_13
  store x86_fp80 %v7_13, x86_fp80* %st5.global-to-local, align 4
  %v2_16 = xor i3 %v0_4, -4
  %v3_18 = add i32 %v2_7, -68
  %v4_18 = inttoptr i32 %v3_18 to float*
  %v5_18 = load float, float* %v4_18, align 4
  %v6_18 = fpext float %v5_18 to x86_fp80
  %v7_18 = fmul x86_fp80 %v7_13, %v6_18
  %v3_1d = add i32 %v2_7, -72
  %v4_1d = inttoptr i32 %v3_1d to float*
  %v5_1d = load float, float* %v4_1d, align 4
  %v6_1d = fpext float %v5_1d to x86_fp80
  %v7_1d = fmul x86_fp80 %v7_d, %v6_1d
  %v4_20 = fadd x86_fp80 %v7_18, %v7_1d
  %v3_24 = add i32 %v2_7, -76
  %v4_24 = inttoptr i32 %v3_24 to float*
  %v5_24 = load float, float* %v4_24, align 4
  %v6_24 = fpext float %v5_24 to x86_fp80
  %v7_24 = fmul x86_fp80 %v7_7, %v6_24
  %v4_27 = fadd x86_fp80 %v7_24, %v4_20
  %v3_2b = add i32 %v2_7, -44
  %v4_2b = inttoptr i32 %v3_2b to float*
  %v5_2b = load float, float* %v4_2b, align 4
  %v6_2b = fpext float %v5_2b to x86_fp80
  %v7_2b = fmul x86_fp80 %v7_13, %v6_2b
  %v3_30 = add i32 %v2_7, -48
  %v4_30 = inttoptr i32 %v3_30 to float*
  %v5_30 = load float, float* %v4_30, align 4
  %v6_30 = fpext float %v5_30 to x86_fp80
  %v7_30 = fmul x86_fp80 %v7_d, %v6_30
  %v4_33 = fadd x86_fp80 %v7_2b, %v7_30
  %v3_37 = add i32 %v2_7, -52
  %v4_37 = inttoptr i32 %v3_37 to float*
  %v5_37 = load float, float* %v4_37, align 4
  %v6_37 = fpext float %v5_37 to x86_fp80
  %v7_37 = fmul x86_fp80 %v7_7, %v6_37
  %v4_3a = fadd x86_fp80 %v4_33, %v7_37
  %v3_3c = add i32 %v2_7, -32
  %v4_3c = inttoptr i32 %v3_3c to float*
  %v5_3c = load float, float* %v4_3c, align 4
  %v6_3c = fpext float %v5_3c to x86_fp80
  %v7_3c = fmul x86_fp80 %v4_3a, %v6_3c
  store x86_fp80 %v7_3c, x86_fp80* %st5.global-to-local, align 4
  %v3_41 = add i32 %v2_7, -56
  %v4_41 = inttoptr i32 %v3_41 to float*
  %v5_41 = load float, float* %v4_41, align 4
  %v6_41 = fpext float %v5_41 to x86_fp80
  %v7_41 = fmul x86_fp80 %v7_13, %v6_41
  store x86_fp80 %v7_41, x86_fp80* %st6.global-to-local, align 4
  %v3_46 = add i32 %v2_7, -60
  %v4_46 = inttoptr i32 %v3_46 to float*
  %v5_46 = load float, float* %v4_46, align 4
  %v6_46 = fpext float %v5_46 to x86_fp80
  %v7_46 = fmul x86_fp80 %v7_d, %v6_46
  %v4_49 = fadd x86_fp80 %v7_41, %v7_46
  store x86_fp80 %v4_49, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_27, x86_fp80* %st7.global-to-local, align 4
  %v3_4d = add i32 %v2_7, -64
  %v4_4d = inttoptr i32 %v3_4d to float*
  %v5_4d = load float, float* %v4_4d, align 4
  %v6_4d = fpext float %v5_4d to x86_fp80
  %v7_4d = fmul x86_fp80 %v7_7, %v6_4d
  %v4_50 = fadd x86_fp80 %v4_49, %v7_4d
  store x86_fp80 %v4_50, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v7_3c, x86_fp80* %st6.global-to-local, align 4
  %v3_54 = add i32 %v2_7, -36
  %v4_54 = inttoptr i32 %v3_54 to float*
  %v5_54 = load float, float* %v4_54, align 4
  %v6_54 = fpext float %v5_54 to x86_fp80
  %v7_54 = fmul x86_fp80 %v4_50, %v6_54
  store x86_fp80 %v7_3c, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v7_54, x86_fp80* %st6.global-to-local, align 4
  %v3_5b = fmul x86_fp80 %v4_27, %v4_27
  %v3_5f = fmul x86_fp80 %v7_54, %v7_54
  %v4_61 = fadd x86_fp80 %v3_5b, %v3_5f
  %v3_65 = fmul x86_fp80 %v7_3c, %v7_3c
  %v4_67 = fadd x86_fp80 %v3_65, %v4_61
  %v2_69 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_67)
  %v4_6d = fadd x86_fp80 %v2_69, 0xKBFFF8000000000000000
  store i3 %v2_16, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_83 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_83 = call i16 @__asm_fnstsw(i32 %v0_83)
  %v2_83 = sext i16 %v1_83 to i32
  %v3_83 = load i32, i32* %eax.global-to-local, align 4
  %v4_83 = and i32 %v3_83, -65536
  %tmp263 = udiv i32 %v2_83, 2
  %v12_85 = and i32 %tmp263, 32512
  %v2_83.masked = and i32 %v2_83, -65281
  %v13_85 = or i32 %v4_83, %v2_83.masked
  %v14_85 = or i32 %v13_85, %v12_85
  store i32 %v14_85, i32* %eax.global-to-local, align 4
  %v15_8521 = and i32 %v2_83, 256
  %v16_85 = icmp ne i32 %v15_8521, 0
  %v1_87 = icmp eq i1 %v16_85, false
  br i1 %v1_87, label %dec_label_pc_9b, label %dec_label_pc_89

dec_label_pc_89:                                  ; preds = %dec_label_pc_0
  %v2_71 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_6d)
  %v0_8b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_8b = load i32, i32* %esi.global-to-local, align 4
  %v3_8b = add i32 %v2_8b, -32
  %v4_8b = fptrunc x86_fp80 %v2_71 to double
  %v5_8b = inttoptr i32 %v3_8b to double*
  store double %v4_8b, double* %v5_8b, align 4
  %v4_90 = add i3 %v0_8b, 3
  store i3 %v4_90, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_92 = xor i3 %v0_8b, -4
  br label %dec_label_pc_136

dec_label_pc_9b:                                  ; preds = %dec_label_pc_0
  %v0_9b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_9f = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %tmp264 = fptrunc x86_fp80 %v1_9f to double
  store double %tmp264, double* %stack_var_-36, align 8
  %v8_9f = add i3 %v0_9b, 2
  %v1_a2 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_a2 = fptrunc x86_fp80 %v1_a2 to double
  %v1_a6 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_a6 = fptrunc x86_fp80 %v1_a6 to double
  %tmp265 = call double @llvm.fabs.f64(double %tmp264)
  %v2_ad = fpext double %tmp265 to x86_fp80
  store x86_fp80 %v2_ad, x86_fp80* %st7.global-to-local, align 4
  store i3 %v8_9f, i3* %fpu_stat_TOP.global-to-local, align 1
  %tmp266 = call double @llvm.fabs.f64(double %v4_a2)
  %v2_b3 = fpext double %tmp266 to x86_fp80
  store x86_fp80 %v2_b3, x86_fp80* %st6.global-to-local, align 4
  %v0_b7 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_b7 = call i16 @__asm_fnstsw(i32 %v0_b7)
  %v2_b7 = sext i16 %v1_b7 to i32
  %v3_b7 = load i32, i32* %eax.global-to-local, align 4
  %v4_b7 = and i32 %v3_b7, -65536
  %tmp267 = udiv i32 %v2_b7, 2
  %v12_b9 = and i32 %tmp267, 32512
  %v2_b7.masked = and i32 %v2_b7, -65281
  %v13_b9 = or i32 %v4_b7, %v2_b7.masked
  %v14_b9 = or i32 %v13_b9, %v12_b9
  store i32 %v14_b9, i32* %eax.global-to-local, align 4
  %tmp268 = call double @llvm.fabs.f64(double %v4_a6)
  %v2_c7 = fpext double %tmp268 to x86_fp80
  store x86_fp80 %v2_c7, x86_fp80* %st7.global-to-local, align 4
  %v0_cb = load i32, i32* %fpsw.global-to-local, align 4
  %v1_cb = call i16 @__asm_fnstsw(i32 %v0_cb)
  %storemerge8.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st7.global-to-local, align 4
  %v2_db = load i32, i32* @edi, align 8
  %v3_db = add i32 %v2_db, -96
  %v4_db = inttoptr i32 %v3_db to double*
  %v5_db = load double, double* %v4_db, align 4
  %v6_db = fpext double %v5_db to x86_fp80
  %v7_db = fmul x86_fp80 %v6_db, 0xK00000000000000000000
  store x86_fp80 %v7_db, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v5_e0 = load double, double* %v4_db, align 4
  %v6_e0 = fpext double %v5_e0 to x86_fp80
  %v7_e0 = fsub x86_fp80 0xK3FFF8000000000000000, %v6_e0
  %v7_e3 = fmul x86_fp80 %v7_e0, %v4_6d
  store x86_fp80 %v7_e3, x86_fp80* %st6.global-to-local, align 4
  %v4_ec = fadd x86_fp80 %v7_db, %v7_e3
  store x86_fp80 %v4_ec, x86_fp80* %st7.global-to-local, align 4
  %v6_ee = add i3 %storemerge8.in, 2
  store i32 %v15_1, i32* %eax.global-to-local, align 4
  store i32 %v15_1, i32* %ecx.global-to-local, align 4
  %v1_106 = add i32 %v2_db, -16
  %v2_106 = inttoptr i32 %v1_106 to i32*
  %v3_106 = load i32, i32* %v2_106, align 4
  %v1_109 = urem i32 %v3_106, 4
  store i32 %v1_109, i32* %ecx.global-to-local, align 4
  %v1_10c = load i32, i32* %esp.global-to-local, align 4
  %v3_10c = mul i32 %v1_109, 8
  %v4_10c = add i32 %v1_10c, %v3_10c
  %v5_10c = inttoptr i32 %v4_10c to double*
  %v6_10c = load double, double* %v5_10c, align 4
  %v7_10c = fpext double %v6_10c to x86_fp80
  %v8_10c = add i3 %storemerge8.in, 1
  store x86_fp80 %v7_10c, x86_fp80* %st7.global-to-local, align 4
  %v3_10f = add i32 %v2_db, -8
  %v4_10f = inttoptr i32 %v3_10f to double*
  %v5_10f = load double, double* %v4_10f, align 4
  %v6_10f = fpext double %v5_10f to x86_fp80
  %v7_10f = fsub x86_fp80 %v7_10c, %v6_10f
  store x86_fp80 %v7_10f, x86_fp80* %st7.global-to-local, align 4
  %v3_112 = add i32 %v2_db, -40
  %v4_112 = inttoptr i32 %v3_112 to float*
  %v5_112 = load float, float* %v4_112, align 4
  %v6_112 = fpext float %v5_112 to x86_fp80
  %v7_112 = fmul x86_fp80 %v7_10f, %v6_112
  %v7_115 = fsub x86_fp80 %v4_ec, %v7_112
  %v2_119 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_115)
  %v4_11b = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_11b = fpext double %v4_11b to x86_fp80
  %v6_11b = fsub x86_fp80 %v2_119, %v5_11b
  store x86_fp80 %v6_11b, x86_fp80* %st7.global-to-local, align 4
  %v2_11e = load i32, i32* %esi.global-to-local, align 4
  %v3_11e = add i32 %v2_11e, -32
  %v4_11e = fptrunc x86_fp80 %v6_11b to double
  %v5_11e = inttoptr i32 %v3_11e to double*
  store double %v4_11e, double* %v5_11e, align 4
  %v0_121 = load i32, i32* @edi, align 8
  %v1_121 = add i32 %v0_121, -80
  %v2_121 = inttoptr i32 %v1_121 to i32*
  %v3_121 = load i32, i32* %v2_121, align 4
  %v1_124 = urem i32 %v3_121, 4
  store i32 %v1_124, i32* %ecx.global-to-local, align 4
  %v3_127 = mul i32 %v1_124, 8
  %v4_127 = add i32 %v3_127, %v1_10c
  %v5_127 = inttoptr i32 %v4_127 to double*
  %v6_127 = load double, double* %v5_127, align 4
  %v7_127 = fpext double %v6_127 to x86_fp80
  store i3 %v8_10c, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_127, x86_fp80* %st7.global-to-local, align 4
  %v3_12a = add i32 %v0_121, -84
  %v4_12a = inttoptr i32 %v3_12a to float*
  %v5_12a = load float, float* %v4_12a, align 4
  %v6_12a = fpext float %v5_12a to x86_fp80
  %v7_12a = fadd x86_fp80 %v7_127, %v6_12a
  store x86_fp80 %v7_12a, x86_fp80* %st7.global-to-local, align 4
  %v3_12d = add i32 %v0_121, -88
  %v4_12d = inttoptr i32 %v3_12d to float*
  %v5_12d = load float, float* %v4_12d, align 4
  %v6_12d = fpext float %v5_12d to x86_fp80
  %v7_12d = fmul x86_fp80 %v7_12a, %v6_12d
  store x86_fp80 %v7_12d, x86_fp80* %st7.global-to-local, align 4
  %v3_130 = add i32 %v2_11e, 128
  %v4_130 = fptrunc x86_fp80 %v7_12d to double
  %v5_130 = inttoptr i32 %v3_130 to double*
  store double %v4_130, double* %v5_130, align 4
  br label %dec_label_pc_136

dec_label_pc_136:                                 ; preds = %dec_label_pc_9b, %dec_label_pc_89
  %v0_13a = phi i32 [ %v15_1, %dec_label_pc_9b ], [ %v14_85, %dec_label_pc_89 ]
  %storemerge = phi i3 [ %v6_ee, %dec_label_pc_9b ], [ %v4_92, %dec_label_pc_89 ]
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_0, i32* %ecx.global-to-local, align 4
  ret i32 %v0_13a
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
