source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp296 = call double @__decompiler_undefined_function_3()
  %stack_var_-90 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-90, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i32, i32* @edi, align 8
  %v1_4b = add i32 %v0_4b, -104
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v1_4e = urem i32 %v3_4b, 32
  %v2_4e = icmp eq i32 %v1_4e, 0
  %v1_54 = icmp eq i1 %v2_4e, false
  %spec.select = select i1 %v1_54, i32 %v1_4e, i32 1
  store i32 %spec.select, i32* %edx.global-to-local, align 4
  %v0_5b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_5b = load double, double* %stack_var_-90, align 8
  %v8_5b = fpext double %v3_5b to x86_fp80
  %v4_5e = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_5e = fpext double %v4_5e to x86_fp80
  %v6_5e = fmul x86_fp80 %v8_5b, %v5_5e
  %v6_60 = fadd x86_fp80 %v6_5e, %v5_5e
  %tmp303 = fptrunc x86_fp80 %v6_60 to double
  store double %tmp303, double* %stack_var_-90, align 8
  %v5_65 = fpext double %tmp296 to x86_fp80
  %v6_69 = fmul x86_fp80 %v5_65, %v5_5e
  %v6_6b = fadd x86_fp80 %v6_69, %v5_5e
  %v7_71 = fpext double %v6_45 to x86_fp80
  %v6_75 = fmul x86_fp80 %v7_71, %v5_5e
  %v6_77 = fadd x86_fp80 %v6_75, %v5_5e
  %v6_80 = fsub x86_fp80 %v6_60, %v5_5e
  %v2_82 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v6_80)
  %v6_84 = fsub x86_fp80 %v2_82, %v5_5e
  store x86_fp80 %v6_84, x86_fp80* %st7.global-to-local, align 4
  %v6_8e = fsub x86_fp80 %v6_6b, %v5_5e
  %v2_90 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v6_8e)
  %v6_92 = fsub x86_fp80 %v2_90, %v5_5e
  store x86_fp80 %v6_92, x86_fp80* %st6.global-to-local, align 4
  %v8_98 = add i3 %v0_5b, -3
  store i3 %v8_98, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ae = call i32 @__asm_wait()
  store i32 %v0_ae, i32* %eax.global-to-local, align 4
  %v0_af = load i32, i32* %fpsw.global-to-local, align 4
  %v1_af = call i16 @__asm_fnstsw(i32 %v0_af)
  %v2_af = sext i16 %v1_af to i32
  %v3_af = load i32, i32* %eax.global-to-local, align 4
  %v4_af = and i32 %v3_af, -65536
  %v3_b1 = and i32 %v2_af, 16640
  %v2_af.masked = and i32 %v2_af, -65281
  %v12_b1 = or i32 %v4_af, %v2_af.masked
  %v13_b1 = or i32 %v12_b1, %v3_b1
  store i32 %v13_b1, i32* %eax.global-to-local, align 4
  %storemerge16.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge16 = add i3 %storemerge16.in, 1
  store i3 %storemerge16, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_be = call i32 @__asm_wait()
  store i32 %v0_be, i32* %eax.global-to-local, align 4
  %v0_bf = load i32, i32* %fpsw.global-to-local, align 4
  %v1_bf = call i16 @__asm_fnstsw(i32 %v0_bf)
  %v2_bf = sext i16 %v1_bf to i32
  %v3_bf = load i32, i32* %eax.global-to-local, align 4
  %v4_bf = and i32 %v3_bf, -65536
  %v3_c1 = and i32 %v2_bf, 16640
  %v2_bf.masked = and i32 %v2_bf, -65281
  %v12_c1 = or i32 %v4_bf, %v2_bf.masked
  %v13_c1 = or i32 %v12_c1, %v3_c1
  store i32 %v13_c1, i32* %eax.global-to-local, align 4
  %storemerge14.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge14 = add i3 %storemerge14.in, 1
  store i3 %storemerge14, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_d0.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v1_d4.pre = load i32, i32* @edi, align 8
  br label %dec_label_pc_d0

dec_label_pc_d0:                                  ; preds = %dec_label_pc_1ae, %dec_label_pc_40
  %v1_d4 = phi i32 [ %v1_d4.pre, %dec_label_pc_40 ], [ %v1_21a, %dec_label_pc_1ae ]
  %v1_d0 = phi x86_fp80 [ %v1_d0.pre, %dec_label_pc_40 ], [ %v7_21d, %dec_label_pc_1ae ]
  %v0_d0 = phi i3 [ %storemerge14, %dec_label_pc_40 ], [ %storemerge, %dec_label_pc_1ae ]
  %stack_var_-42.0 = phi double [ 1.000000e+00, %dec_label_pc_40 ], [ %v4_221, %dec_label_pc_1ae ]
  %v2_d4 = add i32 %v1_d4, -72
  %v3_d4 = inttoptr i32 %v2_d4 to double*
  %v4_d4 = load double, double* %v3_d4, align 4
  %v5_d4 = fpext double %v4_d4 to x86_fp80
  store x86_fp80 %v5_d4, x86_fp80* %st7.global-to-local, align 4
  %v8_d7 = add i3 %v0_d0, -1
  store i3 %v8_d7, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_db = fmul x86_fp80 %v6_77, %v5_d4
  %v6_dd = fpext double %stack_var_-42.0 to x86_fp80
  %v7_dd = fmul x86_fp80 %v4_db, %v6_dd
  store x86_fp80 %v7_dd, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_e1

dec_label_pc_e1:                                  ; preds = %dec_label_pc_e1, %dec_label_pc_d0
  %v0_e1 = call i32 @__asm_fprem()
  store i32 %v0_e1, i32* %eax.global-to-local, align 4
  %v0_e3 = call i32 @__asm_wait()
  store i32 %v0_e3, i32* %eax.global-to-local, align 4
  %v0_e4 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_e4 = call i16 @__asm_fnstsw(i32 %v0_e4)
  %v2_e4 = sext i16 %v1_e4 to i32
  %v3_e4 = load i32, i32* %eax.global-to-local, align 4
  %v4_e4 = and i32 %v3_e4, -65536
  %v5_e4 = or i32 %v4_e4, %v2_e4
  store i32 %v5_e4, i32* %eax.global-to-local, align 4
  %v0_e6 = call i32 @__asm_wait()
  store i32 %v0_e6, i32* %eax.global-to-local, align 4
  %v5_e7311 = and i32 %v0_e6, 1024
  %v6_e7 = icmp eq i32 %v5_e7311, 0
  br i1 %v6_e7, label %dec_label_pc_ea, label %dec_label_pc_e1

dec_label_pc_ea:                                  ; preds = %dec_label_pc_e1
  %v0_ea = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_ea = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_ec = load i32, i32* @edi, align 8
  %v3_ec = add i32 %v2_ec, -148
  %v4_ec = inttoptr i32 %v3_ec to double*
  %v5_ec = load double, double* %v4_ec, align 4
  %v6_ec = fpext double %v5_ec to x86_fp80
  %v7_ec = fsub x86_fp80 %v1_ea, %v6_ec
  %v2_f2 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_ec)
  %v4_f6 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_f6 = fpext double %v4_f6 to x86_fp80
  %v6_f6 = fsub x86_fp80 %v5_f6, %v2_f2
  store x86_fp80 %v6_f6, x86_fp80* %st7.global-to-local, align 4
  %tmp304 = bitcast double %v4_f6 to i64
  %tmp305 = trunc i64 %tmp304 to i32
  %v3_f8 = add i32 %tmp305, -100
  %v4_f8 = inttoptr i32 %v3_f8 to double*
  %v5_f8 = load double, double* %v4_f8, align 4
  %v6_f8 = fpext double %v5_f8 to x86_fp80
  %v7_f8 = fadd x86_fp80 %v6_f6, %v6_f8
  store x86_fp80 %v7_f8, x86_fp80* %st7.global-to-local, align 4
  %v2_fb = add i32 %tmp305, -72
  %v3_fb = inttoptr i32 %v2_fb to double*
  %v4_fb = load double, double* %v3_fb, align 4
  %v5_fb = fpext double %v4_fb to x86_fp80
  store x86_fp80 %v5_fb, x86_fp80* %st6.global-to-local, align 4
  %v6_fe = add i3 %v0_ea, -1
  store i3 %v6_fe, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_108

dec_label_pc_108:                                 ; preds = %dec_label_pc_108, %dec_label_pc_ea
  %v0_108 = call i32 @__asm_fprem()
  store i32 %v0_108, i32* %eax.global-to-local, align 4
  %v0_10a = call i32 @__asm_wait()
  store i32 %v0_10a, i32* %eax.global-to-local, align 4
  %v0_10b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_10b = call i16 @__asm_fnstsw(i32 %v0_10b)
  %v2_10b = sext i16 %v1_10b to i32
  %v3_10b = load i32, i32* %eax.global-to-local, align 4
  %v4_10b = and i32 %v3_10b, -65536
  %v5_10b = or i32 %v4_10b, %v2_10b
  store i32 %v5_10b, i32* %eax.global-to-local, align 4
  %v0_10d = call i32 @__asm_wait()
  store i32 %v0_10d, i32* %eax.global-to-local, align 4
  %v5_10e312 = and i32 %v0_10d, 1024
  %v6_10e = icmp eq i32 %v5_10e312, 0
  br i1 %v6_10e, label %dec_label_pc_111, label %dec_label_pc_108

dec_label_pc_111:                                 ; preds = %dec_label_pc_108
  %v0_111 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_111 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_113 = load i32, i32* @edi, align 8
  %v3_113 = add i32 %v2_113, -148
  %v4_113 = inttoptr i32 %v3_113 to double*
  %v5_113 = load double, double* %v4_113, align 4
  %v6_113 = fpext double %v5_113 to x86_fp80
  %v7_113 = fsub x86_fp80 %v1_111, %v6_113
  %v2_119 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_113)
  %v4_11d = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_11d = fpext double %v4_11d to x86_fp80
  %v6_11d = fsub x86_fp80 %v5_11d, %v2_119
  store x86_fp80 %v6_11d, x86_fp80* %st7.global-to-local, align 4
  %tmp306 = bitcast double %v4_11d to i64
  %tmp307 = trunc i64 %tmp306 to i32
  %v3_11f = add i32 %tmp307, -92
  %v4_11f = inttoptr i32 %v3_11f to double*
  %v5_11f = load double, double* %v4_11f, align 4
  %v6_11f = fpext double %v5_11f to x86_fp80
  %v7_11f = fadd x86_fp80 %v6_11d, %v6_11f
  store x86_fp80 %v7_11f, x86_fp80* %st7.global-to-local, align 4
  %v2_122 = add i32 %tmp307, -72
  %v3_122 = inttoptr i32 %v2_122 to double*
  %v4_122 = load double, double* %v3_122, align 4
  %v5_122 = fpext double %v4_122 to x86_fp80
  store x86_fp80 %v5_122, x86_fp80* %st6.global-to-local, align 4
  %v9_125 = add i3 %v0_111, -1
  store i3 %v9_125, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_12e

dec_label_pc_12e:                                 ; preds = %dec_label_pc_12e, %dec_label_pc_111
  %v0_12e = call i32 @__asm_fprem()
  store i32 %v0_12e, i32* %eax.global-to-local, align 4
  %v0_130 = call i32 @__asm_wait()
  store i32 %v0_130, i32* %eax.global-to-local, align 4
  %v0_131 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_131 = call i16 @__asm_fnstsw(i32 %v0_131)
  %v2_131 = sext i16 %v1_131 to i32
  %v3_131 = load i32, i32* %eax.global-to-local, align 4
  %v4_131 = and i32 %v3_131, -65536
  %v5_131 = or i32 %v4_131, %v2_131
  store i32 %v5_131, i32* %eax.global-to-local, align 4
  %v0_133 = call i32 @__asm_wait()
  store i32 %v0_133, i32* %eax.global-to-local, align 4
  %v5_134313 = and i32 %v0_133, 1024
  %v6_134 = icmp eq i32 %v5_134313, 0
  br i1 %v6_134, label %dec_label_pc_137, label %dec_label_pc_12e

dec_label_pc_137:                                 ; preds = %dec_label_pc_12e
  %v0_137 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_137 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_139 = load i32, i32* @edi, align 8
  %v3_139 = add i32 %v2_139, -148
  %v4_139 = inttoptr i32 %v3_139 to double*
  %v5_139 = load double, double* %v4_139, align 4
  %v6_139 = fpext double %v5_139 to x86_fp80
  %v7_139 = fsub x86_fp80 %v1_137, %v6_139
  %v2_13f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_139)
  %v4_143 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_143 = fpext double %v4_143 to x86_fp80
  %v6_143 = fsub x86_fp80 %v5_143, %v2_13f
  store x86_fp80 %v6_143, x86_fp80* %st7.global-to-local, align 4
  %tmp308 = bitcast double %v4_143 to i64
  %tmp309 = trunc i64 %tmp308 to i32
  %v3_145 = add i32 %tmp309, -84
  %v4_145 = inttoptr i32 %v3_145 to double*
  %v5_145 = load double, double* %v4_145, align 4
  %v6_145 = fpext double %v5_145 to x86_fp80
  %v7_145 = fadd x86_fp80 %v6_143, %v6_145
  store x86_fp80 %v7_145, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_145, x86_fp80* %st6.global-to-local, align 4
  %v3_14a = add i32 %tmp309, -132
  %v4_14a = inttoptr i32 %v3_14a to float*
  %v5_14a = load float, float* %v4_14a, align 4
  %v6_14a = fpext float %v5_14a to x86_fp80
  %v7_14a = fmul x86_fp80 %v7_145, %v6_14a
  store x86_fp80 %v7_14a, x86_fp80* %st6.global-to-local, align 4
  %v3_152 = add i32 %tmp309, -136
  %v4_152 = inttoptr i32 %v3_152 to float*
  %v5_152 = load float, float* %v4_152, align 4
  %v6_152 = fpext float %v5_152 to x86_fp80
  %v7_152 = fmul x86_fp80 %v7_145, %v6_152
  %v4_158 = fadd x86_fp80 %v7_14a, %v7_152
  store x86_fp80 %v4_158, x86_fp80* %st6.global-to-local, align 4
  %v3_15c = add i32 %tmp309, -140
  %v4_15c = inttoptr i32 %v3_15c to float*
  %v5_15c = load float, float* %v4_15c, align 4
  %v6_15c = fpext float %v5_15c to x86_fp80
  %v7_15c = fmul x86_fp80 %v7_145, %v6_15c
  %v4_162 = fadd x86_fp80 %v4_158, %v7_15c
  store x86_fp80 %v4_162, x86_fp80* %st6.global-to-local, align 4
  %v3_166 = add i32 %tmp309, -108
  %v4_166 = inttoptr i32 %v3_166 to float*
  %v5_166 = load float, float* %v4_166, align 4
  %v6_166 = fpext float %v5_166 to x86_fp80
  %v7_166 = fmul x86_fp80 %v7_145, %v6_166
  %v3_16b = add i32 %tmp309, -112
  %v4_16b = inttoptr i32 %v3_16b to float*
  %v5_16b = load float, float* %v4_16b, align 4
  %v6_16b = fpext float %v5_16b to x86_fp80
  %v7_16b = fmul x86_fp80 %v7_145, %v6_16b
  %v4_16e = fadd x86_fp80 %v7_166, %v7_16b
  %v3_172 = add i32 %tmp309, -116
  %v4_172 = inttoptr i32 %v3_172 to float*
  %v5_172 = load float, float* %v4_172, align 4
  %v6_172 = fpext float %v5_172 to x86_fp80
  %v7_172 = fmul x86_fp80 %v7_145, %v6_172
  %v4_175 = fadd x86_fp80 %v4_16e, %v7_172
  store x86_fp80 %v4_175, x86_fp80* %st7.global-to-local, align 4
  %v3_179 = add i32 %tmp309, -120
  %v4_179 = inttoptr i32 %v3_179 to float*
  %v5_179 = load float, float* %v4_179, align 4
  %v6_179 = fpext float %v5_179 to x86_fp80
  %v7_179 = fmul x86_fp80 %v7_145, %v6_179
  store x86_fp80 %v7_179, x86_fp80* %st7.global-to-local, align 4
  %v3_17e = add i32 %tmp309, -124
  %v4_17e = inttoptr i32 %v3_17e to float*
  %v5_17e = load float, float* %v4_17e, align 4
  %v6_17e = fpext float %v5_17e to x86_fp80
  %v7_17e = fmul x86_fp80 %v7_179, %v6_17e
  %v4_181 = fadd x86_fp80 %v7_17e, %v7_17e
  store x86_fp80 %v4_181, x86_fp80* %st7.global-to-local, align 4
  %v3_185 = add i32 %tmp309, -128
  %v4_185 = inttoptr i32 %v3_185 to float*
  %v5_185 = load float, float* %v4_185, align 4
  %v6_185 = fpext float %v5_185 to x86_fp80
  %v7_185 = fmul x86_fp80 %v4_181, %v6_185
  %v4_188 = fadd x86_fp80 %v7_185, %v7_185
  %v6_18a = add i3 %v0_137, 2
  store x86_fp80 %v4_188, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_18a, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_188, x86_fp80* %st6.global-to-local, align 4
  %v0_1a0 = call i32 @__asm_wait()
  store i32 %v0_1a0, i32* %eax.global-to-local, align 4
  %v0_1a1 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1a1 = call i16 @__asm_fnstsw(i32 %v0_1a1)
  %v2_1a1 = sext i16 %v1_1a1 to i32
  %v3_1a1 = load i32, i32* %eax.global-to-local, align 4
  %v4_1a1 = and i32 %v3_1a1, -65536
  %v1_1a3 = udiv i32 %v2_1a1, 256
  %v2_1a3 = trunc i32 %v1_1a3 to i8
  %v3_1a3 = and i8 %v2_1a3, 65
  %v4_1a3 = icmp eq i8 %v3_1a3, 0
  %v9_1a3 = zext i8 %v3_1a3 to i32
  %v11_1a3 = mul i32 %v9_1a3, 256
  %v2_1a1.masked = and i32 %v2_1a1, -65281
  %v12_1a3 = or i32 %v4_1a1, %v2_1a1.masked
  %v13_1a3 = or i32 %v12_1a3, %v11_1a3
  store i32 %v13_1a3, i32* %eax.global-to-local, align 4
  %v1_1a6 = icmp eq i1 %v4_1a3, false
  %v0_1ac = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_1a6, label %dec_label_pc_1ae, label %dec_label_pc_1a8

dec_label_pc_1a8:                                 ; preds = %dec_label_pc_137
  %v1_1ac = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v1_1ac, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1ae

dec_label_pc_1ae:                                 ; preds = %dec_label_pc_137, %dec_label_pc_1a8
  store x86_fp80 %v4_188, x86_fp80* %st6.global-to-local, align 4
  %v6_1b2 = add i3 %v0_1ac, -1
  store i3 %v6_1b2, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1b8 = call i32 @__asm_wait()
  store i32 %v0_1b8, i32* %eax.global-to-local, align 4
  %v0_1b9 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1b9 = call i16 @__asm_fnstsw(i32 %v0_1b9)
  %v2_1b9 = sext i16 %v1_1b9 to i32
  %v3_1b9 = load i32, i32* %eax.global-to-local, align 4
  %v4_1b9 = and i32 %v3_1b9, -65536
  %v3_1bb = and i32 %v2_1b9, 16640
  %v2_1b9.masked = and i32 %v2_1b9, -65281
  %v12_1bb = or i32 %v4_1b9, %v2_1b9.masked
  %v13_1bb = or i32 %v12_1bb, %v3_1bb
  store i32 %v13_1bb, i32* %eax.global-to-local, align 4
  %storemerge10.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_188, x86_fp80* %st7.global-to-local, align 4
  %v6_1ca = add i3 %storemerge10.in, -1
  store i3 %v6_1ca, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_188, x86_fp80* %st6.global-to-local, align 4
  %v0_1d0 = call i32 @__asm_wait()
  store i32 %v0_1d0, i32* %eax.global-to-local, align 4
  %v0_1d1 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1d1 = call i16 @__asm_fnstsw(i32 %v0_1d1)
  %v2_1d1 = sext i16 %v1_1d1 to i32
  %v3_1d1 = load i32, i32* %eax.global-to-local, align 4
  %v4_1d1 = and i32 %v3_1d1, -65536
  %v3_1d3 = and i32 %v2_1d1, 16640
  %v2_1d1.masked = and i32 %v2_1d1, -65281
  %v12_1d3 = or i32 %v4_1d1, %v2_1d1.masked
  %v13_1d3 = or i32 %v12_1d3, %v3_1d3
  store i32 %v13_1d3, i32* %eax.global-to-local, align 4
  %storemerge8.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge8 = add i3 %storemerge8.in, 1
  store i3 %storemerge8, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1e0 = call i32 @__asm_wait()
  store i32 %v0_1e0, i32* %eax.global-to-local, align 4
  %v0_1e1 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1e1 = call i16 @__asm_fnstsw(i32 %v0_1e1)
  %v2_1e1 = sext i16 %v1_1e1 to i32
  %v3_1e1 = load i32, i32* %eax.global-to-local, align 4
  %v4_1e1 = and i32 %v3_1e1, -65536
  %v3_1e3 = and i32 %v2_1e1, 16640
  %v2_1e1.masked = and i32 %v2_1e1, -65281
  %v12_1e3 = or i32 %v4_1e1, %v2_1e1.masked
  %v13_1e3 = or i32 %v12_1e3, %v3_1e3
  store i32 %v13_1e3, i32* %eax.global-to-local, align 4
  %storemerge6.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge6 = add i3 %storemerge6.in, 1
  store i3 %storemerge6, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1f0 = call i32 @__asm_wait()
  store i32 %v0_1f0, i32* %eax.global-to-local, align 4
  %v0_1f1 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1f1 = call i16 @__asm_fnstsw(i32 %v0_1f1)
  %v2_1f1 = sext i16 %v1_1f1 to i32
  %v3_1f1 = load i32, i32* %eax.global-to-local, align 4
  %v4_1f1 = and i32 %v3_1f1, -65536
  %v3_1f3 = and i32 %v2_1f1, 16640
  %v2_1f1.masked = and i32 %v2_1f1, -65281
  %v12_1f3 = or i32 %v4_1f1, %v2_1f1.masked
  %v13_1f3 = or i32 %v12_1f3, %v3_1f3
  store i32 %v13_1f3, i32* %eax.global-to-local, align 4
  %v1_1f8 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v7_1fe = fdiv x86_fp80 %v1_1f8, %v6_dd
  store x86_fp80 %v7_1fe, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v1_d0, x86_fp80* %st6.global-to-local, align 4
  %v0_20c = call i32 @__asm_wait()
  store i32 %v0_20c, i32* %eax.global-to-local, align 4
  %v0_20d = load i32, i32* %fpsw.global-to-local, align 4
  %v1_20d = call i16 @__asm_fnstsw(i32 %v0_20d)
  %v2_20d = sext i16 %v1_20d to i32
  %v3_20d = load i32, i32* %eax.global-to-local, align 4
  %v4_20d = and i32 %v3_20d, -65536
  %v3_20f = and i32 %v2_20d, 16640
  %v2_20d.masked = and i32 %v2_20d, -65281
  %v12_20f = or i32 %v4_20d, %v2_20d.masked
  %v13_20f = or i32 %v12_20f, %v3_20f
  store i32 %v13_20f, i32* %eax.global-to-local, align 4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  %v1_21a = load i32, i32* @edi, align 8
  %v2_21a = add i32 %v1_21a, -16
  %v3_21a = inttoptr i32 %v2_21a to double*
  %v4_21a = load double, double* %v3_21a, align 4
  %v5_21a = fpext double %v4_21a to x86_fp80
  %v7_21d = fmul x86_fp80 %v6_dd, %v5_21a
  store x86_fp80 %v7_21d, x86_fp80* %st7.global-to-local, align 4
  %v4_221 = fptrunc x86_fp80 %v7_21d to double
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_225 = load i32, i32* %edx.global-to-local, align 4
  %v1_225 = add i32 %v0_225, -1
  store i32 %v1_225, i32* %edx.global-to-local, align 4
  %v8_226 = icmp sgt i32 %v0_225, 1
  br i1 %v8_226, label %dec_label_pc_d0, label %dec_label_pc_22c

dec_label_pc_22c:                                 ; preds = %dec_label_pc_1ae
  %v1_22c = add i32 %v1_21a, -76
  %v2_22c = inttoptr i32 %v1_22c to i32*
  %v3_22c = load i32, i32* %v2_22c, align 4
  %v10_22c = icmp eq i32 %v3_22c, 0
  %v1_230 = icmp eq i1 %v10_22c, false
  br i1 %v1_230, label %dec_label_pc_235, label %dec_label_pc_232

dec_label_pc_232:                                 ; preds = %dec_label_pc_22c
  %v3_232 = add i32 %v1_21a, -32
  %v4_232 = inttoptr i32 %v3_232 to double*
  %v5_232 = load double, double* %v4_232, align 4
  %v6_232 = fpext double %v5_232 to x86_fp80
  %v7_232 = fdiv x86_fp80 %v7_21d, %v6_232
  store x86_fp80 %v7_232, x86_fp80* %st7.global-to-local, align 4
  %.pre = fptrunc x86_fp80 %v7_232 to double
  br label %dec_label_pc_235

dec_label_pc_235:                                 ; preds = %dec_label_pc_232, %dec_label_pc_22c
  %v4_235.pre-phi = phi double [ %.pre, %dec_label_pc_232 ], [ %v4_221, %dec_label_pc_22c ]
  %v2_235 = load i32, i32* %esi.global-to-local, align 4
  %v3_235 = add i32 %v2_235, -32
  %v5_235 = inttoptr i32 %v3_235 to double*
  store double %v4_235.pre-phi, double* %v5_235, align 4
  %v6_235 = add i3 %storemerge.in, 2
  store i3 %v6_235, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v13_20f
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare i32 @__asm_fprem() local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
