source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %ebx.global-to-local, align 4
  %v0_4 = load i32, i32* %esi.global-to-local, align 4
  %v0_5 = load i32, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  %v0_d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_d = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_d = fpext double %v3_d to x86_fp80
  store x86_fp80 %v4_d, x86_fp80* %st7.global-to-local, align 4
  %v3_f = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_f = fpext double %v3_f to x86_fp80
  store x86_fp80 %v4_f, x86_fp80* %st6.global-to-local, align 4
  %v3_11 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_11 = fpext double %v3_11 to x86_fp80
  store x86_fp80 %v4_11, x86_fp80* %st5.global-to-local, align 4
  %v3_15 = add i32 %v3_a, -68
  %v4_15 = inttoptr i32 %v3_15 to float*
  %v5_15 = load float, float* %v4_15, align 4
  %v6_15 = fpext float %v5_15 to x86_fp80
  %v7_15 = fmul x86_fp80 %v4_11, %v6_15
  %v3_1a = add i32 %v3_a, -72
  %v4_1a = inttoptr i32 %v3_1a to float*
  %v5_1a = load float, float* %v4_1a, align 4
  %v6_1a = fpext float %v5_1a to x86_fp80
  %v7_1a = fmul x86_fp80 %v4_f, %v6_1a
  %v4_1d = fadd x86_fp80 %v7_15, %v7_1a
  %v3_21 = add i32 %v3_a, -76
  %v4_21 = inttoptr i32 %v3_21 to float*
  %v5_21 = load float, float* %v4_21, align 4
  %v6_21 = fpext float %v5_21 to x86_fp80
  %v7_21 = fmul x86_fp80 %v4_d, %v6_21
  %v4_24 = fadd x86_fp80 %v7_21, %v4_1d
  %v3_28 = add i32 %v3_a, -44
  %v4_28 = inttoptr i32 %v3_28 to float*
  %v5_28 = load float, float* %v4_28, align 4
  %v6_28 = fpext float %v5_28 to x86_fp80
  %v7_28 = fmul x86_fp80 %v4_11, %v6_28
  %v3_2d = add i32 %v3_a, -48
  %v4_2d = inttoptr i32 %v3_2d to float*
  %v5_2d = load float, float* %v4_2d, align 4
  %v6_2d = fpext float %v5_2d to x86_fp80
  %v7_2d = fmul x86_fp80 %v4_f, %v6_2d
  %v4_30 = fadd x86_fp80 %v7_28, %v7_2d
  %v3_34 = add i32 %v3_a, -52
  %v4_34 = inttoptr i32 %v3_34 to float*
  %v5_34 = load float, float* %v4_34, align 4
  %v6_34 = fpext float %v5_34 to x86_fp80
  %v7_34 = fmul x86_fp80 %v4_d, %v6_34
  %v4_37 = fadd x86_fp80 %v4_30, %v7_34
  store x86_fp80 %v4_37, x86_fp80* %st5.global-to-local, align 4
  %v3_3b = add i32 %v3_a, -56
  %v4_3b = inttoptr i32 %v3_3b to float*
  %v5_3b = load float, float* %v4_3b, align 4
  %v6_3b = fpext float %v5_3b to x86_fp80
  %v7_3b = fmul x86_fp80 %v4_11, %v6_3b
  store x86_fp80 %v7_3b, x86_fp80* %st6.global-to-local, align 4
  %v3_40 = add i32 %v3_a, -60
  %v4_40 = inttoptr i32 %v3_40 to float*
  %v5_40 = load float, float* %v4_40, align 4
  %v6_40 = fpext float %v5_40 to x86_fp80
  %v7_40 = fmul x86_fp80 %v4_f, %v6_40
  %v4_43 = fadd x86_fp80 %v7_3b, %v7_40
  store x86_fp80 %v4_43, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_24, x86_fp80* %st7.global-to-local, align 4
  %v3_47 = add i32 %v3_a, -64
  %v4_47 = inttoptr i32 %v3_47 to float*
  %v5_47 = load float, float* %v4_47, align 4
  %v6_47 = fpext float %v5_47 to x86_fp80
  %v7_47 = fmul x86_fp80 %v4_d, %v6_47
  %v4_4a = fadd x86_fp80 %v4_43, %v7_47
  store x86_fp80 %v4_4a, x86_fp80* %st6.global-to-local, align 4
  %v7_4a = add i3 %v0_d, -3
  store i3 %v7_4a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_4e = load i32, i32* %fpsw.global-to-local, align 4
  %v1_4e = call i16 @__asm_fnstsw(i32 %v0_4e)
  %v2_4e = sext i16 %v1_4e to i32
  %v3_4e = load i32, i32* @eax, align 8
  %v4_4e = and i32 %v3_4e, -65536
  %tmp247 = udiv i32 %v2_4e, 2
  %v12_50 = and i32 %tmp247, 32512
  %v2_4e.masked = and i32 %v2_4e, -65281
  %v13_50 = or i32 %v4_4e, %v2_4e.masked
  %v14_50 = or i32 %v13_50, %v12_50
  store i32 %v14_50, i32* @eax, align 8
  %v15_5013 = and i32 %v2_4e, 256
  %v16_50 = icmp ne i32 %v15_5013, 0
  %v1_52 = icmp eq i1 %v16_50, false
  %v1_56.pre = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  br i1 %v1_52, label %dec_label_pc_56, label %dec_label_pc_54

dec_label_pc_54:                                  ; preds = %dec_label_pc_0
  %v3_54 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_54, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v1_56.pre, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_56

dec_label_pc_56:                                  ; preds = %dec_label_pc_0, %dec_label_pc_54
  %v1_56 = phi x86_fp80 [ %v3_54, %dec_label_pc_54 ], [ %v1_56.pre, %dec_label_pc_0 ]
  %v2_56 = fsub x86_fp80 0xK80000000000000000000, %v1_56
  store x86_fp80 %v2_56, x86_fp80* %st5.global-to-local, align 4
  %v0_5a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5a = call i16 @__asm_fnstsw(i32 %v0_5a)
  %v2_5a = sext i16 %v1_5a to i32
  %v3_5a = load i32, i32* @eax, align 8
  %v4_5a = and i32 %v3_5a, -65536
  %tmp248 = udiv i32 %v2_5a, 2
  %v12_5c = and i32 %tmp248, 32512
  %v2_5a.masked = and i32 %v2_5a, -65281
  %v13_5c = or i32 %v4_5a, %v2_5a.masked
  %v14_5c = or i32 %v13_5c, %v12_5c
  store i32 %v14_5c, i32* @eax, align 8
  %v1_62 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_62 = fsub x86_fp80 0xK80000000000000000000, %v1_62
  store x86_fp80 %v2_62, x86_fp80* %st7.global-to-local, align 4
  %v0_66 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_66 = call i16 @__asm_fnstsw(i32 %v0_66)
  %v2_66 = sext i16 %v1_66 to i32
  %v3_66 = load i32, i32* @eax, align 8
  %v4_66 = and i32 %v3_66, -65536
  %tmp249 = udiv i32 %v2_66, 2
  %v12_68 = and i32 %tmp249, 32512
  %v2_66.masked = and i32 %v2_66, -65281
  %v13_68 = or i32 %v4_66, %v2_66.masked
  %v14_68 = or i32 %v13_68, %v12_68
  store i32 %v14_68, i32* @eax, align 8
  %v1_6e = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_6e = fsub x86_fp80 0xK80000000000000000000, %v1_6e
  store x86_fp80 %v2_6e, x86_fp80* %st7.global-to-local, align 4
  %v0_72 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v2_6e, x86_fp80* %st6.global-to-local, align 4
  %v2_74 = load i32, i32* %esi.global-to-local, align 4
  %v3_74 = add i32 %v2_74, -104
  %v4_74 = inttoptr i32 %v3_74 to float*
  %v5_74 = load float, float* %v4_74, align 4
  %v6_74 = fpext float %v5_74 to x86_fp80
  %v7_74 = fmul x86_fp80 %v2_6e, %v6_74
  store x86_fp80 %v7_74, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_6e, x86_fp80* %st5.global-to-local, align 4
  %v3_79 = add i32 %v2_74, -108
  %v4_79 = inttoptr i32 %v3_79 to float*
  %v5_79 = load float, float* %v4_79, align 4
  %v6_79 = fpext float %v5_79 to x86_fp80
  %v7_79 = fmul x86_fp80 %v2_6e, %v6_79
  %v4_7c = fadd x86_fp80 %v7_74, %v7_79
  store x86_fp80 %v4_7c, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_6e, x86_fp80* %st5.global-to-local, align 4
  %v3_80 = add i32 %v2_74, -112
  %v4_80 = inttoptr i32 %v3_80 to float*
  %v5_80 = load float, float* %v4_80, align 4
  %v6_80 = fpext float %v5_80 to x86_fp80
  %v7_80 = fmul x86_fp80 %v2_6e, %v6_80
  %v4_83 = fadd x86_fp80 %v4_7c, %v7_80
  store x86_fp80 %v4_83, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_6e, x86_fp80* %st5.global-to-local, align 4
  %v3_87 = add i32 %v2_74, -80
  %v4_87 = inttoptr i32 %v3_87 to float*
  %v5_87 = load float, float* %v4_87, align 4
  %v6_87 = fpext float %v5_87 to x86_fp80
  %v7_87 = fmul x86_fp80 %v2_6e, %v6_87
  store x86_fp80 %v7_87, x86_fp80* %st5.global-to-local, align 4
  %v3_8c = add i32 %v2_74, -84
  %v4_8c = inttoptr i32 %v3_8c to float*
  %v5_8c = load float, float* %v4_8c, align 4
  %v6_8c = fpext float %v5_8c to x86_fp80
  %v7_8c = fmul x86_fp80 %v2_6e, %v6_8c
  %v4_8f = fadd x86_fp80 %v7_87, %v7_8c
  store x86_fp80 %v4_8f, x86_fp80* %st5.global-to-local, align 4
  %v3_93 = add i32 %v2_74, -88
  %v4_93 = inttoptr i32 %v3_93 to float*
  %v5_93 = load float, float* %v4_93, align 4
  %v6_93 = fpext float %v5_93 to x86_fp80
  %v7_93 = fmul x86_fp80 %v2_6e, %v6_93
  %v4_96 = fadd x86_fp80 %v4_8f, %v7_93
  store x86_fp80 %v2_6e, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v4_96, x86_fp80* %st7.global-to-local, align 4
  %v3_9a = add i32 %v2_74, -92
  %v4_9a = inttoptr i32 %v3_9a to float*
  %v5_9a = load float, float* %v4_9a, align 4
  %v6_9a = fpext float %v5_9a to x86_fp80
  %v7_9a = fmul x86_fp80 %v4_96, %v6_9a
  store x86_fp80 %v7_9a, x86_fp80* %st7.global-to-local, align 4
  %v3_9f = add i32 %v2_74, -96
  %v4_9f = inttoptr i32 %v3_9f to float*
  %v5_9f = load float, float* %v4_9f, align 4
  %v6_9f = fpext float %v5_9f to x86_fp80
  %v7_9f = fmul x86_fp80 %v7_9a, %v6_9f
  %v4_a2 = fadd x86_fp80 %v7_9f, %v7_9f
  store x86_fp80 %v4_a2, x86_fp80* %st7.global-to-local, align 4
  %v3_a6 = add i32 %v2_74, -100
  %v4_a6 = inttoptr i32 %v3_a6 to float*
  %v5_a6 = load float, float* %v4_a6, align 4
  %v6_a6 = fpext float %v5_a6 to x86_fp80
  %v7_a6 = fmul x86_fp80 %v4_a2, %v6_a6
  %v4_a9 = fadd x86_fp80 %v7_a6, %v7_a6
  store x86_fp80 %v4_a9, x86_fp80* %st7.global-to-local, align 4
  %v2_ab = add i32 %v2_74, -16
  %v3_ab = inttoptr i32 %v2_ab to double*
  %v4_ab = load double, double* %v3_ab, align 4
  %v5_ab = fpext double %v4_ab to x86_fp80
  store x86_fp80 %v5_ab, x86_fp80* %st7.global-to-local, align 4
  %v1_ae = load i32, i32* @ecx, align 8
  %v2_ae = add i32 %v1_ae, 8
  %v3_ae = inttoptr i32 %v2_ae to double*
  %v4_ae = load double, double* %v3_ae, align 4
  %v5_ae = fpext double %v4_ae to x86_fp80
  %v4_b1 = fmul x86_fp80 %v5_ab, %v5_ae
  %v4_b3 = fptrunc x86_fp80 %v4_b1 to double
  store double %v4_b3, double* %v3_ae, align 4
  %v2_b6 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_b6 = fmul x86_fp80 %v2_b6, %v2_b6
  %v4_b8 = fmul x86_fp80 %v4_b6, %v4_b6
  %v4_ba = fmul x86_fp80 %v4_b8, %v4_b8
  %v4_be = fadd x86_fp80 %v4_ba, 0xKBFFF8000000000000000
  store x86_fp80 %v4_be, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_be, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_be, x86_fp80* %st5.global-to-local, align 4
  %v3_c4 = add i32 %v2_74, -24
  %v4_c4 = inttoptr i32 %v3_c4 to double*
  %v5_c4 = load double, double* %v4_c4, align 4
  %v6_c4 = fpext double %v5_c4 to x86_fp80
  %v7_c4 = fmul x86_fp80 %v4_be, %v6_c4
  store x86_fp80 %v7_c4, x86_fp80* %st5.global-to-local, align 4
  %v4_c7 = fsub x86_fp80 %v4_be, %v7_c4
  store x86_fp80 %v4_c7, x86_fp80* %st7.global-to-local, align 4
  %v3_c9 = add i32 %v2_74, -32
  %v4_c9 = inttoptr i32 %v3_c9 to double*
  %v5_c9 = load double, double* %v4_c9, align 4
  %v6_c9 = fpext double %v5_c9 to x86_fp80
  %v7_c9 = fmul x86_fp80 %v4_be, %v6_c9
  store x86_fp80 %v7_c9, x86_fp80* %st6.global-to-local, align 4
  %v4_cc = fsub x86_fp80 %v4_c7, %v7_c9
  store x86_fp80 %v4_cc, x86_fp80* %st7.global-to-local, align 4
  %v3_ce = add i32 %v2_74, -40
  %v4_ce = inttoptr i32 %v3_ce to double*
  %v5_ce = load double, double* %v4_ce, align 4
  %v6_ce = fpext double %v5_ce to x86_fp80
  %v7_ce = fmul x86_fp80 %v4_cc, %v6_ce
  %v4_d1 = fsub x86_fp80 %v7_ce, %v7_ce
  store x86_fp80 %v4_d1, x86_fp80* %st7.global-to-local, align 4
  %v2_d3 = load i32, i32* @edx, align 8
  %v3_d3 = fptrunc x86_fp80 %v4_d1 to double
  %v4_d3 = inttoptr i32 %v2_d3 to double*
  store double %v3_d3, double* %v4_d3, align 4
  %v1_d5 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_d5 = load i32, i32* %ebx.global-to-local, align 4
  %v3_d5 = fptrunc x86_fp80 %v1_d5 to double
  %v4_d5 = inttoptr i32 %v2_d5 to double*
  store double %v3_d5, double* %v4_d5, align 4
  %v1_d7 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_d7 = load i32, i32* @ecx, align 8
  %v3_d7 = fptrunc x86_fp80 %v1_d7 to double
  %v4_d7 = inttoptr i32 %v2_d7 to double*
  store double %v3_d7, double* %v4_d7, align 4
  %v5_d7 = add i3 %v0_72, 3
  store i3 %v5_d7, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_d5, i32* @eax, align 8
  store i32 %v0_4, i32* %esi.global-to-local, align 4
  store i32 %v0_3, i32* %ebx.global-to-local, align 4
  ret i32 %v2_d5
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr
