source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %edi.global-to-local, align 4
  %v0_9 = load i32, i32* %eax.global-to-local, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %esi.global-to-local, align 4
  %v1_e = add i32 %arg1, 128
  store i32 %v1_e, i32* %edi.global-to-local, align 4
  %v1_14 = add i32 %arg1, 208
  %v2_14 = inttoptr i32 %v1_14 to i32*
  %v3_14 = load i32, i32* %v2_14, align 4
  %v10_14 = icmp eq i32 %v3_14, 0
  %v11_14 = icmp slt i32 %v3_14, 0
  %v3_18 = icmp eq i1 %v11_14, false
  %v4_18 = icmp eq i1 %v10_14, false
  %v5_18 = icmp eq i1 %v3_18, %v4_18
  br i1 %v5_18, label %dec_label_pc_0.dec_label_pc_23_crit_edge, label %dec_label_pc_1a

dec_label_pc_0.dec_label_pc_23_crit_edge:         ; preds = %dec_label_pc_0
  %v0_23.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %.pre = add i32 %arg1, 200
  %.pre46 = inttoptr i32 %.pre to double*
  %v4_23.pre = load double, double* %.pre46, align 4
  %.pre299 = fpext double %v4_23.pre to x86_fp80
  br label %dec_label_pc_23

dec_label_pc_1a:                                  ; preds = %dec_label_pc_0
  %v4_1a = add i32 %v3_14, 1
  store i32 %v4_1a, i32* %v2_14, align 4
  %v0_1d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_1d = load i32, i32* %esi.global-to-local, align 4
  %v2_1d = add i32 %v1_1d, -16
  %v3_1d = inttoptr i32 %v2_1d to double*
  %v4_1d = load double, double* %v3_1d, align 4
  %v5_1d = fpext double %v4_1d to x86_fp80
  store x86_fp80 %v5_1d, x86_fp80* %st7.global-to-local, align 4
  %v2_20 = load i32, i32* %edi.global-to-local, align 4
  %v3_20 = add i32 %v2_20, 72
  %v5_20 = inttoptr i32 %v3_20 to double*
  store double %v4_1d, double* %v5_20, align 4
  br label %dec_label_pc_23

dec_label_pc_23:                                  ; preds = %dec_label_pc_0.dec_label_pc_23_crit_edge, %dec_label_pc_1a
  %v5_23.pre-phi = phi x86_fp80 [ %.pre299, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_1d, %dec_label_pc_1a ]
  %v3_23.pre-phi = phi double* [ %.pre46, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_20, %dec_label_pc_1a ]
  %v1_36 = phi i32 [ %v3_b, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v1_1d, %dec_label_pc_1a ]
  %v0_23 = phi i3 [ %v0_23.pre, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v0_1d, %dec_label_pc_1a ]
  store x86_fp80 %v5_23.pre-phi, x86_fp80* %st7.global-to-local, align 4
  %v2_2a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v5_23.pre-phi)
  %v4_2c = fadd x86_fp80 %v2_2a, 0xKBFFF8000000000000000
  %v3_2e = add i32 %v1_36, -48
  %v4_2e = inttoptr i32 %v3_2e to double*
  %v5_2e = load double, double* %v4_2e, align 4
  %v6_2e = fpext double %v5_2e to x86_fp80
  %v7_2e = fmul x86_fp80 %v4_2c, %v6_2e
  %v4_31 = fadd x86_fp80 %v7_2e, %v5_23.pre-phi
  store x86_fp80 %v4_31, x86_fp80* %st7.global-to-local, align 4
  %v4_33 = fptrunc x86_fp80 %v4_31 to double
  store double %v4_33, double* %v3_23.pre-phi, align 4
  %v2_36 = add i32 %v1_36, -40
  %v3_36 = inttoptr i32 %v2_36 to double*
  %v4_36 = load double, double* %v3_36, align 4
  %v5_36 = fpext double %v4_36 to x86_fp80
  %v4_3d = fadd x86_fp80 %v5_36, %v5_36
  store x86_fp80 %v4_3d, x86_fp80* %st7.global-to-local, align 4
  %v5_41 = xor i3 %v0_23, -4
  store i3 %v5_41, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_45 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_45 = call i16 @__asm_fnstsw(i32 %v0_45)
  %v2_45 = sext i16 %v1_45 to i32
  %v3_45 = load i32, i32* %eax.global-to-local, align 8
  %v4_45 = and i32 %v3_45, -65536
  %tmp300 = udiv i32 %v2_45, 2
  %v12_47 = and i32 %tmp300, 32512
  %v2_45.masked = and i32 %v2_45, -65281
  %v13_47 = or i32 %v4_45, %v2_45.masked
  %v14_47 = or i32 %v13_47, %v12_47
  store i32 %v14_47, i32* %eax.global-to-local, align 8
  %v15_47290 = and i32 %v2_45, 256
  %v16_47 = icmp eq i32 %v15_47290, 0
  %v2_51 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_47, label %dec_label_pc_4b, label %dec_label_pc_51

dec_label_pc_4b:                                  ; preds = %dec_label_pc_23
  %v2_4b = fsub x86_fp80 0xK80000000000000000000, %v2_51
  %v4_4d = fsub x86_fp80 %v2_4b, %v2_51
  store x86_fp80 %v4_4d, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_5d

dec_label_pc_51:                                  ; preds = %dec_label_pc_23
  %v0_53 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_53 = call i16 @__asm_fnstsw(i32 %v0_53)
  %v2_53 = sext i16 %v1_53 to i32
  %v3_53 = load i32, i32* %eax.global-to-local, align 8
  %v4_53 = and i32 %v3_53, -65536
  %tmp301 = udiv i32 %v2_53, 2
  %v12_55 = and i32 %tmp301, 32512
  %v2_53.masked = and i32 %v2_53, -65281
  %v13_55 = or i32 %v4_53, %v2_53.masked
  %v14_55 = or i32 %v13_55, %v12_55
  store i32 %v14_55, i32* %eax.global-to-local, align 8
  %v15_55291 = and i32 %v2_53, 256
  %v16_55 = icmp ne i32 %v15_55291, 0
  %v1_57 = icmp eq i1 %v16_55, false
  br i1 %v1_57, label %dec_label_pc_5d, label %dec_label_pc_59

dec_label_pc_59:                                  ; preds = %dec_label_pc_51
  %v1_59 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_5b = fsub x86_fp80 %v1_59, %v1_59
  store x86_fp80 %v4_5b, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_5d

dec_label_pc_5d:                                  ; preds = %dec_label_pc_59, %dec_label_pc_51, %dec_label_pc_4b
  %v0_5d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_5d = add i3 %v0_5d, -1
  store i3 %v5_5d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_61 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_61 = call i16 @__asm_fnstsw(i32 %v0_61)
  %v2_61 = sext i16 %v1_61 to i32
  %v3_61 = load i32, i32* %eax.global-to-local, align 8
  %v4_61 = and i32 %v3_61, -65536
  %tmp302 = udiv i32 %v2_61, 2
  %v12_63 = and i32 %tmp302, 32512
  %v2_61.masked = and i32 %v2_61, -65281
  %v13_63 = or i32 %v4_61, %v2_61.masked
  %v14_63 = or i32 %v13_63, %v12_63
  store i32 %v14_63, i32* %eax.global-to-local, align 8
  %v15_63292 = and i32 %v2_61, 256
  %v16_63 = icmp eq i32 %v15_63292, 0
  %v2_6d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_63, label %dec_label_pc_67, label %dec_label_pc_6d

dec_label_pc_67:                                  ; preds = %dec_label_pc_5d
  %v2_67 = fsub x86_fp80 0xK80000000000000000000, %v2_6d
  %v4_69 = fsub x86_fp80 %v2_67, %v2_6d
  store x86_fp80 %v4_69, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_79

dec_label_pc_6d:                                  ; preds = %dec_label_pc_5d
  %v0_6f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_6f = call i16 @__asm_fnstsw(i32 %v0_6f)
  %v2_6f = sext i16 %v1_6f to i32
  %v3_6f = load i32, i32* %eax.global-to-local, align 8
  %v4_6f = and i32 %v3_6f, -65536
  %tmp303 = udiv i32 %v2_6f, 2
  %v12_71 = and i32 %tmp303, 32512
  %v2_6f.masked = and i32 %v2_6f, -65281
  %v13_71 = or i32 %v4_6f, %v2_6f.masked
  %v14_71 = or i32 %v13_71, %v12_71
  store i32 %v14_71, i32* %eax.global-to-local, align 8
  %v15_71293 = and i32 %v2_6f, 256
  %v16_71 = icmp ne i32 %v15_71293, 0
  %v1_73 = icmp eq i1 %v16_71, false
  br i1 %v1_73, label %dec_label_pc_79, label %dec_label_pc_75

dec_label_pc_75:                                  ; preds = %dec_label_pc_6d
  %v1_75 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_77 = fsub x86_fp80 %v1_75, %v1_75
  store x86_fp80 %v4_77, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_79

dec_label_pc_79:                                  ; preds = %dec_label_pc_75, %dec_label_pc_6d, %dec_label_pc_67
  %v0_79 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_79 = add i3 %v0_79, -1
  store i3 %v5_79, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_7d = load i32, i32* %fpsw.global-to-local, align 4
  %v1_7d = call i16 @__asm_fnstsw(i32 %v0_7d)
  %v2_7d = sext i16 %v1_7d to i32
  %v3_7d = load i32, i32* %eax.global-to-local, align 8
  %v4_7d = and i32 %v3_7d, -65536
  %tmp304 = udiv i32 %v2_7d, 2
  %v12_7f = and i32 %tmp304, 32512
  %v2_7d.masked = and i32 %v2_7d, -65281
  %v13_7f = or i32 %v4_7d, %v2_7d.masked
  %v14_7f = or i32 %v13_7f, %v12_7f
  store i32 %v14_7f, i32* %eax.global-to-local, align 8
  %v15_7f294 = and i32 %v2_7d, 256
  %v16_7f = icmp eq i32 %v15_7f294, 0
  %v2_89 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_7f, label %dec_label_pc_83, label %dec_label_pc_89

dec_label_pc_83:                                  ; preds = %dec_label_pc_79
  %v2_83 = fsub x86_fp80 0xK80000000000000000000, %v2_89
  %v4_85 = fsub x86_fp80 %v2_83, %v2_89
  store x86_fp80 %v4_85, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_95

dec_label_pc_89:                                  ; preds = %dec_label_pc_79
  %v0_8b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_8b = call i16 @__asm_fnstsw(i32 %v0_8b)
  %v2_8b = sext i16 %v1_8b to i32
  %v3_8b = load i32, i32* %eax.global-to-local, align 8
  %v4_8b = and i32 %v3_8b, -65536
  %tmp305 = udiv i32 %v2_8b, 2
  %v12_8d = and i32 %tmp305, 32512
  %v2_8b.masked = and i32 %v2_8b, -65281
  %v13_8d = or i32 %v4_8b, %v2_8b.masked
  %v14_8d = or i32 %v13_8d, %v12_8d
  store i32 %v14_8d, i32* %eax.global-to-local, align 8
  %v15_8d295 = and i32 %v2_8b, 256
  %v16_8d = icmp ne i32 %v15_8d295, 0
  %v1_8f = icmp eq i1 %v16_8d, false
  %v2_95.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_8f, label %dec_label_pc_95, label %dec_label_pc_91

dec_label_pc_91:                                  ; preds = %dec_label_pc_89
  %v4_93 = fsub x86_fp80 %v2_95.pre, %v2_95.pre
  store x86_fp80 %v4_93, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_95

dec_label_pc_95:                                  ; preds = %dec_label_pc_89, %dec_label_pc_91, %dec_label_pc_83
  %v2_95 = phi x86_fp80 [ %v4_93, %dec_label_pc_91 ], [ %v4_85, %dec_label_pc_83 ], [ %v2_95.pre, %dec_label_pc_89 ]
  %v4_a3 = fmul x86_fp80 %v2_95, %v2_95
  %v4_a9 = fadd x86_fp80 %v4_a3, %v4_a3
  %v4_ad = fmul x86_fp80 %v4_a9, %v4_a9
  %v4_af = fadd x86_fp80 %v4_ad, %v4_ad
  store x86_fp80 %v4_af, x86_fp80* %st7.global-to-local, align 4
  %v1_b1 = load i32, i32* %esi.global-to-local, align 4
  %v2_b1 = add i32 %v1_b1, -56
  %v3_b1 = inttoptr i32 %v2_b1 to double*
  %v4_b1 = load double, double* %v3_b1, align 4
  %v5_b1 = fpext double %v4_b1 to x86_fp80
  store x86_fp80 0xK3FFEB17217F7D1CF7800, x86_fp80* %st7.global-to-local, align 4
  %v0_ba = call i32 @__asm_fyl2x()
  store i32 %v0_ba, i32* %eax.global-to-local, align 8
  %v3_bc = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_be = fmul x86_fp80 %v3_bc, %v5_b1
  %v4_c2 = fmul x86_fp80 %v4_be, 0xK3FFFB8AA3B295C17F000
  %v2_c6 = call x86_fp80 @llvm.round.f80(x86_fp80 %v4_c2)
  %v4_c8 = fsub x86_fp80 %v4_c2, %v2_c6
  store x86_fp80 %v2_c6, x86_fp80* %st7.global-to-local, align 4
  %v0_cc = call i32 @__asm_f2xm1()
  store i32 %v0_cc, i32* %eax.global-to-local, align 8
  %v4_d0 = fadd x86_fp80 %v4_c8, 0xK3FFF8000000000000000
  %v0_d2 = call i32 @__asm_fscale()
  store i32 %v0_d2, i32* %eax.global-to-local, align 8
  %v0_d4 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_d0, x86_fp80* %st7.global-to-local, align 4
  %v5_d4 = add i3 %v0_d4, 1
  store i3 %v5_d4, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_d9 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_d9 = call i16 @__asm_fnstsw(i32 %v0_d9)
  %v2_d9 = sext i16 %v1_d9 to i32
  %v3_d9 = load i32, i32* %eax.global-to-local, align 8
  %v4_d9 = and i32 %v3_d9, -65536
  %tmp306 = udiv i32 %v2_d9, 2
  %v12_db = and i32 %tmp306, 32512
  %v2_d9.masked = and i32 %v2_d9, -65281
  %v13_db = or i32 %v4_d9, %v2_d9.masked
  %v14_db = or i32 %v13_db, %v12_db
  store i32 %v14_db, i32* %eax.global-to-local, align 8
  %v15_db296 = and i32 %v2_d9, 256
  %v16_db = icmp ne i32 %v15_db296, 0
  %v1_dd = icmp eq i1 %v16_db, false
  %v0_e6 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_dd, label %dec_label_pc_e6, label %dec_label_pc_df

dec_label_pc_df:                                  ; preds = %dec_label_pc_95
  %v1_e1 = load i32, i32* %esi.global-to-local, align 4
  %v2_e1 = add i32 %v1_e1, -24
  %v3_e1 = inttoptr i32 %v2_e1 to double*
  %v4_e1 = load double, double* %v3_e1, align 4
  %v5_e1 = fpext double %v4_e1 to x86_fp80
  store x86_fp80 %v5_e1, x86_fp80* %st7.global-to-local, align 4
  %v2_10a.pre = load i32, i32* %edi.global-to-local, align 4
  br label %dec_label_pc_fc

dec_label_pc_e6:                                  ; preds = %dec_label_pc_95
  %v1_e6 = add i3 %v0_e6, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v1_e6, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ea = load i32, i32* %fpsw.global-to-local, align 4
  %v1_ea = call i16 @__asm_fnstsw(i32 %v0_ea)
  %v2_ea = sext i16 %v1_ea to i32
  %v3_ea = load i32, i32* %eax.global-to-local, align 8
  %v4_ea = and i32 %v3_ea, -65536
  %tmp307 = udiv i32 %v2_ea, 2
  %v12_ec = and i32 %tmp307, 32512
  %v2_ea.masked = and i32 %v2_ea, -65281
  %v13_ec = or i32 %v4_ea, %v2_ea.masked
  %v14_ec = or i32 %v13_ec, %v12_ec
  store i32 %v14_ec, i32* %eax.global-to-local, align 8
  %v15_ec297 = and i32 %v2_ea, 256
  %v16_ec = icmp eq i32 %v15_ec297, 0
  %v0_f7 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_f0 = add i3 %v0_f7, 1
  br i1 %v16_ec, label %dec_label_pc_f0, label %dec_label_pc_f7

dec_label_pc_f0:                                  ; preds = %dec_label_pc_e6
  %v2_f7 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_f0, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_f2 = load i32, i32* %edi.global-to-local, align 4
  %v3_f2 = add i32 %v2_f2, 72
  %v4_f2 = inttoptr i32 %v3_f2 to double*
  %v5_f2 = load double, double* %v4_f2, align 4
  %v6_f2 = fpext double %v5_f2 to x86_fp80
  %v7_f2 = fdiv x86_fp80 %v6_f2, %v2_f7
  store x86_fp80 %v7_f2, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_fc

dec_label_pc_f7:                                  ; preds = %dec_label_pc_e6
  %v1_f9 = load i32, i32* %edi.global-to-local, align 4
  %v2_f9 = add i32 %v1_f9, 72
  %v3_f9 = inttoptr i32 %v2_f9 to double*
  %v4_f9 = load double, double* %v3_f9, align 4
  %v5_f9 = fpext double %v4_f9 to x86_fp80
  store i3 %v4_f0, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_f9, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_fc

dec_label_pc_fc:                                  ; preds = %dec_label_pc_f7, %dec_label_pc_f0, %dec_label_pc_df
  %v2_114 = phi i32 [ %v1_f9, %dec_label_pc_f7 ], [ %v2_f2, %dec_label_pc_f0 ], [ %v2_10a.pre, %dec_label_pc_df ]
  %v3_ff = phi x86_fp80 [ %v5_f9, %dec_label_pc_f7 ], [ %v7_f2, %dec_label_pc_f0 ], [ %v5_e1, %dec_label_pc_df ]
  %v0_fc = phi i3 [ %v4_f0, %dec_label_pc_f7 ], [ %v4_f0, %dec_label_pc_f0 ], [ %v0_e6, %dec_label_pc_df ]
  %v1_fc = load i32, i32* @ecx, align 8
  %v2_fc = add i32 %v1_fc, 8
  %v3_fc = inttoptr i32 %v2_fc to double*
  %v4_fc = load double, double* %v3_fc, align 4
  %v5_fc = fpext double %v4_fc to x86_fp80
  %v4_ff = fmul x86_fp80 %v3_ff, %v5_fc
  %v4_101 = fptrunc x86_fp80 %v4_ff to double
  store double %v4_101, double* %v3_fc, align 4
  %v2_104 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_104 = fmul x86_fp80 %v2_104, %v2_104
  %v4_106 = fmul x86_fp80 %v4_104, %v4_104
  %v4_108 = fmul x86_fp80 %v4_106, %v4_106
  store x86_fp80 %v4_108, x86_fp80* %st7.global-to-local, align 4
  %v3_10a = add i32 %v2_114, -88
  %v4_10a = inttoptr i32 %v3_10a to double*
  %v5_10a = load double, double* %v4_10a, align 4
  %v6_10a = fpext double %v5_10a to x86_fp80
  %v7_10a = fadd x86_fp80 %v4_108, %v6_10a
  store x86_fp80 %v7_10a, x86_fp80* %st7.global-to-local, align 4
  %v2_10d = load i32, i32* @ecx, align 8
  %v3_10d = fptrunc x86_fp80 %v7_10a to double
  %v4_10d = inttoptr i32 %v2_10d to double*
  store double %v3_10d, double* %v4_10d, align 4
  %v1_10f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_10f = add i32 %v2_114, -96
  %v4_10f = inttoptr i32 %v3_10f to double*
  %v5_10f = load double, double* %v4_10f, align 4
  %v6_10f = fpext double %v5_10f to x86_fp80
  %v7_10f = fadd x86_fp80 %v1_10f, %v6_10f
  store x86_fp80 %v7_10f, x86_fp80* %st7.global-to-local, align 4
  %v2_112 = load i32, i32* @edx, align 8
  %v3_112 = fptrunc x86_fp80 %v7_10f to double
  %v4_112 = inttoptr i32 %v2_112 to double*
  store double %v3_112, double* %v4_112, align 4
  %v1_114 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_114 = add i32 %v2_114, -104
  %v4_114 = inttoptr i32 %v3_114 to double*
  %v5_114 = load double, double* %v4_114, align 4
  %v6_114 = fpext double %v5_114 to x86_fp80
  %v7_114 = fadd x86_fp80 %v1_114, %v6_114
  store x86_fp80 %v7_114, x86_fp80* %st7.global-to-local, align 4
  %v2_117 = load i32, i32* %ebx.global-to-local, align 4
  %v3_117 = fptrunc x86_fp80 %v7_114 to double
  %v4_117 = inttoptr i32 %v2_117 to double*
  store double %v3_117, double* %v4_117, align 4
  %v5_117 = xor i3 %v0_fc, -4
  store i3 %v5_117, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_117, i32* %eax.global-to-local, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v2_117
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare i32 @__asm_fyl2x() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

declare i32 @__asm_f2xm1() local_unnamed_addr

declare i32 @__asm_fscale() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
