source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp277 = call double @__decompiler_undefined_function_3()
  %stack_var_-28 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-28, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i32, i32* @edi, align 8
  %v1_4b = add i32 %v0_4b, -80
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v10_4b = icmp eq i32 %v3_4b, 0
  %v0_5f.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_6b.pre = load double, double* %stack_var_-28, align 8
  br i1 %v10_4b, label %dec_label_pc_40.dec_label_pc_5f_crit_edge, label %dec_label_pc_51

dec_label_pc_40.dec_label_pc_5f_crit_edge:        ; preds = %dec_label_pc_40
  %.pre = fpext double %v6_45 to x86_fp80
  br label %dec_label_pc_5f

dec_label_pc_51:                                  ; preds = %dec_label_pc_40
  %v8_51 = fpext double %v3_6b.pre to x86_fp80
  store x86_fp80 %v8_51, x86_fp80* %st7.global-to-local, align 4
  store double %v6_45, double* %stack_var_-28, align 8
  br label %dec_label_pc_5f

dec_label_pc_5f:                                  ; preds = %dec_label_pc_40.dec_label_pc_5f_crit_edge, %dec_label_pc_51
  %stack_var_-12.0 = phi double [ %v6_45, %dec_label_pc_40.dec_label_pc_5f_crit_edge ], [ %v3_6b.pre, %dec_label_pc_51 ]
  %v8_6b.pre-phi.in = phi double [ %v3_6b.pre, %dec_label_pc_40.dec_label_pc_5f_crit_edge ], [ %v6_45, %dec_label_pc_51 ]
  %v7_5f.pre-phi = phi x86_fp80 [ %.pre, %dec_label_pc_40.dec_label_pc_5f_crit_edge ], [ %v8_51, %dec_label_pc_51 ]
  %v8_6b.pre-phi = fpext double %v8_6b.pre-phi.in to x86_fp80
  %v8_5f.pre-phi = add i3 %v0_5f.pre, -1
  %v6_63 = fpext double %tmp277 to x86_fp80
  %v7_63 = fmul x86_fp80 %v7_5f.pre-phi, %v6_63
  %v7_67 = fmul x86_fp80 %v7_63, %v6_63
  %v3_6e = fmul x86_fp80 %v8_6b.pre-phi, %v8_6b.pre-phi
  %v4_70 = fsub x86_fp80 %v3_6e, %v7_67
  store x86_fp80 %v4_70, x86_fp80* %st7.global-to-local, align 4
  %v3_72 = add i32 %v0_4b, -72
  %v4_72 = inttoptr i32 %v3_72 to double*
  %v5_72 = load double, double* %v4_72, align 4
  %v6_72 = fpext double %v5_72 to x86_fp80
  %v7_72 = fadd x86_fp80 %v4_70, %v6_72
  %v2_75 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_72)
  store x86_fp80 %v2_75, x86_fp80* %st7.global-to-local, align 4
  %v5_77 = load double, double* %v4_72, align 4
  %v6_77 = fpext double %v5_77 to x86_fp80
  %v7_77 = fsub x86_fp80 %v2_75, %v6_77
  %v4_7a = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_7a = fpext double %v4_7a to x86_fp80
  %v6_7a = fmul x86_fp80 %v7_77, %v5_7a
  store x86_fp80 %v6_7a, x86_fp80* %st7.global-to-local, align 4
  store i3 %v8_5f.pre-phi, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_80 = call i32 @__asm_wait()
  %v0_81 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_81 = call i16 @__asm_fnstsw(i32 %v0_81)
  %tmp293 = and i16 %v1_81, 256
  %v16_83 = icmp ne i16 %tmp293, 0
  %v1_85 = icmp eq i1 %v16_83, false
  br i1 %v1_85, label %dec_label_pc_8b, label %dec_label_pc_87

dec_label_pc_87:                                  ; preds = %dec_label_pc_5f
  %v1_87 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_87 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v1_87)
  %v2_89 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_87)
  store x86_fp80 %v2_89, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_8b

dec_label_pc_8b:                                  ; preds = %dec_label_pc_87, %dec_label_pc_5f
  %v0_8b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_93 = add i3 %v0_8b, -2
  store i3 %v6_93, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_9e = call i32 @__asm_wait()
  %v0_9f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_9f = call i16 @__asm_fnstsw(i32 %v0_9f)
  %tmp285 = call double @llvm.fabs.f64(double %stack_var_-12.0)
  %v2_af = fpext double %tmp285 to x86_fp80
  store x86_fp80 %v2_af, x86_fp80* %st7.global-to-local, align 4
  %v2_b1 = load i32, i32* @edi, align 8
  %v3_b1 = add i32 %v2_b1, -16
  %v4_b1 = inttoptr i32 %v3_b1 to double*
  %v5_b1 = load double, double* %v4_b1, align 4
  %v6_b1 = fpext double %v5_b1 to x86_fp80
  %v7_b1 = fsub x86_fp80 %v2_af, %v6_b1
  store x86_fp80 %v7_b1, x86_fp80* %st7.global-to-local, align 4
  %v0_b6 = call i32 @__asm_wait()
  %v0_b7 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_b7 = call i16 @__asm_fnstsw(i32 %v0_b7)
  %storemerge12.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge12 = add i3 %storemerge12.in, 1
  store i3 %storemerge12, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_c5 = call i32 @__asm_wait()
  %v1_c6 = call i16 @__asm_fnstsw(i32 %v0_b7)
  %v2_c6 = sext i16 %v1_c6 to i32
  %v4_c6 = and i32 %v0_c5, -65536
  %tmp287 = udiv i32 %v2_c6, 2
  %v12_c8 = and i32 %tmp287, 32512
  %v2_c6.masked = and i32 %v2_c6, -65281
  %v13_c8 = or i32 %v4_c6, %v2_c6.masked
  %v14_c8 = or i32 %v13_c8, %v12_c8
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_d2 = load i32, i32* @edi, align 8
  %v1_d2 = add i32 %v0_d2, -76
  %v2_d2 = inttoptr i32 %v1_d2 to i32*
  %v3_d2 = load i32, i32* %v2_d2, align 4
  %v10_d2 = icmp eq i32 %v3_d2, 0
  %v1_d6 = icmp eq i1 %v10_d2, false
  %v1_db.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_d6, label %dec_label_pc_db, label %dec_label_pc_d8

dec_label_pc_d8:                                  ; preds = %dec_label_pc_8b
  %v3_d8 = add i32 %v0_d2, -32
  %v4_d8 = inttoptr i32 %v3_d8 to double*
  %v5_d8 = load double, double* %v4_d8, align 4
  %v6_d8 = fpext double %v5_d8 to x86_fp80
  %v7_d8 = fdiv x86_fp80 %v1_db.pre, %v6_d8
  store x86_fp80 %v7_d8, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_db

dec_label_pc_db:                                  ; preds = %dec_label_pc_8b, %dec_label_pc_d8
  %v1_db = phi x86_fp80 [ %v7_d8, %dec_label_pc_d8 ], [ %v1_db.pre, %dec_label_pc_8b ]
  %v2_db = load i32, i32* %esi.global-to-local, align 4
  %v3_db = add i32 %v2_db, -32
  %v4_db = fptrunc x86_fp80 %v1_db to double
  %v5_db = inttoptr i32 %v3_db to double*
  store double %v4_db, double* %v5_db, align 4
  %v4_e2 = load double, double* %stack_var_-28, align 8
  %v9_e2 = fpext double %v4_e2 to x86_fp80
  %v10_e2 = fmul x86_fp80 %v6_63, %v9_e2
  %v9_e5 = fsub x86_fp80 %v10_e2, %v7_5f.pre-phi
  store x86_fp80 %v9_e5, x86_fp80* %st7.global-to-local, align 4
  %v2_e9 = load i32, i32* @edi, align 8
  %v3_e9 = add i32 %v2_e9, -88
  %v4_e9 = inttoptr i32 %v3_e9 to double*
  %v5_e9 = load double, double* %v4_e9, align 4
  %v6_e9 = fpext double %v5_e9 to x86_fp80
  %v7_e9 = fmul x86_fp80 %v9_e5, %v6_e9
  store x86_fp80 %v7_e9, x86_fp80* %st7.global-to-local, align 4
  %v2_ec = add i32 %v2_db, -24
  %v3_ec = inttoptr i32 %v2_ec to i32*
  %v4_ec = load i32, i32* %v3_ec, align 4
  %v5_ec = sitofp i32 %v4_ec to x86_fp80
  %v3_ef = add i32 %v2_e9, -96
  %v4_ef = inttoptr i32 %v3_ef to double*
  %v5_ef = load double, double* %v4_ef, align 4
  %v6_ef = fpext double %v5_ef to x86_fp80
  %v7_ef = fmul x86_fp80 %v5_ec, %v6_ef
  %v4_f2 = fadd x86_fp80 %v7_e9, %v7_ef
  store x86_fp80 %v4_f2, x86_fp80* %st7.global-to-local, align 4
  %v3_f4 = add i32 %v2_e9, -104
  %v4_f4 = inttoptr i32 %v3_f4 to double*
  %v5_f4 = load double, double* %v4_f4, align 4
  %v6_f4 = fpext double %v5_f4 to x86_fp80
  %v7_f4 = fadd x86_fp80 %v4_f2, %v6_f4
  %v2_f7 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_f4)
  store x86_fp80 %v2_f7, x86_fp80* %st7.global-to-local, align 4
  %v3_f9 = add i32 %v2_db, 128
  %tmp288 = fptrunc x86_fp80 %v7_f4 to double
  %v4_f9 = call double @llvm.fabs.f64(double %tmp288)
  %v5_f9 = inttoptr i32 %v3_f9 to double*
  store double %v4_f9, double* %v5_f9, align 4
  %v6_f9 = add i3 %storemerge.in, 2
  store i3 %v6_f9, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_c8
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
