source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp306 = call double @__decompiler_undefined_function_3()
  %stack_var_-96 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-96, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_55 = load i32, i32* %edi.global-to-local, align 4
  %v1_55 = add i32 %v0_55, -44
  store i32 %v1_55, i32* %edi.global-to-local, align 4
  %v7_58 = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_58, x86_fp80* %st7.global-to-local, align 4
  %v5_5c = fpext double %tmp306 to x86_fp80
  %v3_60 = load double, double* %stack_var_-96, align 8
  %v8_60 = fpext double %v3_60 to x86_fp80
  %v3_65 = add i32 %v0_55, -104
  %v4_65 = inttoptr i32 %v3_65 to float*
  %v5_65 = load float, float* %v4_65, align 4
  %v6_65 = fpext float %v5_65 to x86_fp80
  %v7_65 = fmul x86_fp80 %v8_60, %v6_65
  %v3_6a = add i32 %v0_55, -108
  %v4_6a = inttoptr i32 %v3_6a to float*
  %v5_6a = load float, float* %v4_6a, align 4
  %v6_6a = fpext float %v5_6a to x86_fp80
  %v7_6a = fmul x86_fp80 %v5_5c, %v6_6a
  %v4_6d = fadd x86_fp80 %v7_65, %v7_6a
  %v3_71 = add i32 %v0_55, -112
  %v4_71 = inttoptr i32 %v3_71 to float*
  %v5_71 = load float, float* %v4_71, align 4
  %v6_71 = fpext float %v5_71 to x86_fp80
  %v7_71 = fmul x86_fp80 %v7_58, %v6_71
  %v4_74 = fadd x86_fp80 %v7_71, %v4_6d
  %v3_78 = add i32 %v0_55, -80
  %v4_78 = inttoptr i32 %v3_78 to float*
  %v5_78 = load float, float* %v4_78, align 4
  %v6_78 = fpext float %v5_78 to x86_fp80
  %v7_78 = fmul x86_fp80 %v8_60, %v6_78
  %v3_7d = add i32 %v0_55, -84
  %v4_7d = inttoptr i32 %v3_7d to float*
  %v5_7d = load float, float* %v4_7d, align 4
  %v6_7d = fpext float %v5_7d to x86_fp80
  %v7_7d = fmul x86_fp80 %v5_5c, %v6_7d
  %v4_80 = fadd x86_fp80 %v7_78, %v7_7d
  %v3_84 = add i32 %v0_55, -88
  %v4_84 = inttoptr i32 %v3_84 to float*
  %v5_84 = load float, float* %v4_84, align 4
  %v6_84 = fpext float %v5_84 to x86_fp80
  %v7_84 = fmul x86_fp80 %v7_58, %v6_84
  %v4_87 = fadd x86_fp80 %v4_80, %v7_84
  %v3_8b = add i32 %v0_55, -92
  %v4_8b = inttoptr i32 %v3_8b to float*
  %v5_8b = load float, float* %v4_8b, align 4
  %v6_8b = fpext float %v5_8b to x86_fp80
  %v7_8b = fmul x86_fp80 %v8_60, %v6_8b
  %v3_90 = add i32 %v0_55, -96
  %v4_90 = inttoptr i32 %v3_90 to float*
  %v5_90 = load float, float* %v4_90, align 4
  %v6_90 = fpext float %v5_90 to x86_fp80
  %v7_90 = fmul x86_fp80 %v5_5c, %v6_90
  %v4_93 = fadd x86_fp80 %v7_8b, %v7_90
  store x86_fp80 %v4_74, x86_fp80* %st7.global-to-local, align 4
  %v3_97 = add i32 %v0_55, -100
  %v4_97 = inttoptr i32 %v3_97 to float*
  %v5_97 = load float, float* %v4_97, align 4
  %v6_97 = fpext float %v5_97 to x86_fp80
  %v7_97 = fmul x86_fp80 %v7_58, %v6_97
  %v4_9a = fadd x86_fp80 %v4_93, %v7_97
  %tmp313 = fptrunc x86_fp80 %v4_87 to double
  store double %tmp313, double* %stack_var_-96, align 8
  %v6_9f = add i3 %v0_4b, -1
  store i32 %v0_55, i32* %edi.global-to-local, align 4
  %v3_ae = fmul x86_fp80 %v4_74, %v4_74
  %v3_b4 = fmul x86_fp80 %v4_9a, %v4_9a
  %v3_ba = fmul x86_fp80 %v4_87, %v4_87
  %v7_cb = fmul x86_fp80 %v4_87, %v4_9a
  %v9_d3 = fmul x86_fp80 %v4_74, %v4_9a
  %v9_da = fmul x86_fp80 %v4_74, %v4_87
  %v3_f0 = fmul x86_fp80 %v7_cb, %v7_cb
  %v3_f6 = fmul x86_fp80 %v9_d3, %v9_d3
  %v3_fc = fmul x86_fp80 %v9_da, %v9_da
  %v4_fe = fadd x86_fp80 %v3_fc, %v3_f6
  %v4_100 = fadd x86_fp80 %v3_f0, %v4_fe
  store x86_fp80 %v4_100, x86_fp80* %st7.global-to-local, align 4
  %v3_102 = add i32 %v0_55, 8
  %v4_102 = inttoptr i32 %v3_102 to double*
  %v5_102 = load double, double* %v4_102, align 4
  %v6_102 = fpext double %v5_102 to x86_fp80
  %v7_102 = fmul x86_fp80 %v4_100, %v6_102
  %v7_10d = fmul x86_fp80 %v4_87, %v3_ba
  %v9_115 = fadd x86_fp80 %v4_74, %v4_9a
  %v4_119 = fmul x86_fp80 %v7_10d, %v9_115
  store x86_fp80 %v4_119, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_9f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_11b = inttoptr i32 %v0_55 to double*
  %v4_11b = load double, double* %v3_11b, align 4
  %v5_11b = fpext double %v4_11b to x86_fp80
  %v6_11b = fmul x86_fp80 %v4_119, %v5_11b
  store x86_fp80 %v6_11b, x86_fp80* %st7.global-to-local, align 4
  %v0_120 = call i32 @__asm_wait()
  store i32 %v0_120, i32* %eax.global-to-local, align 4
  %v0_121 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_121 = call i16 @__asm_fnstsw(i32 %v0_121)
  %v2_121 = sext i16 %v1_121 to i32
  %v3_121 = load i32, i32* %eax.global-to-local, align 4
  %v4_121 = and i32 %v3_121, -65536
  %tmp322 = udiv i32 %v2_121, 2
  %v12_123 = and i32 %tmp322, 32512
  %v2_121.masked = and i32 %v2_121, -65281
  %v13_123 = or i32 %v4_121, %v2_121.masked
  %v14_123 = or i32 %v13_123, %v12_123
  store i32 %v14_123, i32* %eax.global-to-local, align 4
  %v15_12351 = and i32 %v2_121, 256
  %v16_123 = icmp ne i32 %v15_12351, 0
  %v1_125 = icmp eq i1 %v16_123, false
  %v1_131 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_125, label %dec_label_pc_131, label %dec_label_pc_127

dec_label_pc_127:                                 ; preds = %dec_label_pc_40
  %v7_127 = fsub x86_fp80 0xK00000000000000000000, %v1_131
  store x86_fp80 %v7_127, x86_fp80* %st7.global-to-local, align 4
  %v4_12b = fptrunc x86_fp80 %v7_127 to double
  br label %dec_label_pc_139

dec_label_pc_131:                                 ; preds = %dec_label_pc_40
  %v7_131 = fadd x86_fp80 %v1_131, %v7_102
  store x86_fp80 %v7_131, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_139

dec_label_pc_139:                                 ; preds = %dec_label_pc_131, %dec_label_pc_127
  %stack_var_-64.0 = phi double [ 0.000000e+00, %dec_label_pc_131 ], [ %v4_12b, %dec_label_pc_127 ]
  %stack_var_-72.0.in = phi x86_fp80 [ %v7_131, %dec_label_pc_131 ], [ %v7_102, %dec_label_pc_127 ]
  %stack_var_-72.0 = fptrunc x86_fp80 %stack_var_-72.0.in to double
  %v7_13d = fmul x86_fp80 %v4_9a, %v3_b4
  %v3_141 = load double, double* %stack_var_-96, align 8
  %v8_141 = fpext double %v3_141 to x86_fp80
  %v9_145 = fadd x86_fp80 %v4_74, %v8_141
  %v4_149 = fmul x86_fp80 %v7_13d, %v9_145
  store x86_fp80 %v4_149, x86_fp80* %st7.global-to-local, align 4
  %v2_14b = load i32, i32* %edi.global-to-local, align 4
  %v3_14b = inttoptr i32 %v2_14b to double*
  %v4_14b = load double, double* %v3_14b, align 4
  %v5_14b = fpext double %v4_14b to x86_fp80
  %v6_14b = fmul x86_fp80 %v4_149, %v5_14b
  store x86_fp80 %v6_14b, x86_fp80* %st7.global-to-local, align 4
  %v0_150 = call i32 @__asm_wait()
  store i32 %v0_150, i32* %eax.global-to-local, align 4
  %v0_151 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_151 = call i16 @__asm_fnstsw(i32 %v0_151)
  %v2_151 = sext i16 %v1_151 to i32
  %v3_151 = load i32, i32* %eax.global-to-local, align 4
  %v4_151 = and i32 %v3_151, -65536
  %tmp323 = udiv i32 %v2_151, 2
  %v12_153 = and i32 %tmp323, 32512
  %v2_151.masked = and i32 %v2_151, -65281
  %v13_153 = or i32 %v4_151, %v2_151.masked
  %v14_153 = or i32 %v13_153, %v12_153
  store i32 %v14_153, i32* %eax.global-to-local, align 4
  %v15_15352 = and i32 %v2_151, 256
  %v16_153 = icmp ne i32 %v15_15352, 0
  %v1_155 = icmp eq i1 %v16_153, false
  %v1_161 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_155, label %dec_label_pc_161, label %dec_label_pc_157

dec_label_pc_157:                                 ; preds = %dec_label_pc_139
  %v6_157 = fpext double %stack_var_-64.0 to x86_fp80
  %v7_157 = fsub x86_fp80 %v6_157, %v1_161
  store x86_fp80 %v7_157, x86_fp80* %st7.global-to-local, align 4
  %v4_15b = fptrunc x86_fp80 %v7_157 to double
  br label %dec_label_pc_169

dec_label_pc_161:                                 ; preds = %dec_label_pc_139
  %v7_161 = fadd x86_fp80 %v1_161, %stack_var_-72.0.in
  store x86_fp80 %v7_161, x86_fp80* %st7.global-to-local, align 4
  %v4_165 = fptrunc x86_fp80 %v7_161 to double
  br label %dec_label_pc_169

dec_label_pc_169:                                 ; preds = %dec_label_pc_161, %dec_label_pc_157
  %stack_var_-64.1 = phi double [ %stack_var_-64.0, %dec_label_pc_161 ], [ %v4_15b, %dec_label_pc_157 ]
  %stack_var_-72.1 = phi double [ %v4_165, %dec_label_pc_161 ], [ %stack_var_-72.0, %dec_label_pc_157 ]
  %v7_16d = fmul x86_fp80 %v4_74, %v3_ae
  %v3_171 = load double, double* %stack_var_-96, align 8
  %v8_171 = fpext double %v3_171 to x86_fp80
  %v7_175 = fadd x86_fp80 %v4_9a, %v8_171
  %v4_179 = fmul x86_fp80 %v7_16d, %v7_175
  store x86_fp80 %v4_179, x86_fp80* %st7.global-to-local, align 4
  %v2_17b = load i32, i32* %edi.global-to-local, align 4
  %v3_17b = inttoptr i32 %v2_17b to double*
  %v4_17b = load double, double* %v3_17b, align 4
  %v5_17b = fpext double %v4_17b to x86_fp80
  %v6_17b = fmul x86_fp80 %v4_179, %v5_17b
  store x86_fp80 %v6_17b, x86_fp80* %st7.global-to-local, align 4
  %v0_180 = call i32 @__asm_wait()
  store i32 %v0_180, i32* %eax.global-to-local, align 4
  %v0_181 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_181 = call i16 @__asm_fnstsw(i32 %v0_181)
  %v2_181 = sext i16 %v1_181 to i32
  %v3_181 = load i32, i32* %eax.global-to-local, align 4
  %v4_181 = and i32 %v3_181, -65536
  %tmp324 = udiv i32 %v2_181, 2
  %v12_183 = and i32 %tmp324, 32512
  %v2_181.masked = and i32 %v2_181, -65281
  %v13_183 = or i32 %v4_181, %v2_181.masked
  %v14_183 = or i32 %v13_183, %v12_183
  store i32 %v14_183, i32* %eax.global-to-local, align 4
  %v15_18353 = and i32 %v2_181, 256
  %v16_183 = icmp ne i32 %v15_18353, 0
  %v1_185 = icmp eq i1 %v16_183, false
  %v1_191 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_185, label %dec_label_pc_191, label %dec_label_pc_187

dec_label_pc_187:                                 ; preds = %dec_label_pc_169
  %v6_187 = fpext double %stack_var_-64.1 to x86_fp80
  %v7_187 = fsub x86_fp80 %v6_187, %v1_191
  store x86_fp80 %v7_187, x86_fp80* %st7.global-to-local, align 4
  %v4_18b = fptrunc x86_fp80 %v7_187 to double
  br label %dec_label_pc_199

dec_label_pc_191:                                 ; preds = %dec_label_pc_169
  %v6_191 = fpext double %stack_var_-72.1 to x86_fp80
  %v7_191 = fadd x86_fp80 %v1_191, %v6_191
  store x86_fp80 %v7_191, x86_fp80* %st7.global-to-local, align 4
  %v4_195 = fptrunc x86_fp80 %v7_191 to double
  br label %dec_label_pc_199

dec_label_pc_199:                                 ; preds = %dec_label_pc_191, %dec_label_pc_187
  %stack_var_-64.2 = phi double [ %stack_var_-64.1, %dec_label_pc_191 ], [ %v4_18b, %dec_label_pc_187 ]
  %stack_var_-72.2 = phi double [ %v4_195, %dec_label_pc_191 ], [ %stack_var_-72.1, %dec_label_pc_187 ]
  %v3_199 = load double, double* %stack_var_-96, align 8
  %v8_199 = fpext double %v3_199 to x86_fp80
  %v7_19c = fmul x86_fp80 %v9_d3, %v8_199
  store x86_fp80 %v7_19c, x86_fp80* %st7.global-to-local, align 4
  %v2_1a0 = load i32, i32* %edi.global-to-local, align 4
  %v3_1a0 = add i32 %v2_1a0, -72
  %v4_1a0 = inttoptr i32 %v3_1a0 to double*
  %v5_1a0 = load double, double* %v4_1a0, align 4
  %v6_1a0 = fpext double %v5_1a0 to x86_fp80
  %v7_1a0 = fmul x86_fp80 %v7_19c, %v6_1a0
  store x86_fp80 %v7_1a0, x86_fp80* %st7.global-to-local, align 4
  %v0_1a5 = call i32 @__asm_wait()
  store i32 %v0_1a5, i32* %eax.global-to-local, align 4
  %v0_1a6 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1a6 = call i16 @__asm_fnstsw(i32 %v0_1a6)
  %v2_1a6 = sext i16 %v1_1a6 to i32
  %v3_1a6 = load i32, i32* %eax.global-to-local, align 4
  %v4_1a6 = and i32 %v3_1a6, -65536
  %tmp325 = udiv i32 %v2_1a6, 2
  %v12_1a8 = and i32 %tmp325, 32512
  %v2_1a6.masked = and i32 %v2_1a6, -65281
  %v13_1a8 = or i32 %v4_1a6, %v2_1a6.masked
  %v14_1a8 = or i32 %v13_1a8, %v12_1a8
  store i32 %v14_1a8, i32* %eax.global-to-local, align 4
  %v15_1a854 = and i32 %v2_1a6, 256
  %v16_1a8 = icmp ne i32 %v15_1a854, 0
  %v1_1aa = icmp eq i1 %v16_1a8, false
  %v1_1b6 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_1aa, label %dec_label_pc_1b6, label %dec_label_pc_1ac

dec_label_pc_1ac:                                 ; preds = %dec_label_pc_199
  %v6_1ac = fpext double %stack_var_-64.2 to x86_fp80
  %v7_1ac = fsub x86_fp80 %v6_1ac, %v1_1b6
  store x86_fp80 %v7_1ac, x86_fp80* %st7.global-to-local, align 4
  %v4_1b0 = fptrunc x86_fp80 %v7_1ac to double
  br label %dec_label_pc_1be

dec_label_pc_1b6:                                 ; preds = %dec_label_pc_199
  %v6_1b6 = fpext double %stack_var_-72.2 to x86_fp80
  %v7_1b6 = fadd x86_fp80 %v1_1b6, %v6_1b6
  store x86_fp80 %v7_1b6, x86_fp80* %st7.global-to-local, align 4
  %v4_1ba = fptrunc x86_fp80 %v7_1b6 to double
  br label %dec_label_pc_1be

dec_label_pc_1be:                                 ; preds = %dec_label_pc_1b6, %dec_label_pc_1ac
  %stack_var_-64.3 = phi double [ %stack_var_-64.2, %dec_label_pc_1b6 ], [ %v4_1b0, %dec_label_pc_1ac ]
  %stack_var_-72.3 = phi double [ %v4_1ba, %dec_label_pc_1b6 ], [ %stack_var_-72.2, %dec_label_pc_1ac ]
  store x86_fp80 %v3_ba, x86_fp80* %st7.global-to-local, align 4
  %v2_1c2 = load i32, i32* %edi.global-to-local, align 4
  %v3_1c2 = add i32 %v2_1c2, 24
  %v4_1c2 = inttoptr i32 %v3_1c2 to double*
  %v5_1c2 = load double, double* %v4_1c2, align 4
  %v6_1c2 = fpext double %v5_1c2 to x86_fp80
  %v7_1c2 = fmul x86_fp80 %v3_ba, %v6_1c2
  store x86_fp80 %v7_1c2, x86_fp80* %st7.global-to-local, align 4
  %v3_1c5 = add i32 %v2_1c2, -72
  %v4_1c5 = inttoptr i32 %v3_1c5 to double*
  %v5_1c5 = load double, double* %v4_1c5, align 4
  %v6_1c5 = fpext double %v5_1c5 to x86_fp80
  %v7_1c5 = fmul x86_fp80 %v7_1c2, %v6_1c5
  %v4_1cb = fadd x86_fp80 %v7_1c5, 0xK3FFF8000000000000000
  %v7_1cd = fmul x86_fp80 %v4_1cb, %v9_d3
  store x86_fp80 %v7_1cd, x86_fp80* %st7.global-to-local, align 4
  %v3_1d1 = add i32 %v2_1c2, 32
  %v4_1d1 = inttoptr i32 %v3_1d1 to double*
  %v5_1d1 = load double, double* %v4_1d1, align 4
  %v6_1d1 = fpext double %v5_1d1 to x86_fp80
  %v7_1d1 = fmul x86_fp80 %v7_1cd, %v6_1d1
  store x86_fp80 %v7_1d1, x86_fp80* %st7.global-to-local, align 4
  %v0_1d6 = call i32 @__asm_wait()
  store i32 %v0_1d6, i32* %eax.global-to-local, align 4
  %v0_1d7 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1d7 = call i16 @__asm_fnstsw(i32 %v0_1d7)
  %v2_1d7 = sext i16 %v1_1d7 to i32
  %v3_1d7 = load i32, i32* %eax.global-to-local, align 4
  %v4_1d7 = and i32 %v3_1d7, -65536
  %tmp326 = udiv i32 %v2_1d7, 2
  %v12_1d9 = and i32 %tmp326, 32512
  %v2_1d7.masked = and i32 %v2_1d7, -65281
  %v13_1d9 = or i32 %v4_1d7, %v2_1d7.masked
  %v14_1d9 = or i32 %v13_1d9, %v12_1d9
  store i32 %v14_1d9, i32* %eax.global-to-local, align 4
  %v15_1d955 = and i32 %v2_1d7, 256
  %v16_1d9 = icmp ne i32 %v15_1d955, 0
  %v1_1db = icmp eq i1 %v16_1d9, false
  %v1_1e7 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_1db, label %dec_label_pc_1e7, label %dec_label_pc_1dd

dec_label_pc_1dd:                                 ; preds = %dec_label_pc_1be
  %v6_1dd = fpext double %stack_var_-64.3 to x86_fp80
  %v7_1dd = fsub x86_fp80 %v6_1dd, %v1_1e7
  store x86_fp80 %v7_1dd, x86_fp80* %st7.global-to-local, align 4
  %v4_1e1 = fptrunc x86_fp80 %v7_1dd to double
  br label %dec_label_pc_1ef

dec_label_pc_1e7:                                 ; preds = %dec_label_pc_1be
  %v6_1e7 = fpext double %stack_var_-72.3 to x86_fp80
  %v7_1e7 = fadd x86_fp80 %v1_1e7, %v6_1e7
  store x86_fp80 %v7_1e7, x86_fp80* %st7.global-to-local, align 4
  %v4_1eb = fptrunc x86_fp80 %v7_1e7 to double
  br label %dec_label_pc_1ef

dec_label_pc_1ef:                                 ; preds = %dec_label_pc_1e7, %dec_label_pc_1dd
  %stack_var_-64.4 = phi double [ %stack_var_-64.3, %dec_label_pc_1e7 ], [ %v4_1e1, %dec_label_pc_1dd ]
  %stack_var_-72.4 = phi double [ %v4_1eb, %dec_label_pc_1e7 ], [ %stack_var_-72.3, %dec_label_pc_1dd ]
  store x86_fp80 %v3_b4, x86_fp80* %st7.global-to-local, align 4
  %v2_1f3 = load i32, i32* %edi.global-to-local, align 4
  %v3_1f3 = add i32 %v2_1f3, 24
  %v4_1f3 = inttoptr i32 %v3_1f3 to double*
  %v5_1f3 = load double, double* %v4_1f3, align 4
  %v6_1f3 = fpext double %v5_1f3 to x86_fp80
  %v7_1f3 = fmul x86_fp80 %v3_b4, %v6_1f3
  store x86_fp80 %v7_1f3, x86_fp80* %st7.global-to-local, align 4
  %v3_1f6 = add i32 %v2_1f3, -72
  %v4_1f6 = inttoptr i32 %v3_1f6 to double*
  %v5_1f6 = load double, double* %v4_1f6, align 4
  %v6_1f6 = fpext double %v5_1f6 to x86_fp80
  %v7_1f6 = fmul x86_fp80 %v7_1f3, %v6_1f6
  %v4_1fb = fadd x86_fp80 %v7_1f6, 0xK3FFF8000000000000000
  %v7_1fd = fmul x86_fp80 %v4_1fb, %v9_da
  store x86_fp80 %v7_1fd, x86_fp80* %st7.global-to-local, align 4
  %v3_201 = add i32 %v2_1f3, 32
  %v4_201 = inttoptr i32 %v3_201 to double*
  %v5_201 = load double, double* %v4_201, align 4
  %v6_201 = fpext double %v5_201 to x86_fp80
  %v7_201 = fmul x86_fp80 %v7_1fd, %v6_201
  store x86_fp80 %v7_201, x86_fp80* %st7.global-to-local, align 4
  %v0_206 = call i32 @__asm_wait()
  store i32 %v0_206, i32* %eax.global-to-local, align 4
  %v0_207 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_207 = call i16 @__asm_fnstsw(i32 %v0_207)
  %v2_207 = sext i16 %v1_207 to i32
  %v3_207 = load i32, i32* %eax.global-to-local, align 4
  %v4_207 = and i32 %v3_207, -65536
  %tmp327 = udiv i32 %v2_207, 2
  %v12_209 = and i32 %tmp327, 32512
  %v2_207.masked = and i32 %v2_207, -65281
  %v13_209 = or i32 %v4_207, %v2_207.masked
  %v14_209 = or i32 %v13_209, %v12_209
  store i32 %v14_209, i32* %eax.global-to-local, align 4
  %v15_20956 = and i32 %v2_207, 256
  %v16_209 = icmp ne i32 %v15_20956, 0
  %v1_20b = icmp eq i1 %v16_209, false
  %v1_217 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_20b, label %dec_label_pc_217, label %dec_label_pc_20d

dec_label_pc_20d:                                 ; preds = %dec_label_pc_1ef
  %v6_20d = fpext double %stack_var_-64.4 to x86_fp80
  %v7_20d = fsub x86_fp80 %v6_20d, %v1_217
  store x86_fp80 %v7_20d, x86_fp80* %st7.global-to-local, align 4
  %v4_211 = fptrunc x86_fp80 %v7_20d to double
  br label %dec_label_pc_21f

dec_label_pc_217:                                 ; preds = %dec_label_pc_1ef
  %v6_217 = fpext double %stack_var_-72.4 to x86_fp80
  %v7_217 = fadd x86_fp80 %v1_217, %v6_217
  store x86_fp80 %v7_217, x86_fp80* %st7.global-to-local, align 4
  %v4_21b = fptrunc x86_fp80 %v7_217 to double
  br label %dec_label_pc_21f

dec_label_pc_21f:                                 ; preds = %dec_label_pc_217, %dec_label_pc_20d
  %stack_var_-64.5 = phi double [ %stack_var_-64.4, %dec_label_pc_217 ], [ %v4_211, %dec_label_pc_20d ]
  %stack_var_-72.5 = phi double [ %v4_21b, %dec_label_pc_217 ], [ %stack_var_-72.4, %dec_label_pc_20d ]
  store x86_fp80 %v3_ae, x86_fp80* %st7.global-to-local, align 4
  %v2_223 = load i32, i32* %edi.global-to-local, align 4
  %v3_223 = add i32 %v2_223, 24
  %v4_223 = inttoptr i32 %v3_223 to double*
  %v5_223 = load double, double* %v4_223, align 4
  %v6_223 = fpext double %v5_223 to x86_fp80
  %v7_223 = fmul x86_fp80 %v3_ae, %v6_223
  store x86_fp80 %v7_223, x86_fp80* %st7.global-to-local, align 4
  %v3_226 = add i32 %v2_223, -72
  %v4_226 = inttoptr i32 %v3_226 to double*
  %v5_226 = load double, double* %v4_226, align 4
  %v6_226 = fpext double %v5_226 to x86_fp80
  %v7_226 = fmul x86_fp80 %v7_223, %v6_226
  %v4_22b = fadd x86_fp80 %v7_226, 0xK3FFF8000000000000000
  %v7_22d = fmul x86_fp80 %v4_22b, %v7_cb
  store x86_fp80 %v7_22d, x86_fp80* %st7.global-to-local, align 4
  %v3_231 = add i32 %v2_223, 32
  %v4_231 = inttoptr i32 %v3_231 to double*
  %v5_231 = load double, double* %v4_231, align 4
  %v6_231 = fpext double %v5_231 to x86_fp80
  %v7_231 = fmul x86_fp80 %v7_22d, %v6_231
  store x86_fp80 %v7_231, x86_fp80* %st7.global-to-local, align 4
  %v0_236 = call i32 @__asm_wait()
  store i32 %v0_236, i32* %eax.global-to-local, align 4
  %v0_237 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_237 = call i16 @__asm_fnstsw(i32 %v0_237)
  %v2_237 = sext i16 %v1_237 to i32
  %v3_237 = load i32, i32* %eax.global-to-local, align 4
  %v4_237 = and i32 %v3_237, -65536
  %tmp328 = udiv i32 %v2_237, 2
  %v12_239 = and i32 %tmp328, 32512
  %v2_237.masked = and i32 %v2_237, -65281
  %v13_239 = or i32 %v4_237, %v2_237.masked
  %v14_239 = or i32 %v13_239, %v12_239
  store i32 %v14_239, i32* %eax.global-to-local, align 4
  %v15_23957 = and i32 %v2_237, 256
  %v16_239 = icmp ne i32 %v15_23957, 0
  %v1_23b = icmp eq i1 %v16_239, false
  %v1_247 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_23b, label %dec_label_pc_247, label %dec_label_pc_23d

dec_label_pc_23d:                                 ; preds = %dec_label_pc_21f
  %v6_23d = fpext double %stack_var_-64.5 to x86_fp80
  %v7_23d = fsub x86_fp80 %v6_23d, %v1_247
  store x86_fp80 %v7_23d, x86_fp80* %st7.global-to-local, align 4
  %v4_241 = fptrunc x86_fp80 %v7_23d to double
  br label %dec_label_pc_24f

dec_label_pc_247:                                 ; preds = %dec_label_pc_21f
  %v6_247 = fpext double %stack_var_-72.5 to x86_fp80
  %v7_247 = fadd x86_fp80 %v1_247, %v6_247
  store x86_fp80 %v7_247, x86_fp80* %st7.global-to-local, align 4
  %v4_24b = fptrunc x86_fp80 %v7_247 to double
  br label %dec_label_pc_24f

dec_label_pc_24f:                                 ; preds = %dec_label_pc_247, %dec_label_pc_23d
  %stack_var_-64.6 = phi double [ %stack_var_-64.5, %dec_label_pc_247 ], [ %v4_241, %dec_label_pc_23d ]
  %stack_var_-72.6 = phi double [ %v4_24b, %dec_label_pc_247 ], [ %stack_var_-72.5, %dec_label_pc_23d ]
  %v5_251 = fpext double %stack_var_-72.6 to x86_fp80
  %v2_255 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v5_251)
  %v2_257 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_255)
  %v0_259 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_259 = fpext double %stack_var_-64.6 to x86_fp80
  %v6_259 = add i3 %v0_259, -1
  %v2_25d = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v5_259)
  %v2_25f = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_25d)
  %v4_263 = fsub x86_fp80 %v2_257, %v2_25f
  store x86_fp80 %v4_263, x86_fp80* %st7.global-to-local, align 4
  %v2_265 = load i32, i32* %edi.global-to-local, align 4
  %v3_265 = add i32 %v2_265, 40
  %v4_265 = inttoptr i32 %v3_265 to double*
  %v5_265 = load double, double* %v4_265, align 4
  %v6_265 = fpext double %v5_265 to x86_fp80
  %v7_265 = fmul x86_fp80 %v4_263, %v6_265
  store x86_fp80 %v7_265, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_259, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_285 = call i32 @__asm_wait()
  store i32 %v0_285, i32* %eax.global-to-local, align 4
  %v0_286 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_286 = call i16 @__asm_fnstsw(i32 %v0_286)
  %v2_286 = sext i16 %v1_286 to i32
  %v3_286 = load i32, i32* %eax.global-to-local, align 4
  %v4_286 = and i32 %v3_286, -65536
  %tmp321 = udiv i32 %v2_286, 2
  %v12_288 = and i32 %tmp321, 32512
  %v2_286.masked = and i32 %v2_286, -65281
  %v13_288 = or i32 %v4_286, %v2_286.masked
  %v14_288 = or i32 %v13_288, %v12_288
  store i32 %v14_288, i32* %eax.global-to-local, align 4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_292 = load i32, i32* %edi.global-to-local, align 4
  %v1_292 = add i32 %v0_292, -76
  %v2_292 = inttoptr i32 %v1_292 to i32*
  %v3_292 = load i32, i32* %v2_292, align 4
  %v10_292 = icmp eq i32 %v3_292, 0
  %v1_296 = icmp eq i1 %v10_292, false
  %v1_29b.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_296, label %dec_label_pc_29b, label %dec_label_pc_298

dec_label_pc_298:                                 ; preds = %dec_label_pc_24f
  %v3_298 = add i32 %v0_292, -32
  %v4_298 = inttoptr i32 %v3_298 to double*
  %v5_298 = load double, double* %v4_298, align 4
  %v6_298 = fpext double %v5_298 to x86_fp80
  %v7_298 = fdiv x86_fp80 %v1_29b.pre, %v6_298
  store x86_fp80 %v7_298, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_29b

dec_label_pc_29b:                                 ; preds = %dec_label_pc_24f, %dec_label_pc_298
  %v1_29b = phi x86_fp80 [ %v7_298, %dec_label_pc_298 ], [ %v1_29b.pre, %dec_label_pc_24f ]
  %v2_29b = load i32, i32* %esi.global-to-local, align 4
  %v3_29b = add i32 %v2_29b, -32
  %v4_29b = fptrunc x86_fp80 %v1_29b to double
  %v5_29b = inttoptr i32 %v3_29b to double*
  store double %v4_29b, double* %v5_29b, align 4
  %v6_29b = add i3 %storemerge.in, 2
  store i3 %v6_29b, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_288
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
