source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8
@global_var_1.1 = constant i8 -117

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebp.global-to-local = alloca i32, align 4
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_0 = load i32, i32* %ebp.global-to-local, align 4
  %v0_9 = load i32, i32* %ebx.global-to-local, align 4
  %v0_a = load i32, i32* %esi.global-to-local, align 4
  %v0_b = load i32, i32* %edi.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_f = add i32 %arg1, 48
  %v2_f = inttoptr i32 %v1_f to i32*
  %v3_f = load i32, i32* %v2_f, align 4
  store i32 %v3_f, i32* %edi.global-to-local, align 4
  %v0_12 = load i32, i32* @eax, align 8
  store i32 %v0_12, i32* %ebx.global-to-local, align 4
  %v1_16 = add i32 %v3_f, -20
  %v2_16 = inttoptr i32 %v1_16 to i32*
  %v3_16 = load i32, i32* %v2_16, align 4
  %v5_1c = icmp sgt i32 %v3_16, 16
  %v6_23 = icmp slt i32 %v3_16, sext (i8 ptrtoint (i8* @global_var_1.1 to i8) to i32)
  %or.cond = or i1 %v5_1c, %v6_23
  %spec.store.select = select i1 %or.cond, i32 2, i32 %v3_16
  store i32 %spec.store.select, i32* @eax, align 8
  %v0_2b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_2b = load double, double* bitcast (i32* @eax to double*), align 8
  %v3_31 = load double, double* bitcast (i32* @edx to double*), align 8
  %v3_37 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_37 = fpext double %v3_37 to x86_fp80
  store x86_fp80 %v4_37, x86_fp80* %st7.global-to-local, align 4
  %tmp252 = bitcast double %v3_37 to i64
  %tmp253 = trunc i64 %tmp252 to i32
  %v2_3d = add i32 %tmp253, 8
  %v3_3d = inttoptr i32 %v2_3d to double*
  %v4_3d = load double, double* %v3_3d, align 4
  %v5_3d = fpext double %v4_3d to x86_fp80
  store x86_fp80 %v5_3d, x86_fp80* %st7.global-to-local, align 4
  %v3_40 = add i32 %v3_f, -16
  %v4_40 = inttoptr i32 %v3_40 to double*
  %v5_40 = load double, double* %v4_40, align 4
  %v6_40 = fpext double %v5_40 to x86_fp80
  %v7_40 = fadd x86_fp80 %v5_3d, %v6_40
  store x86_fp80 %v7_40, x86_fp80* %st7.global-to-local, align 4
  %tmp254 = bitcast double %v3_2b to i64
  %tmp255 = trunc i64 %tmp254 to i32
  %v1_47 = add i32 %tmp255, -1
  store i32 %v1_47, i32* @eax, align 8
  %v3_72 = add i32 %v3_f, -28
  %v4_72 = inttoptr i32 %v3_72 to double*
  %v3_9e = add i32 %v3_f, -36
  %v4_9e = inttoptr i32 %v3_9e to double*
  %v3_bd = add i32 %v3_f, -44
  %v4_bd = inttoptr i32 %v3_bd to double*
  br label %dec_label_pc_49

dec_label_pc_49:                                  ; preds = %dec_label_pc_cb, %dec_label_pc_0
  %v0_49 = phi i32 [ %v1_47, %dec_label_pc_0 ], [ %tmp259, %dec_label_pc_cb ]
  %v6_d41 = phi i3 [ %v0_2b, %dec_label_pc_0 ], [ %v6_d4, %dec_label_pc_cb ]
  %stack_var_-12.0 = phi double [ %v3_2b, %dec_label_pc_0 ], [ %v4_d4, %dec_label_pc_cb ]
  %stack_var_-20.0 = phi double [ %v3_31, %dec_label_pc_0 ], [ %v4_d1, %dec_label_pc_cb ]
  %stack_var_-28.0 = phi double [ %v3_37, %dec_label_pc_0 ], [ %v4_ce, %dec_label_pc_cb ]
  %stack_var_-36.0.in = phi x86_fp80 [ %v7_40, %dec_label_pc_0 ], [ %v4_c0, %dec_label_pc_cb ]
  %v1_49 = add i32 %v0_49, -1
  store i32 %v1_49, i32* @eax, align 8
  %v3_4a = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_4a = fpext double %v3_4a to x86_fp80
  %v6_4c = fpext double %stack_var_-12.0 to x86_fp80
  %v7_4c = fmul x86_fp80 %v6_4c, %v4_4a
  %v4_4f = fpext double %v3_31 to x86_fp80
  %v6_51 = fpext double %stack_var_-20.0 to x86_fp80
  %v7_51 = fmul x86_fp80 %v4_4f, %v6_51
  %v4_54 = fsub x86_fp80 %v7_4c, %v7_51
  store x86_fp80 %v4_54, x86_fp80* %st7.global-to-local, align 4
  %v6_58 = fpext double %stack_var_-28.0 to x86_fp80
  %v7_58 = fmul x86_fp80 %v4_37, %v6_58
  store x86_fp80 %v7_58, x86_fp80* %st6.global-to-local, align 4
  %v4_5b = load double, double* %v3_3d, align 4
  %v5_5b = fpext double %v4_5b to x86_fp80
  %v7_5e = fmul x86_fp80 %stack_var_-36.0.in, %v5_5b
  store x86_fp80 %v7_5e, x86_fp80* %st5.global-to-local, align 4
  %v4_61 = fadd x86_fp80 %v7_58, %v7_5e
  %v4_63 = fsub x86_fp80 %v4_54, %v4_61
  store x86_fp80 %v4_63, x86_fp80* %st7.global-to-local, align 4
  %v7_67 = fmul x86_fp80 %stack_var_-36.0.in, %v4_37
  store x86_fp80 %v7_67, x86_fp80* %st6.global-to-local, align 4
  %v4_6a = load double, double* %v3_3d, align 4
  %v5_6a = fpext double %v4_6a to x86_fp80
  %v7_6d = fmul x86_fp80 %v6_58, %v5_6a
  store x86_fp80 %v7_6d, x86_fp80* %st5.global-to-local, align 4
  %v4_70 = fadd x86_fp80 %v7_67, %v7_6d
  store x86_fp80 %v4_70, x86_fp80* %st6.global-to-local, align 4
  %v5_72 = load double, double* %v4_72, align 4
  %v6_72 = fpext double %v5_72 to x86_fp80
  %v7_72 = fmul x86_fp80 %v4_70, %v6_72
  %v4_75 = fadd x86_fp80 %v4_63, %v7_72
  store x86_fp80 %v4_75, x86_fp80* %st7.global-to-local, align 4
  %v7_7a = fmul x86_fp80 %v6_51, %v4_4a
  %v7_7f = fmul x86_fp80 %v4_4f, %v6_4c
  %v4_82 = fadd x86_fp80 %v7_7f, %v7_7a
  store x86_fp80 %v4_82, x86_fp80* %st6.global-to-local, align 4
  %v7_87 = fmul x86_fp80 %v6_58, %v4_4a
  %v7_8c = fmul x86_fp80 %v4_37, %v6_4c
  %v4_8f = fadd x86_fp80 %v7_8c, %v7_87
  store x86_fp80 %v4_8f, x86_fp80* %st5.global-to-local, align 4
  %v7_93 = fmul x86_fp80 %stack_var_-36.0.in, %v4_4f
  %v4_96 = load double, double* %v3_3d, align 4
  %v5_96 = fpext double %v4_96 to x86_fp80
  %v7_99 = fmul x86_fp80 %v6_51, %v5_96
  %v4_9c = fadd x86_fp80 %v7_93, %v7_99
  %v5_9e = load double, double* %v4_9e, align 4
  %v6_9e = fpext double %v5_9e to x86_fp80
  %v7_9e = fmul x86_fp80 %v4_9c, %v6_9e
  %v4_a1 = fadd x86_fp80 %v4_8f, %v7_9e
  store x86_fp80 %v4_a1, x86_fp80* %st5.global-to-local, align 4
  %v7_a6 = fmul x86_fp80 %stack_var_-36.0.in, %v4_4a
  %v4_a9 = load double, double* %v3_3d, align 4
  %v5_a9 = fpext double %v4_a9 to x86_fp80
  %v7_ac = fmul x86_fp80 %v6_4c, %v5_a9
  %v4_af = fadd x86_fp80 %v7_a6, %v7_ac
  %v7_b3 = fmul x86_fp80 %v6_58, %v4_4f
  %v7_b8 = fmul x86_fp80 %v6_51, %v4_37
  %v4_bb = fadd x86_fp80 %v7_b3, %v7_b8
  %v5_bd = load double, double* %v4_bd, align 4
  %v6_bd = fpext double %v5_bd to x86_fp80
  %v7_bd = fmul x86_fp80 %v4_bb, %v6_bd
  %v4_c0 = fadd x86_fp80 %v4_af, %v7_bd
  %tmp258 = bitcast double %v3_4a to i64
  %tmp259 = trunc i64 %tmp258 to i32
  %v7_c5 = icmp sgt i32 %tmp259, 0
  br i1 %v7_c5, label %dec_label_pc_cb, label %dec_label_pc_de

dec_label_pc_cb:                                  ; preds = %dec_label_pc_49
  %v4_ce = fptrunc x86_fp80 %v4_a1 to double
  %v4_d1 = fptrunc x86_fp80 %v4_82 to double
  %v4_d4 = fptrunc x86_fp80 %v4_75 to double
  %v6_d4 = add i3 %v6_d41, add (i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 -1))))))), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 -3))
  br label %dec_label_pc_49

dec_label_pc_de:                                  ; preds = %dec_label_pc_49
  %v3_de = add i32 %arg1, -56
  %v4_de = inttoptr i32 %v3_de to double*
  %v5_de = load double, double* %v4_de, align 4
  %v6_de = fpext double %v5_de to x86_fp80
  %v7_de = fadd x86_fp80 %v4_c0, %v6_de
  %v4_e1 = fptrunc x86_fp80 %v7_de to double
  store double %v4_e1, double* %v3_3d, align 4
  %v1_e4 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_e4 = add i32 %arg1, 40
  %v4_e4 = inttoptr i32 %v3_e4 to double*
  %v5_e4 = load double, double* %v4_e4, align 4
  %v6_e4 = fpext double %v5_e4 to x86_fp80
  %v7_e4 = fadd x86_fp80 %v1_e4, %v6_e4
  store x86_fp80 %v7_e4, x86_fp80* %st5.global-to-local, align 4
  %v2_e7 = load i32, i32* @ecx, align 8
  %v3_e7 = fptrunc x86_fp80 %v7_e4 to double
  %v4_e7 = inttoptr i32 %v2_e7 to double*
  store double %v3_e7, double* %v4_e7, align 4
  %v1_e9 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_e9 = add i32 %arg1, 32
  %v4_e9 = inttoptr i32 %v3_e9 to double*
  %v5_e9 = load double, double* %v4_e9, align 4
  %v6_e9 = fpext double %v5_e9 to x86_fp80
  %v7_e9 = fadd x86_fp80 %v1_e9, %v6_e9
  store x86_fp80 %v7_e9, x86_fp80* %st6.global-to-local, align 4
  %v2_ec = load i32, i32* @edx, align 8
  %v3_ec = fptrunc x86_fp80 %v7_e9 to double
  %v4_ec = inttoptr i32 %v2_ec to double*
  store double %v3_ec, double* %v4_ec, align 4
  %v1_ee = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_ee = add i32 %arg1, 24
  %v4_ee = inttoptr i32 %v3_ee to double*
  %v5_ee = load double, double* %v4_ee, align 4
  %v6_ee = fpext double %v5_ee to x86_fp80
  %v7_ee = fadd x86_fp80 %v1_ee, %v6_ee
  store x86_fp80 %v7_ee, x86_fp80* %st7.global-to-local, align 4
  %v3_f1 = fptrunc x86_fp80 %v7_ee to double
  %v4_f1 = inttoptr i32 %v0_12 to double*
  store double %v3_f1, double* %v4_f1, align 4
  %v5_f1 = add i3 %v6_d41, add (i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 sub (i3 0, i3 ptrtoint (i8* @global_var_1.1 to i3)), i3 add (i3 ptrtoint (i8* @global_var_1.1 to i3), i3 -1))))))), i3 -2)
  store i3 %v5_f1, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_12, i32* @eax, align 8
  store i32 %v0_b, i32* %edi.global-to-local, align 4
  store i32 %v0_a, i32* %esi.global-to-local, align 4
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  store i32 %v0_0, i32* %ebp.global-to-local, align 4
  ret i32 %v0_12
}
