source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define x86_fp80 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_0 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_0 = load i32, i32* %esi.global-to-local, align 4
  %v2_0 = add i32 %v1_0, -104
  %v3_0 = inttoptr i32 %v2_0 to double*
  %v4_0 = load double, double* %v3_0, align 4
  %v5_0 = fpext double %v4_0 to x86_fp80
  store x86_fp80 %v5_0, x86_fp80* %st7.global-to-local, align 4
  %v2_3 = load i32, i32* @edi, align 8
  %v3_3 = add i32 %v2_3, -32
  %v4_3 = inttoptr i32 %v3_3 to double*
  %v5_3 = load double, double* %v4_3, align 4
  %v6_3 = fpext double %v5_3 to x86_fp80
  %v7_3 = fadd x86_fp80 %v5_0, %v6_3
  store x86_fp80 %v7_3, x86_fp80* %st7.global-to-local, align 4
  %v2_6 = add i32 %v1_0, -112
  %v3_6 = inttoptr i32 %v2_6 to double*
  %v4_6 = load double, double* %v3_6, align 4
  %v5_6 = fpext double %v4_6 to x86_fp80
  %v3_9 = add i32 %v2_3, -24
  %v4_9 = inttoptr i32 %v3_9 to double*
  %v5_9 = load double, double* %v4_9, align 4
  %v6_9 = fpext double %v5_9 to x86_fp80
  %v7_9 = fadd x86_fp80 %v5_6, %v6_9
  %v2_c = add i32 %v1_0, -120
  %v3_c = inttoptr i32 %v2_c to double*
  %v4_c = load double, double* %v3_c, align 4
  %v5_c = fpext double %v4_c to x86_fp80
  %v3_f = add i32 %v2_3, -16
  %v4_f = inttoptr i32 %v3_f to double*
  %v5_f = load double, double* %v4_f, align 4
  %v6_f = fpext double %v5_f to x86_fp80
  %v7_f = fadd x86_fp80 %v5_c, %v6_f
  %v3_14 = add i32 %v2_3, -60
  %v4_14 = inttoptr i32 %v3_14 to float*
  %v5_14 = load float, float* %v4_14, align 4
  %v6_14 = fpext float %v5_14 to x86_fp80
  %v7_14 = fmul x86_fp80 %v7_f, %v6_14
  %v3_17 = add i3 %v0_0, 3
  %v3_19 = add i32 %v2_3, -64
  %v4_19 = inttoptr i32 %v3_19 to float*
  %v5_19 = load float, float* %v4_19, align 4
  %v6_19 = fpext float %v5_19 to x86_fp80
  %v7_19 = fmul x86_fp80 %v7_9, %v6_19
  %v4_1c = fadd x86_fp80 %v7_14, %v7_19
  %v3_20 = add i32 %v2_3, -68
  %v4_20 = inttoptr i32 %v3_20 to float*
  %v5_20 = load float, float* %v4_20, align 4
  %v6_20 = fpext float %v5_20 to x86_fp80
  %v7_20 = fmul x86_fp80 %v7_3, %v6_20
  %v4_23 = fadd x86_fp80 %v4_1c, %v7_20
  %v3_27 = add i32 %v2_3, -36
  %v4_27 = inttoptr i32 %v3_27 to float*
  %v5_27 = load float, float* %v4_27, align 4
  %v6_27 = fpext float %v5_27 to x86_fp80
  %v7_27 = fmul x86_fp80 %v7_f, %v6_27
  %v3_2c = add i32 %v2_3, -40
  %v4_2c = inttoptr i32 %v3_2c to float*
  %v5_2c = load float, float* %v4_2c, align 4
  %v6_2c = fpext float %v5_2c to x86_fp80
  %v7_2c = fmul x86_fp80 %v7_9, %v6_2c
  %v4_2f = fadd x86_fp80 %v7_27, %v7_2c
  %v3_33 = add i32 %v2_3, -44
  %v4_33 = inttoptr i32 %v3_33 to float*
  %v5_33 = load float, float* %v4_33, align 4
  %v6_33 = fpext float %v5_33 to x86_fp80
  %v7_33 = fmul x86_fp80 %v7_3, %v6_33
  %v4_36 = fadd x86_fp80 %v4_2f, %v7_33
  store x86_fp80 %v4_23, x86_fp80* %st7.global-to-local, align 4
  store i3 %v3_17, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_4f = call i32 @__asm_fpatan()
  %v2_51 = load i32, i32* @edi, align 8
  %v3_51 = add i32 %v2_51, -80
  %v4_51 = inttoptr i32 %v3_51 to double*
  %v5_51 = load double, double* %v4_51, align 4
  %v6_51 = fpext double %v5_51 to x86_fp80
  %v7_51 = fsub x86_fp80 %v6_51, %v4_36
  %v4_54 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_54 = fpext double %v4_54 to x86_fp80
  %v6_54 = fmul x86_fp80 %v7_51, %v5_54
  %tmp238 = bitcast double %v4_54 to i64
  %tmp239 = trunc i64 %tmp238 to i32
  %v3_56 = add i32 %tmp239, -72
  %v4_56 = inttoptr i32 %v3_56 to i32*
  %v5_56 = load i32, i32* %v4_56, align 4
  %v6_56 = sitofp i32 %v5_56 to x86_fp80
  %v7_56 = fmul x86_fp80 %v6_54, %v6_56
  %v2_59 = call x86_fp80 @llvm.round.f80(x86_fp80 %v7_56)
  %v2_5f = fptosi x86_fp80 %v2_59 to i32
  %v6_65 = sitofp i32 %v5_56 to x86_fp80
  %v7_65 = fdiv x86_fp80 %v2_59, %v6_65
  %v3_68 = add i32 %tmp239, 8
  %v4_68 = inttoptr i32 %v3_68 to double*
  %v5_68 = load double, double* %v4_68, align 4
  %v6_68 = fpext double %v5_68 to x86_fp80
  %v7_68 = fmul x86_fp80 %v7_65, %v6_68
  %v2_6b = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_68)
  %v3_6b = fcmp olt x86_fp80 %v2_6b, 0xK403E8000000000000000
  %v0_6b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v3_6b, label %bb, label %bb240

bb:                                               ; preds = %dec_label_pc_0
  %v8_6b = add i3 %v0_6b, -1
  store i3 %v8_6b, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %bb240

bb240:                                            ; preds = %dec_label_pc_0, %bb
  %v0_6d = phi i3 [ %v8_6b, %bb ], [ %v0_6b, %dec_label_pc_0 ]
  %v3_6d = add i3 %v0_6d, -1
  store i3 %v3_6d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_77 = urem i32 %v2_5f, 2
  %v2_77 = icmp eq i32 %v1_77, 0
  %v1_7a = icmp eq i1 %v2_77, false
  %v1_82.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_7a, label %dec_label_pc_7f, label %dec_label_pc_7c

dec_label_pc_7c:                                  ; preds = %bb240
  %v2_7c = fsub x86_fp80 0xK80000000000000000000, %v1_82.pre
  store x86_fp80 %v2_7c, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_7f

dec_label_pc_7f:                                  ; preds = %bb240, %dec_label_pc_7c
  %v1_82 = phi x86_fp80 [ %v2_7c, %dec_label_pc_7c ], [ %v1_82.pre, %bb240 ]
  %v2_82 = load i32, i32* %esi.global-to-local, align 4
  %v3_82 = add i32 %v2_82, -112
  %v4_82 = fptrunc x86_fp80 %v1_82 to double
  %v5_82 = inttoptr i32 %v3_82 to double*
  store double %v4_82, double* %v5_82, align 4
  %v2_85 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_87 = fmul x86_fp80 %v2_85, %v2_85
  %v4_8d = fsub x86_fp80 %v4_87, %v4_87
  store x86_fp80 %v4_8d, x86_fp80* %st7.global-to-local, align 4
  %v3_91 = add i32 %v2_82, -120
  %v4_91 = fptrunc x86_fp80 %v4_8d to double
  %v5_91 = inttoptr i32 %v3_91 to double*
  store double %v4_91, double* %v5_91, align 4
  %v1_94 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_94 = add i3 %v0_6d, 1
  %v3_9c = add i32 %v2_82, -104
  %v4_9c = fptrunc x86_fp80 %v1_94 to double
  %v5_9c = inttoptr i32 %v3_9c to double*
  store double %v4_9c, double* %v5_9c, align 4
  store x86_fp80 %v1_94, x86_fp80* %st7.global-to-local, align 4
  %v4_a2 = load double, double* %v5_91, align 4
  %v5_a2 = fpext double %v4_a2 to x86_fp80
  store i3 %v4_94, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ab = call i32 @__asm_fpatan()
  %v2_ad = load i32, i32* @edi, align 8
  %v3_ad = add i32 %v2_ad, -92
  %v4_ad = inttoptr i32 %v3_ad to double*
  %v5_ad = load double, double* %v4_ad, align 4
  %v6_ad = fpext double %v5_ad to x86_fp80
  %v7_ad = fsub x86_fp80 %v6_ad, %v5_a2
  %v4_b0 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_b0 = fpext double %v4_b0 to x86_fp80
  %v6_b0 = fmul x86_fp80 %v7_ad, %v5_b0
  %tmp241 = bitcast double %v4_b0 to i64
  %tmp242 = trunc i64 %tmp241 to i32
  %v3_b2 = add i32 %tmp242, -84
  %v4_b2 = inttoptr i32 %v3_b2 to i32*
  %v5_b2 = load i32, i32* %v4_b2, align 4
  %v6_b2 = sitofp i32 %v5_b2 to x86_fp80
  %v7_b2 = fmul x86_fp80 %v6_b0, %v6_b2
  %v2_b5 = call x86_fp80 @llvm.round.f80(x86_fp80 %v7_b2)
  %v2_bb = fptosi x86_fp80 %v2_b5 to i32
  %v6_c1 = sitofp i32 %v5_b2 to x86_fp80
  %v7_c1 = fdiv x86_fp80 %v2_b5, %v6_c1
  %v3_c4 = add i32 %tmp242, 8
  %v4_c4 = inttoptr i32 %v3_c4 to double*
  %v5_c4 = load double, double* %v4_c4, align 4
  %v6_c4 = fpext double %v5_c4 to x86_fp80
  %v7_c4 = fmul x86_fp80 %v7_c1, %v6_c4
  %v2_c7 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_c4)
  %v3_c7 = fcmp olt x86_fp80 %v2_c7, 0xK403E8000000000000000
  %v0_c7 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v3_c7, label %bb243, label %dec_label_pc_7f._crit_edge

dec_label_pc_7f._crit_edge:                       ; preds = %dec_label_pc_7f
  br label %bb244

bb243:                                            ; preds = %dec_label_pc_7f
  %v8_c7 = add i3 %v0_c7, -1
  store i3 %v8_c7, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %bb244

bb244:                                            ; preds = %dec_label_pc_7f._crit_edge, %bb243
  %v0_c9 = phi i3 [ %v0_c7, %dec_label_pc_7f._crit_edge ], [ %v8_c7, %bb243 ]
  %v3_c9 = add i3 %v0_c9, -1
  store i3 %v3_c9, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_d3 = urem i32 %v2_bb, 2
  %v2_d3 = icmp eq i32 %v1_d3, 0
  %v1_d6 = icmp eq i1 %v2_d3, false
  %v1_de.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_d6, label %dec_label_pc_db, label %dec_label_pc_d8

dec_label_pc_d8:                                  ; preds = %bb244
  %v2_d8 = fsub x86_fp80 0xK80000000000000000000, %v1_de.pre
  store x86_fp80 %v2_d8, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_db

dec_label_pc_db:                                  ; preds = %bb244, %dec_label_pc_d8
  %v1_de = phi x86_fp80 [ %v2_d8, %dec_label_pc_d8 ], [ %v1_de.pre, %bb244 ]
  %v2_de = load i32, i32* %esi.global-to-local, align 4
  %v3_de = add i32 %v2_de, -104
  %v4_de = fptrunc x86_fp80 %v1_de to double
  %v5_de = inttoptr i32 %v3_de to double*
  store double %v4_de, double* %v5_de, align 4
  %v2_e1 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_e3 = fmul x86_fp80 %v2_e1, %v2_e1
  %v4_e9 = fsub x86_fp80 %v4_e3, %v4_e3
  store x86_fp80 %v4_e9, x86_fp80* %st7.global-to-local, align 4
  %v3_ed = add i32 %v2_de, -120
  %v4_ed = fptrunc x86_fp80 %v4_e9 to double
  %v5_ed = inttoptr i32 %v3_ed to double*
  store double %v4_ed, double* %v5_ed, align 4
  %v1_f0 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_f6 = xor i3 %v0_c9, -4
  store i3 %v4_f6, i3* %fpu_stat_TOP.global-to-local, align 1
  ret x86_fp80 %v1_f0
}

declare i32 @__asm_fpatan() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

attributes #0 = { nounwind readnone speculatable }
