source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp269 = call double @__decompiler_undefined_function_1()
  %tmp272 = call i32 @__decompiler_undefined_function_3()
  %stack_var_-40 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-40, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_54 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v8_54 = add i3 %v0_54, -1
  %tmp278 = call double @llvm.fabs.f64(double %v6_45)
  %v2_58 = fpext double %tmp278 to x86_fp80
  store x86_fp80 %v2_58, x86_fp80* %st7.global-to-local, align 4
  %v1_5a = load i32, i32* @edi, align 8
  %v2_5a = add i32 %v1_5a, 32
  %v3_5a = inttoptr i32 %v2_5a to double*
  %v4_5a = load double, double* %v3_5a, align 4
  %v5_5a = fpext double %v4_5a to x86_fp80
  store x86_fp80 %v5_5a, x86_fp80* %st6.global-to-local, align 4
  store i3 %v8_54, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_5f = call i32 @__asm_wait()
  %v0_60 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_60 = call i16 @__asm_fnstsw(i32 %v0_60)
  %tmp286 = and i16 %v1_60, 256
  %v16_62 = icmp ne i16 %tmp286, 0
  %v1_64 = icmp eq i1 %v16_62, false
  br i1 %v1_64, label %dec_label_pc_6d, label %dec_label_pc_66

dec_label_pc_66:                                  ; preds = %dec_label_pc_40
  %v0_66 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_68 = load i32, i32* @edi, align 8
  %v2_68 = add i32 %v1_68, 24
  %v3_68 = inttoptr i32 %v2_68 to double*
  %v4_68 = load double, double* %v3_68, align 4
  %v5_68 = fpext double %v4_68 to x86_fp80
  store x86_fp80 %v5_68, x86_fp80* %st7.global-to-local, align 4
  %.pre22 = fpext double %tmp269 to x86_fp80
  br label %dec_label_pc_e0

dec_label_pc_6d:                                  ; preds = %dec_label_pc_40
  %v1_6d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v0_6f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_6f = add i3 %v0_6f, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v4_71 = fsub x86_fp80 0xK3FFF8000000000000000, %v1_6d
  store x86_fp80 %v4_71, x86_fp80* %st7.global-to-local, align 4
  %v1_73 = load i32, i32* @edi, align 8
  %v2_73 = add i32 %v1_73, -72
  %v3_73 = inttoptr i32 %v2_73 to double*
  %v4_73 = load double, double* %v3_73, align 4
  %v5_73 = fpext double %v4_73 to x86_fp80
  store i3 %v1_6f, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_71, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v5_73, x86_fp80* %st7.global-to-local, align 4
  %v0_78 = call i32 @__asm_fyl2x()
  %v2_7e = icmp sgt i32 %tmp272, -1
  %v1_88.pre = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  br i1 %v2_7e, label %dec_label_pc_88, label %dec_label_pc_86

dec_label_pc_86:                                  ; preds = %dec_label_pc_6d
  %v2_86 = fsub x86_fp80 0xK80000000000000000000, %v1_88.pre
  store x86_fp80 %v2_86, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_88

dec_label_pc_88:                                  ; preds = %dec_label_pc_6d, %dec_label_pc_86
  %v1_88 = phi x86_fp80 [ %v2_86, %dec_label_pc_86 ], [ %v1_88.pre, %dec_label_pc_6d ]
  %v2_88 = load i32, i32* @edi, align 8
  %v3_88 = add i32 %v2_88, -92
  %v4_88 = inttoptr i32 %v3_88 to double*
  %v5_88 = load double, double* %v4_88, align 4
  %v6_88 = fpext double %v5_88 to x86_fp80
  %v7_88 = fadd x86_fp80 %v1_88, %v6_88
  store x86_fp80 %v7_88, x86_fp80* %st6.global-to-local, align 4
  %v2_8b = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_88)
  %v3_8b = fcmp olt x86_fp80 %v2_8b, 0xK403E8000000000000000
  %v0_8b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v3_8b, label %bb, label %dec_label_pc_88._crit_edge

bb:                                               ; preds = %dec_label_pc_88
  %v4_8b = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_88)
  store x86_fp80 %v4_8b, x86_fp80* %st6.global-to-local, align 4
  %v8_8b = add i3 %v0_8b, -1
  store i3 %v8_8b, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_88._crit_edge

dec_label_pc_88._crit_edge:                       ; preds = %dec_label_pc_88, %bb
  %v0_8d = phi i3 [ %v8_8b, %bb ], [ %v0_8b, %dec_label_pc_88 ]
  %v1_8d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_95 = load double, double* %stack_var_-40, align 8
  %v8_95 = fpext double %v3_95 to x86_fp80
  %v7_98 = fmul x86_fp80 %v1_8d, %v8_95
  %v5_9c = fpext double %tmp269 to x86_fp80
  %v7_a0 = fmul x86_fp80 %v1_8d, %v5_9c
  %v4_a6 = fsub x86_fp80 %v7_98, %v7_a0
  store x86_fp80 %v4_a6, x86_fp80* %st7.global-to-local, align 4
  %v4_b7 = fadd x86_fp80 %v7_a0, %v7_98
  store x86_fp80 %v4_b7, x86_fp80* %st6.global-to-local, align 4
  store i3 %v0_8d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_b9 = call i32 @__asm_fpatan(x86_fp80 %v1_8d, x86_fp80 %v1_8d)
  %v1_bb = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_bb = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_bb = fpext double %v4_bb to x86_fp80
  %v6_bb = fmul x86_fp80 %v1_bb, %v5_bb
  store x86_fp80 %v6_bb, x86_fp80* %st6.global-to-local, align 4
  %tmp280 = bitcast double %v4_bb to i64
  %tmp281 = trunc i64 %tmp280 to i32
  %v3_bd = add i32 %tmp281, -84
  %v4_bd = inttoptr i32 %v3_bd to double*
  %v5_bd = load double, double* %v4_bd, align 4
  %v6_bd = fpext double %v5_bd to x86_fp80
  %v7_bd = fdiv x86_fp80 %v6_bb, %v6_bd
  %v0_c0 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_ca = fsub x86_fp80 %v7_bd, %v7_bd
  store x86_fp80 %v4_ca, x86_fp80* %st6.global-to-local, align 4
  %v5_cc = load double, double* %v4_bd, align 4
  %v6_cc = fpext double %v5_cc to x86_fp80
  %v7_cc = fmul x86_fp80 %v4_ca, %v6_cc
  %v2_cf = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_cc)
  store x86_fp80 %v2_cf, x86_fp80* %st6.global-to-local, align 4
  %v3_d1 = add i32 %tmp281, -16
  %v4_d1 = inttoptr i32 %v3_d1 to double*
  %v5_d1 = load double, double* %v4_d1, align 4
  %v6_d1 = fpext double %v5_d1 to x86_fp80
  %v7_d1 = fdiv x86_fp80 %v2_cf, %v6_d1
  %v4_d6 = fadd x86_fp80 %v7_d1, 0xKBFFF8000000000000000
  store x86_fp80 %v4_d6, x86_fp80* %st6.global-to-local, align 4
  %v5_d8 = load double, double* %v4_d1, align 4
  %v6_d8 = fpext double %v5_d8 to x86_fp80
  %v7_d8 = fmul x86_fp80 %v4_d6, %v6_d8
  store x86_fp80 %v7_d8, x86_fp80* %st6.global-to-local, align 4
  %v3_db = add i32 %tmp281, 8
  %v4_db = inttoptr i32 %v3_db to double*
  %v5_db = load double, double* %v4_db, align 4
  %v6_db = fpext double %v5_db to x86_fp80
  %v7_db = fmul x86_fp80 %v7_d8, %v6_db
  %v2_de = fsub x86_fp80 0xK80000000000000000000, %v7_db
  store x86_fp80 %v2_de, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_e0

dec_label_pc_e0:                                  ; preds = %dec_label_pc_88._crit_edge, %dec_label_pc_66
  %v5_e5.pre-phi = phi x86_fp80 [ %v5_9c, %dec_label_pc_88._crit_edge ], [ %.pre22, %dec_label_pc_66 ]
  %v9_e0.pre-phi.in = phi i3 [ %v0_c0, %dec_label_pc_88._crit_edge ], [ %v0_66, %dec_label_pc_66 ]
  %v2_ff = phi i32 [ %tmp281, %dec_label_pc_88._crit_edge ], [ %v1_68, %dec_label_pc_66 ]
  %stack_var_-12.0 = phi x86_fp80 [ %v7_bd, %dec_label_pc_88._crit_edge ], [ 0xK00000000000000000000, %dec_label_pc_66 ]
  %v9_e0.pre-phi = add i3 %v9_e0.pre-phi.in, -1
  %v3_e0 = load double, double* %stack_var_-40, align 8
  %v8_e0 = fpext double %v3_e0 to x86_fp80
  %v3_e3 = fmul x86_fp80 %v8_e0, %v8_e0
  %v3_e9 = fmul x86_fp80 %v5_e5.pre-phi, %v5_e5.pre-phi
  %v4_eb = fadd x86_fp80 %v3_e9, %v3_e3
  %v7_ed = fpext double %v6_45 to x86_fp80
  %v3_f1 = fmul x86_fp80 %v7_ed, %v7_ed
  %v4_f3 = fadd x86_fp80 %v3_f1, %v4_eb
  store i3 %v9_e0.pre-phi, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_f5 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_f3)
  store x86_fp80 %v2_f5, x86_fp80* %st6.global-to-local, align 4
  %v3_f7 = add i32 %v2_ff, 40
  %v4_f7 = inttoptr i32 %v3_f7 to double*
  %v5_f7 = load double, double* %v4_f7, align 4
  %v6_f7 = fpext double %v5_f7 to x86_fp80
  %v7_f7 = fsub x86_fp80 %v2_f5, %v6_f7
  store x86_fp80 %v7_f7, x86_fp80* %st6.global-to-local, align 4
  %v3_fa = add i32 %v2_ff, -100
  %v4_fa = inttoptr i32 %v3_fa to double*
  %v5_fa = load double, double* %v4_fa, align 4
  %v6_fa = fpext double %v5_fa to x86_fp80
  %v7_fa = fadd x86_fp80 %v7_f7, %v6_fa
  %v2_fd = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_fa)
  store x86_fp80 %v2_fd, x86_fp80* %st6.global-to-local, align 4
  %v5_ff = load double, double* %v4_fa, align 4
  %v6_ff = fpext double %v5_ff to x86_fp80
  %v7_ff = fsub x86_fp80 %v2_fd, %v6_ff
  store x86_fp80 %v7_ff, x86_fp80* %st6.global-to-local, align 4
  %v0_104 = call i32 @__asm_wait()
  %v0_105 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_105 = call i16 @__asm_fnstsw(i32 %v0_105)
  %v2_105 = sext i16 %v1_105 to i32
  %v4_105 = and i32 %v0_104, -65536
  %tmp282 = udiv i32 %v2_105, 2
  %v12_107 = and i32 %tmp282, 32512
  %v2_105.masked = and i32 %v2_105, -65281
  %v13_107 = or i32 %v4_105, %v2_105.masked
  %v14_107 = or i32 %v13_107, %v12_107
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_111 = load i32, i32* @edi, align 8
  %v1_111 = add i32 %v0_111, -76
  %v2_111 = inttoptr i32 %v1_111 to i32*
  %v3_111 = load i32, i32* %v2_111, align 4
  %v10_111 = icmp eq i32 %v3_111, 0
  %v1_115 = icmp eq i1 %v10_111, false
  %v1_11a.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_115, label %dec_label_pc_11a, label %dec_label_pc_117

dec_label_pc_117:                                 ; preds = %dec_label_pc_e0
  %v3_117 = add i32 %v0_111, -32
  %v4_117 = inttoptr i32 %v3_117 to double*
  %v5_117 = load double, double* %v4_117, align 4
  %v6_117 = fpext double %v5_117 to x86_fp80
  %v7_117 = fdiv x86_fp80 %v1_11a.pre, %v6_117
  store x86_fp80 %v7_117, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_11a

dec_label_pc_11a:                                 ; preds = %dec_label_pc_e0, %dec_label_pc_117
  %v1_11a = phi x86_fp80 [ %v7_117, %dec_label_pc_117 ], [ %v1_11a.pre, %dec_label_pc_e0 ]
  %v2_11a = load i32, i32* %esi.global-to-local, align 4
  %v3_11a = add i32 %v2_11a, -32
  %v4_11a = fptrunc x86_fp80 %v1_11a to double
  %v5_11a = inttoptr i32 %v3_11a to double*
  store double %v4_11a, double* %v5_11a, align 4
  %v2_11d = add i32 %v2_11a, -24
  %v3_11d = inttoptr i32 %v2_11d to i32*
  %v4_11d = load i32, i32* %v3_11d, align 4
  %v5_11d = sitofp i32 %v4_11d to x86_fp80
  store x86_fp80 %v5_11d, x86_fp80* %st7.global-to-local, align 4
  %v2_120 = load i32, i32* @edi, align 8
  %v3_120 = add i32 %v2_120, -108
  %v4_120 = inttoptr i32 %v3_120 to double*
  %v5_120 = load double, double* %v4_120, align 4
  %v6_120 = fpext double %v5_120 to x86_fp80
  %v7_120 = fmul x86_fp80 %v5_11d, %v6_120
  store x86_fp80 %v7_120, x86_fp80* %st7.global-to-local, align 4
  %v3_123 = add i32 %v2_120, -116
  %v4_123 = inttoptr i32 %v3_123 to double*
  %v5_123 = load double, double* %v4_123, align 4
  %v6_123 = fpext double %v5_123 to x86_fp80
  %v7_123 = fadd x86_fp80 %v7_120, %v6_123
  store x86_fp80 %v7_123, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %stack_var_-12.0, x86_fp80* %st6.global-to-local, align 4
  %v3_12a = add i32 %v2_120, -124
  %v4_12a = inttoptr i32 %v3_12a to double*
  %v5_12a = load double, double* %v4_12a, align 4
  %v6_12a = fpext double %v5_12a to x86_fp80
  %v7_12a = fmul x86_fp80 %stack_var_-12.0, %v6_12a
  store x86_fp80 %v7_12a, x86_fp80* %st6.global-to-local, align 4
  %v4_12d = fadd x86_fp80 %v7_123, %v7_12a
  %v2_12f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_12d)
  store x86_fp80 %v2_12f, x86_fp80* %st7.global-to-local, align 4
  %v3_131 = add i32 %v2_11a, 128
  %tmp283 = fptrunc x86_fp80 %v4_12d to double
  %v4_131 = call double @llvm.fabs.f64(double %tmp283)
  %v5_131 = inttoptr i32 %v3_131 to double*
  store double %v4_131, double* %v5_131, align 4
  %v6_131 = add i3 %storemerge.in, 2
  store i3 %v6_131, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_107
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare i32 @__asm_fyl2x() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

declare i32 @__asm_fpatan(x86_fp80, x86_fp80) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_1() local_unnamed_addr

declare i32 @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
