source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp300 = call double @__decompiler_undefined_function_3()
  %stack_var_-100 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-100, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_4b = load i32, i32* @edi, align 8
  %v2_4b = add i32 %v1_4b, 8
  %v3_4b = inttoptr i32 %v2_4b to double*
  %v4_4b = load double, double* %v3_4b, align 4
  %v5_4b = fpext double %v4_4b to x86_fp80
  store x86_fp80 %v5_4b, x86_fp80* %st7.global-to-local, align 4
  %v3_4e = add i32 %v1_4b, -72
  %v4_4e = inttoptr i32 %v3_4e to double*
  %v5_4e = load double, double* %v4_4e, align 4
  %v6_4e = fpext double %v5_4e to x86_fp80
  %v7_4e = fmul x86_fp80 %v5_4b, %v6_4e
  store x86_fp80 %v7_4e, x86_fp80* %st7.global-to-local, align 4
  %v2_55 = add i3 %v0_4b, -2
  %v3_57 = add i32 %v1_4b, -128
  %v4_57 = inttoptr i32 %v3_57 to double*
  %v5_57 = load double, double* %v4_57, align 4
  %v6_57 = fpext double %v5_57 to x86_fp80
  %v7_57 = fmul x86_fp80 %v7_4e, %v6_57
  %v3_5e = add i32 %v1_4b, -120
  %v4_5e = inttoptr i32 %v3_5e to double*
  %v5_5e = load double, double* %v4_5e, align 4
  %v6_5e = fpext double %v5_5e to x86_fp80
  %v7_5e = fmul x86_fp80 %v7_4e, %v6_5e
  %v7_65 = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_65, x86_fp80* %st7.global-to-local, align 4
  %v5_69 = fpext double %tmp300 to x86_fp80
  %v3_6d = load double, double* %stack_var_-100, align 8
  %v8_6d = fpext double %v3_6d to x86_fp80
  %v3_72 = add i32 %v1_4b, -104
  %v4_72 = inttoptr i32 %v3_72 to float*
  %v5_72 = load float, float* %v4_72, align 4
  %v6_72 = fpext float %v5_72 to x86_fp80
  %v7_72 = fmul x86_fp80 %v8_6d, %v6_72
  %v3_77 = add i32 %v1_4b, -108
  %v4_77 = inttoptr i32 %v3_77 to float*
  %v5_77 = load float, float* %v4_77, align 4
  %v6_77 = fpext float %v5_77 to x86_fp80
  %v7_77 = fmul x86_fp80 %v5_69, %v6_77
  %v4_7a = fadd x86_fp80 %v7_72, %v7_77
  %v3_7e = add i32 %v1_4b, -112
  %v4_7e = inttoptr i32 %v3_7e to float*
  %v5_7e = load float, float* %v4_7e, align 4
  %v6_7e = fpext float %v5_7e to x86_fp80
  %v7_7e = fmul x86_fp80 %v7_65, %v6_7e
  %v4_81 = fadd x86_fp80 %v7_7e, %v4_7a
  %v3_85 = add i32 %v1_4b, -80
  %v4_85 = inttoptr i32 %v3_85 to float*
  %v5_85 = load float, float* %v4_85, align 4
  %v6_85 = fpext float %v5_85 to x86_fp80
  %v7_85 = fmul x86_fp80 %v8_6d, %v6_85
  %v3_8a = add i32 %v1_4b, -84
  %v4_8a = inttoptr i32 %v3_8a to float*
  %v5_8a = load float, float* %v4_8a, align 4
  %v6_8a = fpext float %v5_8a to x86_fp80
  %v7_8a = fmul x86_fp80 %v5_69, %v6_8a
  %v4_8d = fadd x86_fp80 %v7_85, %v7_8a
  %v3_91 = add i32 %v1_4b, -88
  %v4_91 = inttoptr i32 %v3_91 to float*
  %v5_91 = load float, float* %v4_91, align 4
  %v6_91 = fpext float %v5_91 to x86_fp80
  %v7_91 = fmul x86_fp80 %v7_65, %v6_91
  %v4_94 = fadd x86_fp80 %v4_8d, %v7_91
  %v3_98 = add i32 %v1_4b, -92
  %v4_98 = inttoptr i32 %v3_98 to float*
  %v5_98 = load float, float* %v4_98, align 4
  %v6_98 = fpext float %v5_98 to x86_fp80
  %v7_98 = fmul x86_fp80 %v8_6d, %v6_98
  %v3_9d = add i32 %v1_4b, -96
  %v4_9d = inttoptr i32 %v3_9d to float*
  %v5_9d = load float, float* %v4_9d, align 4
  %v6_9d = fpext float %v5_9d to x86_fp80
  %v7_9d = fmul x86_fp80 %v5_69, %v6_9d
  %v4_a0 = fadd x86_fp80 %v7_98, %v7_9d
  store x86_fp80 %v4_81, x86_fp80* %st7.global-to-local, align 4
  %v3_a4 = add i32 %v1_4b, -100
  %v4_a4 = inttoptr i32 %v3_a4 to float*
  %v5_a4 = load float, float* %v4_a4, align 4
  %v6_a4 = fpext float %v5_a4 to x86_fp80
  %v7_a4 = fmul x86_fp80 %v7_65, %v6_a4
  %v4_a7 = fadd x86_fp80 %v4_a0, %v7_a4
  %tmp308 = fptrunc x86_fp80 %v4_94 to double
  %tmp309 = call double @llvm.fabs.f64(double %tmp308)
  store double %tmp309, double* %stack_var_-100, align 8
  %tmp331 = fpext double %tmp309 to x86_fp80
  %v7_d8 = fmul x86_fp80 %v7_5e, %tmp331
  %v7_dc = fsub x86_fp80 %v7_d8, %v4_a7
  %v2_e0 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_dc)
  %tmp311 = fptrunc x86_fp80 %v7_dc to double
  %v4_e2 = call double @llvm.fabs.f64(double %tmp311)
  %v7_e6 = fdiv x86_fp80 %v2_e0, %v7_4e
  %v2_ea = call x86_fp80 @llvm.round.f80(x86_fp80 %v7_e6)
  %v7_ec = fmul x86_fp80 %v2_ea, %v7_4e
  %v6_f2 = fpext double %v4_e2 to x86_fp80
  %v7_f2 = fsub x86_fp80 %v6_f2, %v7_ec
  %v2_f6 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_f2)
  %v7_f8 = fadd x86_fp80 %v2_f6, %v7_57
  store x86_fp80 %v7_f8, x86_fp80* %st7.global-to-local, align 4
  store i3 %v2_55, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_102 = call i32 @__asm_wait()
  %v0_103 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_103 = call i16 @__asm_fnstsw(i32 %v0_103)
  %v3_113 = load double, double* %stack_var_-100, align 8
  %v8_113 = fpext double %v3_113 to x86_fp80
  %v4_116 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_116 = fpext double %v4_116 to x86_fp80
  %v6_116 = fmul x86_fp80 %v8_113, %v5_116
  store x86_fp80 %v6_116, x86_fp80* %st7.global-to-local, align 4
  %tmp313 = bitcast double %v4_116 to i64
  %tmp314 = trunc i64 %tmp313 to i32
  %v3_11c = add i32 %tmp314, 16
  %v4_11c = inttoptr i32 %v3_11c to double*
  %v5_11c = load double, double* %v4_11c, align 4
  %v6_11c = fpext double %v5_11c to x86_fp80
  %v7_11c = fmul x86_fp80 %v4_a7, %v6_11c
  %v4_11f = fsub x86_fp80 %v6_116, %v7_11c
  %v2_121 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_11f)
  %v7_13f = fmul x86_fp80 %v7_5e, %v2_121
  store x86_fp80 %v7_13f, x86_fp80* %st7.global-to-local, align 4
  %v6_147 = fmul x86_fp80 %v4_a7, %v5_116
  %v5_14c = load double, double* %v4_11c, align 4
  %v6_14c = fpext double %v5_14c to x86_fp80
  %v7_14c = fmul x86_fp80 %v8_113, %v6_14c
  %v4_14f = fadd x86_fp80 %v6_147, %v7_14c
  %v4_151 = fadd x86_fp80 %v4_14f, %v7_13f
  %v2_153 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_151)
  %tmp317 = fptrunc x86_fp80 %v4_151 to double
  %v4_155 = call double @llvm.fabs.f64(double %tmp317)
  %v7_159 = fdiv x86_fp80 %v2_153, %v7_4e
  %v2_15d = call x86_fp80 @llvm.round.f80(x86_fp80 %v7_159)
  %v7_15f = fmul x86_fp80 %v2_15d, %v7_4e
  %v6_165 = fpext double %v4_155 to x86_fp80
  %v7_165 = fsub x86_fp80 %v6_165, %v7_15f
  %v2_169 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_165)
  %v7_16b = fadd x86_fp80 %v2_169, %v7_57
  store x86_fp80 %v7_16b, x86_fp80* %st7.global-to-local, align 4
  %v0_175 = call i32 @__asm_wait()
  %v0_176 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_176 = call i16 @__asm_fnstsw(i32 %v0_176)
  %v3_186 = load double, double* %stack_var_-100, align 8
  %v8_186 = fpext double %v3_186 to x86_fp80
  %v4_189 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_189 = fpext double %v4_189 to x86_fp80
  %v6_189 = fmul x86_fp80 %v8_186, %v5_189
  store x86_fp80 %v6_189, x86_fp80* %st7.global-to-local, align 4
  %tmp319 = bitcast double %v4_189 to i64
  %tmp320 = trunc i64 %tmp319 to i32
  %v3_18f = add i32 %tmp320, 16
  %v4_18f = inttoptr i32 %v3_18f to double*
  %v5_18f = load double, double* %v4_18f, align 4
  %v6_18f = fpext double %v5_18f to x86_fp80
  %v7_18f = fmul x86_fp80 %v4_a7, %v6_18f
  %v4_192 = fadd x86_fp80 %v6_189, %v7_18f
  %v2_194 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_192)
  %v7_1b2 = fmul x86_fp80 %v7_5e, %v2_194
  store x86_fp80 %v7_1b2, x86_fp80* %st7.global-to-local, align 4
  %v6_1ba = fmul x86_fp80 %v4_a7, %v5_189
  %v5_1bf = load double, double* %v4_18f, align 4
  %v6_1bf = fpext double %v5_1bf to x86_fp80
  %v7_1bf = fmul x86_fp80 %v8_186, %v6_1bf
  %v4_1c4 = fsub x86_fp80 %v6_1ba, %v7_1bf
  %v4_1c6 = fadd x86_fp80 %v4_1c4, %v7_1b2
  %v2_1c8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_1c6)
  %tmp323 = fptrunc x86_fp80 %v4_1c6 to double
  %v4_1ca = call double @llvm.fabs.f64(double %tmp323)
  %v7_1ce = fdiv x86_fp80 %v2_1c8, %v7_4e
  %v2_1d2 = call x86_fp80 @llvm.round.f80(x86_fp80 %v7_1ce)
  %v7_1d4 = fmul x86_fp80 %v2_1d2, %v7_4e
  %v6_1da = fpext double %v4_1ca to x86_fp80
  %v7_1da = fsub x86_fp80 %v6_1da, %v7_1d4
  %v2_1de = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_1da)
  %v7_1e0 = fadd x86_fp80 %v2_1de, %v7_57
  store x86_fp80 %v7_1e0, x86_fp80* %st7.global-to-local, align 4
  %v0_1ea = call i32 @__asm_wait()
  %v0_1eb = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1eb = call i16 @__asm_fnstsw(i32 %v0_1eb)
  %storemerge16.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_f8, x86_fp80* %st7.global-to-local, align 4
  %v6_203 = add i3 %storemerge16.in, -1
  store i3 %v6_203, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_209 = call i32 @__asm_wait()
  %v0_20a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_20a = call i16 @__asm_fnstsw(i32 %v0_20a)
  store i3 %storemerge16.in, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_218 = call i32 @__asm_wait()
  %v1_219 = call i16 @__asm_fnstsw(i32 %v0_20a)
  %v2_219 = sext i16 %v1_219 to i32
  %v4_219 = and i32 %v0_218, -65536
  %tmp326 = udiv i32 %v2_219, 2
  %v12_21b = and i32 %tmp326, 32512
  %v2_219.masked = and i32 %v2_219, -65281
  %v13_21b = or i32 %v4_219, %v2_219.masked
  %v14_21b = or i32 %v13_21b, %v12_21b
  %v1_21f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  %v3_225 = fmul x86_fp80 %v1_21f, %v1_21f
  %v3_22b = fmul x86_fp80 %v4_81, %v4_81
  %v4_22d = fadd x86_fp80 %v3_22b, %v3_225
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_22f = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_22d)
  store x86_fp80 %v2_22f, x86_fp80* %st7.global-to-local, align 4
  %v2_231 = load i32, i32* @edi, align 8
  %v3_231 = add i32 %v2_231, -16
  %v4_231 = inttoptr i32 %v3_231 to double*
  %v5_231 = load double, double* %v4_231, align 4
  %v6_231 = fpext double %v5_231 to x86_fp80
  %v7_231 = fsub x86_fp80 %v2_22f, %v6_231
  store x86_fp80 %v7_231, x86_fp80* %st7.global-to-local, align 4
  %v1_234 = add i32 %v2_231, -76
  %v2_234 = inttoptr i32 %v1_234 to i32*
  %v3_234 = load i32, i32* %v2_234, align 4
  %v10_234 = icmp eq i32 %v3_234, 0
  %v1_238 = icmp eq i1 %v10_234, false
  br i1 %v1_238, label %dec_label_pc_23d, label %dec_label_pc_23a

dec_label_pc_23a:                                 ; preds = %dec_label_pc_40
  %v3_23a = add i32 %v2_231, -32
  %v4_23a = inttoptr i32 %v3_23a to double*
  %v5_23a = load double, double* %v4_23a, align 4
  %v6_23a = fpext double %v5_23a to x86_fp80
  %v7_23a = fdiv x86_fp80 %v7_231, %v6_23a
  store x86_fp80 %v7_23a, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_23d

dec_label_pc_23d:                                 ; preds = %dec_label_pc_23a, %dec_label_pc_40
  %v1_23d = phi x86_fp80 [ %v7_23a, %dec_label_pc_23a ], [ %v7_231, %dec_label_pc_40 ]
  %v2_23d = load i32, i32* %esi.global-to-local, align 4
  %v3_23d = add i32 %v2_23d, -32
  %v4_23d = fptrunc x86_fp80 %v1_23d to double
  %v5_23d = inttoptr i32 %v3_23d to double*
  store double %v4_23d, double* %v5_23d, align 4
  %v6_23d = add i3 %storemerge.in, 2
  store i3 %v6_23d, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_21b
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
