source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp261 = call double @__decompiler_undefined_function_3()
  %stack_var_-28 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-28, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4b = fpext double %v6_45 to x86_fp80
  %v8_4b = add i3 %v0_4b, -1
  store i3 %v8_4b, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_4b, x86_fp80* %st7.global-to-local, align 4
  %v0_51 = call i32 @__asm_wait()
  %v0_52 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_52 = call i16 @__asm_fnstsw(i32 %v0_52)
  %tmp272 = and i16 %v1_52, 256
  %v4_54 = icmp ne i16 %tmp272, 0
  %v1_55 = icmp eq i1 %v4_54, false
  %v1_5c = load i32, i32* %edi.global-to-local, align 4
  %storemerge9.in.in.in.in.v = select i1 %v1_55, i32 -116, i32 -108
  %storemerge9.in.in.in.in = add i32 %storemerge9.in.in.in.in.v, %v1_5c
  %storemerge9.in.in.in = inttoptr i32 %storemerge9.in.in.in.in to double*
  %storemerge9.in.in = load double, double* %storemerge9.in.in.in, align 4
  %storemerge12.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge12 = add i3 %storemerge12.in, -1
  %storemerge6 = fpext double %storemerge9.in.in to x86_fp80
  store x86_fp80 %storemerge6, x86_fp80* %st7.global-to-local, align 4
  %v2_5f = load i32, i32* %esi.global-to-local, align 4
  %v3_5f = add i32 %v2_5f, 128
  %v5_5f = inttoptr i32 %v3_5f to double*
  store double %storemerge9.in.in, double* %v5_5f, align 4
  %v1_65 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_65 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v1_65)
  store x86_fp80 %v2_65, x86_fp80* %st7.global-to-local, align 4
  %v3_67 = add i32 %v1_5c, -100
  %v4_67 = inttoptr i32 %v3_67 to double*
  %v5_67 = load double, double* %v4_67, align 4
  %v6_67 = fpext double %v5_67 to x86_fp80
  %v7_67 = fsub x86_fp80 %v2_65, %v6_67
  store x86_fp80 %v7_67, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge12, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_75 = call i32 @__asm_wait()
  %v0_76 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_76 = call i16 @__asm_fnstsw(i32 %v0_76)
  %tmp273 = and i16 %v1_76, 256
  %v4_78 = icmp eq i16 %tmp273, 0
  %v2_8f.pre = load i32, i32* %edi.global-to-local, align 4
  br i1 %v4_78, label %dec_label_pc_7b, label %dec_label_pc_8a

dec_label_pc_7b:                                  ; preds = %dec_label_pc_40
  %v2_7d = add i32 %v2_8f.pre, -124
  %v3_7d = inttoptr i32 %v2_7d to double*
  %v4_7d = load double, double* %v3_7d, align 4
  %v5_7d = fpext double %v4_7d to x86_fp80
  store x86_fp80 %v5_7d, x86_fp80* %st7.global-to-local, align 4
  %v2_80 = load i32, i32* %esi.global-to-local, align 4
  %v3_80 = add i32 %v2_80, 128
  %v5_80 = inttoptr i32 %v3_80 to double*
  store double %v4_7d, double* %v5_80, align 4
  br label %dec_label_pc_8a

dec_label_pc_8a:                                  ; preds = %dec_label_pc_40, %dec_label_pc_7b
  %v3_8a = load double, double* %stack_var_-28, align 8
  %tmp268 = call double @llvm.fabs.f64(double %v3_8a)
  %v2_8d = fpext double %tmp268 to x86_fp80
  store x86_fp80 %v2_8d, x86_fp80* %st7.global-to-local, align 4
  %v3_8f = add i32 %v2_8f.pre, -84
  %v4_8f = inttoptr i32 %v3_8f to double*
  %v5_8f = load double, double* %v4_8f, align 4
  %v6_8f = fpext double %v5_8f to x86_fp80
  %v7_8f = fsub x86_fp80 %v2_8d, %v6_8f
  store x86_fp80 %v7_8f, x86_fp80* %st7.global-to-local, align 4
  %v0_94 = call i32 @__asm_wait()
  %v0_95 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_95 = call i16 @__asm_fnstsw(i32 %v0_95)
  %v2_95 = sext i16 %v1_95 to i32
  %v4_95 = and i32 %v0_94, -65536
  %v5_95 = or i32 %v4_95, %v2_95
  %tmp269 = and i32 %v2_95, 256
  %v4_97 = icmp eq i32 %tmp269, 0
  %v0_a7 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_c0.pre = load i32, i32* %edi.global-to-local, align 4
  br i1 %v4_97, label %dec_label_pc_9a, label %dec_label_pc_a9

dec_label_pc_9a:                                  ; preds = %dec_label_pc_8a
  %v2_9c = add i32 %v2_c0.pre, -124
  %v3_9c = inttoptr i32 %v2_9c to double*
  %v4_9c = load double, double* %v3_9c, align 4
  %v5_9c = fpext double %v4_9c to x86_fp80
  store x86_fp80 %v5_9c, x86_fp80* %st7.global-to-local, align 4
  %v2_9f = load i32, i32* %esi.global-to-local, align 4
  %v3_9f = add i32 %v2_9f, 128
  %v5_9f = inttoptr i32 %v3_9f to double*
  store double %v4_9c, double* %v5_9f, align 4
  br label %dec_label_pc_a9

dec_label_pc_a9:                                  ; preds = %dec_label_pc_8a, %dec_label_pc_9a
  %storemerge.pre-phi = add i3 %v0_a7, 1
  %v3_a9 = load double, double* %stack_var_-28, align 8
  %v8_a9 = fpext double %v3_a9 to x86_fp80
  %v3_ac = fmul x86_fp80 %v8_a9, %v8_a9
  %v5_ae = fpext double %tmp261 to x86_fp80
  %v3_b2 = fmul x86_fp80 %v5_ae, %v5_ae
  %v4_b4 = fadd x86_fp80 %v3_b2, %v3_ac
  %v3_ba = fmul x86_fp80 %v7_4b, %v7_4b
  %v4_bc = fadd x86_fp80 %v3_ba, %v4_b4
  %v2_be = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_bc)
  store x86_fp80 %v2_be, x86_fp80* %st7.global-to-local, align 4
  %v3_c0 = add i32 %v2_c0.pre, -72
  %v4_c0 = inttoptr i32 %v3_c0 to double*
  %v5_c0 = load double, double* %v4_c0, align 4
  %v6_c0 = fpext double %v5_c0 to x86_fp80
  %v7_c0 = fmul x86_fp80 %v2_be, %v6_c0
  %v4_c3 = fadd x86_fp80 %v7_c0, %v7_c0
  store i3 %storemerge.pre-phi, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_c5 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_c3)
  store x86_fp80 %v2_c5, x86_fp80* %st7.global-to-local, align 4
  %v3_c7 = add i32 %v2_c0.pre, -16
  %v4_c7 = inttoptr i32 %v3_c7 to double*
  %v5_c7 = load double, double* %v4_c7, align 4
  %v6_c7 = fpext double %v5_c7 to x86_fp80
  %v7_c7 = fsub x86_fp80 %v2_c5, %v6_c7
  store x86_fp80 %v7_c7, x86_fp80* %st7.global-to-local, align 4
  %v1_ca = add i32 %v2_c0.pre, -76
  %v2_ca = inttoptr i32 %v1_ca to i32*
  %v3_ca = load i32, i32* %v2_ca, align 4
  %v10_ca = icmp eq i32 %v3_ca, 0
  %v1_ce = icmp eq i1 %v10_ca, false
  br i1 %v1_ce, label %dec_label_pc_d3, label %dec_label_pc_d0

dec_label_pc_d0:                                  ; preds = %dec_label_pc_a9
  %v3_d0 = add i32 %v2_c0.pre, -32
  %v4_d0 = inttoptr i32 %v3_d0 to double*
  %v5_d0 = load double, double* %v4_d0, align 4
  %v6_d0 = fpext double %v5_d0 to x86_fp80
  %v7_d0 = fdiv x86_fp80 %v7_c7, %v6_d0
  store x86_fp80 %v7_d0, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_d3

dec_label_pc_d3:                                  ; preds = %dec_label_pc_d0, %dec_label_pc_a9
  %v1_d3 = phi x86_fp80 [ %v7_d0, %dec_label_pc_d0 ], [ %v7_c7, %dec_label_pc_a9 ]
  %v2_d3 = load i32, i32* %esi.global-to-local, align 4
  %v3_d3 = add i32 %v2_d3, -32
  %v4_d3 = fptrunc x86_fp80 %v1_d3 to double
  %v5_d3 = inttoptr i32 %v3_d3 to double*
  store double %v4_d3, double* %v5_d3, align 4
  %v6_d3 = add i3 %v0_a7, 2
  store i3 %v6_d3, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v5_95
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
