source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp265 = call i8 @__decompiler_undefined_function_3()
  %tmp266 = call double @__decompiler_undefined_function_4()
  %stack_var_-80 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-80, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i32, i32* %edi.global-to-local, align 4
  %v1_4b = add i32 %v0_4b, -44
  store i32 %v1_4b, i32* %edi.global-to-local, align 4
  %v0_4e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4e = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_4e, x86_fp80* %st7.global-to-local, align 4
  %v5_52 = fpext double %tmp266 to x86_fp80
  %v6_52 = add i3 %v0_4e, -2
  store x86_fp80 %v5_52, x86_fp80* %st6.global-to-local, align 4
  %v3_56 = load double, double* %stack_var_-80, align 8
  %v8_56 = fpext double %v3_56 to x86_fp80
  %v3_5b = add i32 %v0_4b, -104
  %v4_5b = inttoptr i32 %v3_5b to float*
  %v5_5b = load float, float* %v4_5b, align 4
  %v6_5b = fpext float %v5_5b to x86_fp80
  %v7_5b = fmul x86_fp80 %v8_56, %v6_5b
  %v3_60 = add i32 %v0_4b, -108
  %v4_60 = inttoptr i32 %v3_60 to float*
  %v5_60 = load float, float* %v4_60, align 4
  %v6_60 = fpext float %v5_60 to x86_fp80
  %v7_60 = fmul x86_fp80 %v5_52, %v6_60
  %v4_63 = fadd x86_fp80 %v7_5b, %v7_60
  %v3_67 = add i32 %v0_4b, -112
  %v4_67 = inttoptr i32 %v3_67 to float*
  %v5_67 = load float, float* %v4_67, align 4
  %v6_67 = fpext float %v5_67 to x86_fp80
  %v7_67 = fmul x86_fp80 %v7_4e, %v6_67
  %v4_6a = fadd x86_fp80 %v7_67, %v4_63
  %v3_6e = add i32 %v0_4b, -80
  %v4_6e = inttoptr i32 %v3_6e to float*
  %v5_6e = load float, float* %v4_6e, align 4
  %v6_6e = fpext float %v5_6e to x86_fp80
  %v7_6e = fmul x86_fp80 %v8_56, %v6_6e
  %v3_73 = add i32 %v0_4b, -84
  %v4_73 = inttoptr i32 %v3_73 to float*
  %v5_73 = load float, float* %v4_73, align 4
  %v6_73 = fpext float %v5_73 to x86_fp80
  %v7_73 = fmul x86_fp80 %v5_52, %v6_73
  %v4_76 = fadd x86_fp80 %v7_6e, %v7_73
  %v3_7a = add i32 %v0_4b, -88
  %v4_7a = inttoptr i32 %v3_7a to float*
  %v5_7a = load float, float* %v4_7a, align 4
  %v6_7a = fpext float %v5_7a to x86_fp80
  %v7_7a = fmul x86_fp80 %v7_4e, %v6_7a
  %v4_7d = fadd x86_fp80 %v4_76, %v7_7a
  %v3_81 = add i32 %v0_4b, -92
  %v4_81 = inttoptr i32 %v3_81 to float*
  %v5_81 = load float, float* %v4_81, align 4
  %v6_81 = fpext float %v5_81 to x86_fp80
  %v7_81 = fmul x86_fp80 %v8_56, %v6_81
  store x86_fp80 %v7_81, x86_fp80* %st6.global-to-local, align 4
  %v3_86 = add i32 %v0_4b, -96
  %v4_86 = inttoptr i32 %v3_86 to float*
  %v5_86 = load float, float* %v4_86, align 4
  %v6_86 = fpext float %v5_86 to x86_fp80
  %v7_86 = fmul x86_fp80 %v5_52, %v6_86
  %v4_89 = fadd x86_fp80 %v7_81, %v7_86
  store x86_fp80 %v4_89, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_6a, x86_fp80* %st7.global-to-local, align 4
  %v3_8d = add i32 %v0_4b, -100
  %v4_8d = inttoptr i32 %v3_8d to float*
  %v5_8d = load float, float* %v4_8d, align 4
  %v6_8d = fpext float %v5_8d to x86_fp80
  %v7_8d = fmul x86_fp80 %v7_4e, %v6_8d
  %v4_90 = fadd x86_fp80 %v4_89, %v7_8d
  %tmp271 = fptrunc x86_fp80 %v4_7d to double
  store double %tmp271, double* %stack_var_-80, align 8
  %v4_99 = fptrunc x86_fp80 %v4_6a to double
  store i32 %v0_4b, i32* %edi.global-to-local, align 4
  %v4_a0 = zext i8 %tmp265 to i32
  %v5_a0 = load i32, i32* %edx.global-to-local, align 4
  %v6_a0 = and i32 %v5_a0, -256
  %v7_a0 = or i32 %v6_a0, %v4_a0
  store i32 %v7_a0, i32* %edx.global-to-local, align 4
  %tmp272 = call double @llvm.fabs.f64(double %tmp271)
  %v2_a8 = fpext double %tmp272 to x86_fp80
  store x86_fp80 %v2_a8, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_52, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_90, x86_fp80* %st6.global-to-local, align 4
  %v1_ae = add i32 %v0_4b, -72
  %v2_ae = inttoptr i32 %v1_ae to i32*
  %v3_ae = load i32, i32* %v2_ae, align 4
  %v10_ae = icmp eq i32 %v3_ae, 0
  %v1_b2 = icmp eq i1 %v10_ae, false
  br i1 %v1_b2, label %dec_label_pc_b7, label %dec_label_pc_b4

dec_label_pc_b4:                                  ; preds = %dec_label_pc_40
  %v2_b4 = xor i8 %tmp265, -128
  %v8_b4 = zext i8 %v2_b4 to i32
  %v11_b4 = or i32 %v6_a0, %v8_b4
  store i32 %v11_b4, i32* %edx.global-to-local, align 4
  br label %dec_label_pc_b7

dec_label_pc_b7:                                  ; preds = %dec_label_pc_b4, %dec_label_pc_40
  %v0_b7 = phi i32 [ %v11_b4, %dec_label_pc_b4 ], [ %v7_a0, %dec_label_pc_40 ]
  %v1_b7 = trunc i32 %v0_b7 to i8
  %v2_b7 = and i8 %v1_b7, -128
  %v3_b7 = icmp eq i8 %v2_b7, 0
  %v8_b7 = zext i8 %v2_b7 to i32
  %v10_b7 = and i32 %v0_b7, -256
  %v11_b7 = or i32 %v10_b7, %v8_b7
  store i32 %v11_b7, i32* %edx.global-to-local, align 4
  %v1_ba = icmp eq i1 %v3_b7, false
  %v3_c0 = inttoptr i32 %v0_4b to double*
  %v4_c0 = load double, double* %v3_c0, align 4
  %v5_c0 = fpext double %v4_c0 to x86_fp80
  %tmp273 = fsub x86_fp80 0xK80000000000000000000, %v5_c0
  %storemerge11.in.in.p = select i1 %v1_ba, x86_fp80 %tmp273, x86_fp80 %v5_c0
  %storemerge11.in.in = fadd x86_fp80 %storemerge11.in.in.p, %v2_a8
  %v2_c2 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %storemerge11.in.in)
  store x86_fp80 %v2_c2, x86_fp80* %st7.global-to-local, align 4
  %v0_c6 = call i32 @__asm_wait()
  %v0_c7 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_c7 = call i16 @__asm_fnstsw(i32 %v0_c7)
  %v2_c7 = sext i16 %v1_c7 to i32
  %storemerge8.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge8 = add i3 %storemerge8.in, 1
  %v2_d3 = load i32, i32* %edi.global-to-local, align 4
  %v3_d3 = inttoptr i32 %v2_d3 to double*
  %v4_d3 = load double, double* %v3_d3, align 4
  %v5_d3 = fpext double %v4_d3 to x86_fp80
  %v6_d3 = fsub x86_fp80 %v2_c2, %v5_d3
  %v2_d7 = call x86_fp80 @llvm.round.f80(x86_fp80 %v6_d3)
  store x86_fp80 %v2_d7, x86_fp80* %st6.global-to-local, align 4
  %v4_d9 = fsub x86_fp80 %v6_d3, %v2_d7
  store x86_fp80 %v4_d9, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge8, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_db = add i32 %v2_d3, -68
  %v2_db = inttoptr i32 %v1_db to i32*
  %v3_db = load i32, i32* %v2_db, align 4
  %v10_db = icmp eq i32 %v3_db, 0
  br i1 %v10_db, label %dec_label_pc_fb, label %dec_label_pc_e1

dec_label_pc_e1:                                  ; preds = %dec_label_pc_b7
  %v2_e1 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_d9)
  store x86_fp80 %v2_e1, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge8.in, i3* %fpu_stat_TOP.global-to-local, align 1
  %tmp275 = call double @llvm.fabs.f64(double %v4_99)
  %v2_e7 = fpext double %tmp275 to x86_fp80
  store x86_fp80 %v2_e7, x86_fp80* %st6.global-to-local, align 4
  %v0_eb = call i32 @__asm_wait()
  %v0_ec = load i32, i32* %fpsw.global-to-local, align 4
  %v1_ec = call i16 @__asm_fnstsw(i32 %v0_ec)
  %v2_ec = sext i16 %v1_ec to i32
  %v4_ec = and i32 %v0_eb, -65536
  %tmp277 = udiv i32 %v2_ec, 2
  %v12_ee = and i32 %tmp277, 32512
  %v2_ec.masked = and i32 %v2_ec, -65281
  %v13_ee = or i32 %v4_ec, %v2_ec.masked
  %v14_ee = or i32 %v13_ee, %v12_ee
  %v15_ee16 = and i32 %v2_ec, 256
  %v16_ee = icmp eq i32 %v15_ee16, 0
  %v0_f6 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v16_ee, label %dec_label_pc_f2, label %dec_label_pc_e1.dec_label_pc_f8_crit_edge

dec_label_pc_e1.dec_label_pc_f8_crit_edge:        ; preds = %dec_label_pc_e1
  %v1_107.pre.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f8

dec_label_pc_f2:                                  ; preds = %dec_label_pc_e1
  %v1_f6 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v1_f6, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f8

dec_label_pc_f8:                                  ; preds = %dec_label_pc_e1.dec_label_pc_f8_crit_edge, %dec_label_pc_f2
  %v1_107.pre = phi x86_fp80 [ %v1_107.pre.pre, %dec_label_pc_e1.dec_label_pc_f8_crit_edge ], [ %v1_f6, %dec_label_pc_f2 ]
  %storemerge = add i3 %v0_f6, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_107.pre = load i32, i32* %edi.global-to-local, align 4
  br label %dec_label_pc_107

dec_label_pc_fb:                                  ; preds = %dec_label_pc_b7
  %v4_c7 = and i32 %v0_c6, -65536
  %v2_c7.masked = and i32 %v2_c7, -65281
  %v13_c9 = or i32 %v4_c7, %v2_c7.masked
  %tmp274 = udiv i32 %v2_c7, 2
  %v12_c9 = and i32 %tmp274, 32512
  %v14_c9 = or i32 %v13_c9, %v12_c9
  %v3_fb = fmul x86_fp80 %v4_d9, %v4_d9
  %v3_101 = fmul x86_fp80 %v4_6a, %v4_6a
  store x86_fp80 %v3_101, x86_fp80* %st6.global-to-local, align 4
  %v4_103 = fadd x86_fp80 %v3_101, %v3_fb
  store i3 %storemerge8, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_105 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_103)
  store x86_fp80 %v2_105, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_107

dec_label_pc_107:                                 ; preds = %dec_label_pc_fb, %dec_label_pc_f8
  %v0_119 = phi i32 [ %v14_c9, %dec_label_pc_fb ], [ %v14_ee, %dec_label_pc_f8 ]
  %v0_113 = phi i3 [ %storemerge8, %dec_label_pc_fb ], [ %storemerge, %dec_label_pc_f8 ]
  %v2_110 = phi i32 [ %v2_d3, %dec_label_pc_fb ], [ %v2_107.pre, %dec_label_pc_f8 ]
  %v1_107 = phi x86_fp80 [ %v2_105, %dec_label_pc_fb ], [ %v1_107.pre, %dec_label_pc_f8 ]
  %v3_107 = add i32 %v2_110, -16
  %v4_107 = inttoptr i32 %v3_107 to double*
  %v5_107 = load double, double* %v4_107, align 4
  %v6_107 = fpext double %v5_107 to x86_fp80
  %v7_107 = fsub x86_fp80 %v1_107, %v6_107
  store x86_fp80 %v7_107, x86_fp80* %st7.global-to-local, align 4
  %v1_10a = add i32 %v2_110, -76
  %v2_10a = inttoptr i32 %v1_10a to i32*
  %v3_10a = load i32, i32* %v2_10a, align 4
  %v10_10a = icmp eq i32 %v3_10a, 0
  %v1_10e = icmp eq i1 %v10_10a, false
  br i1 %v1_10e, label %dec_label_pc_113, label %dec_label_pc_110

dec_label_pc_110:                                 ; preds = %dec_label_pc_107
  %v3_110 = add i32 %v2_110, -32
  %v4_110 = inttoptr i32 %v3_110 to double*
  %v5_110 = load double, double* %v4_110, align 4
  %v6_110 = fpext double %v5_110 to x86_fp80
  %v7_110 = fdiv x86_fp80 %v7_107, %v6_110
  store x86_fp80 %v7_110, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_113

dec_label_pc_113:                                 ; preds = %dec_label_pc_110, %dec_label_pc_107
  %v1_113 = phi x86_fp80 [ %v7_110, %dec_label_pc_110 ], [ %v7_107, %dec_label_pc_107 ]
  %v2_113 = load i32, i32* %esi.global-to-local, align 4
  %v3_113 = add i32 %v2_113, -32
  %v4_113 = fptrunc x86_fp80 %v1_113 to double
  %v5_113 = inttoptr i32 %v3_113 to double*
  store double %v4_113, double* %v5_113, align 4
  %v6_113 = add i3 %v0_113, 1
  store i3 %v6_113, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v0_119
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i8 @__decompiler_undefined_function_3() local_unnamed_addr

declare double @__decompiler_undefined_function_4() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
