source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp262 = call double @__decompiler_undefined_function_3()
  %stack_var_-66 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-66, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_4b = load double, double* %stack_var_-66, align 8
  %v8_4b = fpext double %v3_4b to x86_fp80
  store x86_fp80 %v8_4b, x86_fp80* %st7.global-to-local, align 4
  %v5_4e = fpext double %tmp262 to x86_fp80
  %v6_4e = add i3 %v0_4b, -2
  store i3 %v6_4e, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_52 = call i32 @__asm_fpatan(i32 %v1_45)
  %v2_54 = load i32, i32* @edi, align 8
  %v3_54 = add i32 %v2_54, 16
  %v4_54 = inttoptr i32 %v3_54 to double*
  %v5_54 = load double, double* %v4_54, align 4
  %v6_54 = fpext double %v5_54 to x86_fp80
  %v7_54 = fsub x86_fp80 %v6_54, %v5_4e
  %v4_57 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_57 = fpext double %v4_57 to x86_fp80
  %v6_57 = fmul x86_fp80 %v7_54, %v5_57
  %tmp267 = bitcast double %v4_57 to i64
  %tmp268 = trunc i64 %tmp267 to i32
  %v3_59 = add i32 %tmp268, -80
  %v4_59 = inttoptr i32 %v3_59 to i32*
  %v5_59 = load i32, i32* %v4_59, align 4
  %v6_59 = sitofp i32 %v5_59 to x86_fp80
  %v7_59 = fmul x86_fp80 %v6_57, %v6_59
  %v6_64 = sitofp i32 %v5_59 to x86_fp80
  %v7_64 = fdiv x86_fp80 %v7_59, %v6_64
  %v3_67 = add i32 %tmp268, 8
  %v4_67 = inttoptr i32 %v3_67 to double*
  %v5_67 = load double, double* %v4_67, align 4
  %v6_67 = fpext double %v5_67 to x86_fp80
  %v7_67 = fmul x86_fp80 %v7_64, %v6_67
  %v2_6a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_67)
  %v3_6a = fcmp olt x86_fp80 %v2_6a, 0xK403E8000000000000000
  %v0_6a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v3_6a, label %bb, label %dec_label_pc_40._crit_edge

bb:                                               ; preds = %dec_label_pc_40
  %v8_6a = add i3 %v0_6a, -1
  store i3 %v8_6a, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_40._crit_edge

dec_label_pc_40._crit_edge:                       ; preds = %dec_label_pc_40, %bb
  %v0_6c = phi i3 [ %v8_6a, %bb ], [ %v0_6a, %dec_label_pc_40 ]
  %v1_6c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v6_6c = add i3 %v0_6c, 1
  %v3_74 = load double, double* %stack_var_-66, align 8
  %v8_74 = fpext double %v3_74 to x86_fp80
  %v7_77 = fmul x86_fp80 %v1_6c, %v8_74
  %v7_7f = fmul x86_fp80 %v1_6c, %v5_4e
  %v4_85 = fsub x86_fp80 %v7_77, %v7_7f
  store x86_fp80 %v4_85, x86_fp80* %st7.global-to-local, align 4
  %v4_96 = fadd x86_fp80 %v7_7f, %v7_77
  %v3_98 = add i32 %tmp268, -104
  %v4_98 = inttoptr i32 %v3_98 to double*
  %v5_98 = load double, double* %v4_98, align 4
  %v6_98 = fpext double %v5_98 to x86_fp80
  %v7_98 = fmul x86_fp80 %v4_96, %v6_98
  %v2_9b = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_98)
  %v4_9d = fadd x86_fp80 %v4_85, %v2_9b
  %tmp269 = fptrunc x86_fp80 %v4_9d to double
  store double %tmp269, double* %stack_var_-66, align 8
  %v7_a2 = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_a2, x86_fp80* %st7.global-to-local, align 4
  %v2_aa = add i32 %tmp268, -96
  %v3_aa = inttoptr i32 %v2_aa to double*
  %v4_aa = load double, double* %v3_aa, align 4
  %v5_aa = fpext double %v4_aa to x86_fp80
  %v4_ad = fadd x86_fp80 %v7_a2, %v5_aa
  %v2_af = fsub x86_fp80 0xK80000000000000000000, %v4_ad
  store x86_fp80 %v2_af, x86_fp80* %st7.global-to-local, align 4
  %v2_b5 = add i32 %tmp268, 24
  %v3_b5 = inttoptr i32 %v2_b5 to double*
  %v4_b5 = load double, double* %v3_b5, align 4
  %v5_b5 = fpext double %v4_b5 to x86_fp80
  store i3 %v6_6c, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_b5, x86_fp80* %st7.global-to-local, align 4
  %v3_b8 = add i32 %tmp268, -72
  %v4_b8 = inttoptr i32 %v3_b8 to double*
  %v5_b8 = load double, double* %v4_b8, align 4
  %v6_b8 = fpext double %v5_b8 to x86_fp80
  %v7_b8 = fmul x86_fp80 %v5_b5, %v6_b8
  store x86_fp80 %v7_b8, x86_fp80* %st7.global-to-local, align 4
  %v2_bb = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_b8)
  %v3_bb = fcmp olt x86_fp80 %v2_bb, 0xK403E8000000000000000
  br i1 %v3_bb, label %bb270, label %dec_label_pc_f1

bb270:                                            ; preds = %dec_label_pc_40._crit_edge
  %v4_bb = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_b8)
  store x86_fp80 %v4_bb, x86_fp80* %st7.global-to-local, align 4
  %v7_bb = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_b8)
  store i3 %v0_6c, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_f1

dec_label_pc_f1:                                  ; preds = %dec_label_pc_40._crit_edge, %bb270
  %v1_c1 = phi x86_fp80 [ %v4_bb, %bb270 ], [ %v7_b8, %dec_label_pc_40._crit_edge ]
  %v1_bd = phi x86_fp80 [ %v7_bb, %bb270 ], [ %v5_aa, %dec_label_pc_40._crit_edge ]
  %v0_bd = phi i3 [ %v0_6c, %bb270 ], [ %v6_6c, %dec_label_pc_40._crit_edge ]
  %v7_c8 = fmul x86_fp80 %v4_9d, %v1_c1
  %v7_d0 = fmul x86_fp80 %v1_bd, %v2_af
  %v4_d4 = fadd x86_fp80 %v7_c8, %v7_d0
  store x86_fp80 %v4_d4, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_bd, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_e4 = call i32 @__asm_wait(x86_fp80 %v4_9d)
  %v0_e5 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_e5 = call i16 @__asm_fnstsw(i32 %v0_e5)
  %v2_e5 = sext i16 %v1_e5 to i32
  %v4_e5 = and i32 %v5_e4, -65536
  %tmp271 = udiv i32 %v2_e5, 2
  %v12_e7 = and i32 %tmp271, 32512
  %v2_e5.masked = and i32 %v2_e5, -65281
  %v13_e7 = or i32 %v4_e5, %v2_e5.masked
  %v14_e7 = or i32 %v13_e7, %v12_e7
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_f1 = load i32, i32* @edi, align 8
  %v1_f1 = add i32 %v0_f1, -76
  %v2_f1 = inttoptr i32 %v1_f1 to i32*
  %v3_f1 = load i32, i32* %v2_f1, align 4
  %v10_f1 = icmp eq i32 %v3_f1, 0
  %v1_f5 = icmp eq i1 %v10_f1, false
  %v1_fa.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_f5, label %dec_label_pc_fa, label %dec_label_pc_f7

dec_label_pc_f7:                                  ; preds = %dec_label_pc_f1
  %v3_f7 = add i32 %v0_f1, -32
  %v4_f7 = inttoptr i32 %v3_f7 to double*
  %v5_f7 = load double, double* %v4_f7, align 4
  %v6_f7 = fpext double %v5_f7 to x86_fp80
  %v7_f7 = fdiv x86_fp80 %v1_fa.pre, %v6_f7
  store x86_fp80 %v7_f7, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_fa

dec_label_pc_fa:                                  ; preds = %dec_label_pc_f1, %dec_label_pc_f7
  %v1_fa = phi x86_fp80 [ %v7_f7, %dec_label_pc_f7 ], [ %v1_fa.pre, %dec_label_pc_f1 ]
  %v2_fa = load i32, i32* %esi.global-to-local, align 4
  %v3_fa = add i32 %v2_fa, -32
  %v4_fa = fptrunc x86_fp80 %v1_fa to double
  %v5_fa = inttoptr i32 %v3_fa to double*
  store double %v4_fa, double* %v5_fa, align 4
  %v2_fd = add i32 %v2_fa, -24
  %v3_fd = inttoptr i32 %v2_fd to i32*
  %v4_fd = load i32, i32* %v3_fd, align 4
  %v5_fd = sitofp i32 %v4_fd to x86_fp80
  store x86_fp80 %v5_fd, x86_fp80* %st7.global-to-local, align 4
  %v2_100 = load i32, i32* @edi, align 8
  %v3_100 = add i32 %v2_100, -112
  %v4_100 = inttoptr i32 %v3_100 to double*
  %v5_100 = load double, double* %v4_100, align 4
  %v6_100 = fpext double %v5_100 to x86_fp80
  %v7_100 = fmul x86_fp80 %v5_fd, %v6_100
  store x86_fp80 %v7_100, x86_fp80* %st7.global-to-local, align 4
  %v3_103 = add i32 %v2_100, -120
  %v4_103 = inttoptr i32 %v3_103 to double*
  %v5_103 = load double, double* %v4_103, align 4
  %v6_103 = fpext double %v5_103 to x86_fp80
  %v7_103 = fadd x86_fp80 %v7_100, %v6_103
  store x86_fp80 %v7_103, x86_fp80* %st7.global-to-local, align 4
  %v3_10a = add i32 %v2_100, -128
  %v4_10a = inttoptr i32 %v3_10a to double*
  %v5_10a = load double, double* %v4_10a, align 4
  %v6_10a = fpext double %v5_10a to x86_fp80
  %v7_10a = fmul x86_fp80 %v7_59, %v6_10a
  %v4_10d = fadd x86_fp80 %v7_103, %v7_10a
  %v2_10f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_10d)
  store x86_fp80 %v2_10f, x86_fp80* %st7.global-to-local, align 4
  %v3_111 = add i32 %v2_fa, 128
  %tmp272 = fptrunc x86_fp80 %v4_10d to double
  %v4_111 = call double @llvm.fabs.f64(double %tmp272)
  %v5_111 = inttoptr i32 %v3_111 to double*
  store double %v4_111, double* %v5_111, align 4
  %v6_111 = add i3 %storemerge.in, 2
  store i3 %v6_111, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_e7
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_fpatan(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

declare i32 @__asm_wait(x86_fp80) local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
