source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %stack_var_-90 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-90, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v0_4b = load i32, i32* @edi, align 8
  %v1_4b = add i32 %v0_4b, -104
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v1_4e = urem i32 %v3_4b, 32
  %v2_4e = icmp eq i32 %v1_4e, 0
  %v1_54 = icmp eq i1 %v2_4e, false
  %spec.select = select i1 %v1_54, i32 %v1_4e, i32 1
  store i32 %spec.select, i32* %edx.global-to-local, align 4
  %v0_5b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_5b = load double, double* %stack_var_-90, align 8
  %v8_5b = fpext double %v3_5b to x86_fp80
  %v4_5e = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_5e = fpext double %v4_5e to x86_fp80
  %v6_5e = fmul x86_fp80 %v8_5b, %v5_5e
  %v6_60 = fadd x86_fp80 %v6_5e, %v5_5e
  %tmp292 = fptrunc x86_fp80 %v6_60 to double
  store double %tmp292, double* %stack_var_-90, align 8
  %v6_80 = fsub x86_fp80 %v6_60, %v5_5e
  %v2_82 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v6_80)
  %v6_84 = fsub x86_fp80 %v2_82, %v5_5e
  store x86_fp80 %v6_84, x86_fp80* %st7.global-to-local, align 4
  %v8_98 = add i3 %v0_5b, -3
  store i3 %v8_98, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ae = call i32 @__asm_wait()
  store i32 %v0_ae, i32* %eax.global-to-local, align 4
  %v0_af = load i32, i32* %fpsw.global-to-local, align 4
  %v1_af = call i16 @__asm_fnstsw(i32 %v0_af)
  %v2_af = sext i16 %v1_af to i32
  %v3_af = load i32, i32* %eax.global-to-local, align 4
  %v4_af = and i32 %v3_af, -65536
  %v3_b1 = and i32 %v2_af, 16640
  %v2_af.masked = and i32 %v2_af, -65281
  %v12_b1 = or i32 %v4_af, %v2_af.masked
  %v13_b1 = or i32 %v12_b1, %v3_b1
  store i32 %v13_b1, i32* %eax.global-to-local, align 4
  %storemerge10.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge10 = add i3 %storemerge10.in, 1
  store i3 %storemerge10, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_be = call i32 @__asm_wait()
  store i32 %v0_be, i32* %eax.global-to-local, align 4
  %v0_bf = load i32, i32* %fpsw.global-to-local, align 4
  %v1_bf = call i16 @__asm_fnstsw(i32 %v0_bf)
  %v2_bf = sext i16 %v1_bf to i32
  %v3_bf = load i32, i32* %eax.global-to-local, align 4
  %v4_bf = and i32 %v3_bf, -65536
  %v3_c1 = and i32 %v2_bf, 16640
  %v2_bf.masked = and i32 %v2_bf, -65281
  %v12_c1 = or i32 %v4_bf, %v2_bf.masked
  %v13_c1 = or i32 %v12_c1, %v3_c1
  store i32 %v13_c1, i32* %eax.global-to-local, align 4
  %storemerge8.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge8 = add i3 %storemerge8.in, 1
  store i3 %storemerge8, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_d4.pre = load i32, i32* @edi, align 8
  br label %dec_label_pc_d0

dec_label_pc_d0:                                  ; preds = %dec_label_pc_125, %dec_label_pc_40
  %v1_d4 = phi i32 [ %v1_d4.pre, %dec_label_pc_40 ], [ %v1_24c, %dec_label_pc_125 ]
  %v0_d0 = phi i3 [ %storemerge8, %dec_label_pc_40 ], [ %storemerge, %dec_label_pc_125 ]
  %stack_var_-42.0 = phi double [ 1.000000e+00, %dec_label_pc_40 ], [ %v4_253, %dec_label_pc_125 ]
  %v2_d4 = add i32 %v1_d4, -72
  %v3_d4 = inttoptr i32 %v2_d4 to double*
  %v4_d4 = load double, double* %v3_d4, align 4
  %v5_d4 = fpext double %v4_d4 to x86_fp80
  store x86_fp80 %v5_d4, x86_fp80* %st7.global-to-local, align 4
  %v8_d7 = add i3 %v0_d0, -1
  store i3 %v8_d7, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_e1

dec_label_pc_e1:                                  ; preds = %dec_label_pc_e1, %dec_label_pc_d0
  %v0_e1 = call i32 @__asm_fprem()
  store i32 %v0_e1, i32* %eax.global-to-local, align 4
  %v0_e3 = call i32 @__asm_wait()
  store i32 %v0_e3, i32* %eax.global-to-local, align 4
  %v0_e4 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_e4 = call i16 @__asm_fnstsw(i32 %v0_e4)
  %v2_e4 = sext i16 %v1_e4 to i32
  %v3_e4 = load i32, i32* %eax.global-to-local, align 4
  %v4_e4 = and i32 %v3_e4, -65536
  %v5_e4 = or i32 %v4_e4, %v2_e4
  store i32 %v5_e4, i32* %eax.global-to-local, align 4
  %v0_e6 = call i32 @__asm_wait()
  store i32 %v0_e6, i32* %eax.global-to-local, align 4
  %v5_e7297 = and i32 %v0_e6, 1024
  %v6_e7 = icmp eq i32 %v5_e7297, 0
  br i1 %v6_e7, label %dec_label_pc_ea, label %dec_label_pc_e1

dec_label_pc_ea:                                  ; preds = %dec_label_pc_e1
  %v6_dd = fpext double %stack_var_-42.0 to x86_fp80
  %v0_ea = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_ea = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_ec = load i32, i32* @edi, align 8
  %v3_ec = add i32 %v2_ec, -148
  %v4_ec = inttoptr i32 %v3_ec to double*
  %v5_ec = load double, double* %v4_ec, align 4
  %v6_ec = fpext double %v5_ec to x86_fp80
  %v7_ec = fsub x86_fp80 %v1_ea, %v6_ec
  store x86_fp80 %v7_ec, x86_fp80* %st7.global-to-local, align 4
  %v6_f5 = add i3 %v0_ea, -1
  store i3 %v6_f5, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_ff

dec_label_pc_ff:                                  ; preds = %dec_label_pc_ff, %dec_label_pc_ea
  %v0_ff = call i32 @__asm_fprem()
  store i32 %v0_ff, i32* %eax.global-to-local, align 4
  %v0_101 = call i32 @__asm_wait()
  store i32 %v0_101, i32* %eax.global-to-local, align 4
  %v0_102 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_102 = call i16 @__asm_fnstsw(i32 %v0_102)
  %v2_102 = sext i16 %v1_102 to i32
  %v3_102 = load i32, i32* %eax.global-to-local, align 4
  %v4_102 = and i32 %v3_102, -65536
  %v5_102 = or i32 %v4_102, %v2_102
  store i32 %v5_102, i32* %eax.global-to-local, align 4
  %v0_104 = call i32 @__asm_wait()
  store i32 %v0_104, i32* %eax.global-to-local, align 4
  %v5_105298 = and i32 %v0_104, 1024
  %v6_105 = icmp eq i32 %v5_105298, 0
  br i1 %v6_105, label %dec_label_pc_108, label %dec_label_pc_ff

dec_label_pc_108:                                 ; preds = %dec_label_pc_ff
  %v0_108 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_108 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_10a = load i32, i32* @edi, align 8
  %v3_10a = add i32 %v2_10a, -148
  %v4_10a = inttoptr i32 %v3_10a to double*
  %v5_10a = load double, double* %v4_10a, align 4
  %v6_10a = fpext double %v5_10a to x86_fp80
  %v7_10a = fsub x86_fp80 %v1_108, %v6_10a
  store x86_fp80 %v7_10a, x86_fp80* %st7.global-to-local, align 4
  %v9_113 = add i3 %v0_108, -1
  store i3 %v9_113, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_11c

dec_label_pc_11c:                                 ; preds = %dec_label_pc_11c, %dec_label_pc_108
  %v0_11c = call i32 @__asm_fprem()
  store i32 %v0_11c, i32* %eax.global-to-local, align 4
  %v0_11e = call i32 @__asm_wait()
  store i32 %v0_11e, i32* %eax.global-to-local, align 4
  %v0_11f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_11f = call i16 @__asm_fnstsw(i32 %v0_11f)
  %v2_11f = sext i16 %v1_11f to i32
  %v3_11f = load i32, i32* %eax.global-to-local, align 4
  %v4_11f = and i32 %v3_11f, -65536
  %v5_11f = or i32 %v4_11f, %v2_11f
  store i32 %v5_11f, i32* %eax.global-to-local, align 4
  %v0_121 = call i32 @__asm_wait()
  store i32 %v0_121, i32* %eax.global-to-local, align 4
  %v5_122299 = and i32 %v0_121, 1024
  %v6_122 = icmp eq i32 %v5_122299, 0
  br i1 %v6_122, label %dec_label_pc_125, label %dec_label_pc_11c

dec_label_pc_125:                                 ; preds = %dec_label_pc_11c
  %v0_125 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_125 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_127 = load i32, i32* @edi, align 8
  %v3_127 = add i32 %v2_127, -148
  %v4_127 = inttoptr i32 %v3_127 to double*
  %v5_127 = load double, double* %v4_127, align 4
  %v6_127 = fpext double %v5_127 to x86_fp80
  %v7_127 = fsub x86_fp80 %v1_125, %v6_127
  store x86_fp80 %v7_127, x86_fp80* %st7.global-to-local, align 4
  %v3_14b = add i32 %v2_127, -108
  %v4_14b = inttoptr i32 %v3_14b to float*
  %v5_14b = load float, float* %v4_14b, align 4
  %v6_14b = fpext float %v5_14b to x86_fp80
  %v7_14b = fmul x86_fp80 %v7_127, %v6_14b
  %v3_150 = add i32 %v2_127, -112
  %v4_150 = inttoptr i32 %v3_150 to float*
  %v5_150 = load float, float* %v4_150, align 4
  %v6_150 = fpext float %v5_150 to x86_fp80
  %v7_150 = fmul x86_fp80 %v7_127, %v6_150
  %v4_153 = fadd x86_fp80 %v7_14b, %v7_150
  %v3_157 = add i32 %v2_127, -116
  %v4_157 = inttoptr i32 %v3_157 to float*
  %v5_157 = load float, float* %v4_157, align 4
  %v6_157 = fpext float %v5_157 to x86_fp80
  %v7_157 = fmul x86_fp80 %v7_127, %v6_157
  %v4_15a = fadd x86_fp80 %v4_153, %v7_157
  store x86_fp80 %v4_15a, x86_fp80* %st7.global-to-local, align 4
  %v3_15e = add i32 %v2_127, -120
  %v4_15e = inttoptr i32 %v3_15e to float*
  %v5_15e = load float, float* %v4_15e, align 4
  %v6_15e = fpext float %v5_15e to x86_fp80
  %v7_15e = fmul x86_fp80 %v7_127, %v6_15e
  store x86_fp80 %v7_15e, x86_fp80* %st7.global-to-local, align 4
  %v3_163 = add i32 %v2_127, -124
  %v4_163 = inttoptr i32 %v3_163 to float*
  %v5_163 = load float, float* %v4_163, align 4
  %v6_163 = fpext float %v5_163 to x86_fp80
  %v7_163 = fmul x86_fp80 %v7_15e, %v6_163
  %v4_166 = fadd x86_fp80 %v7_163, %v7_163
  store x86_fp80 %v4_166, x86_fp80* %st7.global-to-local, align 4
  %v3_16a = add i32 %v2_127, -128
  %v4_16a = inttoptr i32 %v3_16a to float*
  %v5_16a = load float, float* %v4_16a, align 4
  %v6_16a = fpext float %v5_16a to x86_fp80
  %v7_16a = fmul x86_fp80 %v4_166, %v6_16a
  %v4_16d = fadd x86_fp80 %v7_16a, %v7_16a
  %v4_16f = fptrunc x86_fp80 %v4_16d to double
  %v3_17f = fmul x86_fp80 %v4_16d, %v4_16d
  %v4_187 = fadd x86_fp80 %v3_17f, %v3_17f
  %v2_189 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_187)
  store x86_fp80 %v2_189, x86_fp80* %st7.global-to-local, align 4
  %v2_18b = add i32 %v2_127, -100
  %v3_18b = inttoptr i32 %v2_18b to double*
  %v4_18b = load double, double* %v3_18b, align 4
  %v5_18b = fpext double %v4_18b to x86_fp80
  %v7_18e = fmul x86_fp80 %v4_16d, %v5_18b
  %v7_192 = fmul x86_fp80 %v7_18e, %v4_16d
  %v4_196 = fsub x86_fp80 %v2_189, %v7_192
  store x86_fp80 %v4_196, x86_fp80* %st7.global-to-local, align 4
  %tmp293 = call double @llvm.fabs.f64(double %v4_16f)
  %v2_19c = fpext double %tmp293 to x86_fp80
  %v3_19e = add i32 %v2_127, -92
  %v4_19e = inttoptr i32 %v3_19e to double*
  %v5_19e = load double, double* %v4_19e, align 4
  %v6_19e = fpext double %v5_19e to x86_fp80
  %v7_19e = fmul x86_fp80 %v2_19c, %v6_19e
  %v4_1a1 = fsub x86_fp80 %v4_196, %v7_19e
  store x86_fp80 %v4_1a1, x86_fp80* %st7.global-to-local, align 4
  %v3_1a3 = add i32 %v2_127, -84
  %v4_1a3 = inttoptr i32 %v3_1a3 to double*
  %v5_1a3 = load double, double* %v4_1a3, align 4
  %v6_1a3 = fpext double %v5_1a3 to x86_fp80
  %v7_1a3 = fsub x86_fp80 %v4_1a1, %v6_1a3
  store x86_fp80 %v7_1a3, x86_fp80* %st7.global-to-local, align 4
  %v6_1d1 = add i3 %v0_125, 1
  store i3 %v6_1d1, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1fe = call i32 @__asm_wait()
  store i32 %v0_1fe, i32* %eax.global-to-local, align 4
  %v0_1ff = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1ff = call i16 @__asm_fnstsw(i32 %v0_1ff)
  %v2_1ff = sext i16 %v1_1ff to i32
  %v3_1ff = load i32, i32* %eax.global-to-local, align 4
  %v4_1ff = and i32 %v3_1ff, -65536
  %v3_201 = and i32 %v2_1ff, 16640
  %v2_1ff.masked = and i32 %v2_1ff, -65281
  %v12_201 = or i32 %v4_1ff, %v2_1ff.masked
  %v13_201 = or i32 %v12_201, %v3_201
  store i32 %v13_201, i32* %eax.global-to-local, align 4
  %v0_20a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge6 = add i3 %v0_20a, 1
  store i3 %storemerge6, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_20e = call i32 @__asm_wait()
  store i32 %v0_20e, i32* %eax.global-to-local, align 4
  %v0_20f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_20f = call i16 @__asm_fnstsw(i32 %v0_20f)
  %v2_20f = sext i16 %v1_20f to i32
  %v3_20f = load i32, i32* %eax.global-to-local, align 4
  %v4_20f = and i32 %v3_20f, -65536
  %v3_211 = and i32 %v2_20f, 16640
  %v2_20f.masked = and i32 %v2_20f, -65281
  %v12_211 = or i32 %v4_20f, %v2_20f.masked
  %v13_211 = or i32 %v12_211, %v3_211
  store i32 %v13_211, i32* %eax.global-to-local, align 4
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  %v1_21e = load i32, i32* @edi, align 8
  %v2_21e = add i32 %v1_21e, -100
  %v3_21e = inttoptr i32 %v2_21e to double*
  %v4_21e = load double, double* %v3_21e, align 4
  %tmp294 = call double @llvm.fabs.f64(double %v4_21e)
  %v2_221 = fpext double %tmp294 to x86_fp80
  %v4_223 = fadd x86_fp80 %v2_221, 0xK3FFF8000000000000000
  store x86_fp80 %v4_223, x86_fp80* %st7.global-to-local, align 4
  %v2_225 = add i32 %v1_21e, -92
  %v3_225 = inttoptr i32 %v2_225 to double*
  %v4_225 = load double, double* %v3_225, align 4
  %tmp295 = call double @llvm.fabs.f64(double %v4_225)
  %v2_228 = fpext double %tmp295 to x86_fp80
  %v4_22a = fadd x86_fp80 %v4_223, %v2_228
  %v4_22c = fdiv x86_fp80 %v4_22a, %v4_22a
  %v7_22e = fdiv x86_fp80 %v4_22c, %v6_dd
  %v2_232 = fsub x86_fp80 0xK80000000000000000000, %v7_22e
  store x86_fp80 %v2_232, x86_fp80* %st7.global-to-local, align 4
  %v0_23e = call i32 @__asm_wait()
  store i32 %v0_23e, i32* %eax.global-to-local, align 4
  %v0_23f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_23f = call i16 @__asm_fnstsw(i32 %v0_23f)
  %v2_23f = sext i16 %v1_23f to i32
  %v3_23f = load i32, i32* %eax.global-to-local, align 4
  %v4_23f = and i32 %v3_23f, -65536
  %v3_241 = and i32 %v2_23f, 16640
  %v2_23f.masked = and i32 %v2_23f, -65281
  %v12_241 = or i32 %v4_23f, %v2_23f.masked
  %v13_241 = or i32 %v12_241, %v3_241
  store i32 %v13_241, i32* %eax.global-to-local, align 4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  %v1_24c = load i32, i32* @edi, align 8
  %v2_24c = add i32 %v1_24c, -16
  %v3_24c = inttoptr i32 %v2_24c to double*
  %v4_24c = load double, double* %v3_24c, align 4
  %v5_24c = fpext double %v4_24c to x86_fp80
  %v7_24f = fmul x86_fp80 %v6_dd, %v5_24c
  store x86_fp80 %v7_24f, x86_fp80* %st7.global-to-local, align 4
  %v4_253 = fptrunc x86_fp80 %v7_24f to double
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_257 = load i32, i32* %edx.global-to-local, align 4
  %v1_257 = add i32 %v0_257, -1
  store i32 %v1_257, i32* %edx.global-to-local, align 4
  %v8_258 = icmp sgt i32 %v0_257, 1
  br i1 %v8_258, label %dec_label_pc_d0, label %dec_label_pc_25e

dec_label_pc_25e:                                 ; preds = %dec_label_pc_125
  %v1_25e = add i32 %v1_24c, -76
  %v2_25e = inttoptr i32 %v1_25e to i32*
  %v3_25e = load i32, i32* %v2_25e, align 4
  %v10_25e = icmp eq i32 %v3_25e, 0
  %v1_262 = icmp eq i1 %v10_25e, false
  br i1 %v1_262, label %dec_label_pc_267, label %dec_label_pc_264

dec_label_pc_264:                                 ; preds = %dec_label_pc_25e
  %v3_264 = add i32 %v1_24c, -32
  %v4_264 = inttoptr i32 %v3_264 to double*
  %v5_264 = load double, double* %v4_264, align 4
  %v6_264 = fpext double %v5_264 to x86_fp80
  %v7_264 = fdiv x86_fp80 %v7_24f, %v6_264
  store x86_fp80 %v7_264, x86_fp80* %st7.global-to-local, align 4
  %.pre = fptrunc x86_fp80 %v7_264 to double
  br label %dec_label_pc_267

dec_label_pc_267:                                 ; preds = %dec_label_pc_264, %dec_label_pc_25e
  %v4_267.pre-phi = phi double [ %.pre, %dec_label_pc_264 ], [ %v4_253, %dec_label_pc_25e ]
  %v2_267 = load i32, i32* %esi.global-to-local, align 4
  %v3_267 = add i32 %v2_267, -32
  %v5_267 = inttoptr i32 %v3_267 to double*
  store double %v4_267.pre-phi, double* %v5_267, align 4
  %v6_267 = add i3 %storemerge.in, 2
  store i3 %v6_267, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v13_241
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare i32 @__asm_fprem() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
