source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_0 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_0 = load i32, i32* %edi.global-to-local, align 4
  %v2_0 = add i32 %v1_0, -76
  %v3_0 = inttoptr i32 %v2_0 to double*
  %v4_0 = load double, double* %v3_0, align 4
  %v5_0 = fpext double %v4_0 to x86_fp80
  store x86_fp80 %v5_0, x86_fp80* %st7.global-to-local, align 4
  %v1_3 = load i32, i32* %esi.global-to-local, align 4
  %v2_3 = add i32 %v1_3, -104
  %v3_3 = inttoptr i32 %v2_3 to double*
  %v4_3 = load double, double* %v3_3, align 4
  %v5_3 = fpext double %v4_3 to x86_fp80
  %v4_8 = fsub x86_fp80 %v5_3, %v5_0
  %v2_a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_8)
  %v4_c = fadd x86_fp80 %v2_a, %v5_3
  %v4_10 = fadd x86_fp80 %v5_0, %v5_3
  %v2_12 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_10)
  store x86_fp80 %v2_12, x86_fp80* %st5.global-to-local, align 4
  %v4_14 = fsub x86_fp80 %v2_12, %v4_c
  store x86_fp80 %v4_14, x86_fp80* %st6.global-to-local, align 4
  %v4_16 = fptrunc x86_fp80 %v4_14 to double
  store double %v4_16, double* %v3_3, align 4
  %v2_1b = add i32 %v1_0, -84
  %v3_1b = inttoptr i32 %v2_1b to double*
  %v4_1b = load double, double* %v3_1b, align 4
  %v5_1b = fpext double %v4_1b to x86_fp80
  store x86_fp80 %v5_1b, x86_fp80* %st7.global-to-local, align 4
  %v2_1e = add i32 %v1_3, -112
  %v3_1e = inttoptr i32 %v2_1e to double*
  %v4_1e = load double, double* %v3_1e, align 4
  %v5_1e = fpext double %v4_1e to x86_fp80
  %v4_23 = fsub x86_fp80 %v5_1e, %v5_1b
  %v2_25 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_23)
  %v4_27 = fadd x86_fp80 %v2_25, %v5_1e
  %v4_2b = fadd x86_fp80 %v5_1b, %v5_1e
  %v2_2d = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_2b)
  store x86_fp80 %v2_2d, x86_fp80* %st5.global-to-local, align 4
  %v4_2f = fsub x86_fp80 %v2_2d, %v4_27
  store x86_fp80 %v4_2f, x86_fp80* %st6.global-to-local, align 4
  %v4_31 = fptrunc x86_fp80 %v4_2f to double
  store double %v4_31, double* %v3_1e, align 4
  %v2_36 = add i32 %v1_0, -92
  %v3_36 = inttoptr i32 %v2_36 to double*
  %v4_36 = load double, double* %v3_36, align 4
  %v5_36 = fpext double %v4_36 to x86_fp80
  store x86_fp80 %v5_36, x86_fp80* %st7.global-to-local, align 4
  %v2_39 = add i32 %v1_3, -120
  %v3_39 = inttoptr i32 %v2_39 to double*
  %v4_39 = load double, double* %v3_39, align 4
  %v5_39 = fpext double %v4_39 to x86_fp80
  %v4_3e = fsub x86_fp80 %v5_39, %v5_36
  %v2_40 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_3e)
  %v4_42 = fadd x86_fp80 %v2_40, %v5_39
  %v4_46 = fadd x86_fp80 %v5_36, %v5_39
  %v2_48 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_46)
  store x86_fp80 %v2_48, x86_fp80* %st5.global-to-local, align 4
  %v4_4a = fsub x86_fp80 %v2_48, %v4_42
  store x86_fp80 %v4_4a, x86_fp80* %st6.global-to-local, align 4
  %v4_4c = fptrunc x86_fp80 %v4_4a to double
  store double %v4_4c, double* %v3_39, align 4
  %v4_51 = load double, double* %v3_3, align 4
  %v5_51 = fpext double %v4_51 to x86_fp80
  store x86_fp80 %v5_51, x86_fp80* %st7.global-to-local, align 4
  %v3_54 = add i32 %v1_0, -32
  %v4_54 = inttoptr i32 %v3_54 to double*
  %v5_54 = load double, double* %v4_54, align 4
  %v6_54 = fpext double %v5_54 to x86_fp80
  %v7_54 = fadd x86_fp80 %v5_51, %v6_54
  store x86_fp80 %v7_54, x86_fp80* %st7.global-to-local, align 4
  %v4_57 = load double, double* %v3_1e, align 4
  %v5_57 = fpext double %v4_57 to x86_fp80
  store x86_fp80 %v5_57, x86_fp80* %st6.global-to-local, align 4
  %v3_5a = add i32 %v1_0, -24
  %v4_5a = inttoptr i32 %v3_5a to double*
  %v5_5a = load double, double* %v4_5a, align 4
  %v6_5a = fpext double %v5_5a to x86_fp80
  %v7_5a = fadd x86_fp80 %v5_57, %v6_5a
  store x86_fp80 %v7_5a, x86_fp80* %st6.global-to-local, align 4
  %v4_5d = load double, double* %v3_39, align 4
  %v5_5d = fpext double %v4_5d to x86_fp80
  store x86_fp80 %v5_5d, x86_fp80* %st5.global-to-local, align 4
  %v3_60 = add i32 %v1_0, -16
  %v4_60 = inttoptr i32 %v3_60 to double*
  %v5_60 = load double, double* %v4_60, align 4
  %v6_60 = fpext double %v5_60 to x86_fp80
  %v7_60 = fadd x86_fp80 %v5_5d, %v6_60
  store x86_fp80 %v7_60, x86_fp80* %st5.global-to-local, align 4
  %v2_63 = xor i3 %v0_0, -4
  %v3_65 = add i32 %v1_0, -60
  %v4_65 = inttoptr i32 %v3_65 to float*
  %v5_65 = load float, float* %v4_65, align 4
  %v6_65 = fpext float %v5_65 to x86_fp80
  %v7_65 = fmul x86_fp80 %v7_60, %v6_65
  %v3_6a = add i32 %v1_0, -64
  %v4_6a = inttoptr i32 %v3_6a to float*
  %v5_6a = load float, float* %v4_6a, align 4
  %v6_6a = fpext float %v5_6a to x86_fp80
  %v7_6a = fmul x86_fp80 %v7_5a, %v6_6a
  %v4_6d = fadd x86_fp80 %v7_65, %v7_6a
  %v3_71 = add i32 %v1_0, -68
  %v4_71 = inttoptr i32 %v3_71 to float*
  %v5_71 = load float, float* %v4_71, align 4
  %v6_71 = fpext float %v5_71 to x86_fp80
  %v7_71 = fmul x86_fp80 %v7_54, %v6_71
  %v4_74 = fadd x86_fp80 %v7_71, %v4_6d
  %v3_78 = add i32 %v1_0, -36
  %v4_78 = inttoptr i32 %v3_78 to float*
  %v5_78 = load float, float* %v4_78, align 4
  %v6_78 = fpext float %v5_78 to x86_fp80
  %v7_78 = fmul x86_fp80 %v7_60, %v6_78
  %v3_7d = add i32 %v1_0, -40
  %v4_7d = inttoptr i32 %v3_7d to float*
  %v5_7d = load float, float* %v4_7d, align 4
  %v6_7d = fpext float %v5_7d to x86_fp80
  %v7_7d = fmul x86_fp80 %v7_5a, %v6_7d
  %v4_80 = fadd x86_fp80 %v7_78, %v7_7d
  %v3_84 = add i32 %v1_0, -44
  %v4_84 = inttoptr i32 %v3_84 to float*
  %v5_84 = load float, float* %v4_84, align 4
  %v6_84 = fpext float %v5_84 to x86_fp80
  %v7_84 = fmul x86_fp80 %v7_54, %v6_84
  %v4_87 = fadd x86_fp80 %v4_80, %v7_84
  store x86_fp80 %v4_87, x86_fp80* %st5.global-to-local, align 4
  %v3_8b = add i32 %v1_0, -48
  %v4_8b = inttoptr i32 %v3_8b to float*
  %v5_8b = load float, float* %v4_8b, align 4
  %v6_8b = fpext float %v5_8b to x86_fp80
  %v7_8b = fmul x86_fp80 %v7_60, %v6_8b
  store x86_fp80 %v7_8b, x86_fp80* %st6.global-to-local, align 4
  %v3_90 = add i32 %v1_0, -52
  %v4_90 = inttoptr i32 %v3_90 to float*
  %v5_90 = load float, float* %v4_90, align 4
  %v6_90 = fpext float %v5_90 to x86_fp80
  %v7_90 = fmul x86_fp80 %v7_5a, %v6_90
  %v4_93 = fadd x86_fp80 %v7_8b, %v7_90
  store x86_fp80 %v4_93, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_74, x86_fp80* %st7.global-to-local, align 4
  %v2_97 = load i32, i32* %edi.global-to-local, align 4
  %v3_97 = add i32 %v2_97, -56
  %v4_97 = inttoptr i32 %v3_97 to float*
  %v5_97 = load float, float* %v4_97, align 4
  %v6_97 = fpext float %v5_97 to x86_fp80
  %v7_97 = fmul x86_fp80 %v7_54, %v6_97
  %v4_9a = fadd x86_fp80 %v4_93, %v7_97
  store x86_fp80 %v4_9a, x86_fp80* %st6.global-to-local, align 4
  store i3 %v2_63, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_b4 = call i32 @__asm_wait()
  %v0_b5 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_b5 = call i16 @__asm_fnstsw(i32 %v0_b5)
  %v2_b5 = sext i16 %v1_b5 to i32
  %v15_b79 = and i32 %v2_b5, 256
  %v16_b7 = icmp ne i32 %v15_b79, 0
  %v1_b9 = icmp eq i1 %v16_b7, false
  br i1 %v1_b9, label %dec_label_pc_0.dec_label_pc_ce_crit_edge, label %dec_label_pc_bb

dec_label_pc_0.dec_label_pc_ce_crit_edge:         ; preds = %dec_label_pc_0
  %v4_b5 = and i32 %v0_b4, -65536
  %v2_b5.masked = and i32 %v2_b5, -65281
  %v13_b7 = or i32 %v4_b5, %v2_b5.masked
  %tmp251 = udiv i32 %v2_b5, 2
  %v12_b7 = and i32 %tmp251, 32512
  %v14_b7 = or i32 %v13_b7, %v12_b7
  %v0_ce.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_d0.pre = load i32, i32* %esi.global-to-local, align 4
  br label %dec_label_pc_ce

dec_label_pc_bb:                                  ; preds = %dec_label_pc_0
  %v0_be = call i32 @__asm_wait()
  %v0_bf = load i32, i32* %fpsw.global-to-local, align 4
  %v1_bf = call i16 @__asm_fnstsw(i32 %v0_bf)
  %v2_bf = sext i16 %v1_bf to i32
  %v4_bf = and i32 %v0_be, -65536
  %v4_c13 = udiv i32 %v2_bf, 512
  %tmp249 = trunc i32 %v4_c13 to i8
  %tmp252 = urem i8 %tmp249, -128
  %v5_c1 = icmp eq i8 %tmp252, 0
  %v10_c1 = zext i8 %tmp252 to i32
  %v12_c1 = mul i32 %v10_c1, 256
  %v2_bf.masked = and i32 %v2_bf, -65281
  %v13_c1 = or i32 %v4_bf, %v2_bf.masked
  %v14_c1 = or i32 %v13_c1, %v12_c1
  %v15_c110 = and i32 %v2_bf, 256
  %v16_c1 = icmp ne i32 %v15_c110, 0
  %v2_c3 = or i1 %v16_c1, %v5_c1
  br i1 %v2_c3, label %dec_label_pc_bb.dec_label_pc_da_crit_edge, label %dec_label_pc_c5

dec_label_pc_bb.dec_label_pc_da_crit_edge:        ; preds = %dec_label_pc_bb
  %v2_da.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v0_e0.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_da

dec_label_pc_c5:                                  ; preds = %dec_label_pc_bb
  %v0_c5 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_c7 = load i32, i32* %edi.global-to-local, align 4
  %v2_c7 = add i32 %v1_c7, -100
  %v3_c7 = inttoptr i32 %v2_c7 to double*
  %v4_c7 = load double, double* %v3_c7, align 4
  %v5_c7 = fpext double %v4_c7 to x86_fp80
  store x86_fp80 %v5_c7, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_da

dec_label_pc_ce:                                  ; preds = %dec_label_pc_0.dec_label_pc_ce_crit_edge, %dec_label_pc_da
  %v0_d9 = phi i32 [ %v14_b7, %dec_label_pc_0.dec_label_pc_ce_crit_edge ], [ %v14_c1, %dec_label_pc_da ]
  %v2_d6 = phi i32 [ %v2_d0.pre, %dec_label_pc_0.dec_label_pc_ce_crit_edge ], [ %v1_e0, %dec_label_pc_da ]
  %v0_ce = phi i3 [ %v0_ce.pre, %dec_label_pc_0.dec_label_pc_ce_crit_edge ], [ %v0_e0, %dec_label_pc_da ]
  %v1_d0 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_d0 = add i32 %v2_d6, -120
  %v4_d0 = fptrunc x86_fp80 %v1_d0 to double
  %v5_d0 = inttoptr i32 %v3_d0 to double*
  store double %v4_d0, double* %v5_d0, align 4
  %v1_d3 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_d3 = add i32 %v2_d6, -112
  %v4_d3 = fptrunc x86_fp80 %v1_d3 to double
  %v5_d3 = inttoptr i32 %v3_d3 to double*
  store double %v4_d3, double* %v5_d3, align 4
  %v1_d6 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_d6 = add i32 %v2_d6, -104
  %v4_d6 = fptrunc x86_fp80 %v1_d6 to double
  %v5_d6 = inttoptr i32 %v3_d6 to double*
  store double %v4_d6, double* %v5_d6, align 4
  %v6_d6 = xor i3 %v0_ce, -4
  store i3 %v6_d6, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v0_d9

dec_label_pc_da:                                  ; preds = %dec_label_pc_bb.dec_label_pc_da_crit_edge, %dec_label_pc_c5
  %v0_e0 = phi i3 [ %v0_e0.pre, %dec_label_pc_bb.dec_label_pc_da_crit_edge ], [ %v0_c5, %dec_label_pc_c5 ]
  %v2_da = phi x86_fp80 [ %v2_da.pre, %dec_label_pc_bb.dec_label_pc_da_crit_edge ], [ %v5_c7, %dec_label_pc_c5 ]
  %v4_da = fmul x86_fp80 %v2_da, %v2_da
  %v4_dc = fmul x86_fp80 %v4_da, %v4_da
  %v4_de = fmul x86_fp80 %v4_dc, %v4_dc
  store x86_fp80 %v4_de, x86_fp80* %st7.global-to-local, align 4
  %v1_e0 = load i32, i32* %esi.global-to-local, align 4
  %v2_e0 = add i32 %v1_e0, 112
  %v3_e0 = inttoptr i32 %v2_e0 to double*
  %v4_e0 = load double, double* %v3_e0, align 4
  %v5_e0 = fpext double %v4_e0 to x86_fp80
  %v4_e3 = fmul x86_fp80 %v4_de, %v5_e0
  %v2_e5 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_e3)
  store x86_fp80 %v2_e5, x86_fp80* %st6.global-to-local, align 4
  %tmp250 = fptrunc x86_fp80 %v4_e3 to double
  %v4_e7 = call double @llvm.fabs.f64(double %tmp250)
  store double %v4_e7, double* %v3_e0, align 4
  store i3 %v0_e0, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_ce
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
