source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp265 = call double @__decompiler_undefined_function_1()
  %stack_var_-100 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -68
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-100, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4b = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_4b, x86_fp80* %st7.global-to-local, align 4
  %v5_4f = fpext double %tmp265 to x86_fp80
  store x86_fp80 %v5_4f, x86_fp80* %st6.global-to-local, align 4
  %v3_53 = load double, double* %stack_var_-100, align 8
  %v8_53 = fpext double %v3_53 to x86_fp80
  %v2_58 = load i32, i32* @edi, align 8
  %v3_58 = add i32 %v2_58, -112
  %v4_58 = inttoptr i32 %v3_58 to float*
  %v5_58 = load float, float* %v4_58, align 4
  %v6_58 = fpext float %v5_58 to x86_fp80
  %v7_58 = fmul x86_fp80 %v8_53, %v6_58
  %v3_5d = add i32 %v2_58, -116
  %v4_5d = inttoptr i32 %v3_5d to float*
  %v5_5d = load float, float* %v4_5d, align 4
  %v6_5d = fpext float %v5_5d to x86_fp80
  %v7_5d = fmul x86_fp80 %v5_4f, %v6_5d
  %v4_60 = fadd x86_fp80 %v7_58, %v7_5d
  %v3_64 = add i32 %v2_58, -120
  %v4_64 = inttoptr i32 %v3_64 to float*
  %v5_64 = load float, float* %v4_64, align 4
  %v6_64 = fpext float %v5_64 to x86_fp80
  %v7_64 = fmul x86_fp80 %v7_4b, %v6_64
  %v4_67 = fadd x86_fp80 %v4_60, %v7_64
  %v3_6b = add i32 %v2_58, -88
  %v4_6b = inttoptr i32 %v3_6b to float*
  %v5_6b = load float, float* %v4_6b, align 4
  %v6_6b = fpext float %v5_6b to x86_fp80
  %v7_6b = fmul x86_fp80 %v8_53, %v6_6b
  %v3_70 = add i32 %v2_58, -92
  %v4_70 = inttoptr i32 %v3_70 to float*
  %v5_70 = load float, float* %v4_70, align 4
  %v6_70 = fpext float %v5_70 to x86_fp80
  %v7_70 = fmul x86_fp80 %v5_4f, %v6_70
  %v4_73 = fadd x86_fp80 %v7_6b, %v7_70
  %v3_77 = add i32 %v2_58, -96
  %v4_77 = inttoptr i32 %v3_77 to float*
  %v5_77 = load float, float* %v4_77, align 4
  %v6_77 = fpext float %v5_77 to x86_fp80
  %v7_77 = fmul x86_fp80 %v7_4b, %v6_77
  %v4_7a = fadd x86_fp80 %v4_73, %v7_77
  %v3_7e = add i32 %v2_58, -100
  %v4_7e = inttoptr i32 %v3_7e to float*
  %v5_7e = load float, float* %v4_7e, align 4
  %v6_7e = fpext float %v5_7e to x86_fp80
  %v7_7e = fmul x86_fp80 %v8_53, %v6_7e
  store x86_fp80 %v7_7e, x86_fp80* %st6.global-to-local, align 4
  %v3_83 = add i32 %v2_58, -104
  %v4_83 = inttoptr i32 %v3_83 to float*
  %v5_83 = load float, float* %v4_83, align 4
  %v6_83 = fpext float %v5_83 to x86_fp80
  %v7_83 = fmul x86_fp80 %v5_4f, %v6_83
  %v4_86 = fadd x86_fp80 %v7_7e, %v7_83
  store x86_fp80 %v4_86, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_67, x86_fp80* %st7.global-to-local, align 4
  %v3_8a = add i32 %v2_58, -108
  %v4_8a = inttoptr i32 %v3_8a to float*
  %v5_8a = load float, float* %v4_8a, align 4
  %v6_8a = fpext float %v5_8a to x86_fp80
  %v7_8a = fmul x86_fp80 %v7_4b, %v6_8a
  %v4_8d = fadd x86_fp80 %v4_86, %v7_8a
  %tmp270 = fptrunc x86_fp80 %v4_7a to double
  store double %tmp270, double* %stack_var_-100, align 8
  %v10_8f = add i3 %v0_4b, -2
  store x86_fp80 %v4_7a, x86_fp80* %st7.global-to-local, align 4
  store i3 %v10_8f, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_8d, x86_fp80* %st6.global-to-local, align 4
  %v12_a1 = call i32 @__asm_fpatan(x86_fp80 %v4_7a, x86_fp80 %v4_8d, x86_fp80 %v4_67)
  %v1_a3 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v2_a3 = load i32, i32* @edi, align 8
  %v3_a3 = add i32 %v2_a3, -152
  %v4_a3 = inttoptr i32 %v3_a3 to double*
  %v5_a3 = load double, double* %v4_a3, align 4
  %v6_a3 = fpext double %v5_a3 to x86_fp80
  %v7_a3 = fmul x86_fp80 %v1_a3, %v6_a3
  store x86_fp80 %v7_a3, x86_fp80* %st6.global-to-local, align 4
  %v2_a9 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_a3)
  %v3_a9 = fcmp olt x86_fp80 %v2_a9, 0xK403E8000000000000000
  %v0_a9 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v3_a9, label %bb, label %dec_label_pc_40._crit_edge

bb:                                               ; preds = %dec_label_pc_40
  %v4_a9 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_a3)
  store x86_fp80 %v4_a9, x86_fp80* %st6.global-to-local, align 4
  %v8_a9 = add i3 %v0_a9, -1
  store i3 %v8_a9, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_40._crit_edge

dec_label_pc_40._crit_edge:                       ; preds = %dec_label_pc_40, %bb
  %v0_ab = phi i3 [ %v8_a9, %bb ], [ %v0_a9, %dec_label_pc_40 ]
  %v1_ab = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_b6 = fmul x86_fp80 %v4_7a, %v4_7a
  %v3_bc = fmul x86_fp80 %v4_8d, %v4_8d
  %v4_be = fadd x86_fp80 %v3_b6, %v3_bc
  %v2_c0 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_be)
  %v7_c4 = fmul x86_fp80 %v2_c0, %v1_ab
  store x86_fp80 %v7_c4, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v7_c4, x86_fp80* %st7.global-to-local, align 4
  %v3_d0 = add i32 %v2_a3, -144
  %v4_d0 = inttoptr i32 %v3_d0 to double*
  %v5_d0 = load double, double* %v4_d0, align 4
  %v6_d0 = fpext double %v5_d0 to x86_fp80
  %v7_d0 = fmul x86_fp80 %v7_c4, %v6_d0
  %v4_d8 = fmul x86_fp80 %v7_d0, 0xK3FFFB8AA3B295C17F000
  store x86_fp80 %v4_d8, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v3_dc = add i3 %v0_ab, -1
  store i3 %v3_dc, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_de = call i32 @__asm_fprem(x86_fp80 %v7_c4)
  %v0_e0 = call i32 @__asm_f2xm1()
  %v3_e2 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_e2 = fadd x86_fp80 %v4_d8, %v3_e2
  store x86_fp80 %v4_e2, x86_fp80* %st6.global-to-local, align 4
  store i3 %v0_ab, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_e4 = call i32 @__asm_fscale()
  %v2_e6 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_e6, x86_fp80* %st7.global-to-local, align 4
  %tmp271 = fptrunc x86_fp80 %v2_e6 to double
  store double %tmp271, double* %stack_var_-100, align 8
  store x86_fp80 %v7_c4, x86_fp80* %st6.global-to-local, align 4
  %v2_f1 = load i32, i32* @edi, align 8
  %v3_f1 = add i32 %v2_f1, -144
  %v4_f1 = inttoptr i32 %v3_f1 to double*
  %v5_f1 = load double, double* %v4_f1, align 4
  %v6_f1 = fpext double %v5_f1 to x86_fp80
  %v7_f1 = fmul x86_fp80 %v7_c4, %v6_f1
  %v4_f9 = fmul x86_fp80 %v7_f1, 0xK3FFFB8AA3B295C17F000
  store x86_fp80 %v4_f9, x86_fp80* %st6.global-to-local, align 4
  %v3_fd = add i3 %v0_ab, -2
  store i3 %v3_fd, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_ff = call i32 @__asm_fprem(x86_fp80 %v2_e6)
  %v0_101 = call i32 @__asm_f2xm1()
  %v4_103 = fadd x86_fp80 %v4_f9, 0xK3FFF8000000000000000
  %v7_103 = add i3 %v0_ab, -1
  store i3 %v7_103, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_105 = call i32 @__asm_fscale()
  %v3_10f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_10f = fmul x86_fp80 %v4_103, %v3_10f
  %v7_10f = add i3 %v0_ab, 1
  %v3_118 = fmul x86_fp80 %v2_e6, %v2_e6
  %v3_11e = fmul x86_fp80 %v4_103, %v4_103
  %v4_120 = fadd x86_fp80 %v3_118, %v3_11e
  %v3_12a = fmul x86_fp80 %v4_10f, %v4_10f
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v4_12e = fadd x86_fp80 %v3_12a, 0xK3FFF8000000000000000
  %v2_138 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_67)
  %v3_138 = fcmp olt x86_fp80 %v2_138, 0xK403E8000000000000000
  %v4_138 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_67)
  %storemerge = select i1 %v3_138, x86_fp80 %v4_138, x86_fp80 %v4_67
  store x86_fp80 %storemerge, x86_fp80* %st7.global-to-local, align 4
  %v2_13a = load i32, i32* @edi, align 8
  %v3_13a = add i32 %v2_13a, -128
  %v4_13a = inttoptr i32 %v3_13a to double*
  %v5_13a = load double, double* %v4_13a, align 4
  %v6_13a = fpext double %v5_13a to x86_fp80
  %v7_13a = fmul x86_fp80 %storemerge, %v6_13a
  %v7_13d = fmul x86_fp80 %v7_13a, %v4_10f
  store x86_fp80 %v7_13d, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  store i3 %v7_10f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_145 = call i32 @__asm_wait(x86_fp80 %v4_103)
  %v0_146 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_146 = call i16 @__asm_fnstsw(i32 %v0_146)
  %tmp278 = and i16 %v1_146, 256
  %v16_148 = icmp ne i16 %tmp278, 0
  %v1_14a = icmp eq i1 %v16_148, false
  %v1_156 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_14a, label %dec_label_pc_156, label %dec_label_pc_14c

dec_label_pc_14c:                                 ; preds = %dec_label_pc_40._crit_edge
  %v7_14c = fadd x86_fp80 %v1_156, %v4_120
  %v7_150 = fdiv x86_fp80 %v7_14c, %v4_12e
  store x86_fp80 %v7_150, x86_fp80* %st7.global-to-local, align 4
  %v0_162.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_162

dec_label_pc_156:                                 ; preds = %dec_label_pc_40._crit_edge
  %v7_158 = fsub x86_fp80 %v4_12e, %v1_156
  %v0_15c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_120, x86_fp80* %st6.global-to-local, align 4
  %v4_160 = fdiv x86_fp80 %v4_120, %v7_158
  store x86_fp80 %v4_160, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_162

dec_label_pc_162:                                 ; preds = %dec_label_pc_156, %dec_label_pc_14c
  %v1_162.pre-phi.in = phi i3 [ %v0_15c, %dec_label_pc_156 ], [ %v0_162.pre, %dec_label_pc_14c ]
  %v3_164 = phi x86_fp80 [ %v4_160, %dec_label_pc_156 ], [ %v7_150, %dec_label_pc_14c ]
  %v1_162.pre-phi = add i3 %v1_162.pre-phi.in, -1
  store i3 %v1_162.pre-phi, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v3_164, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 0xK3FFFB8AA3B295C17F000, x86_fp80* %st7.global-to-local, align 4
  %v0_166 = call i32 @__asm_fyl2x()
  %v1_168 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v2_168 = load i32, i32* @edi, align 8
  %v3_168 = add i32 %v2_168, -144
  %v4_168 = inttoptr i32 %v3_168 to double*
  %v5_168 = load double, double* %v4_168, align 4
  %v6_168 = fpext double %v5_168 to x86_fp80
  %v7_168 = fdiv x86_fp80 %v1_168, %v6_168
  %v2_16e = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_168)
  store x86_fp80 %v2_16e, x86_fp80* %st6.global-to-local, align 4
  %v3_170 = add i32 %v2_168, -136
  %v4_170 = inttoptr i32 %v3_170 to double*
  %v5_170 = load double, double* %v4_170, align 4
  %v6_170 = fpext double %v5_170 to x86_fp80
  %v7_170 = fsub x86_fp80 %v2_16e, %v6_170
  %v4_176 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_176 = fpext double %v4_176 to x86_fp80
  %v6_176 = fmul x86_fp80 %v7_170, %v5_176
  store x86_fp80 %v6_176, x86_fp80* %st6.global-to-local, align 4
  %tmp273 = bitcast double %v4_176 to i64
  %tmp274 = trunc i64 %tmp273 to i32
  %v1_178 = add i32 %tmp274, -68
  %v2_178 = inttoptr i32 %v1_178 to i32*
  %v3_178 = load i32, i32* %v2_178, align 4
  %v10_178 = icmp eq i32 %v3_178, 0
  %v1_17c = icmp eq i1 %v10_178, false
  %v1_181.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_17c, label %dec_label_pc_181, label %dec_label_pc_17e

dec_label_pc_17e:                                 ; preds = %dec_label_pc_162
  %v3_17e = add i32 %tmp274, -32
  %v4_17e = inttoptr i32 %v3_17e to double*
  %v5_17e = load double, double* %v4_17e, align 4
  %v6_17e = fpext double %v5_17e to x86_fp80
  %v7_17e = fdiv x86_fp80 %v1_181.pre, %v6_17e
  store x86_fp80 %v7_17e, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_181

dec_label_pc_181:                                 ; preds = %dec_label_pc_162, %dec_label_pc_17e
  %v1_181 = phi x86_fp80 [ %v7_17e, %dec_label_pc_17e ], [ %v1_181.pre, %dec_label_pc_162 ]
  %v0_181 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_181 = load i32, i32* %esi.global-to-local, align 4
  %v3_181 = add i32 %v2_181, -32
  %v4_181 = fptrunc x86_fp80 %v1_181 to double
  %v5_181 = inttoptr i32 %v3_181 to double*
  store double %v4_181, double* %v5_181, align 4
  %v1_184 = load i32, i32* @edi, align 8
  %v2_184 = add i32 %v1_184, -16
  %v3_184 = inttoptr i32 %v2_184 to double*
  %v4_184 = load double, double* %v3_184, align 4
  %v5_184 = fpext double %v4_184 to x86_fp80
  store x86_fp80 %v5_184, x86_fp80* %st7.global-to-local, align 4
  %v2_187 = add i32 %v2_181, -24
  %v3_187 = inttoptr i32 %v2_187 to i32*
  %v4_187 = load i32, i32* %v3_187, align 4
  %v5_187 = sitofp i32 %v4_187 to x86_fp80
  store x86_fp80 %v5_187, x86_fp80* %st6.global-to-local, align 4
  %v3_18a = add i32 %v1_184, -76
  %v4_18a = inttoptr i32 %v3_18a to double*
  %v5_18a = load double, double* %v4_18a, align 4
  %v6_18a = fpext double %v5_18a to x86_fp80
  %v7_18a = fmul x86_fp80 %v5_187, %v6_18a
  store x86_fp80 %v7_18a, x86_fp80* %st6.global-to-local, align 4
  %v4_18d = fadd x86_fp80 %v7_18a, %v5_184
  %v2_18f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_18d)
  store x86_fp80 %v2_18f, x86_fp80* %st7.global-to-local, align 4
  %v3_191 = add i32 %v2_181, 128
  %tmp275 = fptrunc x86_fp80 %v4_18d to double
  %v4_191 = call double @llvm.fabs.f64(double %tmp275)
  %v5_191 = inttoptr i32 %v3_191 to double*
  store double %v4_191, double* %v5_191, align 4
  %v6_191 = add i3 %v0_181, 1
  store i3 %v6_191, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v0_166
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_fpatan(x86_fp80, x86_fp80, x86_fp80) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_fprem(x86_fp80) local_unnamed_addr

declare i32 @__asm_f2xm1() local_unnamed_addr

declare i32 @__asm_fscale() local_unnamed_addr

declare i32 @__asm_wait(x86_fp80) local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare i32 @__asm_fyl2x() local_unnamed_addr

declare double @__decompiler_undefined_function_1() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
