source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp282 = call double @__decompiler_undefined_function_4()
  %stack_var_-44 = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load x86_fp80, x86_fp80* %stack_var_-44, align 4
  %v3_40 = fptrunc x86_fp80 %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4c = load i32, i32* %edi.global-to-local, align 4
  %v1_4c = add i32 %v0_4c, -44
  store i32 %v1_4c, i32* %edi.global-to-local, align 4
  %v0_4f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4f = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_4f, x86_fp80* %st7.global-to-local, align 4
  %v5_53 = fpext double %tmp282 to x86_fp80
  %v6_53 = add i3 %v0_4f, -2
  %v3_57 = load x86_fp80, x86_fp80* %stack_var_-44, align 4
  %v3_5c = add i32 %v0_4c, -104
  %v4_5c = inttoptr i32 %v3_5c to float*
  %v5_5c = load float, float* %v4_5c, align 4
  %v6_5c = fpext float %v5_5c to x86_fp80
  %v7_5c = fmul x86_fp80 %v3_57, %v6_5c
  %v3_61 = add i32 %v0_4c, -108
  %v4_61 = inttoptr i32 %v3_61 to float*
  %v5_61 = load float, float* %v4_61, align 4
  %v6_61 = fpext float %v5_61 to x86_fp80
  %v7_61 = fmul x86_fp80 %v5_53, %v6_61
  %v4_64 = fadd x86_fp80 %v7_5c, %v7_61
  %v3_68 = add i32 %v0_4c, -112
  %v4_68 = inttoptr i32 %v3_68 to float*
  %v5_68 = load float, float* %v4_68, align 4
  %v6_68 = fpext float %v5_68 to x86_fp80
  %v7_68 = fmul x86_fp80 %v7_4f, %v6_68
  %v4_6b = fadd x86_fp80 %v7_68, %v4_64
  %v3_6f = add i32 %v0_4c, -80
  %v4_6f = inttoptr i32 %v3_6f to float*
  %v5_6f = load float, float* %v4_6f, align 4
  %v6_6f = fpext float %v5_6f to x86_fp80
  %v7_6f = fmul x86_fp80 %v3_57, %v6_6f
  %v3_74 = add i32 %v0_4c, -84
  %v4_74 = inttoptr i32 %v3_74 to float*
  %v5_74 = load float, float* %v4_74, align 4
  %v6_74 = fpext float %v5_74 to x86_fp80
  %v7_74 = fmul x86_fp80 %v5_53, %v6_74
  %v4_77 = fadd x86_fp80 %v7_6f, %v7_74
  %v3_7b = add i32 %v0_4c, -88
  %v4_7b = inttoptr i32 %v3_7b to float*
  %v5_7b = load float, float* %v4_7b, align 4
  %v6_7b = fpext float %v5_7b to x86_fp80
  %v7_7b = fmul x86_fp80 %v7_4f, %v6_7b
  %v4_7e = fadd x86_fp80 %v4_77, %v7_7b
  %v3_82 = add i32 %v0_4c, -92
  %v4_82 = inttoptr i32 %v3_82 to float*
  %v5_82 = load float, float* %v4_82, align 4
  %v6_82 = fpext float %v5_82 to x86_fp80
  %v7_82 = fmul x86_fp80 %v3_57, %v6_82
  %v3_87 = add i32 %v0_4c, -96
  %v4_87 = inttoptr i32 %v3_87 to float*
  %v5_87 = load float, float* %v4_87, align 4
  %v6_87 = fpext float %v5_87 to x86_fp80
  %v7_87 = fmul x86_fp80 %v5_53, %v6_87
  %v4_8a = fadd x86_fp80 %v7_82, %v7_87
  store x86_fp80 %v4_6b, x86_fp80* %st7.global-to-local, align 4
  %v3_8e = add i32 %v0_4c, -100
  %v4_8e = inttoptr i32 %v3_8e to float*
  %v5_8e = load float, float* %v4_8e, align 4
  %v6_8e = fpext float %v5_8e to x86_fp80
  %v7_8e = fmul x86_fp80 %v7_4f, %v6_8e
  %v4_91 = fadd x86_fp80 %v4_8a, %v7_8e
  store x86_fp80 %v4_7e, x86_fp80* %stack_var_-44, align 4
  store i32 %v0_4c, i32* %edi.global-to-local, align 4
  %v1_a2 = add i32 %v0_4c, -116
  %v2_a2 = inttoptr i32 %v1_a2 to i32*
  %v3_a2 = load i32, i32* %v2_a2, align 4
  %v13_a2 = icmp eq i32 %v3_a2, 1
  %v1_a6 = icmp eq i1 %v13_a2, false
  br i1 %v1_a6, label %dec_label_pc_c9, label %dec_label_pc_a8

dec_label_pc_a8:                                  ; preds = %dec_label_pc_40
  %v3_ab = fmul x86_fp80 %v4_7e, %v4_7e
  %v3_b1 = fmul x86_fp80 %v4_91, %v4_91
  %v4_b3 = fadd x86_fp80 %v3_ab, %v3_b1
  %v4_b7 = fdiv x86_fp80 0xK3FFF8000000000000000, %v4_b3
  %v10_bb = fmul x86_fp80 %v4_7e, %v4_b7
  store x86_fp80 %v10_bb, x86_fp80* %stack_var_-44, align 4
  %v7_c1 = fmul x86_fp80 %v4_b7, %v4_91
  store x86_fp80 %v7_c1, x86_fp80* %st7.global-to-local, align 4
  %v3_ca.pre = load i32, i32* %v2_a2, align 4
  br label %dec_label_pc_c9

dec_label_pc_c9:                                  ; preds = %dec_label_pc_a8, %dec_label_pc_40
  %v3_fa = phi x86_fp80 [ %v4_7e, %dec_label_pc_40 ], [ %v10_bb, %dec_label_pc_a8 ]
  %v3_ca = phi i32 [ %v3_a2, %dec_label_pc_40 ], [ %v3_ca.pre, %dec_label_pc_a8 ]
  %stack_var_-36.0.in = phi x86_fp80 [ %v4_91, %dec_label_pc_40 ], [ %v7_c1, %dec_label_pc_a8 ]
  %stack_var_-36.0 = fptrunc x86_fp80 %stack_var_-36.0.in to double
  %v13_ca = icmp eq i32 %v3_ca, 2
  %v1_ce = icmp eq i1 %v13_ca, false
  br i1 %v1_ce, label %dec_label_pc_10c, label %dec_label_pc_d0

dec_label_pc_d0:                                  ; preds = %dec_label_pc_c9
  %v3_d3 = fmul x86_fp80 %v3_fa, %v3_fa
  %v4_db = fadd x86_fp80 %stack_var_-36.0.in, 0xK3FFF8000000000000000
  %v3_dd = fmul x86_fp80 %v4_db, %v4_db
  %v4_df = fadd x86_fp80 %v3_d3, %v3_dd
  %v4_e3 = fdiv x86_fp80 0xK3FFF8000000000000000, %v4_df
  store x86_fp80 %v4_e3, x86_fp80* %st7.global-to-local, align 4
  %v3_ee = fmul x86_fp80 %stack_var_-36.0.in, %stack_var_-36.0.in
  %v4_f0 = fadd x86_fp80 %v3_d3, %v3_ee
  %v4_f4 = fadd x86_fp80 %v4_f0, 0xKBFFF8000000000000000
  %v4_f6 = fmul x86_fp80 %v4_f4, %v4_e3
  %v3_fd = fadd x86_fp80 %v3_fa, %v3_fa
  %tmp287 = fmul x86_fp80 %v3_fd, %v4_e3
  %tmp295 = fptrunc x86_fp80 %tmp287 to double
  %v4_103 = fsub double -0.000000e+00, %tmp295
  store x86_fp80 %v4_f6, x86_fp80* %stack_var_-44, align 4
  %v3_10d.pre = load i32, i32* %v2_a2, align 4
  br label %dec_label_pc_10c

dec_label_pc_10c:                                 ; preds = %dec_label_pc_d0, %dec_label_pc_c9
  %v0_124 = phi x86_fp80 [ %v3_fa, %dec_label_pc_c9 ], [ %v4_f6, %dec_label_pc_d0 ]
  %v3_10d = phi i32 [ %v3_ca, %dec_label_pc_c9 ], [ %v3_10d.pre, %dec_label_pc_d0 ]
  %stack_var_-36.1 = phi double [ %stack_var_-36.0, %dec_label_pc_c9 ], [ %v4_103, %dec_label_pc_d0 ]
  %v13_10d = icmp eq i32 %v3_10d, 3
  %v1_111 = icmp eq i1 %v13_10d, false
  br i1 %v1_111, label %dec_label_pc_13a, label %dec_label_pc_113

dec_label_pc_113:                                 ; preds = %dec_label_pc_10c
  %v3_116 = fmul x86_fp80 %v0_124, %v0_124
  %v5_118 = fpext double %stack_var_-36.1 to x86_fp80
  %v3_11c = fmul x86_fp80 %v5_118, %v5_118
  %v4_11e = fadd x86_fp80 %v3_116, %v3_11c
  store i3 %v6_53, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  %v12_124 = call i32 @__asm_fyl2x(x86_fp80 %v0_124, x86_fp80 %v5_118, x86_fp80 %v4_6b)
  %v4_128 = fdiv x86_fp80 0xK3FFF8000000000000000, %v4_11e
  %v4_12c = load x86_fp80, x86_fp80* %stack_var_-44, align 4
  %v10_12c = fmul x86_fp80 %v4_128, %v4_12c
  store x86_fp80 %v10_12c, x86_fp80* %stack_var_-44, align 4
  %v7_132 = fmul x86_fp80 %v4_128, %v5_118
  %v4_136 = fptrunc x86_fp80 %v7_132 to double
  %v6_136 = add i3 %v0_4f, -1
  store i3 %v6_136, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_13b.pre = load i32, i32* %edi.global-to-local, align 4
  %.pre = add i32 %v0_13b.pre, -116
  %.pre40 = inttoptr i32 %.pre to i32*
  %v3_13b.pre = load i32, i32* %.pre40, align 4
  br label %dec_label_pc_13a

dec_label_pc_13a:                                 ; preds = %dec_label_pc_113, %dec_label_pc_10c
  %v3_13b = phi i32 [ %v3_13b.pre, %dec_label_pc_113 ], [ %v3_10d, %dec_label_pc_10c ]
  %v3_156 = phi x86_fp80 [ %v10_12c, %dec_label_pc_113 ], [ %v0_124, %dec_label_pc_10c ]
  %v0_141 = phi i3 [ %v6_136, %dec_label_pc_113 ], [ %v0_4f, %dec_label_pc_10c ]
  %v0_13b = phi i32 [ %v0_13b.pre, %dec_label_pc_113 ], [ %v0_4c, %dec_label_pc_10c ]
  %stack_var_-36.2 = phi double [ %v4_136, %dec_label_pc_113 ], [ %stack_var_-36.1, %dec_label_pc_10c ]
  %v13_13b = icmp eq i32 %v3_13b, 4
  %v1_13f = icmp eq i1 %v13_13b, false
  br i1 %v1_13f, label %dec_label_pc_162, label %dec_label_pc_141

dec_label_pc_141:                                 ; preds = %dec_label_pc_13a
  %v3_144 = fmul x86_fp80 %v3_156, %v3_156
  %v5_146 = fpext double %stack_var_-36.2 to x86_fp80
  %v3_14a = fmul x86_fp80 %v5_146, %v5_146
  %v4_14c = fadd x86_fp80 %v3_144, %v3_14a
  %v2_14e = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_14c)
  store x86_fp80 %v2_14e, x86_fp80* %st7.global-to-local, align 4
  %v9_156 = add i3 %v0_141, -3
  store i3 %v9_156, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_159 = call i32 @__asm_fpatan(x86_fp80 %v3_156, x86_fp80 %v5_146)
  %v4_15b = fptrunc x86_fp80 %v3_156 to double
  store x86_fp80 %v5_146, x86_fp80* %stack_var_-44, align 4
  %v8_15f = add i3 %v0_141, -1
  store i3 %v8_15f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_165.pre = load i32, i32* %edi.global-to-local, align 4
  br label %dec_label_pc_162

dec_label_pc_162:                                 ; preds = %dec_label_pc_141, %dec_label_pc_13a
  %v2_16e = phi i32 [ %v0_13b, %dec_label_pc_13a ], [ %v2_165.pre, %dec_label_pc_141 ]
  %v0_162 = phi i3 [ %v0_141, %dec_label_pc_13a ], [ %v8_15f, %dec_label_pc_141 ]
  %stack_var_-36.3 = phi double [ %stack_var_-36.2, %dec_label_pc_13a ], [ %v4_15b, %dec_label_pc_141 ]
  %v9_162 = add i3 %v0_162, -1
  %v3_165 = add i32 %v2_16e, -72
  %v4_165 = inttoptr i32 %v3_165 to double*
  %v5_16a = fpext double %stack_var_-36.3 to x86_fp80
  store x86_fp80 %v5_16a, x86_fp80* %st7.global-to-local, align 4
  %v5_16e = load double, double* %v4_165, align 4
  %v6_16e = fpext double %v5_16e to x86_fp80
  %v7_16e = fmul x86_fp80 %v5_16a, %v6_16e
  %v2_171 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_16e)
  %v3_171 = fcmp olt x86_fp80 %v2_171, 0xK403E8000000000000000
  %v4_171 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_16e)
  %storemerge25 = select i1 %v3_171, x86_fp80 %v4_171, x86_fp80 %v7_16e
  %v4_173 = fmul x86_fp80 %storemerge25, %storemerge25
  store x86_fp80 %v4_173, x86_fp80* %st7.global-to-local, align 4
  store i3 %v9_162, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_178 = call i32 @__asm_wait()
  %v0_179 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_179 = call i16 @__asm_fnstsw(i32 %v0_179)
  %tmp296 = and i16 %v1_179, 256
  %v16_17b = icmp ne i16 %tmp296, 0
  %v1_17d = icmp eq i1 %v16_17b, false
  %v1_184 = load i32, i32* %edi.global-to-local, align 4
  %storemerge15.in.in.in.in.v = select i1 %v1_17d, i32 -132, i32 -124
  %storemerge15.in.in.in.in = add i32 %storemerge15.in.in.in.in.v, %v1_184
  %storemerge15.in.in.in = inttoptr i32 %storemerge15.in.in.in.in to double*
  %storemerge15.in.in = load double, double* %storemerge15.in.in.in, align 4
  %storemerge22.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge22 = add i3 %storemerge22.in, -1
  %storemerge12 = fpext double %storemerge15.in.in to x86_fp80
  store x86_fp80 %storemerge12, x86_fp80* %st7.global-to-local, align 4
  %v1_18a = load i32, i32* %esi.global-to-local, align 4
  %v2_18a = add i32 %v1_18a, -24
  %v3_18a = inttoptr i32 %v2_18a to i32*
  %v4_18a = load i32, i32* %v3_18a, align 4
  %v5_18a = sitofp i32 %v4_18a to x86_fp80
  %v3_18d = add i32 %v1_184, -140
  %v4_18d = inttoptr i32 %v3_18d to double*
  %v5_18d = load double, double* %v4_18d, align 4
  %v6_18d = fpext double %v5_18d to x86_fp80
  %v7_18d = fmul x86_fp80 %v5_18a, %v6_18d
  %v4_193 = fadd x86_fp80 %v7_18d, %storemerge12
  store x86_fp80 %v4_193, x86_fp80* %st7.global-to-local, align 4
  %v3_195 = add i32 %v1_18a, 128
  %v4_195 = fptrunc x86_fp80 %v4_193 to double
  %v5_195 = inttoptr i32 %v3_195 to double*
  store double %v4_195, double* %v5_195, align 4
  %v1_19b = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_19b = inttoptr i32 %v1_184 to double*
  %v4_19b = load double, double* %v3_19b, align 4
  %v5_19b = fpext double %v4_19b to x86_fp80
  %v6_19b = fmul x86_fp80 %v1_19b, %v5_19b
  store x86_fp80 %v6_19b, x86_fp80* %st7.global-to-local, align 4
  %v3_19d = add i32 %v1_184, -72
  %v4_19d = inttoptr i32 %v3_19d to double*
  %v5_19d = load double, double* %v4_19d, align 4
  %v6_19d = fpext double %v5_19d to x86_fp80
  %v7_19d = fdiv x86_fp80 %v6_19b, %v6_19d
  store x86_fp80 %v7_19d, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge22, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_1a5 = fsub x86_fp80 0xK80000000000000000000, %v4_6b
  %v0_1b0 = call i32 @__asm_wait()
  %v0_1b1 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1b1 = call i16 @__asm_fnstsw(i32 %v0_1b1)
  store x86_fp80 %v2_1a5, x86_fp80* %st7.global-to-local, align 4
  %v0_1c3 = call i32 @__asm_wait()
  %v1_1c4 = call i16 @__asm_fnstsw(i32 %v0_1b1)
  %v2_1c4 = sext i16 %v1_1c4 to i32
  %v4_1c4 = and i32 %v0_1c3, -65536
  %tmp290 = udiv i32 %v2_1c4, 2
  %v12_1c6 = and i32 %tmp290, 32512
  %v2_1c4.masked = and i32 %v2_1c4, -65281
  %v13_1c6 = or i32 %v4_1c4, %v2_1c4.masked
  %v14_1c6 = or i32 %v13_1c6, %v12_1c6
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1d0 = load i32, i32* %edi.global-to-local, align 4
  %v1_1d0 = add i32 %v0_1d0, -76
  %v2_1d0 = inttoptr i32 %v1_1d0 to i32*
  %v3_1d0 = load i32, i32* %v2_1d0, align 4
  %v10_1d0 = icmp eq i32 %v3_1d0, 0
  %v1_1d4 = icmp eq i1 %v10_1d0, false
  %v1_1d9.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_1d4, label %dec_label_pc_1d9, label %dec_label_pc_1d6

dec_label_pc_1d6:                                 ; preds = %dec_label_pc_162
  %v3_1d6 = add i32 %v0_1d0, -32
  %v4_1d6 = inttoptr i32 %v3_1d6 to double*
  %v5_1d6 = load double, double* %v4_1d6, align 4
  %v6_1d6 = fpext double %v5_1d6 to x86_fp80
  %v7_1d6 = fdiv x86_fp80 %v1_1d9.pre, %v6_1d6
  store x86_fp80 %v7_1d6, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1d9

dec_label_pc_1d9:                                 ; preds = %dec_label_pc_162, %dec_label_pc_1d6
  %v1_1d9 = phi x86_fp80 [ %v7_1d6, %dec_label_pc_1d6 ], [ %v1_1d9.pre, %dec_label_pc_162 ]
  %v2_1d9 = load i32, i32* %esi.global-to-local, align 4
  %v3_1d9 = add i32 %v2_1d9, -32
  %v4_1d9 = fptrunc x86_fp80 %v1_1d9 to double
  %v5_1d9 = inttoptr i32 %v3_1d9 to double*
  store double %v4_1d9, double* %v5_1d9, align 4
  %v6_1d9 = add i3 %storemerge.in, 2
  store i3 %v6_1d9, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_1c6
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_fyl2x(x86_fp80, x86_fp80, x86_fp80) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_fpatan(x86_fp80, x86_fp80) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_4() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
