source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %ebx.global-to-local, align 4
  %v0_4 = load i32, i32* %esi.global-to-local, align 4
  %v0_5 = load i32, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  %v0_d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_d = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_d = fpext double %v3_d to x86_fp80
  store x86_fp80 %v4_d, x86_fp80* %st7.global-to-local, align 4
  %v3_f = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_f = fpext double %v3_f to x86_fp80
  store x86_fp80 %v4_f, x86_fp80* %st6.global-to-local, align 4
  %v3_11 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_11 = fpext double %v3_11 to x86_fp80
  store x86_fp80 %v4_11, x86_fp80* %st5.global-to-local, align 4
  %v3_15 = add i32 %v3_a, -68
  %v4_15 = inttoptr i32 %v3_15 to float*
  %v5_15 = load float, float* %v4_15, align 4
  %v6_15 = fpext float %v5_15 to x86_fp80
  %v7_15 = fmul x86_fp80 %v4_11, %v6_15
  %v3_1a = add i32 %v3_a, -72
  %v4_1a = inttoptr i32 %v3_1a to float*
  %v5_1a = load float, float* %v4_1a, align 4
  %v6_1a = fpext float %v5_1a to x86_fp80
  %v7_1a = fmul x86_fp80 %v4_f, %v6_1a
  %v4_1d = fadd x86_fp80 %v7_15, %v7_1a
  %v3_21 = add i32 %v3_a, -76
  %v4_21 = inttoptr i32 %v3_21 to float*
  %v5_21 = load float, float* %v4_21, align 4
  %v6_21 = fpext float %v5_21 to x86_fp80
  %v7_21 = fmul x86_fp80 %v4_d, %v6_21
  %v4_24 = fadd x86_fp80 %v7_21, %v4_1d
  %v3_28 = add i32 %v3_a, -44
  %v4_28 = inttoptr i32 %v3_28 to float*
  %v5_28 = load float, float* %v4_28, align 4
  %v6_28 = fpext float %v5_28 to x86_fp80
  %v7_28 = fmul x86_fp80 %v4_11, %v6_28
  %v3_2d = add i32 %v3_a, -48
  %v4_2d = inttoptr i32 %v3_2d to float*
  %v5_2d = load float, float* %v4_2d, align 4
  %v6_2d = fpext float %v5_2d to x86_fp80
  %v7_2d = fmul x86_fp80 %v4_f, %v6_2d
  %v4_30 = fadd x86_fp80 %v7_28, %v7_2d
  %v3_34 = add i32 %v3_a, -52
  %v4_34 = inttoptr i32 %v3_34 to float*
  %v5_34 = load float, float* %v4_34, align 4
  %v6_34 = fpext float %v5_34 to x86_fp80
  %v7_34 = fmul x86_fp80 %v4_d, %v6_34
  %v4_37 = fadd x86_fp80 %v4_30, %v7_34
  store x86_fp80 %v4_37, x86_fp80* %st5.global-to-local, align 4
  %v3_3b = add i32 %v3_a, -56
  %v4_3b = inttoptr i32 %v3_3b to float*
  %v5_3b = load float, float* %v4_3b, align 4
  %v6_3b = fpext float %v5_3b to x86_fp80
  %v7_3b = fmul x86_fp80 %v4_11, %v6_3b
  store x86_fp80 %v7_3b, x86_fp80* %st6.global-to-local, align 4
  %v3_40 = add i32 %v3_a, -60
  %v4_40 = inttoptr i32 %v3_40 to float*
  %v5_40 = load float, float* %v4_40, align 4
  %v6_40 = fpext float %v5_40 to x86_fp80
  %v7_40 = fmul x86_fp80 %v4_f, %v6_40
  %v4_43 = fadd x86_fp80 %v7_3b, %v7_40
  store x86_fp80 %v4_43, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_24, x86_fp80* %st7.global-to-local, align 4
  %v3_47 = add i32 %v3_a, -64
  %v4_47 = inttoptr i32 %v3_47 to float*
  %v5_47 = load float, float* %v4_47, align 4
  %v6_47 = fpext float %v5_47 to x86_fp80
  %v7_47 = fmul x86_fp80 %v4_d, %v6_47
  %v4_4a = fadd x86_fp80 %v4_43, %v7_47
  store x86_fp80 %v4_4a, x86_fp80* %st6.global-to-local, align 4
  %v7_4a = add i3 %v0_d, -3
  store i3 %v7_4a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_4e = load i32, i32* %fpsw.global-to-local, align 4
  %v1_4e = call i16 @__asm_fnstsw(i32 %v0_4e)
  %v2_4e = sext i16 %v1_4e to i32
  %v3_4e = load i32, i32* @eax, align 8
  %v4_4e = and i32 %v3_4e, -65536
  %tmp252 = udiv i32 %v2_4e, 2
  %v12_50 = and i32 %tmp252, 32512
  %v2_4e.masked = and i32 %v2_4e, -65281
  %v13_50 = or i32 %v4_4e, %v2_4e.masked
  %v14_50 = or i32 %v13_50, %v12_50
  store i32 %v14_50, i32* @eax, align 8
  %v15_5017 = and i32 %v2_4e, 256
  %v16_50 = icmp ne i32 %v15_5017, 0
  %v1_52 = icmp eq i1 %v16_50, false
  %v1_56.pre = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  br i1 %v1_52, label %dec_label_pc_56, label %dec_label_pc_54

dec_label_pc_54:                                  ; preds = %dec_label_pc_0
  %v3_54 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_54, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v1_56.pre, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_56

dec_label_pc_56:                                  ; preds = %dec_label_pc_0, %dec_label_pc_54
  %v1_56 = phi x86_fp80 [ %v3_54, %dec_label_pc_54 ], [ %v1_56.pre, %dec_label_pc_0 ]
  %v2_56 = fsub x86_fp80 0xK80000000000000000000, %v1_56
  store x86_fp80 %v2_56, x86_fp80* %st5.global-to-local, align 4
  %v0_5a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5a = call i16 @__asm_fnstsw(i32 %v0_5a)
  %v2_5a = sext i16 %v1_5a to i32
  %v3_5a = load i32, i32* @eax, align 8
  %v4_5a = and i32 %v3_5a, -65536
  %tmp253 = udiv i32 %v2_5a, 2
  %v12_5c = and i32 %tmp253, 32512
  %v2_5a.masked = and i32 %v2_5a, -65281
  %v13_5c = or i32 %v4_5a, %v2_5a.masked
  %v14_5c = or i32 %v13_5c, %v12_5c
  store i32 %v14_5c, i32* @eax, align 8
  %v1_62 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_62 = fsub x86_fp80 0xK80000000000000000000, %v1_62
  store x86_fp80 %v2_62, x86_fp80* %st7.global-to-local, align 4
  %v0_66 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_66 = call i16 @__asm_fnstsw(i32 %v0_66)
  %v2_66 = sext i16 %v1_66 to i32
  %v3_66 = load i32, i32* @eax, align 8
  %v4_66 = and i32 %v3_66, -65536
  %tmp254 = udiv i32 %v2_66, 2
  %v12_68 = and i32 %tmp254, 32512
  %v2_66.masked = and i32 %v2_66, -65281
  %v13_68 = or i32 %v4_66, %v2_66.masked
  %v14_68 = or i32 %v13_68, %v12_68
  store i32 %v14_68, i32* @eax, align 8
  %v1_6e = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_6e = fsub x86_fp80 0xK80000000000000000000, %v1_6e
  store x86_fp80 %v2_6e, x86_fp80* %st7.global-to-local, align 4
  %v0_72 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_72 = call i16 @__asm_fnstsw(i32 %v0_72)
  %v2_72 = sext i16 %v1_72 to i32
  %v3_72 = load i32, i32* @eax, align 8
  %v4_72 = and i32 %v3_72, -65536
  %tmp255 = udiv i32 %v2_72, 2
  %v12_74 = and i32 %tmp255, 32512
  %v2_72.masked = and i32 %v2_72, -65281
  %v13_74 = or i32 %v4_72, %v2_72.masked
  %v14_74 = or i32 %v13_74, %v12_74
  store i32 %v14_74, i32* @eax, align 8
  %v1_7a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_7a = fsub x86_fp80 0xK80000000000000000000, %v1_7a
  store x86_fp80 %v2_7a, x86_fp80* %st7.global-to-local, align 4
  %v0_7e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v2_7a, x86_fp80* %st6.global-to-local, align 4
  %v2_80 = load i32, i32* %esi.global-to-local, align 4
  %v3_80 = add i32 %v2_80, -104
  %v4_80 = inttoptr i32 %v3_80 to float*
  %v5_80 = load float, float* %v4_80, align 4
  %v6_80 = fpext float %v5_80 to x86_fp80
  %v7_80 = fmul x86_fp80 %v2_7a, %v6_80
  store x86_fp80 %v7_80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_7a, x86_fp80* %st5.global-to-local, align 4
  %v3_85 = add i32 %v2_80, -108
  %v4_85 = inttoptr i32 %v3_85 to float*
  %v5_85 = load float, float* %v4_85, align 4
  %v6_85 = fpext float %v5_85 to x86_fp80
  %v7_85 = fmul x86_fp80 %v2_7a, %v6_85
  %v4_88 = fadd x86_fp80 %v7_80, %v7_85
  store x86_fp80 %v4_88, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_7a, x86_fp80* %st5.global-to-local, align 4
  %v3_8c = add i32 %v2_80, -112
  %v4_8c = inttoptr i32 %v3_8c to float*
  %v5_8c = load float, float* %v4_8c, align 4
  %v6_8c = fpext float %v5_8c to x86_fp80
  %v7_8c = fmul x86_fp80 %v2_7a, %v6_8c
  %v4_8f = fadd x86_fp80 %v4_88, %v7_8c
  store x86_fp80 %v4_8f, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v2_7a, x86_fp80* %st5.global-to-local, align 4
  %v3_93 = add i32 %v2_80, -80
  %v4_93 = inttoptr i32 %v3_93 to float*
  %v5_93 = load float, float* %v4_93, align 4
  %v6_93 = fpext float %v5_93 to x86_fp80
  %v7_93 = fmul x86_fp80 %v2_7a, %v6_93
  store x86_fp80 %v7_93, x86_fp80* %st5.global-to-local, align 4
  %v3_98 = add i32 %v2_80, -84
  %v4_98 = inttoptr i32 %v3_98 to float*
  %v5_98 = load float, float* %v4_98, align 4
  %v6_98 = fpext float %v5_98 to x86_fp80
  %v7_98 = fmul x86_fp80 %v2_7a, %v6_98
  %v4_9b = fadd x86_fp80 %v7_93, %v7_98
  store x86_fp80 %v4_9b, x86_fp80* %st5.global-to-local, align 4
  %v3_9f = add i32 %v2_80, -88
  %v4_9f = inttoptr i32 %v3_9f to float*
  %v5_9f = load float, float* %v4_9f, align 4
  %v6_9f = fpext float %v5_9f to x86_fp80
  %v7_9f = fmul x86_fp80 %v2_7a, %v6_9f
  %v4_a2 = fadd x86_fp80 %v4_9b, %v7_9f
  store x86_fp80 %v2_7a, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v4_a2, x86_fp80* %st7.global-to-local, align 4
  %v3_a6 = add i32 %v2_80, -92
  %v4_a6 = inttoptr i32 %v3_a6 to float*
  %v5_a6 = load float, float* %v4_a6, align 4
  %v6_a6 = fpext float %v5_a6 to x86_fp80
  %v7_a6 = fmul x86_fp80 %v4_a2, %v6_a6
  store x86_fp80 %v7_a6, x86_fp80* %st7.global-to-local, align 4
  %v3_ab = add i32 %v2_80, -96
  %v4_ab = inttoptr i32 %v3_ab to float*
  %v5_ab = load float, float* %v4_ab, align 4
  %v6_ab = fpext float %v5_ab to x86_fp80
  %v7_ab = fmul x86_fp80 %v7_a6, %v6_ab
  %v4_ae = fadd x86_fp80 %v7_ab, %v7_ab
  store x86_fp80 %v4_ae, x86_fp80* %st7.global-to-local, align 4
  %v3_b2 = add i32 %v2_80, -100
  %v4_b2 = inttoptr i32 %v3_b2 to float*
  %v5_b2 = load float, float* %v4_b2, align 4
  %v6_b2 = fpext float %v5_b2 to x86_fp80
  %v7_b2 = fmul x86_fp80 %v4_ae, %v6_b2
  %v4_b5 = fadd x86_fp80 %v7_b2, %v7_b2
  store x86_fp80 %v4_b5, x86_fp80* %st7.global-to-local, align 4
  %v2_b7 = add i32 %v2_80, -16
  %v3_b7 = inttoptr i32 %v2_b7 to double*
  %v4_b7 = load double, double* %v3_b7, align 4
  %v5_b7 = fpext double %v4_b7 to x86_fp80
  store x86_fp80 %v5_b7, x86_fp80* %st7.global-to-local, align 4
  %v1_ba = load i32, i32* @ecx, align 8
  %v2_ba = add i32 %v1_ba, 8
  %v3_ba = inttoptr i32 %v2_ba to double*
  %v4_ba = load double, double* %v3_ba, align 4
  %v5_ba = fpext double %v4_ba to x86_fp80
  %v4_bd = fmul x86_fp80 %v5_b7, %v5_ba
  %v4_bf = fptrunc x86_fp80 %v4_bd to double
  store double %v4_bf, double* %v3_ba, align 4
  %v2_c2 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_c2 = fmul x86_fp80 %v2_c2, %v2_c2
  %v4_c4 = fmul x86_fp80 %v4_c2, %v4_c2
  %v4_c6 = fmul x86_fp80 %v4_c4, %v4_c4
  %v4_ca = fadd x86_fp80 %v4_c6, 0xKBFFF8000000000000000
  store x86_fp80 %v4_ca, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_ca, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_ca, x86_fp80* %st5.global-to-local, align 4
  %v3_d0 = add i32 %v2_80, -24
  %v4_d0 = inttoptr i32 %v3_d0 to double*
  %v5_d0 = load double, double* %v4_d0, align 4
  %v6_d0 = fpext double %v5_d0 to x86_fp80
  %v7_d0 = fmul x86_fp80 %v4_ca, %v6_d0
  store x86_fp80 %v7_d0, x86_fp80* %st5.global-to-local, align 4
  %v4_d3 = fsub x86_fp80 %v4_ca, %v7_d0
  store x86_fp80 %v4_d3, x86_fp80* %st7.global-to-local, align 4
  %v3_d5 = add i32 %v2_80, -32
  %v4_d5 = inttoptr i32 %v3_d5 to double*
  %v5_d5 = load double, double* %v4_d5, align 4
  %v6_d5 = fpext double %v5_d5 to x86_fp80
  %v7_d5 = fmul x86_fp80 %v4_ca, %v6_d5
  store x86_fp80 %v7_d5, x86_fp80* %st6.global-to-local, align 4
  %v4_d8 = fsub x86_fp80 %v4_d3, %v7_d5
  store x86_fp80 %v4_d8, x86_fp80* %st7.global-to-local, align 4
  %v3_da = add i32 %v2_80, -40
  %v4_da = inttoptr i32 %v3_da to double*
  %v5_da = load double, double* %v4_da, align 4
  %v6_da = fpext double %v5_da to x86_fp80
  %v7_da = fmul x86_fp80 %v4_d8, %v6_da
  %v4_dd = fsub x86_fp80 %v7_da, %v7_da
  store x86_fp80 %v4_dd, x86_fp80* %st7.global-to-local, align 4
  %v2_df = load i32, i32* @edx, align 8
  %v3_df = fptrunc x86_fp80 %v4_dd to double
  %v4_df = inttoptr i32 %v2_df to double*
  store double %v3_df, double* %v4_df, align 4
  %v1_e1 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_e1 = load i32, i32* %ebx.global-to-local, align 4
  %v3_e1 = fptrunc x86_fp80 %v1_e1 to double
  %v4_e1 = inttoptr i32 %v2_e1 to double*
  store double %v3_e1, double* %v4_e1, align 4
  %v1_e3 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_e3 = load i32, i32* @ecx, align 8
  %v3_e3 = fptrunc x86_fp80 %v1_e3 to double
  %v4_e3 = inttoptr i32 %v2_e3 to double*
  store double %v3_e3, double* %v4_e3, align 4
  %v5_e3 = add i3 %v0_7e, 3
  store i3 %v5_e3, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_e1, i32* @eax, align 8
  store i32 %v0_4, i32* %esi.global-to-local, align 4
  store i32 %v0_3, i32* %ebx.global-to-local, align 4
  ret i32 %v2_e1
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr
