source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %eax.global-to-local, align 4
  %v0_6 = load i32, i32* %edx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %edi.global-to-local, align 4
  %v1_d = add i32 %v3_a, -12
  %v2_d = inttoptr i32 %v1_d to i32*
  %v3_d = load i32, i32* %v2_d, align 4
  %v1_10 = urem i32 %v3_d, 4
  store i32 %v1_10, i32* %esi.global-to-local, align 4
  %v0_13 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_13 = mul i32 %v1_10, 8
  %v4_13 = add i32 %v3_13, %v0_5
  %v5_13 = inttoptr i32 %v4_13 to double*
  %v6_13 = load double, double* %v5_13, align 4
  %v7_13 = fpext double %v6_13 to x86_fp80
  %v8_13 = add i3 %v0_13, -1
  store x86_fp80 %v7_13, x86_fp80* %st7.global-to-local, align 4
  store i32 0, i32* %edx.global-to-local, align 4
  %v3_18 = add i32 %v3_a, -16
  %v4_18 = inttoptr i32 %v3_18 to float*
  %v5_18 = load float, float* %v4_18, align 4
  %v6_18 = fpext float %v5_18 to x86_fp80
  %v7_18 = fsub x86_fp80 %v7_13, %v6_18
  store x86_fp80 %v7_18, x86_fp80* %st7.global-to-local, align 4
  %v3_1b = add i32 %v3_a, -20
  %v4_1b = inttoptr i32 %v3_1b to float*
  %v5_1b = load float, float* %v4_1b, align 4
  %v6_1b = fpext float %v5_1b to x86_fp80
  %v7_1b = fmul x86_fp80 %v7_18, %v6_1b
  store x86_fp80 %v7_1b, x86_fp80* %st7.global-to-local, align 4
  %v3_1e = inttoptr i32 %v3_a to double*
  %v4_1e = load double, double* %v3_1e, align 4
  %v5_1e = fpext double %v4_1e to x86_fp80
  %v6_1e = fmul x86_fp80 %v7_1b, %v5_1e
  store x86_fp80 %v6_1e, x86_fp80* %st7.global-to-local, align 4
  %v3_22 = add i32 %v3_a, -8
  %v4_22 = inttoptr i32 %v3_22 to double*
  %v5_22 = load double, double* %v4_22, align 4
  %v6_22 = fpext double %v5_22 to x86_fp80
  %v7_22 = fsub x86_fp80 %v6_1e, %v6_22
  %v2_25 = call x86_fp80 @llvm.round.f80(x86_fp80 %v7_22)
  %v4_27 = fsub x86_fp80 %v6_1e, %v2_25
  %v3_29 = fadd x86_fp80 %v4_27, %v4_27
  store x86_fp80 %v3_29, x86_fp80* %st7.global-to-local, align 4
  store i3 %v8_13, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_2f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_2f = call i16 @__asm_fnstsw(i32 %v0_2f)
  %v2_2f = sext i16 %v1_2f to i32
  %v3_2f = load i32, i32* %eax.global-to-local, align 4
  %v4_2f = and i32 %v3_2f, -65536
  %tmp251 = udiv i32 %v2_2f, 2
  %v12_31 = and i32 %tmp251, 32512
  %v2_2f.masked = and i32 %v2_2f, -65281
  %v13_31 = or i32 %v4_2f, %v2_2f.masked
  %v14_31 = or i32 %v13_31, %v12_31
  store i32 %v14_31, i32* %eax.global-to-local, align 4
  %v15_319 = and i32 %v2_2f, 256
  %v16_31 = icmp ne i32 %v15_319, 0
  %v1_33 = icmp eq i1 %v16_31, false
  %v3_43.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_33, label %dec_label_pc_41, label %dec_label_pc_35

dec_label_pc_35:                                  ; preds = %dec_label_pc_0
  %v4_39 = fsub x86_fp80 0xK40008000000000000000, %v3_43.pre
  store x86_fp80 %v4_39, x86_fp80* %st7.global-to-local, align 4
  %v0_3b = load i32, i32* %edx.global-to-local, align 4
  %v1_3b = xor i32 %v0_3b, -2147483648
  store i32 %v1_3b, i32* %edx.global-to-local, align 4
  br label %dec_label_pc_41

dec_label_pc_41:                                  ; preds = %dec_label_pc_0, %dec_label_pc_35
  %v3_43 = phi x86_fp80 [ %v4_39, %dec_label_pc_35 ], [ %v3_43.pre, %dec_label_pc_0 ]
  %v4_43 = fmul x86_fp80 %v3_43, 0xK4000C90FDAA22168C000
  store x86_fp80 %v4_43, x86_fp80* %st7.global-to-local, align 4
  %v0_48 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_48 = call i16 @__asm_fnstsw(i32 %v0_48)
  %v2_48 = sext i16 %v1_48 to i32
  %v3_48 = load i32, i32* %eax.global-to-local, align 4
  %v4_48 = and i32 %v3_48, -65536
  %tmp252 = udiv i32 %v2_48, 2
  %v12_4a = and i32 %tmp252, 32512
  %v2_48.masked = and i32 %v2_48, -65281
  %v13_4a = or i32 %v4_48, %v2_48.masked
  %v14_4a = or i32 %v13_4a, %v12_4a
  store i32 %v14_4a, i32* %eax.global-to-local, align 4
  %v15_4a10 = and i32 %v2_48, 256
  %v16_4a = icmp eq i32 %v15_4a10, 0
  %v0_4e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v16_4a, label %dec_label_pc_4e, label %dec_label_pc_41.dec_label_pc_58_crit_edge

dec_label_pc_41.dec_label_pc_58_crit_edge:        ; preds = %dec_label_pc_41
  %v1_58.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v0_63.pre = load i32, i32* %edx.global-to-local, align 4
  br label %dec_label_pc_58

dec_label_pc_4e:                                  ; preds = %dec_label_pc_41
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st7.global-to-local, align 4
  %v0_52 = load i32, i32* %edx.global-to-local, align 4
  %v1_52 = xor i32 %v0_52, -2147483648
  store i32 %v1_52, i32* %edx.global-to-local, align 4
  br label %dec_label_pc_58

dec_label_pc_58:                                  ; preds = %dec_label_pc_41.dec_label_pc_58_crit_edge, %dec_label_pc_4e
  %v0_63 = phi i32 [ %v0_63.pre, %dec_label_pc_41.dec_label_pc_58_crit_edge ], [ %v1_52, %dec_label_pc_4e ]
  %v1_58 = phi x86_fp80 [ %v1_58.pre, %dec_label_pc_41.dec_label_pc_58_crit_edge ], [ 0xK00000000000000000000, %dec_label_pc_4e ]
  %v3_5a = fmul x86_fp80 %v1_58, %v1_58
  %v4_5c = fmul x86_fp80 %v3_5a, %v3_5a
  store x86_fp80 %v4_5c, x86_fp80* %st7.global-to-local, align 4
  %v2_5e = load i32, i32* %edi.global-to-local, align 4
  %v3_5e = add i32 %v2_5e, 16
  %v4_5e = inttoptr i32 %v3_5e to double*
  %v5_5e = load double, double* %v4_5e, align 4
  %v6_5e = fpext double %v5_5e to x86_fp80
  %v7_5e = fmul x86_fp80 %v4_5c, %v6_5e
  %v4_61 = fsub x86_fp80 %v7_5e, %v7_5e
  %v3_63 = icmp slt i32 %v0_63, 0
  %v1_69 = icmp eq i1 %v3_63, false
  br i1 %v1_69, label %dec_label_pc_6d, label %dec_label_pc_6b

dec_label_pc_6b:                                  ; preds = %dec_label_pc_58
  %v2_6b = fsub x86_fp80 0xK80000000000000000000, %v4_61
  br label %dec_label_pc_6d

dec_label_pc_6d:                                  ; preds = %dec_label_pc_6b, %dec_label_pc_58
  %storemerge = phi x86_fp80 [ %v2_6b, %dec_label_pc_6b ], [ %v4_61, %dec_label_pc_58 ]
  %v1_6f = phi x86_fp80 [ %v2_6b, %dec_label_pc_6b ], [ %v4_61, %dec_label_pc_58 ]
  store x86_fp80 %storemerge, x86_fp80* %st7.global-to-local, align 4
  store i32 %v0_6, i32* %edx.global-to-local, align 4
  store i32 %v0_5, i32* %eax.global-to-local, align 4
  %v3_6f = add i32 %v2_5e, -24
  %v4_6f = inttoptr i32 %v3_6f to float*
  %v5_6f = load float, float* %v4_6f, align 4
  %v6_6f = fpext float %v5_6f to x86_fp80
  %v7_6f = fmul x86_fp80 %v1_6f, %v6_6f
  store x86_fp80 %v7_6f, x86_fp80* %st7.global-to-local, align 4
  %v3_72 = add i32 %v2_5e, -28
  %v4_72 = inttoptr i32 %v3_72 to float*
  %v5_72 = load float, float* %v4_72, align 4
  %v6_72 = fpext float %v5_72 to x86_fp80
  %v7_72 = fadd x86_fp80 %v7_6f, %v6_72
  store x86_fp80 %v7_72, x86_fp80* %st7.global-to-local, align 4
  %v3_75 = load i32, i32* %esi.global-to-local, align 4
  %v4_75 = mul i32 %v3_75, 8
  %v5_75 = add i32 %v4_75, %v0_5
  %v6_75 = fptrunc x86_fp80 %v7_72 to double
  %v7_75 = inttoptr i32 %v5_75 to double*
  store double %v6_75, double* %v7_75, align 4
  %v8_75 = add i3 %v0_4e, 1
  store i3 %v8_75, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v0_5
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
