source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp267 = call double @__decompiler_undefined_function_3()
  %stack_var_-38 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-38, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i32, i32* @edi, align 8
  %v1_4b = add i32 %v0_4b, -92
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v10_4b = icmp eq i32 %v3_4b, 0
  %v0_5f.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_5f.pre = load double, double* %stack_var_-38, align 8
  %.pre = fpext double %v3_5f.pre to x86_fp80
  %.pre23 = add i3 %v0_5f.pre, -1
  br i1 %v10_4b, label %dec_label_pc_5f, label %dec_label_pc_51

dec_label_pc_51:                                  ; preds = %dec_label_pc_40
  store x86_fp80 %.pre, x86_fp80* %st7.global-to-local, align 4
  %v7_54 = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_54, x86_fp80* %st6.global-to-local, align 4
  store double %v6_45, double* %stack_var_-38, align 8
  br label %dec_label_pc_5f

dec_label_pc_5f:                                  ; preds = %dec_label_pc_40, %dec_label_pc_51
  %v8_5f.pre-phi = phi x86_fp80 [ %v7_54, %dec_label_pc_51 ], [ %.pre, %dec_label_pc_40 ]
  %stack_var_-22.0 = phi double [ %v3_5f.pre, %dec_label_pc_51 ], [ %v6_45, %dec_label_pc_40 ]
  store i3 %.pre23, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v8_5f.pre-phi, x86_fp80* %st7.global-to-local, align 4
  %v1_62 = add i32 %v0_4b, -96
  %v2_62 = inttoptr i32 %v1_62 to i32*
  %v3_62 = load i32, i32* %v2_62, align 4
  %v10_62 = icmp eq i32 %v3_62, 0
  %v2_68 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v8_5f.pre-phi)
  %v2_6c = fsub x86_fp80 0xK80000000000000000000, %v8_5f.pre-phi
  %storemerge9 = select i1 %v10_62, x86_fp80 %v2_6c, x86_fp80 %v2_68
  %tmp273 = fptrunc x86_fp80 %storemerge9 to double
  store double %tmp273, double* %stack_var_-38, align 8
  %v3_75 = fmul x86_fp80 %storemerge9, %storemerge9
  store x86_fp80 %v3_75, x86_fp80* %st7.global-to-local, align 4
  %v1_77 = add i32 %v0_4b, -80
  %v2_77 = inttoptr i32 %v1_77 to i32*
  %v3_77 = load i32, i32* %v2_77, align 4
  %v10_77 = icmp eq i32 %v3_77, 0
  %v1_7b = icmp eq i1 %v10_77, false
  br i1 %v1_7b, label %dec_label_pc_80, label %dec_label_pc_7d

dec_label_pc_7d:                                  ; preds = %dec_label_pc_5f
  %v10_7d = fmul x86_fp80 %v3_75, %storemerge9
  store x86_fp80 %v10_7d, x86_fp80* %st7.global-to-local, align 4
  %v3_80.pre = load i32, i32* %v2_77, align 4
  br label %dec_label_pc_80

dec_label_pc_80:                                  ; preds = %dec_label_pc_5f, %dec_label_pc_7d
  %v1_86 = phi x86_fp80 [ %v10_7d, %dec_label_pc_7d ], [ %v3_75, %dec_label_pc_5f ]
  %v3_80 = phi i32 [ %v3_80.pre, %dec_label_pc_7d ], [ %v3_77, %dec_label_pc_5f ]
  %v13_80 = icmp eq i32 %v3_80, 2
  br i1 %v13_80, label %dec_label_pc_89, label %dec_label_pc_86

dec_label_pc_86:                                  ; preds = %dec_label_pc_80
  %v10_86 = fmul x86_fp80 %v1_86, %storemerge9
  store x86_fp80 %v10_86, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_89

dec_label_pc_89:                                  ; preds = %dec_label_pc_80, %dec_label_pc_86
  %v3_8e = phi x86_fp80 [ %v10_86, %dec_label_pc_86 ], [ %v1_86, %dec_label_pc_80 ]
  %v2_89 = add i3 %v0_5f.pre, -2
  %v10_8b = fmul x86_fp80 %v3_8e, %storemerge9
  %tmp274 = fptrunc x86_fp80 %v3_8e to double
  store double %tmp274, double* %stack_var_-38, align 8
  %v5_93 = fpext double %tmp267 to x86_fp80
  %v3_97 = fmul x86_fp80 %v5_93, %v5_93
  %v4_99 = fadd x86_fp80 %v3_97, %v10_8b
  %v7_9b = fpext double %stack_var_-22.0 to x86_fp80
  %v3_9f = fmul x86_fp80 %v7_9b, %v7_9b
  store x86_fp80 %v3_9f, x86_fp80* %st6.global-to-local, align 4
  %v4_a1 = fadd x86_fp80 %v3_9f, %v4_99
  store x86_fp80 %v4_a1, x86_fp80* %st7.global-to-local, align 4
  %v3_a3 = add i32 %v0_4b, -72
  %v4_a3 = inttoptr i32 %v3_a3 to double*
  %v5_a3 = load double, double* %v4_a3, align 4
  %v6_a3 = fpext double %v5_a3 to x86_fp80
  %v7_a3 = fadd x86_fp80 %v4_a1, %v6_a3
  %v2_a8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_a3)
  %v4_aa = fadd x86_fp80 %v7_a3, %v2_a8
  %v4_ac = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_ac = fpext double %v4_ac to x86_fp80
  %v6_ac = fmul x86_fp80 %v4_aa, %v5_ac
  %v2_ae = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v6_ac)
  store x86_fp80 %v2_ae, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v3_8e, x86_fp80* %st6.global-to-local, align 4
  %tmp275 = bitcast double %v4_ac to i64
  %tmp276 = trunc i64 %tmp275 to i32
  %v3_b3 = add i32 %tmp276, -16
  %v4_b3 = inttoptr i32 %v3_b3 to double*
  %v5_b3 = load double, double* %v4_b3, align 4
  %v6_b3 = fpext double %v5_b3 to x86_fp80
  %v7_b3 = fadd x86_fp80 %v3_8e, %v6_b3
  %v2_b8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_b3)
  %v4_ba = fadd x86_fp80 %v7_b3, %v2_b8
  %v6_bc = fmul x86_fp80 %v4_ba, %v5_ac
  %v2_be = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v6_bc)
  %v2_c0 = fsub x86_fp80 0xK80000000000000000000, %v2_be
  store x86_fp80 %v2_c0, x86_fp80* %st6.global-to-local, align 4
  %v4_c2 = fsub x86_fp80 %v2_ae, %v2_be
  store x86_fp80 %v4_c2, x86_fp80* %st7.global-to-local, align 4
  %v2_c4 = add i32 %tmp276, -88
  %v3_c4 = inttoptr i32 %v2_c4 to double*
  %v4_c4 = load double, double* %v3_c4, align 4
  %v5_c4 = fpext double %v4_c4 to x86_fp80
  store x86_fp80 %v5_c4, x86_fp80* %st6.global-to-local, align 4
  store i3 %v2_89, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_cb = call i32 @__asm_wait()
  %v0_cc = load i32, i32* %fpsw.global-to-local, align 4
  %v1_cc = call i16 @__asm_fnstsw(i32 %v0_cc)
  %v2_cc = sext i16 %v1_cc to i32
  %v4_cc = and i32 %v0_cb, -65536
  %tmp281 = udiv i32 %v2_cc, 2
  %v12_ce = and i32 %tmp281, 32512
  %v2_cc.masked = and i32 %v2_cc, -65281
  %v13_ce = or i32 %v4_cc, %v2_cc.masked
  %v14_ce = or i32 %v13_ce, %v12_ce
  %v15_ce14 = and i32 %v2_cc, 256
  %v16_ce = icmp ne i32 %v15_ce14, 0
  %v1_d0 = icmp eq i1 %v16_ce, false
  br i1 %v1_d0, label %dec_label_pc_eb, label %dec_label_pc_d2

dec_label_pc_d2:                                  ; preds = %dec_label_pc_89
  %tmp278 = call double @llvm.fabs.f64(double %tmp273)
  %v2_d6 = fpext double %tmp278 to x86_fp80
  %v3_d8 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_d8 = fsub x86_fp80 %v2_d6, %v3_d8
  store x86_fp80 %v4_d8, x86_fp80* %st6.global-to-local, align 4
  %v0_de = call i32 @__asm_wait()
  %v0_df = load i32, i32* %fpsw.global-to-local, align 4
  %v1_df = call i16 @__asm_fnstsw(i32 %v0_df)
  %v2_df = sext i16 %v1_df to i32
  %v4_df = and i32 %v0_de, -65536
  %tmp282 = udiv i32 %v2_df, 2
  %v12_e1 = and i32 %tmp282, 32512
  %v2_df.masked = and i32 %v2_df, -65281
  %v13_e1 = or i32 %v4_df, %v2_df.masked
  %v14_e1 = or i32 %v13_e1, %v12_e1
  br label %dec_label_pc_eb

dec_label_pc_eb:                                  ; preds = %dec_label_pc_d2, %dec_label_pc_89
  %v0_fa = phi i32 [ %v14_e1, %dec_label_pc_d2 ], [ %v14_ce, %dec_label_pc_89 ]
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_eb = load i32, i32* @edi, align 8
  %v1_eb = add i32 %v0_eb, -76
  %v2_eb = inttoptr i32 %v1_eb to i32*
  %v3_eb = load i32, i32* %v2_eb, align 4
  %v10_eb = icmp eq i32 %v3_eb, 0
  %v1_ef = icmp eq i1 %v10_eb, false
  %v1_f4.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_ef, label %dec_label_pc_f4, label %dec_label_pc_f1

dec_label_pc_f1:                                  ; preds = %dec_label_pc_eb
  %v3_f1 = add i32 %v0_eb, -32
  %v4_f1 = inttoptr i32 %v3_f1 to double*
  %v5_f1 = load double, double* %v4_f1, align 4
  %v6_f1 = fpext double %v5_f1 to x86_fp80
  %v7_f1 = fdiv x86_fp80 %v1_f4.pre, %v6_f1
  store x86_fp80 %v7_f1, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f4

dec_label_pc_f4:                                  ; preds = %dec_label_pc_eb, %dec_label_pc_f1
  %v1_f4 = phi x86_fp80 [ %v7_f1, %dec_label_pc_f1 ], [ %v1_f4.pre, %dec_label_pc_eb ]
  %v2_f4 = load i32, i32* %esi.global-to-local, align 4
  %v3_f4 = add i32 %v2_f4, -32
  %v4_f4 = fptrunc x86_fp80 %v1_f4 to double
  %v5_f4 = inttoptr i32 %v3_f4 to double*
  store double %v4_f4, double* %v5_f4, align 4
  %v6_f4 = add i3 %storemerge.in, 2
  store i3 %v6_f4, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v0_fa
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
