source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp287 = call double @__decompiler_undefined_function_3()
  %stack_var_-70 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-70, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_51 = load i32, i32* %edi.global-to-local, align 4
  %v1_51 = add i32 %v0_51, -44
  store i32 %v1_51, i32* %edi.global-to-local, align 4
  %v7_54 = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_54, x86_fp80* %st7.global-to-local, align 4
  %v5_58 = fpext double %tmp287 to x86_fp80
  %v3_5c = load double, double* %stack_var_-70, align 8
  %v8_5c = fpext double %v3_5c to x86_fp80
  %v3_61 = add i32 %v0_51, -104
  %v4_61 = inttoptr i32 %v3_61 to float*
  %v5_61 = load float, float* %v4_61, align 4
  %v6_61 = fpext float %v5_61 to x86_fp80
  %v7_61 = fmul x86_fp80 %v8_5c, %v6_61
  %v3_66 = add i32 %v0_51, -108
  %v4_66 = inttoptr i32 %v3_66 to float*
  %v5_66 = load float, float* %v4_66, align 4
  %v6_66 = fpext float %v5_66 to x86_fp80
  %v7_66 = fmul x86_fp80 %v5_58, %v6_66
  %v4_69 = fadd x86_fp80 %v7_61, %v7_66
  %v3_6d = add i32 %v0_51, -112
  %v4_6d = inttoptr i32 %v3_6d to float*
  %v5_6d = load float, float* %v4_6d, align 4
  %v6_6d = fpext float %v5_6d to x86_fp80
  %v7_6d = fmul x86_fp80 %v7_54, %v6_6d
  %v4_70 = fadd x86_fp80 %v7_6d, %v4_69
  %v3_74 = add i32 %v0_51, -80
  %v4_74 = inttoptr i32 %v3_74 to float*
  %v5_74 = load float, float* %v4_74, align 4
  %v6_74 = fpext float %v5_74 to x86_fp80
  %v7_74 = fmul x86_fp80 %v8_5c, %v6_74
  %v3_79 = add i32 %v0_51, -84
  %v4_79 = inttoptr i32 %v3_79 to float*
  %v5_79 = load float, float* %v4_79, align 4
  %v6_79 = fpext float %v5_79 to x86_fp80
  %v7_79 = fmul x86_fp80 %v5_58, %v6_79
  %v4_7c = fadd x86_fp80 %v7_74, %v7_79
  %v3_80 = add i32 %v0_51, -88
  %v4_80 = inttoptr i32 %v3_80 to float*
  %v5_80 = load float, float* %v4_80, align 4
  %v6_80 = fpext float %v5_80 to x86_fp80
  %v7_80 = fmul x86_fp80 %v7_54, %v6_80
  %v4_83 = fadd x86_fp80 %v4_7c, %v7_80
  %v3_87 = add i32 %v0_51, -92
  %v4_87 = inttoptr i32 %v3_87 to float*
  %v5_87 = load float, float* %v4_87, align 4
  %v6_87 = fpext float %v5_87 to x86_fp80
  %v7_87 = fmul x86_fp80 %v8_5c, %v6_87
  %v3_8c = add i32 %v0_51, -96
  %v4_8c = inttoptr i32 %v3_8c to float*
  %v5_8c = load float, float* %v4_8c, align 4
  %v6_8c = fpext float %v5_8c to x86_fp80
  %v7_8c = fmul x86_fp80 %v5_58, %v6_8c
  %v4_8f = fadd x86_fp80 %v7_87, %v7_8c
  store x86_fp80 %v4_70, x86_fp80* %st7.global-to-local, align 4
  %v3_93 = add i32 %v0_51, -100
  %v4_93 = inttoptr i32 %v3_93 to float*
  %v5_93 = load float, float* %v4_93, align 4
  %v6_93 = fpext float %v5_93 to x86_fp80
  %v7_93 = fmul x86_fp80 %v7_54, %v6_93
  %v4_96 = fadd x86_fp80 %v4_8f, %v7_93
  %tmp293 = fptrunc x86_fp80 %v4_83 to double
  store double %tmp293, double* %stack_var_-70, align 8
  %v6_9b = add i3 %v0_4b, -1
  store i32 %v0_51, i32* %edi.global-to-local, align 4
  store i3 %v6_9b, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_aa = fmul x86_fp80 %v4_70, %v4_70
  store x86_fp80 %v3_aa, x86_fp80* %st7.global-to-local, align 4
  %v3_ac = inttoptr i32 %v0_51 to double*
  %v4_ac = load double, double* %v3_ac, align 4
  %v5_ac = fpext double %v4_ac to x86_fp80
  %v6_ac = fmul x86_fp80 %v3_aa, %v5_ac
  store x86_fp80 %v6_ac, x86_fp80* %st7.global-to-local, align 4
  %v3_ae = add i32 %v0_51, -16
  %v4_ae = inttoptr i32 %v3_ae to double*
  %v5_ae = load double, double* %v4_ae, align 4
  %v6_ae = fpext double %v5_ae to x86_fp80
  %v7_ae = fadd x86_fp80 %v6_ac, %v6_ae
  %tmp294 = fptrunc x86_fp80 %v7_ae to double
  %v4_b3 = call double @llvm.fabs.f64(double %tmp294)
  store x86_fp80 %v4_96, x86_fp80* %st7.global-to-local, align 4
  %v3_bb = add i32 %v0_51, 16
  %v4_bb = inttoptr i32 %v3_bb to double*
  %v5_bb = load double, double* %v4_bb, align 4
  %v6_bb = fpext double %v5_bb to x86_fp80
  %v7_bb = fmul x86_fp80 %v4_96, %v6_bb
  %v2_be = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_bb)
  %v3_be = fcmp olt x86_fp80 %v2_be, 0xK403E8000000000000000
  %v4_be = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_bb)
  %storemerge43 = select i1 %v3_be, x86_fp80 %v4_be, x86_fp80 %v7_bb
  store x86_fp80 %storemerge43, x86_fp80* %st7.global-to-local, align 4
  %v0_c3 = call i32 @__asm_wait()
  %v0_c4 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_c4 = call i16 @__asm_fnstsw(i32 %v0_c4)
  %tmp323 = and i16 %v1_c4, 256
  %v16_c6 = icmp ne i16 %tmp323, 0
  %v1_c8 = icmp eq i1 %v16_c6, false
  %v1_d4 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_c8, label %dec_label_pc_d4, label %dec_label_pc_ca

dec_label_pc_ca:                                  ; preds = %dec_label_pc_40
  %v7_ca = fsub x86_fp80 0xK00000000000000000000, %v1_d4
  store x86_fp80 %v7_ca, x86_fp80* %st7.global-to-local, align 4
  %v4_ce = fptrunc x86_fp80 %v7_ca to double
  br label %dec_label_pc_dc

dec_label_pc_d4:                                  ; preds = %dec_label_pc_40
  %v6_d4 = fpext double %v4_b3 to x86_fp80
  %v7_d4 = fadd x86_fp80 %v1_d4, %v6_d4
  store x86_fp80 %v7_d4, x86_fp80* %st7.global-to-local, align 4
  %v4_d8 = fptrunc x86_fp80 %v7_d4 to double
  br label %dec_label_pc_dc

dec_label_pc_dc:                                  ; preds = %dec_label_pc_d4, %dec_label_pc_ca
  %stack_var_-46.0 = phi double [ %v4_d8, %dec_label_pc_d4 ], [ %v4_b3, %dec_label_pc_ca ]
  %stack_var_-38.0 = phi double [ 0.000000e+00, %dec_label_pc_d4 ], [ %v4_ce, %dec_label_pc_ca ]
  %v3_dc = load double, double* %stack_var_-70, align 8
  %v8_dc = fpext double %v3_dc to x86_fp80
  store x86_fp80 %v8_dc, x86_fp80* %st7.global-to-local, align 4
  %v2_df = load i32, i32* %edi.global-to-local, align 4
  %v3_df = add i32 %v2_df, 32
  %v4_df = inttoptr i32 %v3_df to double*
  %v5_df = load double, double* %v4_df, align 4
  %v6_df = fpext double %v5_df to x86_fp80
  %v7_df = fmul x86_fp80 %v8_dc, %v6_df
  store x86_fp80 %v7_df, x86_fp80* %st7.global-to-local, align 4
  %v3_e6 = add i32 %v2_df, 24
  %v4_e6 = inttoptr i32 %v3_e6 to double*
  %v5_e6 = load double, double* %v4_e6, align 4
  %v6_e6 = fpext double %v5_e6 to x86_fp80
  %v7_e6 = fmul x86_fp80 %v4_96, %v6_e6
  %v4_e9 = fsub x86_fp80 %v7_df, %v7_e6
  %v2_eb = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_e9)
  %v3_eb = fcmp olt x86_fp80 %v2_eb, 0xK403E8000000000000000
  br i1 %v3_eb, label %bb, label %bb296

bb:                                               ; preds = %dec_label_pc_dc
  %v4_eb = call x86_fp80 @llvm.cos.f80(x86_fp80 %v4_e9)
  br label %bb296

bb296:                                            ; preds = %dec_label_pc_dc, %bb
  %storemerge311 = phi x86_fp80 [ %v4_eb, %bb ], [ %v4_e9, %dec_label_pc_dc ]
  store x86_fp80 %storemerge311, x86_fp80* %st7.global-to-local, align 4
  %v0_f0 = call i32 @__asm_wait()
  %v0_f1 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_f1 = call i16 @__asm_fnstsw(i32 %v0_f1)
  %tmp324 = and i16 %v1_f1, 256
  %v16_f3 = icmp ne i16 %tmp324, 0
  %v1_f5 = icmp eq i1 %v16_f3, false
  %v1_101 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_f5, label %dec_label_pc_101, label %dec_label_pc_f7

dec_label_pc_f7:                                  ; preds = %bb296
  %v6_f7 = fpext double %stack_var_-38.0 to x86_fp80
  %v7_f7 = fsub x86_fp80 %v6_f7, %v1_101
  store x86_fp80 %v7_f7, x86_fp80* %st7.global-to-local, align 4
  %v4_fb = fptrunc x86_fp80 %v7_f7 to double
  br label %dec_label_pc_109

dec_label_pc_101:                                 ; preds = %bb296
  %v6_101 = fpext double %stack_var_-46.0 to x86_fp80
  %v7_101 = fadd x86_fp80 %v1_101, %v6_101
  store x86_fp80 %v7_101, x86_fp80* %st7.global-to-local, align 4
  %v4_105 = fptrunc x86_fp80 %v7_101 to double
  br label %dec_label_pc_109

dec_label_pc_109:                                 ; preds = %dec_label_pc_101, %dec_label_pc_f7
  %stack_var_-46.1 = phi double [ %v4_105, %dec_label_pc_101 ], [ %stack_var_-46.0, %dec_label_pc_f7 ]
  %stack_var_-38.1 = phi double [ %stack_var_-38.0, %dec_label_pc_101 ], [ %v4_fb, %dec_label_pc_f7 ]
  %v3_109 = load double, double* %stack_var_-70, align 8
  %v8_109 = fpext double %v3_109 to x86_fp80
  store x86_fp80 %v8_109, x86_fp80* %st7.global-to-local, align 4
  %v2_10c = load i32, i32* %edi.global-to-local, align 4
  %v3_10c = add i32 %v2_10c, 32
  %v4_10c = inttoptr i32 %v3_10c to double*
  %v5_10c = load double, double* %v4_10c, align 4
  %v6_10c = fpext double %v5_10c to x86_fp80
  %v7_10c = fmul x86_fp80 %v8_109, %v6_10c
  store x86_fp80 %v7_10c, x86_fp80* %st7.global-to-local, align 4
  %v3_113 = add i32 %v2_10c, 24
  %v4_113 = inttoptr i32 %v3_113 to double*
  %v5_113 = load double, double* %v4_113, align 4
  %v6_113 = fpext double %v5_113 to x86_fp80
  %v7_113 = fmul x86_fp80 %v4_96, %v6_113
  %v4_116 = fadd x86_fp80 %v7_10c, %v7_113
  %v2_118 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_116)
  %v3_118 = fcmp olt x86_fp80 %v2_118, 0xK403E8000000000000000
  br i1 %v3_118, label %bb298, label %bb299

bb298:                                            ; preds = %dec_label_pc_109
  %v4_118 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v4_116)
  br label %bb299

bb299:                                            ; preds = %dec_label_pc_109, %bb298
  %storemerge310 = phi x86_fp80 [ %v4_118, %bb298 ], [ %v4_116, %dec_label_pc_109 ]
  store x86_fp80 %storemerge310, x86_fp80* %st7.global-to-local, align 4
  %v0_11d = call i32 @__asm_wait()
  %v0_11e = load i32, i32* %fpsw.global-to-local, align 4
  %v1_11e = call i16 @__asm_fnstsw(i32 %v0_11e)
  %tmp325 = and i16 %v1_11e, 256
  %v16_120 = icmp ne i16 %tmp325, 0
  %v1_122 = icmp eq i1 %v16_120, false
  %v1_12e = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_122, label %dec_label_pc_12e, label %dec_label_pc_124

dec_label_pc_124:                                 ; preds = %bb299
  %v6_124 = fpext double %stack_var_-38.1 to x86_fp80
  %v7_124 = fsub x86_fp80 %v6_124, %v1_12e
  store x86_fp80 %v7_124, x86_fp80* %st7.global-to-local, align 4
  %v4_128 = fptrunc x86_fp80 %v7_124 to double
  br label %dec_label_pc_136

dec_label_pc_12e:                                 ; preds = %bb299
  %v6_12e = fpext double %stack_var_-46.1 to x86_fp80
  %v7_12e = fadd x86_fp80 %v1_12e, %v6_12e
  store x86_fp80 %v7_12e, x86_fp80* %st7.global-to-local, align 4
  %v4_132 = fptrunc x86_fp80 %v7_12e to double
  br label %dec_label_pc_136

dec_label_pc_136:                                 ; preds = %dec_label_pc_12e, %dec_label_pc_124
  %stack_var_-46.2 = phi double [ %v4_132, %dec_label_pc_12e ], [ %stack_var_-46.1, %dec_label_pc_124 ]
  %stack_var_-38.2 = phi double [ %stack_var_-38.1, %dec_label_pc_12e ], [ %v4_128, %dec_label_pc_124 ]
  %v3_136 = load double, double* %stack_var_-70, align 8
  %v8_136 = fpext double %v3_136 to x86_fp80
  store x86_fp80 %v8_136, x86_fp80* %st7.global-to-local, align 4
  %v2_139 = load i32, i32* %edi.global-to-local, align 4
  %v3_139 = add i32 %v2_139, 40
  %v4_139 = inttoptr i32 %v3_139 to double*
  %v5_139 = load double, double* %v4_139, align 4
  %v6_139 = fpext double %v5_139 to x86_fp80
  %v7_139 = fmul x86_fp80 %v8_136, %v6_139
  %v2_13c = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_139)
  %v3_13c = fcmp olt x86_fp80 %v2_13c, 0xK403E8000000000000000
  %v4_13c = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_139)
  %storemerge = select i1 %v3_13c, x86_fp80 %v4_13c, x86_fp80 %v7_139
  store x86_fp80 %storemerge, x86_fp80* %st7.global-to-local, align 4
  %v3_13e = add i32 %v2_139, -72
  %v4_13e = inttoptr i32 %v3_13e to double*
  %v5_13e = load double, double* %v4_13e, align 4
  %v6_13e = fpext double %v5_13e to x86_fp80
  %v7_13e = fmul x86_fp80 %storemerge, %v6_13e
  store x86_fp80 %v7_13e, x86_fp80* %st7.global-to-local, align 4
  %v0_144 = call i32 @__asm_wait()
  %v0_145 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_145 = call i16 @__asm_fnstsw(i32 %v0_145)
  %tmp326 = and i16 %v1_145, 256
  %v16_147 = icmp ne i16 %tmp326, 0
  %v1_149 = icmp eq i1 %v16_147, false
  %v1_155 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_149, label %dec_label_pc_155, label %dec_label_pc_14b

dec_label_pc_14b:                                 ; preds = %dec_label_pc_136
  %v6_14b = fpext double %stack_var_-38.2 to x86_fp80
  %v7_14b = fsub x86_fp80 %v6_14b, %v1_155
  store x86_fp80 %v7_14b, x86_fp80* %st7.global-to-local, align 4
  %v4_14f = fptrunc x86_fp80 %v7_14b to double
  br label %dec_label_pc_15d

dec_label_pc_155:                                 ; preds = %dec_label_pc_136
  %v6_155 = fpext double %stack_var_-46.2 to x86_fp80
  %v7_155 = fadd x86_fp80 %v1_155, %v6_155
  store x86_fp80 %v7_155, x86_fp80* %st7.global-to-local, align 4
  %v4_159 = fptrunc x86_fp80 %v7_155 to double
  br label %dec_label_pc_15d

dec_label_pc_15d:                                 ; preds = %dec_label_pc_155, %dec_label_pc_14b
  %stack_var_-46.3 = phi double [ %v4_159, %dec_label_pc_155 ], [ %stack_var_-46.2, %dec_label_pc_14b ]
  %stack_var_-38.3 = phi double [ %stack_var_-38.2, %dec_label_pc_155 ], [ %v4_14f, %dec_label_pc_14b ]
  %v3_15d = load double, double* %stack_var_-70, align 8
  %v8_15d = fpext double %v3_15d to x86_fp80
  store x86_fp80 %v8_15d, x86_fp80* %st7.global-to-local, align 4
  %v2_160 = load i32, i32* %edi.global-to-local, align 4
  %v3_160 = add i32 %v2_160, 32
  %v4_160 = inttoptr i32 %v3_160 to double*
  %v5_160 = load double, double* %v4_160, align 4
  %v6_160 = fpext double %v5_160 to x86_fp80
  %v7_160 = fmul x86_fp80 %v8_15d, %v6_160
  store x86_fp80 %v7_160, x86_fp80* %st7.global-to-local, align 4
  %v3_167 = add i32 %v2_160, 8
  %v4_167 = inttoptr i32 %v3_167 to double*
  %v5_167 = load double, double* %v4_167, align 4
  %v6_167 = fpext double %v5_167 to x86_fp80
  %v7_167 = fmul x86_fp80 %v4_96, %v6_167
  %v4_16a = fsub x86_fp80 %v7_167, %v7_160
  %v2_16c = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_16a)
  %v3_16c = fcmp olt x86_fp80 %v2_16c, 0xK403E8000000000000000
  br i1 %v3_16c, label %bb302, label %bb303

bb302:                                            ; preds = %dec_label_pc_15d
  %v4_16c = call x86_fp80 @llvm.cos.f80(x86_fp80 %v4_16a)
  br label %bb303

bb303:                                            ; preds = %dec_label_pc_15d, %bb302
  %storemerge309 = phi x86_fp80 [ %v4_16c, %bb302 ], [ %v4_16a, %dec_label_pc_15d ]
  %v1_16e = phi x86_fp80 [ %v4_16c, %bb302 ], [ %v4_16a, %dec_label_pc_15d ]
  store x86_fp80 %storemerge309, x86_fp80* %st7.global-to-local, align 4
  %v3_16e = add i32 %v2_160, -72
  %v4_16e = inttoptr i32 %v3_16e to double*
  %v5_16e = load double, double* %v4_16e, align 4
  %v6_16e = fpext double %v5_16e to x86_fp80
  %v7_16e = fmul x86_fp80 %v1_16e, %v6_16e
  store x86_fp80 %v7_16e, x86_fp80* %st7.global-to-local, align 4
  %v0_174 = call i32 @__asm_wait()
  %v0_175 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_175 = call i16 @__asm_fnstsw(i32 %v0_175)
  %tmp327 = and i16 %v1_175, 256
  %v16_177 = icmp ne i16 %tmp327, 0
  %v1_179 = icmp eq i1 %v16_177, false
  %v1_185 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_179, label %dec_label_pc_185, label %dec_label_pc_17b

dec_label_pc_17b:                                 ; preds = %bb303
  %v6_17b = fpext double %stack_var_-38.3 to x86_fp80
  %v7_17b = fsub x86_fp80 %v6_17b, %v1_185
  store x86_fp80 %v7_17b, x86_fp80* %st7.global-to-local, align 4
  %v4_17f = fptrunc x86_fp80 %v7_17b to double
  br label %dec_label_pc_18d

dec_label_pc_185:                                 ; preds = %bb303
  %v6_185 = fpext double %stack_var_-46.3 to x86_fp80
  %v7_185 = fadd x86_fp80 %v1_185, %v6_185
  store x86_fp80 %v7_185, x86_fp80* %st7.global-to-local, align 4
  %v4_189 = fptrunc x86_fp80 %v7_185 to double
  br label %dec_label_pc_18d

dec_label_pc_18d:                                 ; preds = %dec_label_pc_185, %dec_label_pc_17b
  %stack_var_-46.4 = phi double [ %v4_189, %dec_label_pc_185 ], [ %stack_var_-46.3, %dec_label_pc_17b ]
  %stack_var_-38.4 = phi double [ %stack_var_-38.3, %dec_label_pc_185 ], [ %v4_17f, %dec_label_pc_17b ]
  %v3_18d = load double, double* %stack_var_-70, align 8
  %v8_18d = fpext double %v3_18d to x86_fp80
  store x86_fp80 %v8_18d, x86_fp80* %st7.global-to-local, align 4
  %v2_190 = load i32, i32* %edi.global-to-local, align 4
  %v3_190 = add i32 %v2_190, 32
  %v4_190 = inttoptr i32 %v3_190 to double*
  %v5_190 = load double, double* %v4_190, align 4
  %v6_190 = fpext double %v5_190 to x86_fp80
  %v7_190 = fmul x86_fp80 %v8_18d, %v6_190
  store x86_fp80 %v7_190, x86_fp80* %st7.global-to-local, align 4
  %v3_197 = add i32 %v2_190, 8
  %v4_197 = inttoptr i32 %v3_197 to double*
  %v5_197 = load double, double* %v4_197, align 4
  %v6_197 = fpext double %v5_197 to x86_fp80
  %v7_197 = fmul x86_fp80 %v4_96, %v6_197
  %v4_19a = fadd x86_fp80 %v7_190, %v7_197
  %v2_19c = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_19a)
  %v3_19c = fcmp olt x86_fp80 %v2_19c, 0xK403E8000000000000000
  br i1 %v3_19c, label %bb305, label %bb306

bb305:                                            ; preds = %dec_label_pc_18d
  %v4_19c = call x86_fp80 @llvm.cos.f80(x86_fp80 %v4_19a)
  br label %bb306

bb306:                                            ; preds = %dec_label_pc_18d, %bb305
  %storemerge308 = phi x86_fp80 [ %v4_19c, %bb305 ], [ %v4_19a, %dec_label_pc_18d ]
  %v1_19e = phi x86_fp80 [ %v4_19c, %bb305 ], [ %v4_19a, %dec_label_pc_18d ]
  store x86_fp80 %storemerge308, x86_fp80* %st7.global-to-local, align 4
  %v3_19e = add i32 %v2_190, -72
  %v4_19e = inttoptr i32 %v3_19e to double*
  %v5_19e = load double, double* %v4_19e, align 4
  %v6_19e = fpext double %v5_19e to x86_fp80
  %v7_19e = fmul x86_fp80 %v1_19e, %v6_19e
  store x86_fp80 %v7_19e, x86_fp80* %st7.global-to-local, align 4
  %v0_1a4 = call i32 @__asm_wait()
  %v0_1a5 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1a5 = call i16 @__asm_fnstsw(i32 %v0_1a5)
  %v2_1a5 = sext i16 %v1_1a5 to i32
  %v4_1a5 = and i32 %v0_1a4, -65536
  %tmp317 = udiv i32 %v2_1a5, 2
  %v12_1a7 = and i32 %tmp317, 32512
  %v2_1a5.masked = and i32 %v2_1a5, -65281
  %v13_1a7 = or i32 %v4_1a5, %v2_1a5.masked
  %v14_1a7 = or i32 %v13_1a7, %v12_1a7
  %v15_1a742 = and i32 %v2_1a5, 256
  %v16_1a7 = icmp ne i32 %v15_1a742, 0
  %v1_1a9 = icmp eq i1 %v16_1a7, false
  %v1_1b5 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_1a9, label %dec_label_pc_1b5, label %dec_label_pc_1ab

dec_label_pc_1ab:                                 ; preds = %bb306
  %v6_1ab = fpext double %stack_var_-38.4 to x86_fp80
  %v7_1ab = fsub x86_fp80 %v6_1ab, %v1_1b5
  store x86_fp80 %v7_1ab, x86_fp80* %st7.global-to-local, align 4
  %v4_1af = fptrunc x86_fp80 %v7_1ab to double
  br label %dec_label_pc_1bd

dec_label_pc_1b5:                                 ; preds = %bb306
  %v6_1b5 = fpext double %stack_var_-46.4 to x86_fp80
  %v7_1b5 = fadd x86_fp80 %v1_1b5, %v6_1b5
  store x86_fp80 %v7_1b5, x86_fp80* %st7.global-to-local, align 4
  %v4_1b9 = fptrunc x86_fp80 %v7_1b5 to double
  br label %dec_label_pc_1bd

dec_label_pc_1bd:                                 ; preds = %dec_label_pc_1b5, %dec_label_pc_1ab
  %stack_var_-46.5 = phi double [ %v4_1b9, %dec_label_pc_1b5 ], [ %stack_var_-46.4, %dec_label_pc_1ab ]
  %stack_var_-38.5 = phi double [ %stack_var_-38.4, %dec_label_pc_1b5 ], [ %v4_1af, %dec_label_pc_1ab ]
  %v5_1bd = fpext double %stack_var_-46.5 to x86_fp80
  %v2_1c1 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v5_1bd)
  %v0_1c5 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_1c5 = fpext double %stack_var_-38.5 to x86_fp80
  %v2_1c9 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v5_1c5)
  %v4_1cf = fsub x86_fp80 %v2_1c1, %v2_1c9
  store x86_fp80 %v4_1cf, x86_fp80* %st7.global-to-local, align 4
  %v0_1d3 = load i32, i32* %edi.global-to-local, align 4
  %v1_1d3 = add i32 %v0_1d3, -76
  %v2_1d3 = inttoptr i32 %v1_1d3 to i32*
  %v3_1d3 = load i32, i32* %v2_1d3, align 4
  %v10_1d3 = icmp eq i32 %v3_1d3, 0
  %v1_1d7 = icmp eq i1 %v10_1d3, false
  br i1 %v1_1d7, label %dec_label_pc_1dc, label %dec_label_pc_1d9

dec_label_pc_1d9:                                 ; preds = %dec_label_pc_1bd
  %v3_1d9 = add i32 %v0_1d3, -32
  %v4_1d9 = inttoptr i32 %v3_1d9 to double*
  %v5_1d9 = load double, double* %v4_1d9, align 4
  %v6_1d9 = fpext double %v5_1d9 to x86_fp80
  %v7_1d9 = fdiv x86_fp80 %v4_1cf, %v6_1d9
  store x86_fp80 %v7_1d9, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1dc

dec_label_pc_1dc:                                 ; preds = %dec_label_pc_1d9, %dec_label_pc_1bd
  %v1_1dc = phi x86_fp80 [ %v7_1d9, %dec_label_pc_1d9 ], [ %v4_1cf, %dec_label_pc_1bd ]
  %v2_1dc = load i32, i32* %esi.global-to-local, align 4
  %v3_1dc = add i32 %v2_1dc, -32
  %v4_1dc = fptrunc x86_fp80 %v1_1dc to double
  %v5_1dc = inttoptr i32 %v3_1dc to double*
  store double %v4_1dc, double* %v5_1dc, align 4
  %v6_1dc = add i3 %v0_1c5, 1
  store i3 %v6_1dc, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_1a7
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
