source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %stack_var_-28 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -112
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -120
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -48
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -48
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -72
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -108
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -48
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -112
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -120
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-28, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_4b = load double, double* %stack_var_-28, align 8
  %tmp262 = call double @llvm.fabs.f64(double %v3_4b)
  %v2_4e = fpext double %tmp262 to x86_fp80
  store x86_fp80 %v2_4e, x86_fp80* %st7.global-to-local, align 4
  %v8_56 = add i3 %v0_4b, -3
  store i3 %v8_56, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_5e = call i32 @__asm_wait()
  %v0_5f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5f = call i16 @__asm_fnstsw(i32 %v0_5f)
  %v0_6a = call i32 @__asm_wait()
  %v1_6b = call i16 @__asm_fnstsw(i32 %v0_5f)
  %v0_78 = call i32 @__asm_wait()
  %v1_79 = call i16 @__asm_fnstsw(i32 %v0_5f)
  %v0_82 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_82 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_82 = fptrunc x86_fp80 %v1_82 to double
  store double %v4_82, double* %stack_var_-28, align 8
  store x86_fp80 %v1_82, x86_fp80* %st7.global-to-local, align 4
  %v2_90 = load i32, i32* %edi.global-to-local, align 4
  %v3_90 = add i32 %v2_90, -80
  %v4_90 = inttoptr i32 %v3_90 to double*
  %v5_90 = load double, double* %v4_90, align 4
  %v6_90 = fpext double %v5_90 to x86_fp80
  %v7_90 = fmul x86_fp80 %v1_82, %v6_90
  store x86_fp80 %v7_90, x86_fp80* %st7.global-to-local, align 4
  %v8_93 = add i3 %v0_82, 1
  %v3_97 = add i32 %v2_90, -88
  %v4_97 = inttoptr i32 %v3_97 to double*
  %v5_97 = load double, double* %v4_97, align 4
  %v6_97 = fpext double %v5_97 to x86_fp80
  %v7_97 = fmul x86_fp80 %v1_82, %v6_97
  %v4_9a = fadd x86_fp80 %v7_90, %v7_97
  store x86_fp80 %v4_9a, x86_fp80* %st7.global-to-local, align 4
  %v5_9f = load double, double* %v4_97, align 4
  %v6_9f = fpext double %v5_9f to x86_fp80
  %v7_9f = fmul x86_fp80 %v1_82, %v6_9f
  %v5_a6 = load double, double* %v4_90, align 4
  %v6_a6 = fpext double %v5_a6 to x86_fp80
  %v7_a6 = fmul x86_fp80 %v1_82, %v6_a6
  %v4_ab = fsub x86_fp80 %v7_9f, %v7_a6
  %tmp264 = fptrunc x86_fp80 %v4_ab to double
  store double %tmp264, double* %stack_var_-28, align 8
  store x86_fp80 %v4_ab, x86_fp80* %st7.global-to-local, align 4
  %v3_b7 = add i32 %v2_90, -96
  %v4_b7 = inttoptr i32 %v3_b7 to double*
  %v5_b7 = load double, double* %v4_b7, align 4
  %v6_b7 = fpext double %v5_b7 to x86_fp80
  %v7_b7 = fmul x86_fp80 %v4_ab, %v6_b7
  store x86_fp80 %v7_b7, x86_fp80* %st7.global-to-local, align 4
  %v3_be = add i32 %v2_90, -104
  %v4_be = inttoptr i32 %v3_be to double*
  %v5_be = load double, double* %v4_be, align 4
  %v6_be = fpext double %v5_be to x86_fp80
  %v7_be = fmul x86_fp80 %v1_82, %v6_be
  %v4_c1 = fadd x86_fp80 %v7_b7, %v7_be
  store x86_fp80 %v4_c1, x86_fp80* %st7.global-to-local, align 4
  %v5_c6 = load double, double* %v4_be, align 4
  %v6_c6 = fpext double %v5_c6 to x86_fp80
  %v7_c6 = fmul x86_fp80 %v4_ab, %v6_c6
  %v5_cd = load double, double* %v4_b7, align 4
  %v6_cd = fpext double %v5_cd to x86_fp80
  %v7_cd = fmul x86_fp80 %v1_82, %v6_cd
  %v4_d2 = fsub x86_fp80 %v7_c6, %v7_cd
  %tmp265 = fptrunc x86_fp80 %v4_d2 to double
  store double %tmp265, double* %stack_var_-28, align 8
  store x86_fp80 %v4_c1, x86_fp80* %st7.global-to-local, align 4
  %v3_df = add i32 %v2_90, -24
  %v4_df = inttoptr i32 %v3_df to double*
  %v5_df = load double, double* %v4_df, align 4
  %v6_df = fpext double %v5_df to x86_fp80
  %v7_df = fsub x86_fp80 %v4_c1, %v6_df
  %v3_e6 = fmul x86_fp80 %v7_df, %v7_df
  store x86_fp80 %v3_e6, x86_fp80* %st7.global-to-local, align 4
  %v3_ec = add i32 %v2_90, -32
  %v4_ec = inttoptr i32 %v3_ec to double*
  %v5_ec = load double, double* %v4_ec, align 4
  %v6_ec = fpext double %v5_ec to x86_fp80
  %v7_ec = fsub x86_fp80 %v4_9a, %v6_ec
  %v3_f3 = fmul x86_fp80 %v7_ec, %v7_ec
  %v4_f5 = fadd x86_fp80 %v3_e6, %v3_f3
  %v2_f7 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_f5)
  store x86_fp80 %v2_f7, x86_fp80* %st7.global-to-local, align 4
  %v3_f9 = add i32 %v2_90, -16
  %v4_f9 = inttoptr i32 %v3_f9 to double*
  %v5_f9 = load double, double* %v4_f9, align 4
  %v6_f9 = fpext double %v5_f9 to x86_fp80
  %v7_f9 = fsub x86_fp80 %v2_f7, %v6_f9
  store x86_fp80 %v7_f9, x86_fp80* %st7.global-to-local, align 4
  store i3 %v8_93, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_11d = call i32 @__asm_wait()
  %v0_11e = load i32, i32* %fpsw.global-to-local, align 4
  %v1_11e = call i16 @__asm_fnstsw(i32 %v0_11e)
  %v2_11e = sext i16 %v1_11e to i32
  %v4_11e = and i32 %v0_11d, -65536
  %v1_120 = udiv i32 %v2_11e, 256
  %v2_120 = trunc i32 %v1_120 to i8
  %v3_120 = and i8 %v2_120, 65
  %v4_120 = icmp eq i8 %v3_120, 0
  %v9_120 = zext i8 %v3_120 to i32
  %v11_120 = mul i32 %v9_120, 256
  %v2_11e.masked = and i32 %v2_11e, -65281
  %v12_120 = or i32 %v4_11e, %v2_11e.masked
  %v13_120 = or i32 %v12_120, %v11_120
  %v0_12f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_12f = add i3 %v0_12f, 1
  %v1_131 = load i32, i32* %edi.global-to-local, align 4
  %storemerge11.in.in.in.in.v = select i1 %v4_120, i32 -132, i32 -140
  %storemerge11.in.in.in.in = add i32 %storemerge11.in.in.in.in.v, %v1_131
  %storemerge11.in.in.in = inttoptr i32 %storemerge11.in.in.in.in to double*
  %storemerge11.in.in = load double, double* %storemerge11.in.in.in, align 4
  %storemerge = fpext double %storemerge11.in.in to x86_fp80
  store x86_fp80 %storemerge, x86_fp80* %st7.global-to-local, align 4
  %v2_137 = load i32, i32* %esi.global-to-local, align 4
  %v3_137 = add i32 %v2_137, 128
  %v5_137 = inttoptr i32 %v3_137 to double*
  store double %storemerge11.in.in, double* %v5_137, align 4
  store i3 %v4_12f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_13d = add i32 %v1_131, -108
  %v2_13d = inttoptr i32 %v1_13d to i32*
  %v3_13d = load i32, i32* %v2_13d, align 4
  %v10_13d = icmp eq i32 %v3_13d, 0
  %v1_141 = icmp eq i1 %v10_13d, false
  %v1_146.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_141, label %dec_label_pc_146, label %dec_label_pc_143

dec_label_pc_143:                                 ; preds = %dec_label_pc_40
  %v3_143 = add i32 %v1_131, -48
  %v4_143 = inttoptr i32 %v3_143 to double*
  %v5_143 = load double, double* %v4_143, align 4
  %v6_143 = fpext double %v5_143 to x86_fp80
  %v7_143 = fdiv x86_fp80 %v1_146.pre, %v6_143
  store x86_fp80 %v7_143, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_146

dec_label_pc_146:                                 ; preds = %dec_label_pc_40, %dec_label_pc_143
  %v1_146 = phi x86_fp80 [ %v7_143, %dec_label_pc_143 ], [ %v1_146.pre, %dec_label_pc_40 ]
  %v3_146 = add i32 %v2_137, -32
  %v4_146 = fptrunc x86_fp80 %v1_146 to double
  %v5_146 = inttoptr i32 %v3_146 to double*
  store double %v4_146, double* %v5_146, align 4
  %v6_146 = add i3 %v0_12f, 2
  store i3 %v6_146, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v13_120
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
