source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp258 = call double @__decompiler_undefined_function_3()
  %stack_var_-44 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-44, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4c = load i32, i32* %edi.global-to-local, align 4
  %v1_4c = add i32 %v0_4c, -44
  store i32 %v1_4c, i32* %edi.global-to-local, align 4
  %v0_4f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4f = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_4f, x86_fp80* %st7.global-to-local, align 4
  %v5_53 = fpext double %tmp258 to x86_fp80
  %v3_57 = load double, double* %stack_var_-44, align 8
  %v8_57 = fpext double %v3_57 to x86_fp80
  %v3_5c = add i32 %v0_4c, -104
  %v4_5c = inttoptr i32 %v3_5c to float*
  %v5_5c = load float, float* %v4_5c, align 4
  %v6_5c = fpext float %v5_5c to x86_fp80
  %v7_5c = fmul x86_fp80 %v8_57, %v6_5c
  %v3_61 = add i32 %v0_4c, -108
  %v4_61 = inttoptr i32 %v3_61 to float*
  %v5_61 = load float, float* %v4_61, align 4
  %v6_61 = fpext float %v5_61 to x86_fp80
  %v7_61 = fmul x86_fp80 %v5_53, %v6_61
  %v4_64 = fadd x86_fp80 %v7_5c, %v7_61
  %v3_68 = add i32 %v0_4c, -112
  %v4_68 = inttoptr i32 %v3_68 to float*
  %v5_68 = load float, float* %v4_68, align 4
  %v6_68 = fpext float %v5_68 to x86_fp80
  %v7_68 = fmul x86_fp80 %v7_4f, %v6_68
  %v4_6b = fadd x86_fp80 %v7_68, %v4_64
  %v3_6f = add i32 %v0_4c, -80
  %v4_6f = inttoptr i32 %v3_6f to float*
  %v5_6f = load float, float* %v4_6f, align 4
  %v6_6f = fpext float %v5_6f to x86_fp80
  %v7_6f = fmul x86_fp80 %v8_57, %v6_6f
  %v3_74 = add i32 %v0_4c, -84
  %v4_74 = inttoptr i32 %v3_74 to float*
  %v5_74 = load float, float* %v4_74, align 4
  %v6_74 = fpext float %v5_74 to x86_fp80
  %v7_74 = fmul x86_fp80 %v5_53, %v6_74
  %v4_77 = fadd x86_fp80 %v7_6f, %v7_74
  %v3_7b = add i32 %v0_4c, -88
  %v4_7b = inttoptr i32 %v3_7b to float*
  %v5_7b = load float, float* %v4_7b, align 4
  %v6_7b = fpext float %v5_7b to x86_fp80
  %v7_7b = fmul x86_fp80 %v7_4f, %v6_7b
  %v4_7e = fadd x86_fp80 %v4_77, %v7_7b
  %v3_82 = add i32 %v0_4c, -92
  %v4_82 = inttoptr i32 %v3_82 to float*
  %v5_82 = load float, float* %v4_82, align 4
  %v6_82 = fpext float %v5_82 to x86_fp80
  %v7_82 = fmul x86_fp80 %v8_57, %v6_82
  %v3_87 = add i32 %v0_4c, -96
  %v4_87 = inttoptr i32 %v3_87 to float*
  %v5_87 = load float, float* %v4_87, align 4
  %v6_87 = fpext float %v5_87 to x86_fp80
  %v7_87 = fmul x86_fp80 %v5_53, %v6_87
  %v4_8a = fadd x86_fp80 %v7_82, %v7_87
  store x86_fp80 %v4_6b, x86_fp80* %st7.global-to-local, align 4
  %v3_8e = add i32 %v0_4c, -100
  %v4_8e = inttoptr i32 %v3_8e to float*
  %v5_8e = load float, float* %v4_8e, align 4
  %v6_8e = fpext float %v5_8e to x86_fp80
  %v7_8e = fmul x86_fp80 %v7_4f, %v6_8e
  %v4_91 = fadd x86_fp80 %v4_8a, %v7_8e
  %v4_9a = fptrunc x86_fp80 %v4_6b to double
  store i32 %v0_4c, i32* %edi.global-to-local, align 4
  %v3_a5 = fmul x86_fp80 %v4_7e, %v4_7e
  %v3_ab = fmul x86_fp80 %v4_91, %v4_91
  %v4_ad = fadd x86_fp80 %v3_a5, %v3_ab
  %tmp264 = fptrunc x86_fp80 %v4_ad to double
  store double %tmp264, double* %stack_var_-44, align 8
  %v2_b2 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_ad)
  %v2_b8 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_b2)
  store x86_fp80 %v2_b8, x86_fp80* %st7.global-to-local, align 4
  %v3_ba = add i32 %v0_4c, -72
  %v4_ba = inttoptr i32 %v3_ba to double*
  %v5_ba = load double, double* %v4_ba, align 4
  %v6_ba = fpext double %v5_ba to x86_fp80
  %v7_ba = fmul x86_fp80 %v2_b8, %v6_ba
  store x86_fp80 %v7_ba, x86_fp80* %st7.global-to-local, align 4
  %v8_bd = add i3 %v0_4f, -2
  %tmp265 = call double @llvm.fabs.f64(double %v4_9a)
  %v2_c1 = fpext double %tmp265 to x86_fp80
  %v3_c3 = add i32 %v0_4c, -16
  %v4_c3 = inttoptr i32 %v3_c3 to double*
  %v5_c3 = load double, double* %v4_c3, align 4
  %v6_c3 = fpext double %v5_c3 to x86_fp80
  %v7_c3 = fsub x86_fp80 %v6_c3, %v2_c1
  %v4_c6 = fsub x86_fp80 %v7_ba, %v7_c3
  store x86_fp80 %v4_c6, x86_fp80* %st7.global-to-local, align 4
  store i3 %v8_bd, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_d7 = call i32 @__asm_wait()
  %v0_d8 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_d8 = call i16 @__asm_fnstsw(i32 %v0_d8)
  store x86_fp80 %v2_c1, x86_fp80* %st7.global-to-local, align 4
  %v2_ea = load i32, i32* %edi.global-to-local, align 4
  %v3_ea = add i32 %v2_ea, -72
  %v4_ea = inttoptr i32 %v3_ea to double*
  %v5_ea = load double, double* %v4_ea, align 4
  %v6_ea = fpext double %v5_ea to x86_fp80
  %v7_ea = fsub x86_fp80 %v2_c1, %v6_ea
  store x86_fp80 %v7_ea, x86_fp80* %st7.global-to-local, align 4
  %v5_ed = load double, double* %v4_ea, align 4
  %v6_ed = fpext double %v5_ed to x86_fp80
  %v7_ed = fsub x86_fp80 %v7_ea, %v6_ed
  store x86_fp80 %v7_ed, x86_fp80* %st7.global-to-local, align 4
  %v5_f0 = load double, double* %v4_ea, align 4
  %v6_f0 = fpext double %v5_f0 to x86_fp80
  %v7_f0 = fsub x86_fp80 %v7_ed, %v6_f0
  store x86_fp80 %v7_f0, x86_fp80* %st7.global-to-local, align 4
  %v0_f5 = call i32 @__asm_wait()
  %v0_f6 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_f6 = call i16 @__asm_fnstsw(i32 %v0_f6)
  %v2_f6 = sext i16 %v1_f6 to i32
  %v4_f6 = and i32 %v0_f5, -65536
  %tmp267 = udiv i32 %v2_f6, 2
  %v12_f8 = and i32 %tmp267, 32512
  %v2_f6.masked = and i32 %v2_f6, -65281
  %v13_f8 = or i32 %v4_f6, %v2_f6.masked
  %v14_f8 = or i32 %v13_f8, %v12_f8
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_102 = load i32, i32* %edi.global-to-local, align 4
  %v1_102 = add i32 %v0_102, -76
  %v2_102 = inttoptr i32 %v1_102 to i32*
  %v3_102 = load i32, i32* %v2_102, align 4
  %v10_102 = icmp eq i32 %v3_102, 0
  %v1_106 = icmp eq i1 %v10_102, false
  %v1_10b.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_106, label %dec_label_pc_10b, label %dec_label_pc_108

dec_label_pc_108:                                 ; preds = %dec_label_pc_40
  %v3_108 = add i32 %v0_102, -32
  %v4_108 = inttoptr i32 %v3_108 to double*
  %v5_108 = load double, double* %v4_108, align 4
  %v6_108 = fpext double %v5_108 to x86_fp80
  %v7_108 = fdiv x86_fp80 %v1_10b.pre, %v6_108
  store x86_fp80 %v7_108, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_10b

dec_label_pc_10b:                                 ; preds = %dec_label_pc_40, %dec_label_pc_108
  %v1_10b = phi x86_fp80 [ %v7_108, %dec_label_pc_108 ], [ %v1_10b.pre, %dec_label_pc_40 ]
  %v2_10b = load i32, i32* %esi.global-to-local, align 4
  %v3_10b = add i32 %v2_10b, -32
  %v4_10b = fptrunc x86_fp80 %v1_10b to double
  %v5_10b = inttoptr i32 %v3_10b to double*
  store double %v4_10b, double* %v5_10b, align 4
  %v6_10b = add i3 %storemerge.in, 2
  store i3 %v6_10b, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_f8
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
