source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebp.global-to-local = alloca i32, align 4
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %stack_var_-4 = alloca i32, align 4
  %v0_0 = load i32, i32* %ebp.global-to-local, align 4
  store i32 %v0_0, i32* %stack_var_-4, align 4
  %v4_0 = ptrtoint i32* %stack_var_-4 to i32
  store i32 %v4_0, i32* %ebp.global-to-local, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %edi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %esi.global-to-local, align 4
  %v1_e = add i32 %arg1, 128
  store i32 %v1_e, i32* %edi.global-to-local, align 4
  %v1_14 = add i32 %arg1, 208
  %v2_14 = inttoptr i32 %v1_14 to i32*
  %v3_14 = load i32, i32* %v2_14, align 4
  %v10_14 = icmp eq i32 %v3_14, 0
  %v11_14 = icmp slt i32 %v3_14, 0
  %v3_18 = icmp eq i1 %v11_14, false
  %v4_18 = icmp eq i1 %v10_14, false
  %v5_18 = icmp eq i1 %v3_18, %v4_18
  br i1 %v5_18, label %dec_label_pc_0.dec_label_pc_23_crit_edge, label %dec_label_pc_1a

dec_label_pc_0.dec_label_pc_23_crit_edge:         ; preds = %dec_label_pc_0
  %v0_23.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %.pre = add i32 %arg1, 200
  %.pre15 = inttoptr i32 %.pre to double*
  %v4_23.pre = load double, double* %.pre15, align 4
  %.pre267 = fpext double %v4_23.pre to x86_fp80
  br label %dec_label_pc_23

dec_label_pc_1a:                                  ; preds = %dec_label_pc_0
  %v4_1a = add i32 %v3_14, 1
  store i32 %v4_1a, i32* %v2_14, align 4
  %v0_1d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_1d = load i32, i32* %esi.global-to-local, align 4
  %v2_1d = add i32 %v1_1d, -16
  %v3_1d = inttoptr i32 %v2_1d to double*
  %v4_1d = load double, double* %v3_1d, align 4
  %v5_1d = fpext double %v4_1d to x86_fp80
  store x86_fp80 %v5_1d, x86_fp80* %st7.global-to-local, align 4
  %v2_20 = load i32, i32* %edi.global-to-local, align 4
  %v3_20 = add i32 %v2_20, 72
  %v5_20 = inttoptr i32 %v3_20 to double*
  store double %v4_1d, double* %v5_20, align 4
  br label %dec_label_pc_23

dec_label_pc_23:                                  ; preds = %dec_label_pc_0.dec_label_pc_23_crit_edge, %dec_label_pc_1a
  %v5_23.pre-phi = phi x86_fp80 [ %.pre267, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_1d, %dec_label_pc_1a ]
  %v3_23.pre-phi = phi double* [ %.pre15, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_20, %dec_label_pc_1a ]
  %v0_9c = phi i32 [ %v3_b, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v1_1d, %dec_label_pc_1a ]
  %v0_23 = phi i3 [ %v0_23.pre, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v0_1d, %dec_label_pc_1a ]
  store x86_fp80 %v5_23.pre-phi, x86_fp80* %st7.global-to-local, align 4
  %v2_2a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v5_23.pre-phi)
  %v4_2c = fadd x86_fp80 %v2_2a, 0xKBFFF8000000000000000
  %v3_2e = add i32 %v0_9c, -48
  %v4_2e = inttoptr i32 %v3_2e to double*
  %v5_2e = load double, double* %v4_2e, align 4
  %v6_2e = fpext double %v5_2e to x86_fp80
  %v7_2e = fmul x86_fp80 %v4_2c, %v6_2e
  %v4_31 = fadd x86_fp80 %v7_2e, %v5_23.pre-phi
  store x86_fp80 %v4_31, x86_fp80* %st7.global-to-local, align 4
  %v4_33 = fptrunc x86_fp80 %v4_31 to double
  store double %v4_33, double* %v3_23.pre-phi, align 4
  %v2_36 = add i32 %v0_9c, -40
  %v3_36 = inttoptr i32 %v2_36 to double*
  %v4_36 = load double, double* %v3_36, align 4
  %v5_36 = fpext double %v4_36 to x86_fp80
  store x86_fp80 %v5_36, x86_fp80* %st7.global-to-local, align 4
  %v3_5d = load double, double* bitcast (i32* @ecx to double*), align 8
  %v2_5f = add i3 %v0_23, 3
  %tmp259 = bitcast double %v3_5d to i64
  %tmp260 = trunc i64 %tmp259 to i32
  %v2_6f = add i32 %tmp260, 8
  %v3_6f = inttoptr i32 %v2_6f to double*
  %v4_6f = load double, double* %v3_6f, align 4
  %v5_6f = fpext double %v4_6f to x86_fp80
  %v4_74 = fsub x86_fp80 %v5_6f, %v5_36
  %v2_76 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_74)
  %v4_78 = fadd x86_fp80 %v2_76, %v5_6f
  %v4_7c = fadd x86_fp80 %v5_36, %v5_6f
  %v2_7e = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_7c)
  %v4_80 = fsub x86_fp80 %v2_7e, %v4_78
  store x86_fp80 %v4_80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v2_5f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_9c = add i32 %v0_9c, -52
  %v2_9c = inttoptr i32 %v1_9c to i32*
  %v3_9c = load i32, i32* %v2_9c, align 4
  %v12_9c = icmp eq i32 %v3_9c, 1065353216
  br i1 %v12_9c, label %dec_label_pc_ca, label %dec_label_pc_a5

dec_label_pc_a5:                                  ; preds = %dec_label_pc_23
  %v1_aa = add i3 %v0_23, 1
  store i3 %v1_aa, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_ae = load i32, i32* %stack_var_-4, align 4
  %v4_ae = call i32 @__asm_fyl2x(i32 %v0_5, i32 %v0_4, i32 %v0_3, i32 %v3_ae)
  store i32 %v4_ae, i32* @eax, align 8
  %v0_c0 = call i32 @__asm_f2xm1()
  store i32 %v0_c0, i32* @eax, align 8
  %v0_c6 = call i32 @__asm_fscale()
  store i32 %v0_c6, i32* @eax, align 8
  %v0_c8 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_c8 = add i3 %v0_c8, 1
  store i3 %v5_c8, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_ca

dec_label_pc_ca:                                  ; preds = %dec_label_pc_a5, %dec_label_pc_23
  %v0_cd = load i32, i32* %fpsw.global-to-local, align 4
  %v1_cd = call i16 @__asm_fnstsw(i32 %v0_cd)
  %v2_cd = sext i16 %v1_cd to i32
  %v3_cd = load i32, i32* @eax, align 8
  %v4_cd = and i32 %v3_cd, -65536
  %tmp268 = udiv i32 %v2_cd, 2
  %v12_cf = and i32 %tmp268, 32512
  %v2_cd.masked = and i32 %v2_cd, -65281
  %v13_cf = or i32 %v4_cd, %v2_cd.masked
  %v14_cf = or i32 %v13_cf, %v12_cf
  store i32 %v14_cf, i32* @eax, align 8
  %v15_cf264 = and i32 %v2_cd, 256
  %v16_cf = icmp ne i32 %v15_cf264, 0
  %v1_d1 = icmp eq i1 %v16_cf, false
  %v0_dd = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_d1, label %dec_label_pc_dd, label %dec_label_pc_d3

dec_label_pc_d3:                                  ; preds = %dec_label_pc_ca
  %v1_d5 = load i32, i32* %edi.global-to-local, align 4
  %v2_d5 = add i32 %v1_d5, 72
  %v3_d5 = inttoptr i32 %v2_d5 to double*
  %v4_d5 = load double, double* %v3_d5, align 4
  %v5_d5 = fpext double %v4_d5 to x86_fp80
  store x86_fp80 %v5_d5, x86_fp80* %st7.global-to-local, align 4
  %v2_d8 = load i32, i32* %esi.global-to-local, align 4
  %v3_d8 = add i32 %v2_d8, -32
  %v4_d8 = inttoptr i32 %v3_d8 to double*
  %v5_d8 = load double, double* %v4_d8, align 4
  %v6_d8 = fpext double %v5_d8 to x86_fp80
  %v7_d8 = fdiv x86_fp80 %v5_d5, %v6_d8
  store x86_fp80 %v7_d8, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f3

dec_label_pc_dd:                                  ; preds = %dec_label_pc_ca
  %v1_dd = add i3 %v0_dd, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v1_dd, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_e1 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_e1 = call i16 @__asm_fnstsw(i32 %v0_e1)
  %v2_e1 = sext i16 %v1_e1 to i32
  %v3_e1 = load i32, i32* @eax, align 8
  %v4_e1 = and i32 %v3_e1, -65536
  %tmp269 = udiv i32 %v2_e1, 2
  %v12_e3 = and i32 %tmp269, 32512
  %v2_e1.masked = and i32 %v2_e1, -65281
  %v13_e3 = or i32 %v4_e1, %v2_e1.masked
  %v14_e3 = or i32 %v13_e3, %v12_e3
  store i32 %v14_e3, i32* @eax, align 8
  %v15_e3265 = and i32 %v2_e1, 256
  %v16_e3 = icmp eq i32 %v15_e3265, 0
  %v0_ee = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_e7 = add i3 %v0_ee, 1
  br i1 %v16_e3, label %dec_label_pc_e7, label %dec_label_pc_ee

dec_label_pc_e7:                                  ; preds = %dec_label_pc_dd
  %v2_ee = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_e7, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_e9 = load i32, i32* %edi.global-to-local, align 4
  %v3_e9 = add i32 %v2_e9, 72
  %v4_e9 = inttoptr i32 %v3_e9 to double*
  %v5_e9 = load double, double* %v4_e9, align 4
  %v6_e9 = fpext double %v5_e9 to x86_fp80
  %v7_e9 = fdiv x86_fp80 %v6_e9, %v2_ee
  store x86_fp80 %v7_e9, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f3

dec_label_pc_ee:                                  ; preds = %dec_label_pc_dd
  %v1_f0 = load i32, i32* %edi.global-to-local, align 4
  %v2_f0 = add i32 %v1_f0, 72
  %v3_f0 = inttoptr i32 %v2_f0 to double*
  %v4_f0 = load double, double* %v3_f0, align 4
  %v5_f0 = fpext double %v4_f0 to x86_fp80
  store i3 %v4_e7, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_f0, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f3

dec_label_pc_f3:                                  ; preds = %dec_label_pc_ee, %dec_label_pc_e7, %dec_label_pc_d3
  %v3_f6 = phi x86_fp80 [ %v5_f0, %dec_label_pc_ee ], [ %v7_e9, %dec_label_pc_e7 ], [ %v7_d8, %dec_label_pc_d3 ]
  %v2_115 = phi i32 [ %v1_f0, %dec_label_pc_ee ], [ %v2_e9, %dec_label_pc_e7 ], [ %v1_d5, %dec_label_pc_d3 ]
  %v0_f3 = phi i3 [ %v4_e7, %dec_label_pc_ee ], [ %v4_e7, %dec_label_pc_e7 ], [ %v0_dd, %dec_label_pc_d3 ]
  %v2_f3 = add i32 %v2_115, 104
  %v3_f3 = inttoptr i32 %v2_f3 to double*
  %v4_f3 = load double, double* %v3_f3, align 4
  %v5_f3 = fpext double %v4_f3 to x86_fp80
  %v4_f6 = fmul x86_fp80 %v3_f6, %v5_f3
  %v4_f8 = fptrunc x86_fp80 %v4_f6 to double
  store double %v4_f8, double* %v3_f3, align 4
  %v2_fb = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_fb = fmul x86_fp80 %v2_fb, %v2_fb
  %v4_fd = fmul x86_fp80 %v4_fb, %v4_fb
  %v4_ff = fmul x86_fp80 %v4_fd, %v4_fd
  %v4_101 = fmul x86_fp80 %v4_ff, %v4_ff
  store x86_fp80 %v4_101, x86_fp80* %st7.global-to-local, align 4
  %v3_103 = add i32 %v2_115, -88
  %v4_103 = inttoptr i32 %v3_103 to double*
  %v5_103 = load double, double* %v4_103, align 4
  %v6_103 = fpext double %v5_103 to x86_fp80
  %v7_103 = fadd x86_fp80 %v4_101, %v6_103
  store x86_fp80 %v7_103, x86_fp80* %st7.global-to-local, align 4
  %v2_106 = load i32, i32* @ecx, align 8
  %v3_106 = fptrunc x86_fp80 %v7_103 to double
  %v4_106 = inttoptr i32 %v2_106 to double*
  store double %v3_106, double* %v4_106, align 4
  %v1_108 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_108 = add i32 %v2_115, -96
  %v4_108 = inttoptr i32 %v3_108 to double*
  %v5_108 = load double, double* %v4_108, align 4
  %v6_108 = fpext double %v5_108 to x86_fp80
  %v7_108 = fadd x86_fp80 %v1_108, %v6_108
  store x86_fp80 %v7_108, x86_fp80* %st7.global-to-local, align 4
  %v2_10b = load i32, i32* @edx, align 8
  %v3_10b = fptrunc x86_fp80 %v7_108 to double
  %v4_10b = inttoptr i32 %v2_10b to double*
  store double %v3_10b, double* %v4_10b, align 4
  %v1_10d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_10d = add i32 %v2_115, -104
  %v4_10d = inttoptr i32 %v3_10d to double*
  %v5_10d = load double, double* %v4_10d, align 4
  %v6_10d = fpext double %v5_10d to x86_fp80
  %v7_10d = fadd x86_fp80 %v1_10d, %v6_10d
  store x86_fp80 %v7_10d, x86_fp80* %st7.global-to-local, align 4
  %v2_110 = load i32, i32* %ebx.global-to-local, align 4
  %v3_110 = fptrunc x86_fp80 %v7_10d to double
  %v4_110 = inttoptr i32 %v2_110 to double*
  store double %v3_110, double* %v4_110, align 4
  %v1_112 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_112 = load i32, i32* %esi.global-to-local, align 4
  %v3_112 = add i32 %v2_112, -60
  %v4_112 = inttoptr i32 %v3_112 to double*
  %v5_112 = load double, double* %v4_112, align 4
  %v6_112 = fpext double %v5_112 to x86_fp80
  %v7_112 = fadd x86_fp80 %v1_112, %v6_112
  store x86_fp80 %v7_112, x86_fp80* %st7.global-to-local, align 4
  %v3_115 = add i32 %v2_115, -184
  %v4_115 = inttoptr i32 %v3_115 to double*
  %v5_115 = load double, double* %v4_115, align 4
  %v6_115 = fpext double %v5_115 to x86_fp80
  %v7_115 = fadd x86_fp80 %v7_112, %v6_115
  store x86_fp80 %v7_115, x86_fp80* %st7.global-to-local, align 4
  %v2_11b = load i32, i32* @ecx, align 8
  %v3_11b = add i32 %v2_11b, 8
  %v4_11b = fptrunc x86_fp80 %v7_115 to double
  %v5_11b = inttoptr i32 %v3_11b to double*
  store double %v4_11b, double* %v5_11b, align 4
  %v6_11b = add i3 %v0_f3, -3
  store i3 %v6_11b, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_110, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  %v2_123 = load i32, i32* %stack_var_-4, align 4
  store i32 %v2_123, i32* %ebp.global-to-local, align 4
  ret i32 %v2_110
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_fyl2x(i32, i32, i32, i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

declare i32 @__asm_f2xm1() local_unnamed_addr

declare i32 @__asm_fscale() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
