source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp261 = call double @__decompiler_undefined_function_3()
  %stack_var_-60 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-60, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_4b = load double, double* %stack_var_-60, align 8
  %v8_4b = fpext double %v3_4b to x86_fp80
  store x86_fp80 %v8_4b, x86_fp80* %st7.global-to-local, align 4
  %v5_4e = fpext double %tmp261 to x86_fp80
  %v6_4e = add i3 %v0_4b, -2
  store i3 %v6_4e, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_52 = call i32 @__asm_fpatan(i32 %v1_45)
  %v2_58 = load i32, i32* @edi, align 8
  %v3_58 = add i32 %v2_58, 24
  %v4_58 = inttoptr i32 %v3_58 to double*
  %v5_58 = load double, double* %v4_58, align 4
  %v6_58 = fpext double %v5_58 to x86_fp80
  %v7_58 = fmul x86_fp80 %v5_4e, %v6_58
  %v3_5b = add i32 %v2_58, -84
  %v4_5b = inttoptr i32 %v3_5b to i32*
  %v5_5b = load i32, i32* %v4_5b, align 4
  %v6_5b = sitofp i32 %v5_5b to x86_fp80
  %v7_5b = fmul x86_fp80 %v7_58, %v6_5b
  %v3_5e = add i32 %v2_58, -92
  %v4_5e = inttoptr i32 %v3_5e to double*
  %v5_5e = load double, double* %v4_5e, align 4
  %v6_5e = fpext double %v5_5e to x86_fp80
  %v7_5e = fadd x86_fp80 %v7_5b, %v6_5e
  %v2_61 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_5e)
  %v3_61 = fcmp olt x86_fp80 %v2_61, 0xK403E8000000000000000
  %v0_61 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v3_61, label %bb, label %dec_label_pc_40._crit_edge

bb:                                               ; preds = %dec_label_pc_40
  %v4_61 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_5e)
  %v8_61 = add i3 %v0_61, -1
  store i3 %v8_61, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_40._crit_edge

dec_label_pc_40._crit_edge:                       ; preds = %dec_label_pc_40, %bb
  %v1_8112 = phi x86_fp80 [ %v4_61, %bb ], [ %v7_5e, %dec_label_pc_40 ]
  %v0_63 = phi i3 [ %v8_61, %bb ], [ %v0_61, %dec_label_pc_40 ]
  %v1_63 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v6_63 = add i3 %v0_63, 1
  store i3 %v6_63, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_4e, x86_fp80* %st7.global-to-local, align 4
  %v3_6f = add i32 %v2_58, 16
  %v4_6f = inttoptr i32 %v3_6f to double*
  %v5_6f = load double, double* %v4_6f, align 4
  %v6_6f = fpext double %v5_6f to x86_fp80
  %v7_6f = fsub x86_fp80 %v6_6f, %v5_4e
  %v4_72 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_72 = fpext double %v4_72 to x86_fp80
  %v6_72 = fmul x86_fp80 %v7_6f, %v5_72
  store x86_fp80 %v6_72, x86_fp80* %st7.global-to-local, align 4
  %tmp266 = bitcast double %v4_72 to i64
  %tmp267 = trunc i64 %tmp266 to i32
  %v3_74 = add i32 %tmp267, -80
  %v4_74 = inttoptr i32 %v3_74 to i32*
  %v5_74 = load i32, i32* %v4_74, align 4
  %v6_74 = sitofp i32 %v5_74 to x86_fp80
  %v7_74 = fmul x86_fp80 %v6_72, %v6_74
  %v2_77 = call x86_fp80 @llvm.round.f80(x86_fp80 %v7_74)
  store x86_fp80 %v2_77, x86_fp80* %st7.global-to-local, align 4
  %v5_79 = load i32, i32* %v4_74, align 4
  %v6_79 = sitofp i32 %v5_79 to x86_fp80
  %v7_79 = fdiv x86_fp80 %v2_77, %v6_79
  store x86_fp80 %v7_79, x86_fp80* %st7.global-to-local, align 4
  %v3_7c = add i32 %tmp267, 8
  %v4_7c = inttoptr i32 %v3_7c to double*
  %v5_7c = load double, double* %v4_7c, align 4
  %v6_7c = fpext double %v5_7c to x86_fp80
  %v7_7c = fmul x86_fp80 %v7_79, %v6_7c
  store x86_fp80 %v7_7c, x86_fp80* %st7.global-to-local, align 4
  %v2_7f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_7c)
  %v3_7f = fcmp olt x86_fp80 %v2_7f, 0xK403E8000000000000000
  br i1 %v3_7f, label %bb268, label %dec_label_pc_d9

bb268:                                            ; preds = %dec_label_pc_40._crit_edge
  %v4_7f = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_7c)
  store x86_fp80 %v4_7f, x86_fp80* %st7.global-to-local, align 4
  %v7_7f = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_7c)
  store i3 %v0_63, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_d9

dec_label_pc_d9:                                  ; preds = %dec_label_pc_40._crit_edge, %bb268
  %v1_85 = phi x86_fp80 [ %v4_7f, %bb268 ], [ %v7_7c, %dec_label_pc_40._crit_edge ]
  %v1_81 = phi x86_fp80 [ %v7_7f, %bb268 ], [ %v1_8112, %dec_label_pc_40._crit_edge ]
  %v0_81 = phi i3 [ %v0_63, %bb268 ], [ %v6_63, %dec_label_pc_40._crit_edge ]
  %v3_89 = load double, double* %stack_var_-60, align 8
  %v8_89 = fpext double %v3_89 to x86_fp80
  %v7_8c = fmul x86_fp80 %v1_81, %v8_89
  %v7_94 = fmul x86_fp80 %v1_85, %v5_4e
  %v4_98 = fadd x86_fp80 %v7_94, %v7_8c
  %v2_9a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_98)
  store x86_fp80 %v2_9a, x86_fp80* %st7.global-to-local, align 4
  %v3_9c = add i32 %tmp267, -16
  %v4_9c = inttoptr i32 %v3_9c to double*
  %v5_9c = load double, double* %v4_9c, align 4
  %v6_9c = fpext double %v5_9c to x86_fp80
  %v7_9c = fsub x86_fp80 %v2_9a, %v6_9c
  %tmp269 = fptrunc x86_fp80 %v7_9c to double
  store double %tmp269, double* %stack_var_-60, align 8
  %v7_a5 = fmul x86_fp80 %v7_9c, %v1_63
  %v7_a9 = fpext double %v6_45 to x86_fp80
  %v7_ad = fmul x86_fp80 %v1_63, %v7_a9
  %v4_b3 = fsub x86_fp80 %v7_a5, %v7_ad
  %v2_b5 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_b3)
  store x86_fp80 %v2_b5, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_81, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_cc = call i32 @__asm_wait(x86_fp80 %v7_9c)
  %v0_cd = load i32, i32* %fpsw.global-to-local, align 4
  %v1_cd = call i16 @__asm_fnstsw(i32 %v0_cd)
  %v2_cd = sext i16 %v1_cd to i32
  %v4_cd = and i32 %v5_cc, -65536
  %tmp270 = udiv i32 %v2_cd, 2
  %v12_cf = and i32 %tmp270, 32512
  %v2_cd.masked = and i32 %v2_cd, -65281
  %v13_cf = or i32 %v4_cd, %v2_cd.masked
  %v14_cf = or i32 %v13_cf, %v12_cf
  %v1_d7 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_d9 = load i32, i32* @edi, align 8
  %v3_d9 = add i32 %v2_d9, -72
  %v4_d9 = inttoptr i32 %v3_d9 to double*
  %v5_d9 = load double, double* %v4_d9, align 4
  %v6_d9 = fpext double %v5_d9 to x86_fp80
  %v7_d9 = fsub x86_fp80 %v1_d7, %v6_d9
  store x86_fp80 %v7_d9, x86_fp80* %st7.global-to-local, align 4
  %v1_dc = add i32 %v2_d9, -76
  %v2_dc = inttoptr i32 %v1_dc to i32*
  %v3_dc = load i32, i32* %v2_dc, align 4
  %v10_dc = icmp eq i32 %v3_dc, 0
  %v1_e0 = icmp eq i1 %v10_dc, false
  br i1 %v1_e0, label %dec_label_pc_e5, label %dec_label_pc_e2

dec_label_pc_e2:                                  ; preds = %dec_label_pc_d9
  %v3_e2 = add i32 %v2_d9, -32
  %v4_e2 = inttoptr i32 %v3_e2 to double*
  %v5_e2 = load double, double* %v4_e2, align 4
  %v6_e2 = fpext double %v5_e2 to x86_fp80
  %v7_e2 = fdiv x86_fp80 %v7_d9, %v6_e2
  store x86_fp80 %v7_e2, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_e5

dec_label_pc_e5:                                  ; preds = %dec_label_pc_e2, %dec_label_pc_d9
  %v1_e5 = phi x86_fp80 [ %v7_e2, %dec_label_pc_e2 ], [ %v7_d9, %dec_label_pc_d9 ]
  %v2_e5 = load i32, i32* %esi.global-to-local, align 4
  %v3_e5 = add i32 %v2_e5, -32
  %v4_e5 = fptrunc x86_fp80 %v1_e5 to double
  %v5_e5 = inttoptr i32 %v3_e5 to double*
  store double %v4_e5, double* %v5_e5, align 4
  %v6_e5 = add i3 %storemerge.in, 2
  store i3 %v6_e5, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_cf
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_fpatan(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

declare i32 @__asm_wait(x86_fp80) local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
