source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp266 = call double @__decompiler_undefined_function_3()
  %stack_var_-80 = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -68
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load x86_fp80, x86_fp80* %stack_var_-80, align 4
  %v3_40 = fptrunc x86_fp80 %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %tmp273 = zext i32 %v1_45 to i80
  %v7_45 = bitcast i80 %tmp273 to x86_fp80
  %fpu_stat_TOP.promoted = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_50.pre = load x86_fp80, x86_fp80* %stack_var_-80, align 4
  %v4_58.pre = load double, double* bitcast (i32* @edi to double*), align 8
  %tmp274 = bitcast double %v4_58.pre to i64
  %tmp275 = trunc i64 %tmp274 to i32
  br label %dec_label_pc_50

dec_label_pc_50:                                  ; preds = %dec_label_pc_50, %dec_label_pc_40
  %v3_50 = phi x86_fp80 [ %v3_50.pre, %dec_label_pc_40 ], [ %v10_ce, %dec_label_pc_50 ]
  %v1_ef8 = phi i32 [ 2, %dec_label_pc_40 ], [ %v1_ef, %dec_label_pc_50 ]
  %stack_var_-72.0 = phi double [ %tmp266, %dec_label_pc_40 ], [ %v4_dd, %dec_label_pc_50 ]
  %stack_var_-64.0 = phi x86_fp80 [ %v7_45, %dec_label_pc_40 ], [ %v10_e5, %dec_label_pc_50 ]
  %v2_53 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v3_50)
  store x86_fp80 %v2_53, x86_fp80* %stack_var_-80, align 4
  %v5_58 = fpext double %v4_58.pre to x86_fp80
  %v6_58 = fmul x86_fp80 %v2_53, %v5_58
  store x86_fp80 %v6_58, x86_fp80* %st7.global-to-local, align 4
  %tmp276 = call double @llvm.fabs.f64(double %stack_var_-72.0)
  %v2_5e = fpext double %tmp276 to x86_fp80
  store x86_fp80 %v2_5e, x86_fp80* %st6.global-to-local, align 4
  %v3_64 = add i32 %tmp275, 8
  %v4_64 = inttoptr i32 %v3_64 to double*
  %v5_64 = load double, double* %v4_64, align 4
  %v6_64 = fpext double %v5_64 to x86_fp80
  %v7_64 = fmul x86_fp80 %v2_5e, %v6_64
  store x86_fp80 %v7_64, x86_fp80* %st6.global-to-local, align 4
  %v2_6b = call x86_fp80 @llvm.fabs.f80(x86_fp80 %stack_var_-64.0)
  %v3_71 = add i32 %tmp275, 16
  %v4_71 = inttoptr i32 %v3_71 to double*
  %v5_71 = load double, double* %v4_71, align 4
  %v6_71 = fpext double %v5_71 to x86_fp80
  %v7_71 = fmul x86_fp80 %v2_6b, %v6_71
  %v4_74 = fadd x86_fp80 %v7_64, %v7_71
  %v4_76 = fadd x86_fp80 %v6_58, %v4_74
  %v2_7a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_76)
  %v4_7c = fadd x86_fp80 %v4_76, %v2_7a
  %v2_7e = fsub x86_fp80 0xK80000000000000000000, %v4_7c
  store x86_fp80 %v2_7e, x86_fp80* %st7.global-to-local, align 4
  %v6_82 = fmul x86_fp80 %v5_58, %v2_7e
  %v10_84 = fadd x86_fp80 %v2_53, %v6_82
  store x86_fp80 %v10_84, x86_fp80* %stack_var_-80, align 4
  store x86_fp80 %v2_7e, x86_fp80* %st6.global-to-local, align 4
  %v5_8c = load double, double* %v4_64, align 4
  %v6_8c = fpext double %v5_8c to x86_fp80
  %v7_8c = fmul x86_fp80 %v6_8c, %v2_7e
  %v7_8f = fadd x86_fp80 %v7_8c, %v2_5e
  store x86_fp80 %v2_7e, x86_fp80* %st6.global-to-local, align 4
  %v5_99 = load double, double* %v4_71, align 4
  %v6_99 = fpext double %v5_99 to x86_fp80
  %v7_99 = fmul x86_fp80 %v2_7e, %v6_99
  %v10_9c = fadd x86_fp80 %v2_6b, %v7_99
  store x86_fp80 %v10_9c, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v10_84, x86_fp80* %st7.global-to-local, align 4
  %v5_a9 = load double, double* %v4_64, align 4
  %v6_a9 = fpext double %v5_a9 to x86_fp80
  %v7_a9 = fmul x86_fp80 %v10_84, %v6_a9
  store x86_fp80 %v7_a9, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_8f, x86_fp80* %st6.global-to-local, align 4
  %v5_b0 = load double, double* %v4_71, align 4
  %v6_b0 = fpext double %v5_b0 to x86_fp80
  %v7_b0 = fmul x86_fp80 %v7_8f, %v6_b0
  %v2_b3 = fsub x86_fp80 0xK80000000000000000000, %v7_b0
  %v6_b9 = fmul x86_fp80 %v10_9c, %v5_58
  %v4_bd = fsub x86_fp80 %v2_b3, %v6_b9
  %v4_bf = fadd x86_fp80 %v7_a9, %v4_bd
  %v2_c3 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_bf)
  %v4_c5 = fadd x86_fp80 %v4_bf, %v2_c3
  store x86_fp80 %v4_c5, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_c5, x86_fp80* %st6.global-to-local, align 4
  %v5_c9 = load double, double* %v4_64, align 4
  %v6_c9 = fpext double %v5_c9 to x86_fp80
  %v7_c9 = fmul x86_fp80 %v4_c5, %v6_c9
  %v10_ce = fsub x86_fp80 %v10_84, %v7_c9
  store x86_fp80 %v10_ce, x86_fp80* %stack_var_-80, align 4
  store x86_fp80 %v4_c5, x86_fp80* %st6.global-to-local, align 4
  %v5_d6 = load double, double* %v4_71, align 4
  %v6_d6 = fpext double %v5_d6 to x86_fp80
  %v7_d6 = fmul x86_fp80 %v4_c5, %v6_d6
  %v7_d9 = fadd x86_fp80 %v7_d6, %v7_8f
  %v4_dd = fptrunc x86_fp80 %v7_d9 to double
  %v6_e3 = fmul x86_fp80 %v4_c5, %v5_58
  %v10_e5 = fadd x86_fp80 %v10_9c, %v6_e3
  store x86_fp80 %v10_e5, x86_fp80* %st6.global-to-local, align 4
  %v1_ef = add nsw i32 %v1_ef8, -1
  %v8_f0 = icmp ugt i32 %v1_ef8, 1
  br i1 %v8_f0, label %dec_label_pc_50, label %dec_label_pc_f6

dec_label_pc_f6:                                  ; preds = %dec_label_pc_50
  %v2_f9 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v10_ce)
  store x86_fp80 %v2_f9, x86_fp80* %st7.global-to-local, align 4
  %tmp279 = call double @llvm.fabs.f64(double %v4_dd)
  %v2_ff = fpext double %tmp279 to x86_fp80
  store x86_fp80 %v2_ff, x86_fp80* %st6.global-to-local, align 4
  %v2_105 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v10_e5)
  %v2_107 = add i32 %tmp275, -92
  %v3_107 = inttoptr i32 %v2_107 to double*
  %v4_107 = load double, double* %v3_107, align 4
  %v5_107 = fpext double %v4_107 to x86_fp80
  %v4_10a = fmul x86_fp80 %v2_f9, %v5_107
  store x86_fp80 %v4_10a, x86_fp80* %st7.global-to-local, align 4
  %v2_10e = add i32 %tmp275, -84
  %v3_10e = inttoptr i32 %v2_10e to double*
  %v4_10e = load double, double* %v3_10e, align 4
  %v5_10e = fpext double %v4_10e to x86_fp80
  %v4_111 = fmul x86_fp80 %v2_ff, %v5_10e
  store x86_fp80 %v4_111, x86_fp80* %st6.global-to-local, align 4
  %v2_115 = add i32 %tmp275, -100
  %v3_115 = inttoptr i32 %v2_115 to double*
  %v4_115 = load double, double* %v3_115, align 4
  %v5_115 = fpext double %v4_115 to x86_fp80
  %v4_118 = fmul x86_fp80 %v2_105, %v5_115
  %v4_11c = fadd x86_fp80 %v4_111, %v4_118
  store x86_fp80 %v4_11c, x86_fp80* %st6.global-to-local, align 4
  %v4_11e = fadd x86_fp80 %v4_10a, %v4_11c
  store x86_fp80 %v4_11e, x86_fp80* %st7.global-to-local, align 4
  %v3_120 = add i32 %tmp275, -16
  %v4_120 = inttoptr i32 %v3_120 to double*
  %v5_120 = load double, double* %v4_120, align 4
  %v6_120 = fpext double %v5_120 to x86_fp80
  %v7_120 = fsub x86_fp80 %v4_11e, %v6_120
  store x86_fp80 %v7_120, x86_fp80* %st7.global-to-local, align 4
  %v9_123 = add i3 %fpu_stat_TOP.promoted, -2
  %v3_126 = fmul x86_fp80 %v10_ce, %v10_ce
  %v3_12c = fmul x86_fp80 %v7_d9, %v7_d9
  %v4_12e = fadd x86_fp80 %v3_126, %v3_12c
  %v3_134 = fmul x86_fp80 %v10_e5, %v10_e5
  %v4_136 = fadd x86_fp80 %v3_134, %v4_12e
  %v2_138 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_136)
  store x86_fp80 %v2_138, x86_fp80* %st6.global-to-local, align 4
  %v2_13a = add i32 %tmp275, -76
  %v3_13a = inttoptr i32 %v2_13a to double*
  %v4_13a = load double, double* %v3_13a, align 4
  %tmp280 = call double @llvm.fabs.f64(double %v4_13a)
  %v2_13d = fpext double %tmp280 to x86_fp80
  %v4_13f = fsub x86_fp80 %v2_138, %v2_13d
  store x86_fp80 %v4_13f, x86_fp80* %st6.global-to-local, align 4
  store i3 %v9_123, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_141 = add i32 %tmp275, -72
  %v2_141 = inttoptr i32 %v1_141 to i32*
  %v3_141 = load i32, i32* %v2_141, align 4
  %v2_144 = icmp sgt i32 %v3_141, -1
  %v1_14a = icmp eq i1 %v2_144, false
  %v12_160 = call i32 @__asm_wait(x86_fp80 %v10_ce, x86_fp80 %v7_d9, x86_fp80 %v10_e5)
  %v0_161 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_161 = call i16 @__asm_fnstsw(i32 %v0_161)
  %v2_161 = sext i16 %v1_161 to i32
  %v4_161 = and i32 %v12_160, -65536
  %v1_163 = udiv i32 %v2_161, 256
  %v2_163 = trunc i32 %v1_163 to i8
  %v3_163 = and i8 %v2_163, 65
  %v4_163 = icmp eq i8 %v3_163, 0
  %v9_163 = zext i8 %v3_163 to i32
  %v11_163 = mul i32 %v9_163, 256
  %v2_161.masked = and i32 %v2_161, -65281
  %v12_163 = or i32 %v4_161, %v2_161.masked
  %v13_163 = or i32 %v12_163, %v11_163
  %v0_16c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_16c = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  br i1 %v1_14a, label %dec_label_pc_15e, label %dec_label_pc_14c

dec_label_pc_14c:                                 ; preds = %dec_label_pc_f6
  br i1 %v4_163, label %dec_label_pc_15a, label %dec_label_pc_156

dec_label_pc_156:                                 ; preds = %dec_label_pc_14c
  store x86_fp80 %v1_16c, x86_fp80* %st7.global-to-local, align 4
  %v5_156 = add i3 %v0_16c, 1
  store i3 %v5_156, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_16e

dec_label_pc_15a:                                 ; preds = %dec_label_pc_14c
  %v4_15a = add i3 %v0_16c, 1
  store i3 %v4_15a, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_16e

dec_label_pc_15e:                                 ; preds = %dec_label_pc_f6
  br i1 %v4_163, label %dec_label_pc_16c, label %dec_label_pc_168

dec_label_pc_168:                                 ; preds = %dec_label_pc_15e
  %v4_168 = add i3 %v0_16c, 1
  store i3 %v4_168, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_16e

dec_label_pc_16c:                                 ; preds = %dec_label_pc_15e
  store x86_fp80 %v1_16c, x86_fp80* %st7.global-to-local, align 4
  %v5_16c = add i3 %v0_16c, 1
  store i3 %v5_16c, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_16e

dec_label_pc_16e:                                 ; preds = %dec_label_pc_16c, %dec_label_pc_168, %dec_label_pc_15a, %dec_label_pc_156
  %v0_177 = phi i3 [ %v5_16c, %dec_label_pc_16c ], [ %v4_168, %dec_label_pc_168 ], [ %v4_15a, %dec_label_pc_15a ], [ %v5_156, %dec_label_pc_156 ]
  %v0_16e = load i32, i32* @edi, align 8
  %v1_16e = add i32 %v0_16e, -68
  %v2_16e = inttoptr i32 %v1_16e to i32*
  %v3_16e = load i32, i32* %v2_16e, align 4
  %v10_16e = icmp eq i32 %v3_16e, 0
  %v1_172 = icmp eq i1 %v10_16e, false
  %v1_177.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_172, label %dec_label_pc_177, label %dec_label_pc_174

dec_label_pc_174:                                 ; preds = %dec_label_pc_16e
  %v3_174 = add i32 %v0_16e, -32
  %v4_174 = inttoptr i32 %v3_174 to double*
  %v5_174 = load double, double* %v4_174, align 4
  %v6_174 = fpext double %v5_174 to x86_fp80
  %v7_174 = fdiv x86_fp80 %v1_177.pre, %v6_174
  store x86_fp80 %v7_174, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_177

dec_label_pc_177:                                 ; preds = %dec_label_pc_16e, %dec_label_pc_174
  %v1_177 = phi x86_fp80 [ %v7_174, %dec_label_pc_174 ], [ %v1_177.pre, %dec_label_pc_16e ]
  %v2_177 = load i32, i32* %esi.global-to-local, align 4
  %v3_177 = add i32 %v2_177, -32
  %v4_177 = fptrunc x86_fp80 %v1_177 to double
  %v5_177 = inttoptr i32 %v3_177 to double*
  store double %v4_177, double* %v5_177, align 4
  %v6_177 = add i3 %v0_177, 1
  store i3 %v6_177, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v13_163
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_wait(x86_fp80, x86_fp80, x86_fp80) local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
