source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %stack_var_-28 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -112
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -120
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -48
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -48
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -72
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -108
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -48
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -112
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -120
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-28, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_4b = load double, double* %stack_var_-28, align 8
  %v8_4b = fpext double %v3_4b to x86_fp80
  store x86_fp80 %v8_4b, x86_fp80* %st7.global-to-local, align 4
  %v8_52 = add i3 %v0_4b, -3
  store i3 %v8_52, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_5a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5a = call i16 @__asm_fnstsw(i32 %v0_5a)
  %v2_5a = sext i16 %v1_5a to i32
  %v3_5a = load i32, i32* %eax.global-to-local, align 4
  %v4_5a = and i32 %v3_5a, -65536
  %tmp296 = udiv i32 %v2_5a, 2
  %v12_5c = and i32 %tmp296, 32512
  %v2_5a.masked = and i32 %v2_5a, -65281
  %v13_5c = or i32 %v4_5a, %v2_5a.masked
  %v14_5c = or i32 %v13_5c, %v12_5c
  store i32 %v14_5c, i32* %eax.global-to-local, align 4
  %v0_64 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_64 = call i16 @__asm_fnstsw(i32 %v0_64)
  %v2_64 = sext i16 %v1_64 to i32
  %v4_64 = and i32 %v13_5c, -65536
  %tmp297 = udiv i32 %v2_64, 2
  %v12_66 = and i32 %tmp297, 32512
  %v2_64.masked = and i32 %v2_64, -65281
  %v13_66 = or i32 %v4_64, %v2_64.masked
  %v14_66 = or i32 %v13_66, %v12_66
  store i32 %v14_66, i32* %eax.global-to-local, align 4
  %v0_74 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_74 = call i16 @__asm_fnstsw(i32 %v0_74)
  %v2_74 = sext i16 %v1_74 to i32
  %v4_74 = and i32 %v13_66, -65536
  %tmp298 = udiv i32 %v2_74, 2
  %v12_76 = and i32 %tmp298, 32512
  %v2_74.masked = and i32 %v2_74, -65281
  %v13_76 = or i32 %v4_74, %v2_74.masked
  %v14_76 = or i32 %v13_76, %v12_76
  store i32 %v14_76, i32* %eax.global-to-local, align 4
  %v1_7c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_7c = fsub x86_fp80 0xK80000000000000000000, %v1_7c
  store x86_fp80 %v2_7c, x86_fp80* %st7.global-to-local, align 4
  %v0_82 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_82 = call i16 @__asm_fnstsw(i32 %v0_82)
  %v2_82 = sext i16 %v1_82 to i32
  %v3_82 = load i32, i32* %eax.global-to-local, align 4
  %v4_82 = and i32 %v3_82, -65536
  %tmp299 = udiv i32 %v2_82, 2
  %v12_84 = and i32 %tmp299, 32512
  %v2_82.masked = and i32 %v2_82, -65281
  %v13_84 = or i32 %v4_82, %v2_82.masked
  %v14_84 = or i32 %v13_84, %v12_84
  store i32 %v14_84, i32* %eax.global-to-local, align 4
  %v0_8c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_8c = call i16 @__asm_fnstsw(i32 %v0_8c)
  %v2_8c = sext i16 %v1_8c to i32
  %v4_8c = and i32 %v13_84, -65536
  %tmp300 = udiv i32 %v2_8c, 2
  %v12_8e = and i32 %tmp300, 32512
  %v2_8c.masked = and i32 %v2_8c, -65281
  %v13_8e = or i32 %v4_8c, %v2_8c.masked
  %v14_8e = or i32 %v13_8e, %v12_8e
  store i32 %v14_8e, i32* %eax.global-to-local, align 4
  %v0_98 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_98 = call i16 @__asm_fnstsw(i32 %v0_98)
  %v2_98 = sext i16 %v1_98 to i32
  %v4_98 = and i32 %v13_8e, -65536
  %tmp301 = udiv i32 %v2_98, 2
  %v12_9a = and i32 %tmp301, 32512
  %v2_98.masked = and i32 %v2_98, -65281
  %v13_9a = or i32 %v4_98, %v2_98.masked
  %v14_9a = or i32 %v13_9a, %v12_9a
  store i32 %v14_9a, i32* %eax.global-to-local, align 4
  %v0_a1 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_a1 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_a1 = fptrunc x86_fp80 %v1_a1 to double
  store double %v4_a1, double* %stack_var_-28, align 8
  store x86_fp80 %v1_a1, x86_fp80* %st7.global-to-local, align 4
  %v2_af = load i32, i32* %edi.global-to-local, align 4
  %v3_af = add i32 %v2_af, -80
  %v4_af = inttoptr i32 %v3_af to double*
  %v5_af = load double, double* %v4_af, align 4
  %v6_af = fpext double %v5_af to x86_fp80
  %v7_af = fmul x86_fp80 %v1_a1, %v6_af
  store x86_fp80 %v7_af, x86_fp80* %st7.global-to-local, align 4
  %v8_b2 = add i3 %v0_a1, 1
  %v3_b6 = add i32 %v2_af, -88
  %v4_b6 = inttoptr i32 %v3_b6 to double*
  %v5_b6 = load double, double* %v4_b6, align 4
  %v6_b6 = fpext double %v5_b6 to x86_fp80
  %v7_b6 = fmul x86_fp80 %v1_a1, %v6_b6
  %v4_b9 = fadd x86_fp80 %v7_af, %v7_b6
  store x86_fp80 %v4_b9, x86_fp80* %st7.global-to-local, align 4
  %v5_be = load double, double* %v4_b6, align 4
  %v6_be = fpext double %v5_be to x86_fp80
  %v7_be = fmul x86_fp80 %v1_a1, %v6_be
  %v5_c5 = load double, double* %v4_af, align 4
  %v6_c5 = fpext double %v5_c5 to x86_fp80
  %v7_c5 = fmul x86_fp80 %v1_a1, %v6_c5
  %v4_ca = fsub x86_fp80 %v7_be, %v7_c5
  %tmp294 = fptrunc x86_fp80 %v4_ca to double
  store double %tmp294, double* %stack_var_-28, align 8
  store x86_fp80 %v4_ca, x86_fp80* %st7.global-to-local, align 4
  %v3_d6 = add i32 %v2_af, -96
  %v4_d6 = inttoptr i32 %v3_d6 to double*
  %v5_d6 = load double, double* %v4_d6, align 4
  %v6_d6 = fpext double %v5_d6 to x86_fp80
  %v7_d6 = fmul x86_fp80 %v4_ca, %v6_d6
  store x86_fp80 %v7_d6, x86_fp80* %st7.global-to-local, align 4
  %v3_dd = add i32 %v2_af, -104
  %v4_dd = inttoptr i32 %v3_dd to double*
  %v5_dd = load double, double* %v4_dd, align 4
  %v6_dd = fpext double %v5_dd to x86_fp80
  %v7_dd = fmul x86_fp80 %v1_a1, %v6_dd
  %v4_e0 = fadd x86_fp80 %v7_d6, %v7_dd
  store x86_fp80 %v4_e0, x86_fp80* %st7.global-to-local, align 4
  %v5_e5 = load double, double* %v4_dd, align 4
  %v6_e5 = fpext double %v5_e5 to x86_fp80
  %v7_e5 = fmul x86_fp80 %v4_ca, %v6_e5
  %v5_ec = load double, double* %v4_d6, align 4
  %v6_ec = fpext double %v5_ec to x86_fp80
  %v7_ec = fmul x86_fp80 %v1_a1, %v6_ec
  %v4_f1 = fsub x86_fp80 %v7_e5, %v7_ec
  %tmp295 = fptrunc x86_fp80 %v4_f1 to double
  store double %tmp295, double* %stack_var_-28, align 8
  store x86_fp80 %v4_e0, x86_fp80* %st7.global-to-local, align 4
  %v3_fe = add i32 %v2_af, -24
  %v4_fe = inttoptr i32 %v3_fe to double*
  %v5_fe = load double, double* %v4_fe, align 4
  %v6_fe = fpext double %v5_fe to x86_fp80
  %v7_fe = fsub x86_fp80 %v4_e0, %v6_fe
  %v3_105 = fmul x86_fp80 %v7_fe, %v7_fe
  store x86_fp80 %v3_105, x86_fp80* %st7.global-to-local, align 4
  %v3_10b = add i32 %v2_af, -32
  %v4_10b = inttoptr i32 %v3_10b to double*
  %v5_10b = load double, double* %v4_10b, align 4
  %v6_10b = fpext double %v5_10b to x86_fp80
  %v7_10b = fsub x86_fp80 %v4_b9, %v6_10b
  %v3_112 = fmul x86_fp80 %v7_10b, %v7_10b
  %v4_114 = fadd x86_fp80 %v3_105, %v3_112
  %v2_116 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_114)
  store x86_fp80 %v2_116, x86_fp80* %st7.global-to-local, align 4
  %v3_118 = add i32 %v2_af, -16
  %v4_118 = inttoptr i32 %v3_118 to double*
  %v5_118 = load double, double* %v4_118, align 4
  %v6_118 = fpext double %v5_118 to x86_fp80
  %v7_118 = fsub x86_fp80 %v2_116, %v6_118
  store x86_fp80 %v7_118, x86_fp80* %st7.global-to-local, align 4
  store i3 %v8_b2, i3* %fpu_stat_TOP.global-to-local, align 1
  %v12_13c = call i32 @__asm_wait(x86_fp80 %v4_f1, x86_fp80 %v7_fe, x86_fp80 %v7_10b)
  store i32 %v12_13c, i32* %eax.global-to-local, align 4
  %v0_13d = load i32, i32* %fpsw.global-to-local, align 4
  %v1_13d = call i16 @__asm_fnstsw(i32 %v0_13d)
  %v2_13d = sext i16 %v1_13d to i32
  %v4_13d = and i32 %v12_13c, -65536
  %v1_13f = udiv i32 %v2_13d, 256
  %v2_13f = trunc i32 %v1_13f to i8
  %v3_13f = and i8 %v2_13f, 65
  %v4_13f = icmp eq i8 %v3_13f, 0
  %v9_13f = zext i8 %v3_13f to i32
  %v11_13f = mul i32 %v9_13f, 256
  %v2_13d.masked = and i32 %v2_13d, -65281
  %v12_13f = or i32 %v4_13d, %v2_13d.masked
  %v13_13f = or i32 %v12_13f, %v11_13f
  store i32 %v13_13f, i32* %eax.global-to-local, align 4
  %v0_14e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_14e = add i3 %v0_14e, 1
  %v1_150 = load i32, i32* %edi.global-to-local, align 4
  %storemerge29.in.in.in.in.v = select i1 %v4_13f, i32 -132, i32 -140
  %storemerge29.in.in.in.in = add i32 %storemerge29.in.in.in.in.v, %v1_150
  %storemerge29.in.in.in = inttoptr i32 %storemerge29.in.in.in.in to double*
  %storemerge29.in.in = load double, double* %storemerge29.in.in.in, align 4
  %storemerge = fpext double %storemerge29.in.in to x86_fp80
  store x86_fp80 %storemerge, x86_fp80* %st7.global-to-local, align 4
  %v2_156 = load i32, i32* %esi.global-to-local, align 4
  %v3_156 = add i32 %v2_156, 128
  %v5_156 = inttoptr i32 %v3_156 to double*
  store double %storemerge29.in.in, double* %v5_156, align 4
  store i3 %v4_14e, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_15c = add i32 %v1_150, -108
  %v2_15c = inttoptr i32 %v1_15c to i32*
  %v3_15c = load i32, i32* %v2_15c, align 4
  %v10_15c = icmp eq i32 %v3_15c, 0
  %v1_160 = icmp eq i1 %v10_15c, false
  %v1_165.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_160, label %dec_label_pc_165, label %dec_label_pc_162

dec_label_pc_162:                                 ; preds = %dec_label_pc_40
  %v3_162 = add i32 %v1_150, -48
  %v4_162 = inttoptr i32 %v3_162 to double*
  %v5_162 = load double, double* %v4_162, align 4
  %v6_162 = fpext double %v5_162 to x86_fp80
  %v7_162 = fdiv x86_fp80 %v1_165.pre, %v6_162
  store x86_fp80 %v7_162, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_165

dec_label_pc_165:                                 ; preds = %dec_label_pc_40, %dec_label_pc_162
  %v1_165 = phi x86_fp80 [ %v7_162, %dec_label_pc_162 ], [ %v1_165.pre, %dec_label_pc_40 ]
  %v3_165 = add i32 %v2_156, -32
  %v4_165 = fptrunc x86_fp80 %v1_165 to double
  %v5_165 = inttoptr i32 %v3_165 to double*
  store double %v4_165, double* %v5_165, align 4
  %v6_165 = add i3 %v0_14e, 2
  store i3 %v6_165, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v13_13f
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_wait(x86_fp80, x86_fp80, x86_fp80) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
