source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp253 = call i32 @__decompiler_undefined_function_3()
  %tmp255 = call double @__decompiler_undefined_function_4()
  %stack_var_-40 = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load x86_fp80, x86_fp80* %stack_var_-40, align 4
  %v3_40 = fptrunc x86_fp80 %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i32, i32* %edi.global-to-local, align 4
  %v1_4b = add i32 %v0_4b, -60
  store i32 %v1_4b, i32* %edi.global-to-local, align 4
  %v0_4e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4e = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_4e, x86_fp80* %st7.global-to-local, align 4
  %v5_52 = fpext double %tmp255 to x86_fp80
  %v6_52 = add i3 %v0_4e, -2
  %v3_56 = load x86_fp80, x86_fp80* %stack_var_-40, align 4
  %v3_5b = add i32 %v0_4b, -120
  %v4_5b = inttoptr i32 %v3_5b to float*
  %v5_5b = load float, float* %v4_5b, align 4
  %v6_5b = fpext float %v5_5b to x86_fp80
  %v7_5b = fmul x86_fp80 %v3_56, %v6_5b
  %v3_60 = add i32 %v0_4b, -124
  %v4_60 = inttoptr i32 %v3_60 to float*
  %v5_60 = load float, float* %v4_60, align 4
  %v6_60 = fpext float %v5_60 to x86_fp80
  %v7_60 = fmul x86_fp80 %v5_52, %v6_60
  %v4_63 = fadd x86_fp80 %v7_5b, %v7_60
  %v3_67 = add i32 %v0_4b, -128
  %v4_67 = inttoptr i32 %v3_67 to float*
  %v5_67 = load float, float* %v4_67, align 4
  %v6_67 = fpext float %v5_67 to x86_fp80
  %v7_67 = fmul x86_fp80 %v7_4e, %v6_67
  %v4_6a = fadd x86_fp80 %v7_67, %v4_63
  %v3_6e = add i32 %v0_4b, -96
  %v4_6e = inttoptr i32 %v3_6e to float*
  %v5_6e = load float, float* %v4_6e, align 4
  %v6_6e = fpext float %v5_6e to x86_fp80
  %v7_6e = fmul x86_fp80 %v3_56, %v6_6e
  %v3_73 = add i32 %v0_4b, -100
  %v4_73 = inttoptr i32 %v3_73 to float*
  %v5_73 = load float, float* %v4_73, align 4
  %v6_73 = fpext float %v5_73 to x86_fp80
  %v7_73 = fmul x86_fp80 %v5_52, %v6_73
  %v4_76 = fadd x86_fp80 %v7_6e, %v7_73
  %v3_7a = add i32 %v0_4b, -104
  %v4_7a = inttoptr i32 %v3_7a to float*
  %v5_7a = load float, float* %v4_7a, align 4
  %v6_7a = fpext float %v5_7a to x86_fp80
  %v7_7a = fmul x86_fp80 %v7_4e, %v6_7a
  %v4_7d = fadd x86_fp80 %v4_76, %v7_7a
  %v3_81 = add i32 %v0_4b, -108
  %v4_81 = inttoptr i32 %v3_81 to float*
  %v5_81 = load float, float* %v4_81, align 4
  %v6_81 = fpext float %v5_81 to x86_fp80
  %v7_81 = fmul x86_fp80 %v3_56, %v6_81
  %v3_86 = add i32 %v0_4b, -112
  %v4_86 = inttoptr i32 %v3_86 to float*
  %v5_86 = load float, float* %v4_86, align 4
  %v6_86 = fpext float %v5_86 to x86_fp80
  %v7_86 = fmul x86_fp80 %v5_52, %v6_86
  %v4_89 = fadd x86_fp80 %v7_81, %v7_86
  store x86_fp80 %v4_6a, x86_fp80* %st7.global-to-local, align 4
  %v3_8d = add i32 %v0_4b, -116
  %v4_8d = inttoptr i32 %v3_8d to float*
  %v5_8d = load float, float* %v4_8d, align 4
  %v6_8d = fpext float %v5_8d to x86_fp80
  %v7_8d = fmul x86_fp80 %v7_4e, %v6_8d
  %v4_90 = fadd x86_fp80 %v4_89, %v7_8d
  store x86_fp80 %v4_7d, x86_fp80* %stack_var_-40, align 4
  store i32 %v0_4b, i32* %edi.global-to-local, align 4
  %v1_a0 = add i32 %v0_4b, -68
  %v2_a0 = inttoptr i32 %v1_a0 to i32*
  %v3_a0 = load i32, i32* %v2_a0, align 4
  %v2_a3 = icmp sgt i32 %v3_a0, -1
  br i1 %v2_a3, label %dec_label_pc_121, label %dec_label_pc_af

dec_label_pc_af:                                  ; preds = %dec_label_pc_40
  %v4_b4 = fadd x86_fp80 %v4_7d, 0xK3FFF8000000000000000
  %v3_b6 = fmul x86_fp80 %v4_b4, %v4_b4
  %v3_bc = fmul x86_fp80 %v4_90, %v4_90
  %v4_be = fadd x86_fp80 %v3_b6, %v3_bc
  %v4_c2 = fdiv x86_fp80 0xK3FFF8000000000000000, %v4_be
  %v3_c9 = fmul x86_fp80 %v4_7d, %v4_7d
  %v4_d1 = fadd x86_fp80 %v3_c9, %v3_bc
  %v4_d5 = fadd x86_fp80 %v4_d1, 0xKBFFF8000000000000000
  %v4_d7 = fmul x86_fp80 %v4_d5, %v4_c2
  %v2_dd = fsub x86_fp80 0xK80000000000000000000, %v4_90
  %v3_df = fsub x86_fp80 %v2_dd, %v4_90
  %v4_e1 = fmul x86_fp80 %v3_df, %v4_c2
  store x86_fp80 %v4_e1, x86_fp80* %st7.global-to-local, align 4
  %v3_e3 = add i32 %v0_4b, -64
  %v4_e3 = inttoptr i32 %v3_e3 to double*
  %v5_e3 = load double, double* %v4_e3, align 4
  %v6_e3 = fpext double %v5_e3 to x86_fp80
  %v7_e3 = fadd x86_fp80 %v4_d7, %v6_e3
  store x86_fp80 %v4_e1, x86_fp80* %stack_var_-40, align 4
  store x86_fp80 %v4_e1, x86_fp80* %st7.global-to-local, align 4
  %v3_f0 = add i32 %v0_4b, -132
  %v4_f0 = inttoptr i32 %v3_f0 to float*
  %v5_f0 = load float, float* %v4_f0, align 4
  %v6_f0 = fpext float %v5_f0 to x86_fp80
  %v7_f0 = fmul x86_fp80 %v4_e1, %v6_f0
  store x86_fp80 %v7_f0, x86_fp80* %st7.global-to-local, align 4
  %v3_fa = add i32 %v0_4b, -136
  %v4_fa = inttoptr i32 %v3_fa to float*
  %v5_fa = load float, float* %v4_fa, align 4
  %v6_fa = fpext float %v5_fa to x86_fp80
  %v7_fa = fmul x86_fp80 %v7_e3, %v6_fa
  %v4_102 = fsub x86_fp80 %v7_f0, %v7_fa
  store x86_fp80 %v4_102, x86_fp80* %st7.global-to-local, align 4
  %v5_107 = load float, float* %v4_fa, align 4
  %v6_107 = fpext float %v5_107 to x86_fp80
  %v7_107 = fmul x86_fp80 %v4_e1, %v6_107
  %v5_111 = load float, float* %v4_f0, align 4
  %v6_111 = fpext float %v5_111 to x86_fp80
  %v7_111 = fmul x86_fp80 %v7_e3, %v6_111
  %v4_117 = fadd x86_fp80 %v7_107, %v7_111
  store x86_fp80 %v4_117, x86_fp80* %stack_var_-40, align 4
  br label %dec_label_pc_121

dec_label_pc_121:                                 ; preds = %dec_label_pc_af, %dec_label_pc_40
  %v0_179 = phi x86_fp80 [ %v4_7d, %dec_label_pc_40 ], [ %v4_117, %dec_label_pc_af ]
  %stack_var_-32.0.in = phi x86_fp80 [ %v4_90, %dec_label_pc_40 ], [ %v4_102, %dec_label_pc_af ]
  %v3_124 = fmul x86_fp80 %v0_179, %v0_179
  %v3_12a = fmul x86_fp80 %stack_var_-32.0.in, %stack_var_-32.0.in
  %v4_12c = fadd x86_fp80 %v3_124, %v3_12a
  %v2_12e = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_12c)
  store x86_fp80 %v2_12e, x86_fp80* %st7.global-to-local, align 4
  store i3 %v6_52, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_133 = add i32 %v0_4b, -92
  %v2_133 = inttoptr i32 %v1_133 to i32*
  %v3_133 = load i32, i32* %v2_133, align 4
  %v13_133 = icmp eq i32 %v3_133, 1
  %v1_137 = icmp eq i1 %v13_133, false
  br i1 %v1_137, label %dec_label_pc_13d, label %dec_label_pc_139

dec_label_pc_139:                                 ; preds = %dec_label_pc_121
  %v4_139 = fdiv x86_fp80 %v2_12e, %v2_12e
  store x86_fp80 %v4_139, x86_fp80* %st7.global-to-local, align 4
  %v7_139 = add i3 %v0_4e, -1
  store i3 %v7_139, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_17d

dec_label_pc_13d:                                 ; preds = %dec_label_pc_121
  %v13_13d = icmp eq i32 %v3_133, 2
  %v1_141 = icmp eq i1 %v13_13d, false
  br i1 %v1_141, label %dec_label_pc_14d, label %dec_label_pc_143

dec_label_pc_143:                                 ; preds = %dec_label_pc_13d
  %v12_145 = call i32 @__asm_fyl2x(x86_fp80 %v0_179, x86_fp80 %stack_var_-32.0.in, x86_fp80 %v4_6a)
  %v1_147 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_147 = fmul x86_fp80 %v1_147, %v1_147
  %v2_149 = fsub x86_fp80 0xK80000000000000000000, %v3_147
  store x86_fp80 %v2_149, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_17d

dec_label_pc_14d:                                 ; preds = %dec_label_pc_13d
  %v13_14d = icmp eq i32 %v3_133, 3
  %v1_151 = icmp eq i1 %v13_14d, false
  %v12_179 = call i32 @__asm_fyl2x(x86_fp80 %v0_179, x86_fp80 %stack_var_-32.0.in, x86_fp80 %v4_6a)
  br i1 %v1_151, label %dec_label_pc_17d, label %dec_label_pc_153

dec_label_pc_153:                                 ; preds = %dec_label_pc_14d
  %v2_15b = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v2_12e)
  store x86_fp80 %v2_15b, x86_fp80* %st7.global-to-local, align 4
  %v2_15d = load i32, i32* %edi.global-to-local, align 4
  %v3_15d = add i32 %v2_15d, 8
  %v4_15d = inttoptr i32 %v3_15d to double*
  %v5_15d = load double, double* %v4_15d, align 4
  %v6_15d = fpext double %v5_15d to x86_fp80
  %v7_15d = fadd x86_fp80 %v2_15b, %v6_15d
  %v2_164 = icmp sgt i32 %tmp253, -1
  %v2_16c = fsub x86_fp80 0xK80000000000000000000, %v7_15d
  %spec.select = select i1 %v2_164, x86_fp80 %v7_15d, x86_fp80 %v2_16c
  %v4_171 = fdiv x86_fp80 0xK3FFF8000000000000000, %spec.select
  store x86_fp80 %v4_171, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_17d

dec_label_pc_17d:                                 ; preds = %dec_label_pc_14d, %dec_label_pc_153, %dec_label_pc_143, %dec_label_pc_139
  %v0_17d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_17d = load x86_fp80, x86_fp80* %stack_var_-40, align 4
  store x86_fp80 %v3_17d, x86_fp80* %st7.global-to-local, align 4
  %v6_180 = add i3 %v0_17d, -2
  store i3 %v6_180, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_184 = call i32 @__asm_fpatan()
  %v2_186 = load i32, i32* %edi.global-to-local, align 4
  %v3_186 = inttoptr i32 %v2_186 to double*
  %v4_186 = load double, double* %v3_186, align 4
  %v5_186 = fpext double %v4_186 to x86_fp80
  %v6_186 = fmul x86_fp80 %stack_var_-32.0.in, %v5_186
  %v3_188 = add i32 %v2_186, -80
  %v4_188 = inttoptr i32 %v3_188 to i32*
  %v5_188 = load i32, i32* %v4_188, align 4
  %v6_188 = sitofp i32 %v5_188 to x86_fp80
  %v7_188 = fmul x86_fp80 %v6_186, %v6_188
  %v0_18b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_18b = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_18b = fadd x86_fp80 %v7_188, %v3_18b
  %v2_18f = call x86_fp80 @llvm.round.f80(x86_fp80 %v4_18b)
  %v4_191 = fsub x86_fp80 %v2_18f, %v4_18b
  %v7_191 = add i3 %v0_18b, 1
  %v2_193 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_191)
  store x86_fp80 %v2_193, x86_fp80* %st7.global-to-local, align 4
  %v3_195 = add i32 %v2_186, -88
  %v4_195 = inttoptr i32 %v3_195 to double*
  %v5_195 = load double, double* %v4_195, align 4
  %v6_195 = fpext double %v5_195 to x86_fp80
  %v7_195 = fmul x86_fp80 %v2_193, %v6_195
  %v3_19c = fmul x86_fp80 %v4_6a, %v4_6a
  %v4_19e = fadd x86_fp80 %v3_19c, %v7_195
  %v2_1a0 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_19e)
  store x86_fp80 %v2_1a0, x86_fp80* %st7.global-to-local, align 4
  %v2_1a2 = add i32 %v2_186, -72
  %v3_1a2 = inttoptr i32 %v2_1a2 to double*
  %v4_1a2 = load double, double* %v3_1a2, align 4
  %tmp260 = call double @llvm.fabs.f64(double %v4_1a2)
  %v2_1a5 = fpext double %tmp260 to x86_fp80
  %v4_1a7 = fsub x86_fp80 %v2_1a0, %v2_1a5
  store x86_fp80 %v4_1a7, x86_fp80* %st7.global-to-local, align 4
  store i3 %v7_191, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_1a9 = add i32 %v2_186, -76
  %v2_1a9 = inttoptr i32 %v1_1a9 to i32*
  %v3_1a9 = load i32, i32* %v2_1a9, align 4
  %v10_1a9 = icmp eq i32 %v3_1a9, 0
  %v1_1ad = icmp eq i1 %v10_1a9, false
  br i1 %v1_1ad, label %dec_label_pc_1b2, label %dec_label_pc_1af

dec_label_pc_1af:                                 ; preds = %dec_label_pc_17d
  %v3_1af = add i32 %v2_186, -32
  %v4_1af = inttoptr i32 %v3_1af to double*
  %v5_1af = load double, double* %v4_1af, align 4
  %v6_1af = fpext double %v5_1af to x86_fp80
  %v7_1af = fdiv x86_fp80 %v4_1a7, %v6_1af
  store x86_fp80 %v7_1af, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_1b2

dec_label_pc_1b2:                                 ; preds = %dec_label_pc_1af, %dec_label_pc_17d
  %v1_1b2 = phi x86_fp80 [ %v7_1af, %dec_label_pc_1af ], [ %v4_1a7, %dec_label_pc_17d ]
  %v2_1b2 = load i32, i32* %esi.global-to-local, align 4
  %v3_1b2 = add i32 %v2_1b2, -32
  %v4_1b2 = fptrunc x86_fp80 %v1_1b2 to double
  %v5_1b2 = inttoptr i32 %v3_1b2 to double*
  store double %v4_1b2, double* %v5_1b2, align 4
  %v6_1b2 = add i3 %v0_18b, 2
  store i3 %v6_1b2, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v0_184
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_fyl2x(x86_fp80, x86_fp80, x86_fp80) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_fpatan() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

declare i32 @__decompiler_undefined_function_3() local_unnamed_addr

declare double @__decompiler_undefined_function_4() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
