source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_0 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_0 = load i32, i32* %esi.global-to-local, align 4
  %v2_0 = add i32 %v1_0, -104
  %v3_0 = inttoptr i32 %v2_0 to double*
  %v4_0 = load double, double* %v3_0, align 4
  %tmp245 = call double @llvm.fabs.f64(double %v4_0)
  %v2_3 = fpext double %tmp245 to x86_fp80
  store x86_fp80 %v2_3, x86_fp80* %st7.global-to-local, align 4
  %v2_5 = add i32 %v1_0, -112
  %v3_5 = inttoptr i32 %v2_5 to double*
  %v4_5 = load double, double* %v3_5, align 4
  %tmp246 = call double @llvm.fabs.f64(double %v4_5)
  %v2_8 = fpext double %tmp246 to x86_fp80
  store x86_fp80 %v2_8, x86_fp80* %st6.global-to-local, align 4
  %v2_a = add i32 %v1_0, -120
  %v3_a = inttoptr i32 %v2_a to double*
  %v4_a = load double, double* %v3_a, align 4
  %v6_a = add i3 %v0_0, -3
  store i3 %v6_a, i3* %fpu_stat_TOP.global-to-local, align 1
  %tmp247 = call double @llvm.fabs.f64(double %v4_a)
  %v2_d = fpext double %tmp247 to x86_fp80
  store x86_fp80 %v2_d, x86_fp80* %st5.global-to-local, align 4
  %v0_11 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_11 = call i16 @__asm_fnstsw(i32 %v0_11)
  %v2_11 = sext i16 %v1_11 to i32
  %v3_11 = load i32, i32* %eax.global-to-local, align 4
  %v4_11 = and i32 %v3_11, -65536
  %tmp248 = udiv i32 %v2_11, 2
  %v12_13 = and i32 %tmp248, 32512
  %v2_11.masked = and i32 %v2_11, -65281
  %v13_13 = or i32 %v4_11, %v2_11.masked
  %v14_13 = or i32 %v13_13, %v12_13
  store i32 %v14_13, i32* %eax.global-to-local, align 4
  %v15_1313 = and i32 %v2_11, 256
  %v16_13 = icmp ne i32 %v15_1313, 0
  %v1_15 = icmp eq i1 %v16_13, false
  br i1 %v1_15, label %dec_label_pc_19, label %dec_label_pc_17

dec_label_pc_17:                                  ; preds = %dec_label_pc_0
  %v2_17 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_17 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_17, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_17, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_19

dec_label_pc_19:                                  ; preds = %dec_label_pc_17, %dec_label_pc_0
  %v0_1b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1b = call i16 @__asm_fnstsw(i32 %v0_1b)
  %v2_1b = sext i16 %v1_1b to i32
  %v3_1b = load i32, i32* %eax.global-to-local, align 4
  %v4_1b = and i32 %v3_1b, -65536
  %tmp249 = udiv i32 %v2_1b, 2
  %v12_1d = and i32 %tmp249, 32512
  %v2_1b.masked = and i32 %v2_1b, -65281
  %v13_1d = or i32 %v4_1b, %v2_1b.masked
  %v14_1d = or i32 %v13_1d, %v12_1d
  store i32 %v14_1d, i32* %eax.global-to-local, align 4
  %v0_27 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_27 = call i16 @__asm_fnstsw(i32 %v0_27)
  %v2_27 = sext i16 %v1_27 to i32
  %v4_27 = and i32 %v13_1d, -65536
  %tmp250 = udiv i32 %v2_27, 2
  %v12_29 = and i32 %tmp250, 32512
  %v2_27.masked = and i32 %v2_27, -65281
  %v13_29 = or i32 %v4_27, %v2_27.masked
  %v14_29 = or i32 %v13_29, %v12_29
  store i32 %v14_29, i32* %eax.global-to-local, align 4
  %v0_2f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_2f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_31 = load i32, i32* %edi.global-to-local, align 4
  %v3_31 = add i32 %v2_31, -68
  %v4_31 = inttoptr i32 %v3_31 to float*
  %v5_31 = load float, float* %v4_31, align 4
  %v6_31 = fpext float %v5_31 to x86_fp80
  %v7_31 = fmul x86_fp80 %v2_2f, %v6_31
  store x86_fp80 %v7_31, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v7_31, x86_fp80* %st6.global-to-local, align 4
  %v3_36 = add i32 %v2_31, -72
  %v4_36 = inttoptr i32 %v3_36 to float*
  %v5_36 = load float, float* %v4_36, align 4
  %v6_36 = fpext float %v5_36 to x86_fp80
  %v7_36 = fmul x86_fp80 %v7_31, %v6_36
  %v4_39 = fadd x86_fp80 %v7_31, %v7_36
  store x86_fp80 %v4_39, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_39, x86_fp80* %st6.global-to-local, align 4
  %v3_3d = add i32 %v2_31, -76
  %v4_3d = inttoptr i32 %v3_3d to float*
  %v5_3d = load float, float* %v4_3d, align 4
  %v6_3d = fpext float %v5_3d to x86_fp80
  %v7_3d = fmul x86_fp80 %v4_39, %v6_3d
  %v4_40 = fadd x86_fp80 %v4_39, %v7_3d
  store x86_fp80 %v4_40, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_40, x86_fp80* %st6.global-to-local, align 4
  %v3_44 = add i32 %v2_31, -44
  %v4_44 = inttoptr i32 %v3_44 to float*
  %v5_44 = load float, float* %v4_44, align 4
  %v6_44 = fpext float %v5_44 to x86_fp80
  %v7_44 = fmul x86_fp80 %v4_40, %v6_44
  store x86_fp80 %v7_44, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_40, x86_fp80* %st5.global-to-local, align 4
  %v3_49 = add i32 %v2_31, -48
  %v4_49 = inttoptr i32 %v3_49 to float*
  %v5_49 = load float, float* %v4_49, align 4
  %v6_49 = fpext float %v5_49 to x86_fp80
  %v7_49 = fmul x86_fp80 %v4_40, %v6_49
  %v4_4c = fadd x86_fp80 %v7_44, %v7_49
  store x86_fp80 %v4_4c, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_40, x86_fp80* %st5.global-to-local, align 4
  %v3_50 = add i32 %v2_31, -52
  %v4_50 = inttoptr i32 %v3_50 to float*
  %v5_50 = load float, float* %v4_50, align 4
  %v6_50 = fpext float %v5_50 to x86_fp80
  %v7_50 = fmul x86_fp80 %v4_40, %v6_50
  store x86_fp80 %v7_50, x86_fp80* %st5.global-to-local, align 4
  %v4_53 = fadd x86_fp80 %v4_4c, %v7_50
  store x86_fp80 %v4_40, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_53, x86_fp80* %st7.global-to-local, align 4
  %v3_57 = add i32 %v2_31, -56
  %v4_57 = inttoptr i32 %v3_57 to float*
  %v5_57 = load float, float* %v4_57, align 4
  %v6_57 = fpext float %v5_57 to x86_fp80
  %v7_57 = fmul x86_fp80 %v4_53, %v6_57
  store x86_fp80 %v7_57, x86_fp80* %st7.global-to-local, align 4
  %v3_5c = add i32 %v2_31, -60
  %v4_5c = inttoptr i32 %v3_5c to float*
  %v5_5c = load float, float* %v4_5c, align 4
  %v6_5c = fpext float %v5_5c to x86_fp80
  %v7_5c = fmul x86_fp80 %v7_57, %v6_5c
  %v4_5f = fadd x86_fp80 %v7_5c, %v7_5c
  store x86_fp80 %v4_5f, x86_fp80* %st7.global-to-local, align 4
  %v3_63 = add i32 %v2_31, -64
  %v4_63 = inttoptr i32 %v3_63 to float*
  %v5_63 = load float, float* %v4_63, align 4
  %v6_63 = fpext float %v5_63 to x86_fp80
  %v7_63 = fmul x86_fp80 %v4_5f, %v6_63
  %v4_66 = fadd x86_fp80 %v7_63, %v7_63
  store x86_fp80 %v4_66, x86_fp80* %st7.global-to-local, align 4
  %v2_68 = add i32 %v2_31, -16
  %v3_68 = inttoptr i32 %v2_68 to double*
  %v4_68 = load double, double* %v3_68, align 4
  %v5_68 = fpext double %v4_68 to x86_fp80
  store x86_fp80 %v5_68, x86_fp80* %st7.global-to-local, align 4
  %v1_6b = load i32, i32* %esi.global-to-local, align 4
  %v2_6b = add i32 %v1_6b, 112
  %v3_6b = inttoptr i32 %v2_6b to double*
  %v4_6b = load double, double* %v3_6b, align 4
  %v5_6b = fpext double %v4_6b to x86_fp80
  %v4_6e = fmul x86_fp80 %v5_68, %v5_6b
  %v4_70 = fptrunc x86_fp80 %v4_6e to double
  store double %v4_70, double* %v3_6b, align 4
  %v2_73 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_73 = fmul x86_fp80 %v2_73, %v2_73
  %v4_75 = fmul x86_fp80 %v4_73, %v4_73
  store x86_fp80 %v4_75, x86_fp80* %st7.global-to-local, align 4
  %v4_7b = fadd x86_fp80 %v4_75, 0xKBFFF8000000000000000
  store x86_fp80 %v4_7b, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_7b, x86_fp80* %st5.global-to-local, align 4
  %v3_81 = add i32 %v2_31, -24
  %v4_81 = inttoptr i32 %v3_81 to double*
  %v5_81 = load double, double* %v4_81, align 4
  %v6_81 = fpext double %v5_81 to x86_fp80
  %v7_81 = fmul x86_fp80 %v4_7b, %v6_81
  %v4_84 = fsub x86_fp80 %v4_75, %v7_81
  store x86_fp80 %v4_84, x86_fp80* %st7.global-to-local, align 4
  %v3_86 = add i32 %v2_31, -32
  %v4_86 = inttoptr i32 %v3_86 to double*
  %v5_86 = load double, double* %v4_86, align 4
  %v6_86 = fpext double %v5_86 to x86_fp80
  %v7_86 = fmul x86_fp80 %v4_7b, %v6_86
  store x86_fp80 %v7_86, x86_fp80* %st5.global-to-local, align 4
  %v4_89 = fsub x86_fp80 %v4_84, %v7_86
  store x86_fp80 %v4_89, x86_fp80* %st7.global-to-local, align 4
  %v4_8b = fdiv x86_fp80 %v4_7b, %v4_89
  store x86_fp80 %v4_8b, x86_fp80* %st6.global-to-local, align 4
  %v3_8d = add i32 %v2_31, -40
  %v4_8d = inttoptr i32 %v3_8d to double*
  %v5_8d = load double, double* %v4_8d, align 4
  %v6_8d = fpext double %v5_8d to x86_fp80
  %v7_8d = fmul x86_fp80 %v4_8b, %v6_8d
  store x86_fp80 %v7_8d, x86_fp80* %st6.global-to-local, align 4
  %v4_90 = fsub x86_fp80 %v4_89, %v7_8d
  %v2_94 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_90)
  %v4_96 = fsub x86_fp80 %v2_94, %v2_94
  %v4_98 = fmul x86_fp80 %v4_96, %v4_96
  store x86_fp80 %v4_98, x86_fp80* %st7.global-to-local, align 4
  %v3_9a = add i32 %v1_6b, -112
  %v4_9a = fptrunc x86_fp80 %v4_98 to double
  %v5_9a = inttoptr i32 %v3_9a to double*
  store double %v4_9a, double* %v5_9a, align 4
  %v1_9d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_9d = add i32 %v1_6b, -120
  %v4_9d = fptrunc x86_fp80 %v1_9d to double
  %v5_9d = inttoptr i32 %v3_9d to double*
  store double %v4_9d, double* %v5_9d, align 4
  %v1_a0 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_a0 = add i32 %v1_6b, -104
  %v4_a0 = fptrunc x86_fp80 %v1_a0 to double
  %v5_a0 = inttoptr i32 %v3_a0 to double*
  store double %v4_a0, double* %v5_a0, align 4
  %v6_a0 = add i3 %v0_2f, 3
  store i3 %v6_a0, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_a3 = load i32, i32* %eax.global-to-local, align 4
  ret i32 %v0_a3
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
