source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %edi.global-to-local, align 4
  %v0_e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_e = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_e = fpext double %v3_e to x86_fp80
  %v5_e = add i3 %v0_e, -1
  store i3 %v5_e, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_e, x86_fp80* %st7.global-to-local, align 4
  %v0_12 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_12 = call i16 @__asm_fnstsw(i32 %v0_12)
  %v2_12 = sext i16 %v1_12 to i32
  %v3_12 = load i32, i32* @eax, align 8
  %v4_12 = and i32 %v3_12, -65536
  %tmp238 = udiv i32 %v2_12, 2
  %v12_14 = and i32 %tmp238, 32512
  %v2_12.masked = and i32 %v2_12, -65281
  %v13_14 = or i32 %v4_12, %v2_12.masked
  %v14_14 = or i32 %v13_14, %v12_14
  store i32 %v14_14, i32* @eax, align 8
  %v15_145 = and i32 %v2_12, 256
  %v16_14 = icmp ne i32 %v15_145, 0
  %v1_16 = icmp eq i1 %v16_14, false
  %v1_38 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_38 = load i32, i32* %edi.global-to-local, align 4
  %v3_38 = add i32 %v2_38, -16
  %v4_38 = inttoptr i32 %v3_38 to double*
  %v5_38 = load double, double* %v4_38, align 4
  %v6_38 = fpext double %v5_38 to x86_fp80
  br i1 %v1_16, label %dec_label_pc_38, label %dec_label_pc_18

dec_label_pc_18:                                  ; preds = %dec_label_pc_0
  %v7_18 = fadd x86_fp80 %v1_38, %v6_38
  store x86_fp80 %v7_18, x86_fp80* %st7.global-to-local, align 4
  %v0_1b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_1b = load i32, i32* %ebx.global-to-local, align 4
  %v3_1b = fptrunc x86_fp80 %v7_18 to double
  %v4_1b = inttoptr i32 %v2_1b to double*
  store double %v3_1b, double* %v4_1b, align 4
  %v2_1d = add i32 %v2_38, -24
  %v3_1d = inttoptr i32 %v2_1d to double*
  %v4_1d = load double, double* %v3_1d, align 4
  %v5_1d = fpext double %v4_1d to x86_fp80
  store x86_fp80 %v5_1d, x86_fp80* %st7.global-to-local, align 4
  %v2_20 = load i32, i32* %esi.global-to-local, align 4
  %v3_20 = add i32 %v2_20, 24
  %v5_20 = inttoptr i32 %v3_20 to double*
  store double %v4_1d, double* %v5_20, align 4
  %v2_23 = add i32 %v2_38, -32
  %v3_23 = inttoptr i32 %v2_23 to double*
  %v4_23 = load double, double* %v3_23, align 4
  %v5_23 = fpext double %v4_23 to x86_fp80
  store x86_fp80 %v5_23, x86_fp80* %st7.global-to-local, align 4
  %v3_26 = add i32 %v2_20, 32
  %v5_26 = inttoptr i32 %v3_26 to double*
  store double %v4_23, double* %v5_26, align 4
  %v2_29 = add i32 %v2_38, -40
  %v3_29 = inttoptr i32 %v2_29 to double*
  %v4_29 = load double, double* %v3_29, align 4
  %v5_29 = fpext double %v4_29 to x86_fp80
  store x86_fp80 %v5_29, x86_fp80* %st7.global-to-local, align 4
  %v3_2c = add i32 %v2_20, 40
  %v5_2c = inttoptr i32 %v3_2c to double*
  store double %v4_29, double* %v5_2c, align 4
  br label %dec_label_pc_2f

dec_label_pc_2f:                                  ; preds = %dec_label_pc_38, %dec_label_pc_18
  %storemerge.pre-phi.in = phi i3 [ %v0_3b, %dec_label_pc_38 ], [ %v0_1b, %dec_label_pc_18 ]
  %v0_2f = phi i32 [ %v2_3b, %dec_label_pc_38 ], [ %v2_1b, %dec_label_pc_18 ]
  %storemerge.pre-phi = add i3 %storemerge.pre-phi.in, 1
  store i3 %storemerge.pre-phi, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_2f, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v0_2f

dec_label_pc_38:                                  ; preds = %dec_label_pc_0
  %v7_38 = fsub x86_fp80 %v1_38, %v6_38
  store x86_fp80 %v7_38, x86_fp80* %st7.global-to-local, align 4
  %v0_3b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_3b = load i32, i32* %ebx.global-to-local, align 4
  %v3_3b = fptrunc x86_fp80 %v7_38 to double
  %v4_3b = inttoptr i32 %v2_3b to double*
  store double %v3_3b, double* %v4_3b, align 4
  %v2_3d = add i32 %v2_38, -48
  %v3_3d = inttoptr i32 %v2_3d to double*
  %v4_3d = load double, double* %v3_3d, align 4
  %v5_3d = fpext double %v4_3d to x86_fp80
  store x86_fp80 %v5_3d, x86_fp80* %st7.global-to-local, align 4
  %v2_40 = load i32, i32* %esi.global-to-local, align 4
  %v3_40 = add i32 %v2_40, 24
  %v5_40 = inttoptr i32 %v3_40 to double*
  store double %v4_3d, double* %v5_40, align 4
  %v2_43 = add i32 %v2_38, -56
  %v3_43 = inttoptr i32 %v2_43 to double*
  %v4_43 = load double, double* %v3_43, align 4
  %v5_43 = fpext double %v4_43 to x86_fp80
  store x86_fp80 %v5_43, x86_fp80* %st7.global-to-local, align 4
  %v3_46 = add i32 %v2_40, 32
  %v5_46 = inttoptr i32 %v3_46 to double*
  store double %v4_43, double* %v5_46, align 4
  %v2_49 = add i32 %v2_38, -64
  %v3_49 = inttoptr i32 %v2_49 to double*
  %v4_49 = load double, double* %v3_49, align 4
  %v5_49 = fpext double %v4_49 to x86_fp80
  store x86_fp80 %v5_49, x86_fp80* %st7.global-to-local, align 4
  %v3_4c = add i32 %v2_40, 40
  %v5_4c = inttoptr i32 %v3_4c to double*
  store double %v4_49, double* %v5_4c, align 4
  br label %dec_label_pc_2f
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr
