source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %ecx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp273 = call double @__decompiler_undefined_function_4()
  %stack_var_-80 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-80, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i32, i32* %edi.global-to-local, align 4
  %v1_4b = add i32 %v0_4b, -44
  store i32 %v1_4b, i32* %edi.global-to-local, align 4
  %v0_4e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4e = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_4e, x86_fp80* %st7.global-to-local, align 4
  %v5_52 = fpext double %tmp273 to x86_fp80
  %v3_56 = load double, double* %stack_var_-80, align 8
  %v8_56 = fpext double %v3_56 to x86_fp80
  %v3_5b = add i32 %v0_4b, -104
  %v4_5b = inttoptr i32 %v3_5b to float*
  %v5_5b = load float, float* %v4_5b, align 4
  %v6_5b = fpext float %v5_5b to x86_fp80
  %v7_5b = fmul x86_fp80 %v8_56, %v6_5b
  %v3_60 = add i32 %v0_4b, -108
  %v4_60 = inttoptr i32 %v3_60 to float*
  %v5_60 = load float, float* %v4_60, align 4
  %v6_60 = fpext float %v5_60 to x86_fp80
  %v7_60 = fmul x86_fp80 %v5_52, %v6_60
  %v4_63 = fadd x86_fp80 %v7_5b, %v7_60
  %v3_67 = add i32 %v0_4b, -112
  %v4_67 = inttoptr i32 %v3_67 to float*
  %v5_67 = load float, float* %v4_67, align 4
  %v6_67 = fpext float %v5_67 to x86_fp80
  %v7_67 = fmul x86_fp80 %v7_4e, %v6_67
  %v4_6a = fadd x86_fp80 %v7_67, %v4_63
  %v3_6e = add i32 %v0_4b, -80
  %v4_6e = inttoptr i32 %v3_6e to float*
  %v5_6e = load float, float* %v4_6e, align 4
  %v6_6e = fpext float %v5_6e to x86_fp80
  %v7_6e = fmul x86_fp80 %v8_56, %v6_6e
  %v3_73 = add i32 %v0_4b, -84
  %v4_73 = inttoptr i32 %v3_73 to float*
  %v5_73 = load float, float* %v4_73, align 4
  %v6_73 = fpext float %v5_73 to x86_fp80
  %v7_73 = fmul x86_fp80 %v5_52, %v6_73
  %v4_76 = fadd x86_fp80 %v7_6e, %v7_73
  %v3_7a = add i32 %v0_4b, -88
  %v4_7a = inttoptr i32 %v3_7a to float*
  %v5_7a = load float, float* %v4_7a, align 4
  %v6_7a = fpext float %v5_7a to x86_fp80
  %v7_7a = fmul x86_fp80 %v7_4e, %v6_7a
  %v4_7d = fadd x86_fp80 %v4_76, %v7_7a
  %v3_81 = add i32 %v0_4b, -92
  %v4_81 = inttoptr i32 %v3_81 to float*
  %v5_81 = load float, float* %v4_81, align 4
  %v6_81 = fpext float %v5_81 to x86_fp80
  %v7_81 = fmul x86_fp80 %v8_56, %v6_81
  %v3_86 = add i32 %v0_4b, -96
  %v4_86 = inttoptr i32 %v3_86 to float*
  %v5_86 = load float, float* %v4_86, align 4
  %v6_86 = fpext float %v5_86 to x86_fp80
  %v7_86 = fmul x86_fp80 %v5_52, %v6_86
  %v4_89 = fadd x86_fp80 %v7_81, %v7_86
  store x86_fp80 %v4_6a, x86_fp80* %st7.global-to-local, align 4
  %v3_8d = add i32 %v0_4b, -100
  %v4_8d = inttoptr i32 %v3_8d to float*
  %v5_8d = load float, float* %v4_8d, align 4
  %v6_8d = fpext float %v5_8d to x86_fp80
  %v7_8d = fmul x86_fp80 %v7_4e, %v6_8d
  %v4_90 = fadd x86_fp80 %v4_89, %v7_8d
  %v7_90 = add i3 %v0_4e, -3
  %tmp278 = fptrunc x86_fp80 %v4_7d to double
  store double %tmp278, double* %stack_var_-80, align 8
  store i32 %v0_4b, i32* %edi.global-to-local, align 4
  store x86_fp80 %v4_7d, x86_fp80* %st7.global-to-local, align 4
  %v3_a3 = add i32 %v0_4b, -72
  %v4_a3 = inttoptr i32 %v3_a3 to double*
  %v5_a3 = load double, double* %v4_a3, align 4
  %v6_a3 = fpext double %v5_a3 to x86_fp80
  %v7_a3 = fsub x86_fp80 %v6_a3, %v4_7d
  store x86_fp80 %v7_a3, x86_fp80* %st7.global-to-local, align 4
  %v3_ac = inttoptr i32 %v0_4b to double*
  %v4_ac = load double, double* %v3_ac, align 4
  %v5_ac = fpext double %v4_ac to x86_fp80
  %v6_ac = fadd x86_fp80 %v7_a3, %v5_ac
  %v2_ae = fptosi x86_fp80 %v6_ac to i32
  %v4_b6 = fsub x86_fp80 %v7_a3, %v7_a3
  %v2_b8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_b6)
  store x86_fp80 %v2_b8, x86_fp80* %st7.global-to-local, align 4
  %v4_be = load double, double* %v3_ac, align 4
  %v5_be = fpext double %v4_be to x86_fp80
  %v6_be = fmul x86_fp80 %v4_7d, %v5_be
  %v3_c4 = add i32 %v0_4b, 8
  %v4_c4 = inttoptr i32 %v3_c4 to double*
  %v5_c4 = load double, double* %v4_c4, align 4
  %v6_c4 = fpext double %v5_c4 to x86_fp80
  %v7_c4 = fmul x86_fp80 %v4_90, %v6_c4
  %v4_c9 = fadd x86_fp80 %v6_be, %v7_c4
  %v6_d1 = fadd x86_fp80 %v4_c9, %v5_be
  %v2_d3 = fptosi x86_fp80 %v6_d1 to i32
  %v4_e1 = fsub x86_fp80 %v7_c4, %v6_be
  %v6_e9 = fadd x86_fp80 %v4_e1, %v5_be
  %v2_eb = fptosi x86_fp80 %v6_e9 to i32
  store i3 %v7_90, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_f8 = load i32, i32* %ecx.global-to-local, align 4
  %v1_100 = add i32 %v2_eb, 4096
  store i32 3, i32* %ecx.global-to-local, align 4
  %tmp279 = urem i32 %v1_100, 3
  %v5_111 = icmp eq i32 %tmp279, 0
  %v1_114 = icmp eq i1 %v5_111, false
  br i1 %v1_114, label %dec_label_pc_11d, label %dec_label_pc_116

dec_label_pc_116:                                 ; preds = %dec_label_pc_40
  %v2_116 = add i32 %v0_4b, 16
  %v3_116 = inttoptr i32 %v2_116 to double*
  %v4_116 = load double, double* %v3_116, align 4
  %v5_116 = fpext double %v4_116 to x86_fp80
  store x86_fp80 %v5_116, x86_fp80* %st7.global-to-local, align 4
  store i3 %v7_90, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_11d

dec_label_pc_11d:                                 ; preds = %dec_label_pc_116, %dec_label_pc_40
  %v1_121 = add i32 %v2_ae, 4096
  store i32 3, i32* %ecx.global-to-local, align 4
  %tmp280 = urem i32 %v1_121, 3
  %v5_132 = icmp eq i32 %tmp280, 0
  %v1_135 = icmp eq i1 %v5_132, false
  br i1 %v1_135, label %dec_label_pc_13e, label %dec_label_pc_137

dec_label_pc_137:                                 ; preds = %dec_label_pc_11d
  %v2_137 = add i32 %v0_4b, 16
  %v3_137 = inttoptr i32 %v2_137 to double*
  %v4_137 = load double, double* %v3_137, align 4
  %v5_137 = fpext double %v4_137 to x86_fp80
  store x86_fp80 %v5_137, x86_fp80* %st7.global-to-local, align 4
  store i3 %v7_90, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_13e

dec_label_pc_13e:                                 ; preds = %dec_label_pc_137, %dec_label_pc_11d
  %v1_142 = add i32 %v2_d3, 4096
  store i32 3, i32* %ecx.global-to-local, align 4
  %tmp281 = urem i32 %v1_142, 3
  %v5_153 = icmp eq i32 %tmp281, 0
  %v1_156 = icmp eq i1 %v5_153, false
  br i1 %v1_156, label %dec_label_pc_15f, label %dec_label_pc_158

dec_label_pc_158:                                 ; preds = %dec_label_pc_13e
  %v2_158 = add i32 %v0_4b, 16
  %v3_158 = inttoptr i32 %v2_158 to double*
  %v4_158 = load double, double* %v3_158, align 4
  %v5_158 = fpext double %v4_158 to x86_fp80
  store x86_fp80 %v5_158, x86_fp80* %st7.global-to-local, align 4
  store i3 %v7_90, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_15f

dec_label_pc_15f:                                 ; preds = %dec_label_pc_158, %dec_label_pc_13e
  store i32 %v0_f8, i32* %ecx.global-to-local, align 4
  %v0_166 = call i32 @__asm_wait()
  %v0_167 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_167 = call i16 @__asm_fnstsw(i32 %v0_167)
  %storemerge14.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge14 = add i3 %storemerge14.in, 1
  store i3 %storemerge14, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_175 = call i32 @__asm_wait()
  %v1_176 = call i16 @__asm_fnstsw(i32 %v0_167)
  %v2_176 = sext i16 %v1_176 to i32
  %v4_176 = and i32 %v0_175, -65536
  %tmp283 = udiv i32 %v2_176, 2
  %v12_178 = and i32 %tmp283, 32512
  %v2_176.masked = and i32 %v2_176, -65281
  %v13_178 = or i32 %v4_176, %v2_176.masked
  %v14_178 = or i32 %v13_178, %v12_178
  %v1_17c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  %v3_182 = fmul x86_fp80 %v1_17c, %v1_17c
  %v3_188 = fmul x86_fp80 %v4_6a, %v4_6a
  %v4_18a = fadd x86_fp80 %v3_188, %v3_182
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_18c = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_18a)
  store x86_fp80 %v2_18c, x86_fp80* %st7.global-to-local, align 4
  %v2_18e = load i32, i32* %edi.global-to-local, align 4
  %v3_18e = add i32 %v2_18e, -16
  %v4_18e = inttoptr i32 %v3_18e to double*
  %v5_18e = load double, double* %v4_18e, align 4
  %v6_18e = fpext double %v5_18e to x86_fp80
  %v7_18e = fsub x86_fp80 %v2_18c, %v6_18e
  store x86_fp80 %v7_18e, x86_fp80* %st7.global-to-local, align 4
  %v1_191 = add i32 %v2_18e, -76
  %v2_191 = inttoptr i32 %v1_191 to i32*
  %v3_191 = load i32, i32* %v2_191, align 4
  %v10_191 = icmp eq i32 %v3_191, 0
  %v1_195 = icmp eq i1 %v10_191, false
  br i1 %v1_195, label %dec_label_pc_19a, label %dec_label_pc_197

dec_label_pc_197:                                 ; preds = %dec_label_pc_15f
  %v3_197 = add i32 %v2_18e, -32
  %v4_197 = inttoptr i32 %v3_197 to double*
  %v5_197 = load double, double* %v4_197, align 4
  %v6_197 = fpext double %v5_197 to x86_fp80
  %v7_197 = fdiv x86_fp80 %v7_18e, %v6_197
  store x86_fp80 %v7_197, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_19a

dec_label_pc_19a:                                 ; preds = %dec_label_pc_197, %dec_label_pc_15f
  %v1_19a = phi x86_fp80 [ %v7_197, %dec_label_pc_197 ], [ %v7_18e, %dec_label_pc_15f ]
  %v2_19a = load i32, i32* %esi.global-to-local, align 4
  %v3_19a = add i32 %v2_19a, -32
  %v4_19a = fptrunc x86_fp80 %v1_19a to double
  %v5_19a = inttoptr i32 %v3_19a to double*
  store double %v4_19a, double* %v5_19a, align 4
  %v6_19a = add i3 %storemerge.in, 2
  store i3 %v6_19a, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_178
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_4() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
