source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st3.global-to-local = alloca x86_fp80, align 4
  %st4.global-to-local = alloca x86_fp80, align 4
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %eax.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_9 = add i32 %arg1, 48
  %v2_9 = inttoptr i32 %v1_9 to i32*
  %v3_9 = load i32, i32* %v2_9, align 4
  store i32 %v3_9, i32* %edi.global-to-local, align 4
  %v0_c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_c = inttoptr i32 %arg1 to double*
  %v3_c = load double, double* %v2_c, align 4
  %v4_c = fpext double %v3_c to x86_fp80
  store x86_fp80 %v4_c, x86_fp80* %st7.global-to-local, align 4
  %v3_e = add i32 %v3_9, -16
  %v4_e = inttoptr i32 %v3_e to double*
  %v5_e = load double, double* %v4_e, align 4
  %v6_e = fpext double %v5_e to x86_fp80
  %v7_e = fsub x86_fp80 %v4_c, %v6_e
  store x86_fp80 %v7_e, x86_fp80* %st7.global-to-local, align 4
  %v2_11 = add i32 %arg1, 8
  %v3_11 = inttoptr i32 %v2_11 to double*
  %v4_11 = load double, double* %v3_11, align 4
  %v5_11 = fpext double %v4_11 to x86_fp80
  store x86_fp80 %v5_11, x86_fp80* %st6.global-to-local, align 4
  %v3_14 = add i32 %v3_9, -24
  %v4_14 = inttoptr i32 %v3_14 to double*
  %v5_14 = load double, double* %v4_14, align 4
  %v6_14 = fpext double %v5_14 to x86_fp80
  %v7_14 = fsub x86_fp80 %v5_11, %v6_14
  store x86_fp80 %v7_14, x86_fp80* %st6.global-to-local, align 4
  %v2_17 = add i32 %arg1, 16
  %v3_17 = inttoptr i32 %v2_17 to double*
  %v4_17 = load double, double* %v3_17, align 4
  %v5_17 = fpext double %v4_17 to x86_fp80
  store x86_fp80 %v5_17, x86_fp80* %st5.global-to-local, align 4
  %v3_1a = add i32 %v3_9, -32
  %v4_1a = inttoptr i32 %v3_1a to double*
  %v5_1a = load double, double* %v4_1a, align 4
  %v6_1a = fpext double %v5_1a to x86_fp80
  %v7_1a = fsub x86_fp80 %v5_17, %v6_1a
  store x86_fp80 %v7_1a, x86_fp80* %st5.global-to-local, align 4
  %v3_1d = xor i3 %v0_c, -4
  %v3_1f = fmul x86_fp80 %v7_e, %v7_e
  %v3_23 = fmul x86_fp80 %v7_14, %v7_14
  %v4_25 = fadd x86_fp80 %v3_1f, %v3_23
  %v3_29 = fmul x86_fp80 %v7_1a, %v7_1a
  store x86_fp80 %v3_29, x86_fp80* %st3.global-to-local, align 4
  %v4_2b = fadd x86_fp80 %v4_25, %v3_29
  store i3 %v3_1d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_2d = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_2b)
  store x86_fp80 %v2_2d, x86_fp80* %st4.global-to-local, align 4
  %v0_32 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_32 = call i16 @__asm_fnstsw(i32 %v0_32)
  %v2_32 = sext i16 %v1_32 to i32
  %v3_32 = load i32, i32* %eax.global-to-local, align 4
  %v4_32 = and i32 %v3_32, -65536
  %v1_34 = udiv i32 %v2_32, 256
  %v2_34 = trunc i32 %v1_34 to i8
  %v3_34 = and i8 %v2_34, 65
  %v4_34 = icmp eq i8 %v3_34, 0
  %v9_34 = zext i8 %v3_34 to i32
  %v11_34 = mul i32 %v9_34, 256
  %v2_32.masked = and i32 %v2_32, -65281
  %v12_34 = or i32 %v4_32, %v2_32.masked
  %v13_34 = or i32 %v12_34, %v11_34
  store i32 %v13_34, i32* %eax.global-to-local, align 4
  %v1_37 = icmp eq i1 %v4_34, false
  %v0_7a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_7a = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  br i1 %v1_37, label %dec_label_pc_7a, label %dec_label_pc_39

dec_label_pc_39:                                  ; preds = %dec_label_pc_0
  %v2_39 = add i3 %v0_7a, -1
  store i3 %v2_39, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v2_7a, x86_fp80* %st3.global-to-local, align 4
  %v2_3b = load i32, i32* %edi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, -40
  %v4_3b = inttoptr i32 %v3_3b to double*
  %v5_3b = load double, double* %v4_3b, align 4
  %v6_3b = fpext double %v5_3b to x86_fp80
  %v7_3b = fsub x86_fp80 %v2_7a, %v6_3b
  store x86_fp80 %v7_3b, x86_fp80* %st3.global-to-local, align 4
  %v0_44 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_44 = call i16 @__asm_fnstsw(i32 %v0_44)
  %v2_44 = sext i16 %v1_44 to i32
  %v3_44 = load i32, i32* %eax.global-to-local, align 4
  %v4_44 = and i32 %v3_44, -65536
  %v1_46 = udiv i32 %v2_44, 256
  %v2_46 = trunc i32 %v1_46 to i8
  %v3_46 = and i8 %v2_46, 65
  %v4_46 = icmp eq i8 %v3_46, 0
  %v9_46 = zext i8 %v3_46 to i32
  %v11_46 = mul i32 %v9_46, 256
  %v2_44.masked = and i32 %v2_44, -65281
  %v12_46 = or i32 %v4_44, %v2_44.masked
  %v13_46 = or i32 %v12_46, %v11_46
  store i32 %v13_46, i32* %eax.global-to-local, align 4
  br i1 %v4_46, label %dec_label_pc_39.dec_label_pc_5e_crit_edge, label %dec_label_pc_4b

dec_label_pc_39.dec_label_pc_5e_crit_edge:        ; preds = %dec_label_pc_39
  %v0_5e.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_5e.pre = load x86_fp80, x86_fp80* %st3.global-to-local, align 4
  %v3_5e.pre = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  br label %dec_label_pc_5e

dec_label_pc_4b:                                  ; preds = %dec_label_pc_39
  %v2_4b = load x86_fp80, x86_fp80* %st3.global-to-local, align 4
  %v3_4b = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  store x86_fp80 %v3_4b, x86_fp80* %st3.global-to-local, align 4
  store x86_fp80 %v2_4b, x86_fp80* %st4.global-to-local, align 4
  %v0_4d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v8_4f = add i3 %v0_4d, 1
  store i3 %v8_4f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_51 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_51 = call i16 @__asm_fnstsw(i32 %v0_51)
  %v2_51 = sext i16 %v1_51 to i32
  %v3_51 = load i32, i32* %eax.global-to-local, align 4
  %v4_51 = and i32 %v3_51, -65536
  %v1_53 = load i32, i32* %edi.global-to-local, align 4
  %v2_53 = inttoptr i32 %v1_53 to double*
  %v3_53 = load double, double* %v2_53, align 4
  %v4_53 = fpext double %v3_53 to x86_fp80
  store i3 %v0_4d, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_53, x86_fp80* %st3.global-to-local, align 4
  %v1_55 = udiv i32 %v2_51, 256
  %v2_55 = trunc i32 %v1_55 to i8
  %v3_55 = and i8 %v2_55, 65
  %v4_55 = icmp eq i8 %v3_55, 0
  %v9_55 = zext i8 %v3_55 to i32
  %v11_55 = mul i32 %v9_55, 256
  %v2_51.masked = and i32 %v2_51, -65281
  %v12_55 = or i32 %v4_51, %v2_51.masked
  %v13_55 = or i32 %v12_55, %v11_55
  store i32 %v13_55, i32* %eax.global-to-local, align 4
  %v1_58 = icmp eq i1 %v4_55, false
  br i1 %v1_58, label %dec_label_pc_5c, label %dec_label_pc_5a

dec_label_pc_5a:                                  ; preds = %dec_label_pc_4b
  %v2_5a = fsub x86_fp80 0xK80000000000000000000, %v4_53
  store x86_fp80 %v2_5a, x86_fp80* %st3.global-to-local, align 4
  br label %dec_label_pc_5c

dec_label_pc_5c:                                  ; preds = %dec_label_pc_5a, %dec_label_pc_4b
  %v2_5c = phi x86_fp80 [ %v2_5a, %dec_label_pc_5a ], [ %v4_53, %dec_label_pc_4b ]
  %v3_5c = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  store x86_fp80 %v3_5c, x86_fp80* %st3.global-to-local, align 4
  store x86_fp80 %v2_5c, x86_fp80* %st4.global-to-local, align 4
  br label %dec_label_pc_5e

dec_label_pc_5e:                                  ; preds = %dec_label_pc_39.dec_label_pc_5e_crit_edge, %dec_label_pc_5c
  %v3_5e = phi x86_fp80 [ %v3_5e.pre, %dec_label_pc_39.dec_label_pc_5e_crit_edge ], [ %v2_5c, %dec_label_pc_5c ]
  %v2_5e = phi x86_fp80 [ %v2_5e.pre, %dec_label_pc_39.dec_label_pc_5e_crit_edge ], [ %v3_5c, %dec_label_pc_5c ]
  %v0_5e = phi i3 [ %v0_5e.pre, %dec_label_pc_39.dec_label_pc_5e_crit_edge ], [ %v0_4d, %dec_label_pc_5c ]
  %v4_5e = fdiv x86_fp80 %v2_5e, %v3_5e
  store x86_fp80 %v4_5e, x86_fp80* %st4.global-to-local, align 4
  %v2_60 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_60 = fmul x86_fp80 %v4_5e, %v2_60
  store x86_fp80 %v4_60, x86_fp80* %st7.global-to-local, align 4
  %v2_62 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_62 = fmul x86_fp80 %v4_5e, %v2_62
  store x86_fp80 %v4_62, x86_fp80* %st6.global-to-local, align 4
  %v3_64 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v4_64 = fmul x86_fp80 %v4_5e, %v3_64
  store x86_fp80 %v4_64, x86_fp80* %st5.global-to-local, align 4
  %v2_66 = load i32, i32* %esi.global-to-local, align 4
  %v3_66 = add i32 %v2_66, 40
  %v4_66 = inttoptr i32 %v3_66 to double*
  %v5_66 = load double, double* %v4_66, align 4
  %v6_66 = fpext double %v5_66 to x86_fp80
  %v7_66 = fadd x86_fp80 %v4_64, %v6_66
  store x86_fp80 %v7_66, x86_fp80* %st5.global-to-local, align 4
  %v4_69 = fptrunc x86_fp80 %v7_66 to double
  store double %v4_69, double* %v4_66, align 4
  %v1_6c = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_6c = add i32 %v2_66, 32
  %v4_6c = inttoptr i32 %v3_6c to double*
  %v5_6c = load double, double* %v4_6c, align 4
  %v6_6c = fpext double %v5_6c to x86_fp80
  %v7_6c = fadd x86_fp80 %v1_6c, %v6_6c
  store x86_fp80 %v7_6c, x86_fp80* %st6.global-to-local, align 4
  %v4_6f = fptrunc x86_fp80 %v7_6c to double
  store double %v4_6f, double* %v4_6c, align 4
  %v6_6f = xor i3 %v0_5e, -4
  store i3 %v6_6f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_72 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_72 = add i32 %v2_66, 24
  %v4_72 = inttoptr i32 %v3_72 to double*
  %v5_72 = load double, double* %v4_72, align 4
  %v6_72 = fpext double %v5_72 to x86_fp80
  %v7_72 = fadd x86_fp80 %v1_72, %v6_72
  store x86_fp80 %v7_72, x86_fp80* %st7.global-to-local, align 4
  %v4_75 = fptrunc x86_fp80 %v7_72 to double
  store double %v4_75, double* %v4_72, align 4
  %v6_75 = add i3 %v0_5e, -3
  br label %dec_label_pc_7e

dec_label_pc_7a:                                  ; preds = %dec_label_pc_0
  %v7_7c = add i3 %v0_7a, 3
  store i3 %v7_7c, i3* %fpu_stat_TOP.global-to-local, align 1
  %v8_7c = xor i3 %v0_7a, -4
  br label %dec_label_pc_7e

dec_label_pc_7e:                                  ; preds = %dec_label_pc_7a, %dec_label_pc_5e
  %storemerge2 = phi i3 [ %v8_7c, %dec_label_pc_7a ], [ %v6_75, %dec_label_pc_5e ]
  store i3 %storemerge2, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_5, i32* %eax.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v0_5
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
