source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %stack_var_-12 = alloca i32, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %stack_var_-12, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_8 = load i32, i32* @eax, align 8
  store i32 %v0_8, i32* %ebx.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  %v1_10 = add i32 %v3_a, -64
  store i32 %v1_10, i32* %esi.global-to-local, align 4
  %v0_13 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_13 = add i32 %v3_a, -40
  %v3_13 = inttoptr i32 %v2_13 to double*
  %v4_13 = load double, double* %v3_13, align 4
  %v5_13 = fpext double %v4_13 to x86_fp80
  store x86_fp80 %v5_13, x86_fp80* %st7.global-to-local, align 4
  %v3_16 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_16 = fpext double %v3_16 to x86_fp80
  store x86_fp80 %v4_16, x86_fp80* %st6.global-to-local, align 4
  %v3_18 = add i32 %v3_a, -140
  %v4_18 = inttoptr i32 %v3_18 to double*
  %v5_18 = load double, double* %v4_18, align 4
  %v6_18 = fpext double %v5_18 to x86_fp80
  %v7_18 = fmul x86_fp80 %v4_16, %v6_18
  store x86_fp80 %v7_18, x86_fp80* %st6.global-to-local, align 4
  %v3_1b = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_1b = fpext double %v3_1b to x86_fp80
  %v3_1d = add i32 %v3_a, -132
  %v4_1d = inttoptr i32 %v3_1d to double*
  %v5_1d = load double, double* %v4_1d, align 4
  %v6_1d = fpext double %v5_1d to x86_fp80
  %v7_1d = fmul x86_fp80 %v4_1b, %v6_1d
  %v4_20 = fsub x86_fp80 %v7_18, %v7_1d
  store x86_fp80 %v4_20, x86_fp80* %st6.global-to-local, align 4
  %v5_24 = load double, double* %v4_1d, align 4
  %v6_24 = fpext double %v5_24 to x86_fp80
  %v7_24 = fmul x86_fp80 %v4_16, %v6_24
  %v5_27 = xor i3 %v0_13, -4
  %v5_29 = load double, double* %v4_18, align 4
  %v6_29 = fpext double %v5_29 to x86_fp80
  %v7_29 = fmul x86_fp80 %v4_1b, %v6_29
  %v4_2c = fadd x86_fp80 %v7_24, %v7_29
  %v3_34 = add i32 %v3_a, -124
  %v4_34 = inttoptr i32 %v3_34 to double*
  %v5_34 = load double, double* %v4_34, align 4
  %v6_34 = fpext double %v5_34 to x86_fp80
  %v7_34 = fmul x86_fp80 %v4_20, %v6_34
  %v3_37 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_37 = fpext double %v3_37 to x86_fp80
  %v3_39 = add i32 %v3_a, -116
  %v4_39 = inttoptr i32 %v3_39 to double*
  %v5_39 = load double, double* %v4_39, align 4
  %v6_39 = fpext double %v5_39 to x86_fp80
  %v7_39 = fmul x86_fp80 %v4_37, %v6_39
  %v4_3c = fsub x86_fp80 %v7_34, %v7_39
  store x86_fp80 %v4_3c, x86_fp80* %st6.global-to-local, align 4
  %v5_40 = load double, double* %v4_39, align 4
  %v6_40 = fpext double %v5_40 to x86_fp80
  %v7_40 = fmul x86_fp80 %v4_20, %v6_40
  %v5_45 = load double, double* %v4_34, align 4
  %v6_45 = fpext double %v5_45 to x86_fp80
  %v7_45 = fmul x86_fp80 %v4_37, %v6_45
  %v4_48 = fadd x86_fp80 %v7_40, %v7_45
  store x86_fp80 %v4_48, x86_fp80* %st6.global-to-local, align 4
  %v4_4e = fsub x86_fp80 %v4_3c, %v5_13
  %v2_50 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_4e)
  %v4_52 = fadd x86_fp80 %v4_3c, %v2_50
  %v4_56 = fadd x86_fp80 %v4_3c, %v5_13
  %v2_58 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_56)
  %v4_5a = fsub x86_fp80 %v2_58, %v4_52
  %v3_5e = add i32 %v3_a, -124
  %v4_5e = inttoptr i32 %v3_5e to double*
  %v5_5e = load double, double* %v4_5e, align 4
  %v6_5e = fpext double %v5_5e to x86_fp80
  %v7_5e = fmul x86_fp80 %v4_5a, %v6_5e
  %v3_61 = add i3 %v0_13, 3
  %v3_63 = add i32 %v3_a, -116
  %v4_63 = inttoptr i32 %v3_63 to double*
  %v5_63 = load double, double* %v4_63, align 4
  %v6_63 = fpext double %v5_63 to x86_fp80
  %v7_63 = fmul x86_fp80 %v4_48, %v6_63
  %v4_66 = fsub x86_fp80 %v7_5e, %v7_63
  %v3_6a = add i32 %v3_a, -140
  %v4_6a = inttoptr i32 %v3_6a to double*
  %v5_6a = load double, double* %v4_6a, align 4
  %v6_6a = fpext double %v5_6a to x86_fp80
  %v7_6a = fmul x86_fp80 %v4_66, %v6_6a
  %v3_71 = add i32 %v3_a, -132
  %v4_71 = inttoptr i32 %v3_71 to double*
  %v5_71 = load double, double* %v4_71, align 4
  %v6_71 = fpext double %v5_71 to x86_fp80
  %v7_71 = fmul x86_fp80 %v4_2c, %v6_71
  %v4_74 = fsub x86_fp80 %v7_6a, %v7_71
  %v7_78 = fmul x86_fp80 %v4_5a, %v6_63
  store x86_fp80 %v4_66, x86_fp80* %st6.global-to-local, align 4
  %v5_7f = load double, double* %v4_5e, align 4
  %v6_7f = fpext double %v5_7f to x86_fp80
  %v7_7f = fmul x86_fp80 %v4_48, %v6_7f
  %v4_82 = fadd x86_fp80 %v7_78, %v7_7f
  store x86_fp80 %v4_82, x86_fp80* %st6.global-to-local, align 4
  %v5_86 = load double, double* %v4_71, align 4
  %v6_86 = fpext double %v5_86 to x86_fp80
  %v7_86 = fmul x86_fp80 %v4_66, %v6_86
  %v5_8d = load double, double* %v4_6a, align 4
  %v6_8d = fpext double %v5_8d to x86_fp80
  %v7_8d = fmul x86_fp80 %v4_2c, %v6_8d
  %v4_90 = fadd x86_fp80 %v7_86, %v7_8d
  %v3_94 = add i32 %v3_a, -172
  %v4_94 = inttoptr i32 %v3_94 to double*
  %v5_94 = load double, double* %v4_94, align 4
  %v6_94 = fpext double %v5_94 to x86_fp80
  %v7_94 = fmul x86_fp80 %v4_82, %v6_94
  %v3_99 = add i32 %v3_a, -164
  %v4_99 = inttoptr i32 %v3_99 to double*
  %v5_99 = load double, double* %v4_99, align 4
  %v6_99 = fpext double %v5_99 to x86_fp80
  %v7_99 = fmul x86_fp80 %v4_90, %v6_99
  %v4_9c = fsub x86_fp80 %v7_94, %v7_99
  %v7_a0 = fmul x86_fp80 %v4_90, %v6_94
  store x86_fp80 %v7_a0, x86_fp80* %st6.global-to-local, align 4
  %v5_a5 = load double, double* %v4_99, align 4
  %v6_a5 = fpext double %v5_a5 to x86_fp80
  %v7_a5 = fmul x86_fp80 %v4_82, %v6_a5
  %v4_a8 = fadd x86_fp80 %v7_a0, %v7_a5
  store x86_fp80 %v4_a8, x86_fp80* %st6.global-to-local, align 4
  %v2_ac = load i32, i32* %esi.global-to-local, align 4
  %v3_ac = add i32 %v2_ac, -92
  %v4_ac = inttoptr i32 %v3_ac to double*
  %v5_ac = load double, double* %v4_ac, align 4
  %v6_ac = fpext double %v5_ac to x86_fp80
  %v7_ac = fmul x86_fp80 %v4_9c, %v6_ac
  %v3_b1 = add i32 %v2_ac, -84
  %v4_b1 = inttoptr i32 %v3_b1 to double*
  %v5_b1 = load double, double* %v4_b1, align 4
  %v6_b1 = fpext double %v5_b1 to x86_fp80
  %v7_b1 = fmul x86_fp80 %v4_74, %v6_b1
  %v4_b4 = fsub x86_fp80 %v7_ac, %v7_b1
  %v7_b8 = fmul x86_fp80 %v4_74, %v6_ac
  %v7_bd = fmul x86_fp80 %v4_9c, %v6_b1
  %v4_c0 = fadd x86_fp80 %v7_b8, %v7_bd
  %v3_c6 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_c6 = fsub x86_fp80 %v4_b4, %v3_c6
  %v2_c8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_c6)
  %v4_ca = fadd x86_fp80 %v4_b4, %v2_c8
  %v4_ce = fadd x86_fp80 %v3_c6, %v4_b4
  %v2_d0 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_ce)
  %v4_d2 = fsub x86_fp80 %v2_d0, %v4_ca
  %v4_ef = fmul x86_fp80 %v4_d2, %v6_b1
  %v7_f3 = fmul x86_fp80 %v4_c0, %v6_ac
  %v4_f6 = fadd x86_fp80 %v7_f3, %v4_ef
  store x86_fp80 %v4_f6, x86_fp80* %st6.global-to-local, align 4
  store i3 %v5_27, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_114 = add i32 %v2_ac, -112
  %v2_114 = inttoptr i32 %v1_114 to i32*
  %v3_114 = load i32, i32* %v2_114, align 4
  store i32 %v3_114, i32* @eax, align 8
  %v1_12e = urem i32 %v3_114, 2
  %v2_12e = icmp eq i32 %v1_12e, 0
  br i1 %v2_12e, label %dec_label_pc_13b, label %dec_label_pc_135

dec_label_pc_135:                                 ; preds = %dec_label_pc_0
  %v2_137 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v3_c6)
  store x86_fp80 %v2_137, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_13b

dec_label_pc_13b:                                 ; preds = %dec_label_pc_0, %dec_label_pc_135
  %v1_13b = phi x86_fp80 [ %v2_137, %dec_label_pc_135 ], [ %v3_c6, %dec_label_pc_0 ]
  %v3_13b = add i32 %v2_ac, -36
  %v4_13b = inttoptr i32 %v3_13b to double*
  %v5_13b = load double, double* %v4_13b, align 4
  %v6_13b = fpext double %v5_13b to x86_fp80
  %v7_13b = fadd x86_fp80 %v1_13b, %v6_13b
  store x86_fp80 %v7_13b, x86_fp80* %st7.global-to-local, align 4
  %v2_13e = add i32 %v2_ac, -28
  %v3_13e = inttoptr i32 %v2_13e to double*
  %v4_13e = load double, double* %v3_13e, align 4
  %v5_13e = fpext double %v4_13e to x86_fp80
  store x86_fp80 %v5_13e, x86_fp80* %st6.global-to-local, align 4
  %v4_141 = fadd x86_fp80 %v7_13b, %v5_13e
  store x86_fp80 %v4_141, x86_fp80* %st7.global-to-local, align 4
  %v2_143 = add i32 %v2_ac, -20
  %v3_143 = inttoptr i32 %v2_143 to double*
  %v4_143 = load double, double* %v3_143, align 4
  %v5_143 = fpext double %v4_143 to x86_fp80
  %v4_146 = fadd x86_fp80 %v4_141, %v5_143
  store x86_fp80 %v4_146, x86_fp80* %st7.global-to-local, align 4
  %v3_14a = fmul x86_fp80 %v4_146, %v4_146
  %v4_150 = fadd x86_fp80 %v3_14a, %v3_14a
  %v4_156 = fadd x86_fp80 %v3_14a, %v4_150
  store x86_fp80 %v4_156, x86_fp80* %st6.global-to-local, align 4
  store i3 %v3_61, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_158 = add i32 %v2_ac, -44
  %v4_158 = inttoptr i32 %v3_158 to double*
  %v5_158 = load double, double* %v4_158, align 4
  %v6_158 = fpext double %v5_158 to x86_fp80
  %v7_158 = fmul x86_fp80 %v4_156, %v6_158
  store x86_fp80 %v7_158, x86_fp80* %st6.global-to-local, align 4
  %v0_15e = call i32 @__asm_wait()
  store i32 %v0_15e, i32* @eax, align 8
  %v0_15f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_15f = call i16 @__asm_fnstsw(i32 %v0_15f)
  %v2_15f = sext i16 %v1_15f to i32
  %v3_15f = load i32, i32* @eax, align 8
  %v4_15f = and i32 %v3_15f, -65536
  %tmp259 = udiv i32 %v2_15f, 2
  %v12_161 = and i32 %tmp259, 32512
  %v2_15f.masked = and i32 %v2_15f, -65281
  %v13_161 = or i32 %v4_15f, %v2_15f.masked
  %v14_161 = or i32 %v13_161, %v12_161
  store i32 %v14_161, i32* @eax, align 8
  %v15_16112 = and i32 %v2_15f, 256
  %v16_161 = icmp ne i32 %v15_16112, 0
  %v1_163 = icmp eq i1 %v16_161, false
  %v0_16c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_163, label %dec_label_pc_16c, label %dec_label_pc_165

dec_label_pc_165:                                 ; preds = %dec_label_pc_13b
  %v1_167 = load i32, i32* %esi.global-to-local, align 4
  %v2_167 = add i32 %v1_167, 40
  %v3_167 = inttoptr i32 %v2_167 to double*
  %v4_167 = load double, double* %v3_167, align 4
  %v5_167 = fpext double %v4_167 to x86_fp80
  store x86_fp80 %v5_167, x86_fp80* %st6.global-to-local, align 4
  %.pre = add i32 %v1_167, 48
  %.pre18 = inttoptr i32 %.pre to double*
  br label %dec_label_pc_183

dec_label_pc_16c:                                 ; preds = %dec_label_pc_13b
  %v1_16c = add i3 %v0_16c, -1
  store i3 %v1_16c, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_170 = call i32 @__asm_wait()
  store i32 %v0_170, i32* @eax, align 8
  %v0_171 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_171 = call i16 @__asm_fnstsw(i32 %v0_171)
  %v2_171 = sext i16 %v1_171 to i32
  %v3_171 = load i32, i32* @eax, align 8
  %v4_171 = and i32 %v3_171, -65536
  %tmp260 = udiv i32 %v2_171, 2
  %v12_173 = and i32 %tmp260, 32512
  %v2_171.masked = and i32 %v2_171, -65281
  %v13_173 = or i32 %v4_171, %v2_171.masked
  %v14_173 = or i32 %v13_173, %v12_173
  store i32 %v14_173, i32* @eax, align 8
  %v15_17313 = and i32 %v2_171, 256
  %v16_173 = icmp eq i32 %v15_17313, 0
  %v0_17e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_177 = add i3 %v0_17e, 1
  br i1 %v16_173, label %dec_label_pc_177, label %dec_label_pc_17e

dec_label_pc_177:                                 ; preds = %dec_label_pc_16c
  %v2_17e = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_177, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_179 = load i32, i32* %esi.global-to-local, align 4
  %v3_179 = add i32 %v2_179, 48
  %v4_179 = inttoptr i32 %v3_179 to double*
  %v5_179 = load double, double* %v4_179, align 4
  %v6_179 = fpext double %v5_179 to x86_fp80
  %v7_179 = fdiv x86_fp80 %v6_179, %v2_17e
  store x86_fp80 %v7_179, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_183

dec_label_pc_17e:                                 ; preds = %dec_label_pc_16c
  %v1_180 = load i32, i32* %esi.global-to-local, align 4
  %v2_180 = add i32 %v1_180, 48
  %v3_180 = inttoptr i32 %v2_180 to double*
  %v4_180 = load double, double* %v3_180, align 4
  %v5_180 = fpext double %v4_180 to x86_fp80
  store i3 %v4_177, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_180, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_183

dec_label_pc_183:                                 ; preds = %dec_label_pc_17e, %dec_label_pc_177, %dec_label_pc_165
  %v3_191.pre-phi = phi double* [ %v3_180, %dec_label_pc_17e ], [ %v4_179, %dec_label_pc_177 ], [ %.pre18, %dec_label_pc_165 ]
  %v2_1c3 = phi i32 [ %v1_180, %dec_label_pc_17e ], [ %v2_179, %dec_label_pc_177 ], [ %v1_167, %dec_label_pc_165 ]
  %v0_183 = phi i3 [ %v4_177, %dec_label_pc_17e ], [ %v4_177, %dec_label_pc_177 ], [ %v0_16c, %dec_label_pc_165 ]
  %v1_183 = load i32, i32* @ecx, align 8
  %v2_183 = add i32 %v1_183, 8
  %v3_183 = inttoptr i32 %v2_183 to double*
  %v4_183 = load double, double* %v3_183, align 4
  %v5_183 = fpext double %v4_183 to x86_fp80
  %v3_186 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_186 = fmul x86_fp80 %v3_186, %v5_183
  %v4_188 = fptrunc x86_fp80 %v4_186 to double
  store double %v4_188, double* %v3_183, align 4
  %v2_18b = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_18b = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_18b = fmul x86_fp80 %v2_18b, %v3_18b
  %v4_18d = fmul x86_fp80 %v4_18b, %v4_18b
  %v4_18f = fmul x86_fp80 %v4_18d, %v4_18d
  store x86_fp80 %v4_18f, x86_fp80* %st7.global-to-local, align 4
  %v4_191 = load double, double* %v3_191.pre-phi, align 4
  %v5_191 = fpext double %v4_191 to x86_fp80
  store x86_fp80 %v5_191, x86_fp80* %st7.global-to-local, align 4
  %v2_194 = add i32 %v2_1c3, -36
  %v3_194 = inttoptr i32 %v2_194 to double*
  %v4_194 = load double, double* %v3_194, align 4
  %v5_194 = fpext double %v4_194 to x86_fp80
  %v4_197 = fmul x86_fp80 %v5_191, %v5_194
  store x86_fp80 %v4_197, x86_fp80* %st6.global-to-local, align 4
  %v4_199 = fsub x86_fp80 %v5_191, %v4_197
  store x86_fp80 %v4_199, x86_fp80* %st7.global-to-local, align 4
  %v2_19b = add i32 %v2_1c3, -28
  %v3_19b = inttoptr i32 %v2_19b to double*
  %v4_19b = load double, double* %v3_19b, align 4
  %v5_19b = fpext double %v4_19b to x86_fp80
  %v4_19e = fmul x86_fp80 %v4_199, %v5_19b
  store x86_fp80 %v4_19e, x86_fp80* %st6.global-to-local, align 4
  %v4_1a0 = fsub x86_fp80 %v4_199, %v4_19e
  store x86_fp80 %v4_1a0, x86_fp80* %st7.global-to-local, align 4
  %v3_1a2 = add i32 %v2_1c3, -20
  %v4_1a2 = inttoptr i32 %v3_1a2 to double*
  %v5_1a2 = load double, double* %v4_1a2, align 4
  %v6_1a2 = fpext double %v5_1a2 to x86_fp80
  %v7_1a2 = fmul x86_fp80 %v4_1a0, %v6_1a2
  %v4_1a5 = fsub x86_fp80 %v7_1a2, %v7_1a2
  store x86_fp80 %v4_1a5, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_1a5, x86_fp80* %st6.global-to-local, align 4
  %v3_1ab = add i32 %v2_1c3, -4
  %v4_1ab = inttoptr i32 %v3_1ab to float*
  %v5_1ab = load float, float* %v4_1ab, align 4
  %v6_1ab = fpext float %v5_1ab to x86_fp80
  %v7_1ab = fmul x86_fp80 %v4_1a5, %v6_1ab
  store x86_fp80 %v7_1ab, x86_fp80* %st6.global-to-local, align 4
  %v3_1b0 = add i32 %v2_1c3, -8
  %v4_1b0 = inttoptr i32 %v3_1b0 to float*
  %v5_1b0 = load float, float* %v4_1b0, align 4
  %v6_1b0 = fpext float %v5_1b0 to x86_fp80
  %v7_1b0 = fmul x86_fp80 %v4_1a5, %v6_1b0
  %v4_1b3 = fadd x86_fp80 %v7_1ab, %v7_1b0
  store x86_fp80 %v4_1b3, x86_fp80* %st6.global-to-local, align 4
  %v3_1b7 = add i32 %v2_1c3, -12
  %v4_1b7 = inttoptr i32 %v3_1b7 to float*
  %v5_1b7 = load float, float* %v4_1b7, align 4
  %v6_1b7 = fpext float %v5_1b7 to x86_fp80
  %v7_1b7 = fmul x86_fp80 %v4_1a5, %v6_1b7
  %v4_1ba = fadd x86_fp80 %v4_1b3, %v7_1b7
  store x86_fp80 %v4_1ba, x86_fp80* %st6.global-to-local, align 4
  %v3_1be = add i32 %v2_1c3, 20
  %v4_1be = inttoptr i32 %v3_1be to float*
  %v5_1be = load float, float* %v4_1be, align 4
  %v6_1be = fpext float %v5_1be to x86_fp80
  %v7_1be = fmul x86_fp80 %v4_1a5, %v6_1be
  %v3_1c3 = add i32 %v2_1c3, 16
  %v4_1c3 = inttoptr i32 %v3_1c3 to float*
  %v5_1c3 = load float, float* %v4_1c3, align 4
  %v6_1c3 = fpext float %v5_1c3 to x86_fp80
  %v7_1c3 = fmul x86_fp80 %v4_1a5, %v6_1c3
  %v4_1c6 = fadd x86_fp80 %v7_1be, %v7_1c3
  %v3_1ca = add i32 %v2_1c3, 12
  %v4_1ca = inttoptr i32 %v3_1ca to float*
  %v5_1ca = load float, float* %v4_1ca, align 4
  %v6_1ca = fpext float %v5_1ca to x86_fp80
  %v7_1ca = fmul x86_fp80 %v4_1a5, %v6_1ca
  %v4_1cd = fadd x86_fp80 %v7_1ca, %v4_1c6
  store x86_fp80 %v4_1cd, x86_fp80* %st7.global-to-local, align 4
  %v3_1d1 = add i32 %v2_1c3, 8
  %v4_1d1 = inttoptr i32 %v3_1d1 to float*
  %v5_1d1 = load float, float* %v4_1d1, align 4
  %v6_1d1 = fpext float %v5_1d1 to x86_fp80
  %v7_1d1 = fmul x86_fp80 %v4_1a5, %v6_1d1
  store x86_fp80 %v7_1d1, x86_fp80* %st7.global-to-local, align 4
  %v3_1d6 = add i32 %v2_1c3, 4
  %v4_1d6 = inttoptr i32 %v3_1d6 to float*
  %v5_1d6 = load float, float* %v4_1d6, align 4
  %v6_1d6 = fpext float %v5_1d6 to x86_fp80
  %v7_1d6 = fmul x86_fp80 %v7_1d1, %v6_1d6
  %v4_1d9 = fadd x86_fp80 %v7_1d6, %v7_1d6
  store x86_fp80 %v4_1d9, x86_fp80* %st7.global-to-local, align 4
  %v3_1dd = inttoptr i32 %v2_1c3 to float*
  %v4_1dd = load float, float* %v3_1dd, align 4
  %v5_1dd = fpext float %v4_1dd to x86_fp80
  %v6_1dd = fmul x86_fp80 %v4_1d9, %v5_1dd
  %v4_1e2 = fadd x86_fp80 %v6_1dd, %v6_1dd
  store x86_fp80 %v4_1e2, x86_fp80* %st7.global-to-local, align 4
  %v3_1e4 = add i32 %arg1, 24
  %v4_1e4 = inttoptr i32 %v3_1e4 to double*
  %v5_1e4 = load double, double* %v4_1e4, align 4
  %v6_1e4 = fpext double %v5_1e4 to x86_fp80
  %v7_1e4 = fadd x86_fp80 %v4_1e2, %v6_1e4
  store x86_fp80 %v7_1e4, x86_fp80* %st7.global-to-local, align 4
  %v2_1e7 = load i32, i32* %ebx.global-to-local, align 4
  %v3_1e7 = fptrunc x86_fp80 %v7_1e4 to double
  %v4_1e7 = inttoptr i32 %v2_1e7 to double*
  store double %v3_1e7, double* %v4_1e7, align 4
  %v1_1e9 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_1e9 = add i32 %arg1, 32
  %v4_1e9 = inttoptr i32 %v3_1e9 to double*
  %v5_1e9 = load double, double* %v4_1e9, align 4
  %v6_1e9 = fpext double %v5_1e9 to x86_fp80
  %v7_1e9 = fadd x86_fp80 %v1_1e9, %v6_1e9
  store x86_fp80 %v7_1e9, x86_fp80* %st7.global-to-local, align 4
  %v2_1ec = load i32, i32* @edx, align 8
  %v3_1ec = fptrunc x86_fp80 %v7_1e9 to double
  %v4_1ec = inttoptr i32 %v2_1ec to double*
  store double %v3_1ec, double* %v4_1ec, align 4
  %v1_1ee = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_1ee = add i32 %arg1, 40
  %v4_1ee = inttoptr i32 %v3_1ee to double*
  %v5_1ee = load double, double* %v4_1ee, align 4
  %v6_1ee = fpext double %v5_1ee to x86_fp80
  %v7_1ee = fadd x86_fp80 %v1_1ee, %v6_1ee
  store x86_fp80 %v7_1ee, x86_fp80* %st7.global-to-local, align 4
  %v2_1f1 = load i32, i32* @ecx, align 8
  %v3_1f1 = fptrunc x86_fp80 %v7_1ee to double
  %v4_1f1 = inttoptr i32 %v2_1f1 to double*
  store double %v3_1f1, double* %v4_1f1, align 4
  %v4_1f3 = add i3 %v0_183, -3
  store i3 %v4_1f3, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_1e7, i32* @eax, align 8
  %v2_1fa = load i32, i32* %stack_var_-12, align 4
  store i32 %v2_1fa, i32* %ebx.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v2_1e7
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
