source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@st5 = internal unnamed_addr global x86_fp80 0xK00000000000000000000
@st7 = internal unnamed_addr global x86_fp80 0xK00000000000000000000
@fpu_stat_TOP = internal unnamed_addr global i3 0
@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st4.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %edi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %esi.global-to-local, align 4
  %v1_e = add i32 %arg1, 128
  store i32 %v1_e, i32* %edi.global-to-local, align 4
  %v1_14 = add i32 %arg1, 208
  %v2_14 = inttoptr i32 %v1_14 to i32*
  %v3_14 = load i32, i32* %v2_14, align 4
  %v10_14 = icmp eq i32 %v3_14, 0
  %v11_14 = icmp slt i32 %v3_14, 0
  %v3_18 = icmp eq i1 %v11_14, false
  %v4_18 = icmp eq i1 %v10_14, false
  %v5_18 = icmp eq i1 %v3_18, %v4_18
  br i1 %v5_18, label %dec_label_pc_0.dec_label_pc_23_crit_edge, label %dec_label_pc_1a

dec_label_pc_0.dec_label_pc_23_crit_edge:         ; preds = %dec_label_pc_0
  %v0_23.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %.pre = add i32 %arg1, 200
  %.pre46 = inttoptr i32 %.pre to double*
  %v4_23.pre = load double, double* %.pre46, align 4
  %.pre298 = fpext double %v4_23.pre to x86_fp80
  br label %dec_label_pc_23

dec_label_pc_1a:                                  ; preds = %dec_label_pc_0
  %v4_1a = add i32 %v3_14, 1
  store i32 %v4_1a, i32* %v2_14, align 4
  %v0_1d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_1d = load i32, i32* %esi.global-to-local, align 4
  %v2_1d = add i32 %v1_1d, -16
  %v3_1d = inttoptr i32 %v2_1d to double*
  %v4_1d = load double, double* %v3_1d, align 4
  %v5_1d = fpext double %v4_1d to x86_fp80
  store x86_fp80 %v5_1d, x86_fp80* %st7.global-to-local, align 4
  %v2_20 = load i32, i32* %edi.global-to-local, align 4
  %v3_20 = add i32 %v2_20, 72
  %v5_20 = inttoptr i32 %v3_20 to double*
  store double %v4_1d, double* %v5_20, align 4
  br label %dec_label_pc_23

dec_label_pc_23:                                  ; preds = %dec_label_pc_0.dec_label_pc_23_crit_edge, %dec_label_pc_1a
  %v5_23.pre-phi = phi x86_fp80 [ %.pre298, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_1d, %dec_label_pc_1a ]
  %v3_23.pre-phi = phi double* [ %.pre46, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_20, %dec_label_pc_1a ]
  %v1_36 = phi i32 [ %v3_b, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v1_1d, %dec_label_pc_1a ]
  %v0_23 = phi i3 [ %v0_23.pre, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v0_1d, %dec_label_pc_1a ]
  store x86_fp80 %v5_23.pre-phi, x86_fp80* %st7.global-to-local, align 4
  %v2_2a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v5_23.pre-phi)
  %v4_2c = fadd x86_fp80 %v2_2a, 0xKBFFF8000000000000000
  %v3_2e = add i32 %v1_36, -48
  %v4_2e = inttoptr i32 %v3_2e to double*
  %v5_2e = load double, double* %v4_2e, align 4
  %v6_2e = fpext double %v5_2e to x86_fp80
  %v7_2e = fmul x86_fp80 %v4_2c, %v6_2e
  %v4_31 = fadd x86_fp80 %v7_2e, %v5_23.pre-phi
  store x86_fp80 %v4_31, x86_fp80* %st7.global-to-local, align 4
  %v4_33 = fptrunc x86_fp80 %v4_31 to double
  store double %v4_33, double* %v3_23.pre-phi, align 4
  %v2_36 = add i32 %v1_36, -40
  %v3_36 = inttoptr i32 %v2_36 to double*
  %v4_36 = load double, double* %v3_36, align 4
  %v5_36 = fpext double %v4_36 to x86_fp80
  %v4_3d = fadd x86_fp80 %v5_36, %v5_36
  store x86_fp80 %v4_3d, x86_fp80* %st7.global-to-local, align 4
  %v3_41 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_41 = fpext double %v3_41 to x86_fp80
  %v5_41 = xor i3 %v0_23, -4
  store i3 %v5_41, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_41, x86_fp80* %st4.global-to-local, align 4
  %v0_45 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_45 = call i16 @__asm_fnstsw(i32 %v0_45)
  %v2_45 = sext i16 %v1_45 to i32
  %v3_45 = load i32, i32* @eax, align 8
  %v4_45 = and i32 %v3_45, -65536
  %tmp299 = udiv i32 %v2_45, 2
  %v12_47 = and i32 %tmp299, 32512
  %v2_45.masked = and i32 %v2_45, -65281
  %v13_47 = or i32 %v4_45, %v2_45.masked
  %v14_47 = or i32 %v13_47, %v12_47
  store i32 %v14_47, i32* @eax, align 8
  %v15_47289 = and i32 %v2_45, 256
  %v16_47 = icmp eq i32 %v15_47289, 0
  %v2_51 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_47, label %dec_label_pc_4b, label %dec_label_pc_51

dec_label_pc_4b:                                  ; preds = %dec_label_pc_23
  %v2_4b = fsub x86_fp80 0xK80000000000000000000, %v2_51
  %v4_4d = fsub x86_fp80 %v2_4b, %v2_51
  store x86_fp80 %v4_4d, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_5d

dec_label_pc_51:                                  ; preds = %dec_label_pc_23
  %v0_53 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_53 = call i16 @__asm_fnstsw(i32 %v0_53)
  %v2_53 = sext i16 %v1_53 to i32
  %v3_53 = load i32, i32* @eax, align 8
  %v4_53 = and i32 %v3_53, -65536
  %tmp300 = udiv i32 %v2_53, 2
  %v12_55 = and i32 %tmp300, 32512
  %v2_53.masked = and i32 %v2_53, -65281
  %v13_55 = or i32 %v4_53, %v2_53.masked
  %v14_55 = or i32 %v13_55, %v12_55
  store i32 %v14_55, i32* @eax, align 8
  %v15_55290 = and i32 %v2_53, 256
  %v16_55 = icmp ne i32 %v15_55290, 0
  %v1_57 = icmp eq i1 %v16_55, false
  br i1 %v1_57, label %dec_label_pc_5d, label %dec_label_pc_59

dec_label_pc_59:                                  ; preds = %dec_label_pc_51
  %v1_59 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_5b = fsub x86_fp80 %v1_59, %v1_59
  store x86_fp80 %v4_5b, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_5d

dec_label_pc_5d:                                  ; preds = %dec_label_pc_59, %dec_label_pc_51, %dec_label_pc_4b
  %v0_5d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_5d = add i3 %v0_5d, -1
  store i3 %v5_5d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_61 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_61 = call i16 @__asm_fnstsw(i32 %v0_61)
  %v2_61 = sext i16 %v1_61 to i32
  %v3_61 = load i32, i32* @eax, align 8
  %v4_61 = and i32 %v3_61, -65536
  %tmp301 = udiv i32 %v2_61, 2
  %v12_63 = and i32 %tmp301, 32512
  %v2_61.masked = and i32 %v2_61, -65281
  %v13_63 = or i32 %v4_61, %v2_61.masked
  %v14_63 = or i32 %v13_63, %v12_63
  store i32 %v14_63, i32* @eax, align 8
  %v15_63291 = and i32 %v2_61, 256
  %v16_63 = icmp eq i32 %v15_63291, 0
  %v2_6d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_63, label %dec_label_pc_67, label %dec_label_pc_6d

dec_label_pc_67:                                  ; preds = %dec_label_pc_5d
  %v2_67 = fsub x86_fp80 0xK80000000000000000000, %v2_6d
  %v4_69 = fsub x86_fp80 %v2_67, %v2_6d
  store x86_fp80 %v4_69, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_79

dec_label_pc_6d:                                  ; preds = %dec_label_pc_5d
  %v0_6f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_6f = call i16 @__asm_fnstsw(i32 %v0_6f)
  %v2_6f = sext i16 %v1_6f to i32
  %v3_6f = load i32, i32* @eax, align 8
  %v4_6f = and i32 %v3_6f, -65536
  %tmp302 = udiv i32 %v2_6f, 2
  %v12_71 = and i32 %tmp302, 32512
  %v2_6f.masked = and i32 %v2_6f, -65281
  %v13_71 = or i32 %v4_6f, %v2_6f.masked
  %v14_71 = or i32 %v13_71, %v12_71
  store i32 %v14_71, i32* @eax, align 8
  %v15_71292 = and i32 %v2_6f, 256
  %v16_71 = icmp ne i32 %v15_71292, 0
  %v1_73 = icmp eq i1 %v16_71, false
  br i1 %v1_73, label %dec_label_pc_79, label %dec_label_pc_75

dec_label_pc_75:                                  ; preds = %dec_label_pc_6d
  %v1_75 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_77 = fsub x86_fp80 %v1_75, %v1_75
  store x86_fp80 %v4_77, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_79

dec_label_pc_79:                                  ; preds = %dec_label_pc_75, %dec_label_pc_6d, %dec_label_pc_67
  %v0_79 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_79 = add i3 %v0_79, -1
  store i3 %v5_79, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_7d = load i32, i32* %fpsw.global-to-local, align 4
  %v1_7d = call i16 @__asm_fnstsw(i32 %v0_7d)
  %v2_7d = sext i16 %v1_7d to i32
  %v3_7d = load i32, i32* @eax, align 8
  %v4_7d = and i32 %v3_7d, -65536
  %tmp303 = udiv i32 %v2_7d, 2
  %v12_7f = and i32 %tmp303, 32512
  %v2_7d.masked = and i32 %v2_7d, -65281
  %v13_7f = or i32 %v4_7d, %v2_7d.masked
  %v14_7f = or i32 %v13_7f, %v12_7f
  store i32 %v14_7f, i32* @eax, align 8
  %v15_7f293 = and i32 %v2_7d, 256
  %v16_7f = icmp eq i32 %v15_7f293, 0
  %v2_89 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_7f, label %dec_label_pc_83, label %dec_label_pc_89

dec_label_pc_83:                                  ; preds = %dec_label_pc_79
  %v2_83 = fsub x86_fp80 0xK80000000000000000000, %v2_89
  %v4_85 = fsub x86_fp80 %v2_83, %v2_89
  store x86_fp80 %v4_85, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_95

dec_label_pc_89:                                  ; preds = %dec_label_pc_79
  %v0_8b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_8b = call i16 @__asm_fnstsw(i32 %v0_8b)
  %v2_8b = sext i16 %v1_8b to i32
  %v3_8b = load i32, i32* @eax, align 8
  %v4_8b = and i32 %v3_8b, -65536
  %tmp304 = udiv i32 %v2_8b, 2
  %v12_8d = and i32 %tmp304, 32512
  %v2_8b.masked = and i32 %v2_8b, -65281
  %v13_8d = or i32 %v4_8b, %v2_8b.masked
  %v14_8d = or i32 %v13_8d, %v12_8d
  store i32 %v14_8d, i32* @eax, align 8
  %v15_8d294 = and i32 %v2_8b, 256
  %v16_8d = icmp ne i32 %v15_8d294, 0
  %v1_8f = icmp eq i1 %v16_8d, false
  %v2_95.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_8f, label %dec_label_pc_95, label %dec_label_pc_91

dec_label_pc_91:                                  ; preds = %dec_label_pc_89
  %v4_93 = fsub x86_fp80 %v2_95.pre, %v2_95.pre
  store x86_fp80 %v4_93, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_95

dec_label_pc_95:                                  ; preds = %dec_label_pc_89, %dec_label_pc_91, %dec_label_pc_83
  %v2_95 = phi x86_fp80 [ %v4_93, %dec_label_pc_91 ], [ %v4_85, %dec_label_pc_83 ], [ %v2_95.pre, %dec_label_pc_89 ]
  %v0_97 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_97 = add i3 %v0_97, 1
  store x86_fp80 %v2_95, x86_fp80* @st7, align 4
  store i3 %v4_97, i3* @fpu_stat_TOP, align 1
  %v0_a6 = call x86_fp80 @function_117()
  store x86_fp80 %v0_a6, x86_fp80* @st7, align 4
  %v1_a6 = fptrunc x86_fp80 %v0_a6 to float
  %v2_a6 = bitcast float %v1_a6 to i32
  store i32 %v2_a6, i32* @eax, align 8
  %v0_ab = load i3, i3* @fpu_stat_TOP, align 1
  %v1_ad = load i32, i32* %esi.global-to-local, align 4
  %v2_ad = add i32 %v1_ad, -64
  %v3_ad = inttoptr i32 %v2_ad to double*
  %v4_ad = load double, double* %v3_ad, align 4
  %v5_ad = fpext double %v4_ad to x86_fp80
  %v6_ad = add i3 %v0_ab, -2
  store i3 %v6_ad, i3* @fpu_stat_TOP, align 1
  store x86_fp80 %v5_ad, x86_fp80* %st4.global-to-local, align 4
  %v0_b0 = call x86_fp80 @function_117()
  store x86_fp80 %v0_b0, x86_fp80* @st7, align 4
  %v1_b0 = fptrunc x86_fp80 %v0_b0 to float
  %v2_b0 = bitcast float %v1_b0 to i32
  store i32 %v2_b0, i32* @eax, align 8
  %v0_b5 = load i3, i3* @fpu_stat_TOP, align 1
  store x86_fp80 %v0_b0, x86_fp80* %st4.global-to-local, align 4
  %v1_b9 = load i32, i32* %esi.global-to-local, align 4
  %v2_b9 = add i32 %v1_b9, -64
  %v3_b9 = inttoptr i32 %v2_b9 to double*
  %v4_b9 = load double, double* %v3_b9, align 4
  %v5_b9 = fpext double %v4_b9 to x86_fp80
  %v6_b9 = add i3 %v0_b5, -1
  store i3 %v6_b9, i3* @fpu_stat_TOP, align 1
  %v0_bc = call x86_fp80 @function_117()
  store x86_fp80 %v0_bc, x86_fp80* @st7, align 4
  %v1_bc = fptrunc x86_fp80 %v0_bc to float
  %v2_bc = bitcast float %v1_bc to i32
  store i32 %v2_bc, i32* @eax, align 8
  %v3_c1 = load x86_fp80, x86_fp80* %st4.global-to-local, align 4
  %v4_c1 = fadd x86_fp80 %v3_c1, %v5_b9
  store x86_fp80 %v4_c1, x86_fp80* %st4.global-to-local, align 4
  %v0_c6 = call x86_fp80 @function_117()
  store x86_fp80 %v0_c6, x86_fp80* %st7.global-to-local, align 4
  %v1_c6 = fptrunc x86_fp80 %v0_c6 to float
  %v2_c6 = bitcast float %v1_c6 to i32
  store i32 %v2_c6, i32* @eax, align 8
  %v0_ce = load i32, i32* %fpsw.global-to-local, align 4
  %v1_ce = call i16 @__asm_fnstsw(i32 %v0_ce)
  %v2_ce = sext i16 %v1_ce to i32
  %v3_ce = load i32, i32* @eax, align 8
  %v4_ce = and i32 %v3_ce, -65536
  %tmp305 = udiv i32 %v2_ce, 2
  %v12_d0 = and i32 %tmp305, 32512
  %v2_ce.masked = and i32 %v2_ce, -65281
  %v13_d0 = or i32 %v4_ce, %v2_ce.masked
  %v14_d0 = or i32 %v13_d0, %v12_d0
  store i32 %v14_d0, i32* @eax, align 8
  %v15_d0295 = and i32 %v2_ce, 256
  %v16_d0 = icmp ne i32 %v15_d0295, 0
  %v1_d2 = icmp eq i1 %v16_d0, false
  %v0_db = load i3, i3* @fpu_stat_TOP, align 1
  br i1 %v1_d2, label %dec_label_pc_db, label %dec_label_pc_d4

dec_label_pc_d4:                                  ; preds = %dec_label_pc_95
  %v1_d6 = load i32, i32* %esi.global-to-local, align 4
  %v2_d6 = add i32 %v1_d6, -24
  %v3_d6 = inttoptr i32 %v2_d6 to double*
  %v4_d6 = load double, double* %v3_d6, align 4
  %v5_d6 = fpext double %v4_d6 to x86_fp80
  store x86_fp80 %v5_d6, x86_fp80* %st7.global-to-local, align 4
  %v2_ff.pre = load i32, i32* %edi.global-to-local, align 4
  br label %dec_label_pc_f1

dec_label_pc_db:                                  ; preds = %dec_label_pc_95
  %v1_db = add i3 %v0_db, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v1_db, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_df = load i32, i32* %fpsw.global-to-local, align 4
  %v1_df = call i16 @__asm_fnstsw(i32 %v0_df)
  %v2_df = sext i16 %v1_df to i32
  %v3_df = load i32, i32* @eax, align 8
  %v4_df = and i32 %v3_df, -65536
  %tmp306 = udiv i32 %v2_df, 2
  %v12_e1 = and i32 %tmp306, 32512
  %v2_df.masked = and i32 %v2_df, -65281
  %v13_e1 = or i32 %v4_df, %v2_df.masked
  %v14_e1 = or i32 %v13_e1, %v12_e1
  store i32 %v14_e1, i32* @eax, align 8
  %v15_e1296 = and i32 %v2_df, 256
  %v16_e1 = icmp eq i32 %v15_e1296, 0
  %v0_ec = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_e5 = add i3 %v0_ec, 1
  br i1 %v16_e1, label %dec_label_pc_e5, label %dec_label_pc_ec

dec_label_pc_e5:                                  ; preds = %dec_label_pc_db
  %v2_ec = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_e5, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_e7 = load i32, i32* %edi.global-to-local, align 4
  %v3_e7 = add i32 %v2_e7, 72
  %v4_e7 = inttoptr i32 %v3_e7 to double*
  %v5_e7 = load double, double* %v4_e7, align 4
  %v6_e7 = fpext double %v5_e7 to x86_fp80
  %v7_e7 = fdiv x86_fp80 %v6_e7, %v2_ec
  store x86_fp80 %v7_e7, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f1

dec_label_pc_ec:                                  ; preds = %dec_label_pc_db
  %v1_ee = load i32, i32* %edi.global-to-local, align 4
  %v2_ee = add i32 %v1_ee, 72
  %v3_ee = inttoptr i32 %v2_ee to double*
  %v4_ee = load double, double* %v3_ee, align 4
  %v5_ee = fpext double %v4_ee to x86_fp80
  store i3 %v4_e5, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_ee, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f1

dec_label_pc_f1:                                  ; preds = %dec_label_pc_ec, %dec_label_pc_e5, %dec_label_pc_d4
  %v2_109 = phi i32 [ %v1_ee, %dec_label_pc_ec ], [ %v2_e7, %dec_label_pc_e5 ], [ %v2_ff.pre, %dec_label_pc_d4 ]
  %v3_f4 = phi x86_fp80 [ %v5_ee, %dec_label_pc_ec ], [ %v7_e7, %dec_label_pc_e5 ], [ %v5_d6, %dec_label_pc_d4 ]
  %v0_f1 = phi i3 [ %v4_e5, %dec_label_pc_ec ], [ %v4_e5, %dec_label_pc_e5 ], [ %v0_db, %dec_label_pc_d4 ]
  %v1_f1 = load i32, i32* @ecx, align 8
  %v2_f1 = add i32 %v1_f1, 8
  %v3_f1 = inttoptr i32 %v2_f1 to double*
  %v4_f1 = load double, double* %v3_f1, align 4
  %v5_f1 = fpext double %v4_f1 to x86_fp80
  %v4_f4 = fmul x86_fp80 %v3_f4, %v5_f1
  %v4_f6 = fptrunc x86_fp80 %v4_f4 to double
  store double %v4_f6, double* %v3_f1, align 4
  %v2_f9 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_f9 = fmul x86_fp80 %v2_f9, %v2_f9
  %v4_fb = fmul x86_fp80 %v4_f9, %v4_f9
  %v4_fd = fmul x86_fp80 %v4_fb, %v4_fb
  store x86_fp80 %v4_fd, x86_fp80* %st7.global-to-local, align 4
  %v3_ff = add i32 %v2_109, -88
  %v4_ff = inttoptr i32 %v3_ff to double*
  %v5_ff = load double, double* %v4_ff, align 4
  %v6_ff = fpext double %v5_ff to x86_fp80
  %v7_ff = fadd x86_fp80 %v4_fd, %v6_ff
  store x86_fp80 %v7_ff, x86_fp80* %st7.global-to-local, align 4
  %v2_102 = load i32, i32* @ecx, align 8
  %v3_102 = fptrunc x86_fp80 %v7_ff to double
  %v4_102 = inttoptr i32 %v2_102 to double*
  store double %v3_102, double* %v4_102, align 4
  %v1_104 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_104 = add i32 %v2_109, -96
  %v4_104 = inttoptr i32 %v3_104 to double*
  %v5_104 = load double, double* %v4_104, align 4
  %v6_104 = fpext double %v5_104 to x86_fp80
  %v7_104 = fadd x86_fp80 %v1_104, %v6_104
  store x86_fp80 %v7_104, x86_fp80* %st7.global-to-local, align 4
  %v2_107 = load i32, i32* @edx, align 8
  %v3_107 = fptrunc x86_fp80 %v7_104 to double
  %v4_107 = inttoptr i32 %v2_107 to double*
  store double %v3_107, double* %v4_107, align 4
  %v1_109 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_109 = add i32 %v2_109, -104
  %v4_109 = inttoptr i32 %v3_109 to double*
  %v5_109 = load double, double* %v4_109, align 4
  %v6_109 = fpext double %v5_109 to x86_fp80
  %v7_109 = fadd x86_fp80 %v1_109, %v6_109
  store x86_fp80 %v7_109, x86_fp80* %st7.global-to-local, align 4
  %v2_10c = load i32, i32* %ebx.global-to-local, align 4
  %v3_10c = fptrunc x86_fp80 %v7_109 to double
  %v4_10c = inttoptr i32 %v2_10c to double*
  store double %v3_10c, double* %v4_10c, align 4
  %v5_10c = xor i3 %v0_f1, -4
  store i3 %v5_10c, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_10c, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v2_10c
}

define x86_fp80 @function_117() local_unnamed_addr {
dec_label_pc_117:
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %v2_117 = load x86_fp80, x86_fp80* @st7, align 4
  %v2_119 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v2_117)
  %v0_11b = load i3, i3* @fpu_stat_TOP, align 1
  %v1_11b = add i3 %v0_11b, -1
  store i3 %v1_11b, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_11f = call i32 @__asm_fyl2x()
  store i32 %v0_11f, i32* @eax, align 8
  %v4_123 = fmul x86_fp80 %v2_119, 0xK3FFEB17217F7D1CF7800
  %v4_127 = fmul x86_fp80 %v4_123, 0xK3FFFB8AA3B295C17F000
  %v2_12b = call x86_fp80 @llvm.round.f80(x86_fp80 %v4_127)
  %v4_12d = fsub x86_fp80 %v4_127, %v2_12b
  %v0_131 = call i32 @__asm_f2xm1()
  store i32 %v0_131, i32* @eax, align 8
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* @st5, align 4
  %v4_135 = fadd x86_fp80 %v4_12d, 0xK3FFF8000000000000000
  %v0_137 = call i32 @__asm_fscale()
  store i32 %v0_137, i32* @eax, align 8
  %v0_139 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_139 = add i3 %v0_139, 1
  store i3 %v5_139, i3* @fpu_stat_TOP, align 1
  ret x86_fp80 %v4_135
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare i32 @__asm_fyl2x() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

declare i32 @__asm_f2xm1() local_unnamed_addr

declare i32 @__asm_fscale() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
