source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %edi.global-to-local, align 4
  %v1_e = add i32 %v3_b, -88
  %v2_e = inttoptr i32 %v1_e to i32*
  %v3_e = load i32, i32* %v2_e, align 4
  %v13_e = icmp eq i32 %v3_e, 1
  %v1_12 = icmp eq i1 %v13_e, false
  br i1 %v1_12, label %dec_label_pc_4c, label %dec_label_pc_14

dec_label_pc_14:                                  ; preds = %dec_label_pc_0
  %v0_14 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_14 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_14 = fpext double %v3_14 to x86_fp80
  store x86_fp80 %v4_14, x86_fp80* %st7.global-to-local, align 4
  %v3_16 = add i32 %v3_b, -16
  %v4_16 = inttoptr i32 %v3_16 to double*
  %v5_16 = load double, double* %v4_16, align 4
  %v6_16 = fpext double %v5_16 to x86_fp80
  %v7_16 = fsub x86_fp80 %v4_14, %v6_16
  %v2_19 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_16)
  store x86_fp80 %v2_19, x86_fp80* %st7.global-to-local, align 4
  %v3_1b = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_1b = fpext double %v3_1b to x86_fp80
  store x86_fp80 %v4_1b, x86_fp80* %st6.global-to-local, align 4
  %v3_1d = add i32 %v3_b, -24
  %v4_1d = inttoptr i32 %v3_1d to double*
  %v5_1d = load double, double* %v4_1d, align 4
  %v6_1d = fpext double %v5_1d to x86_fp80
  %v7_1d = fsub x86_fp80 %v4_1b, %v6_1d
  %v2_20 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_1d)
  store x86_fp80 %v2_20, x86_fp80* %st6.global-to-local, align 4
  %v5_22 = add i3 %v0_14, -3
  store i3 %v5_22, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_2b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_2b = call i16 @__asm_fnstsw(i32 %v0_2b)
  %v2_2b = sext i16 %v1_2b to i32
  %v3_2b = load i32, i32* @eax, align 8
  %v4_2b = and i32 %v3_2b, -65536
  %v3_2d = and i32 %v2_2b, 16640
  %v2_2b.masked = and i32 %v2_2b, -65281
  %v12_2d = or i32 %v4_2b, %v2_2b.masked
  %v13_2d = or i32 %v12_2d, %v3_2d
  store i32 %v13_2d, i32* @eax, align 8
  %storemerge9.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge9 = add i3 %storemerge9.in, 1
  store i3 %storemerge9, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_3a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_3a = call i16 @__asm_fnstsw(i32 %v0_3a)
  %v2_3a = sext i16 %v1_3a to i32
  %v3_3a = load i32, i32* @eax, align 8
  %v4_3a = and i32 %v3_3a, -65536
  %v3_3c = and i32 %v2_3a, 16640
  %v2_3a.masked = and i32 %v2_3a, -65281
  %v12_3c = or i32 %v4_3a, %v2_3a.masked
  %v13_3c = or i32 %v12_3c, %v3_3c
  store i32 %v13_3c, i32* @eax, align 8
  %storemerge7.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge7 = add i3 %storemerge7.in, 1
  store i3 %storemerge7, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_164.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_164.pre = load i32, i32* %edi.global-to-local, align 4
  br label %dec_label_pc_164

dec_label_pc_4c:                                  ; preds = %dec_label_pc_0
  %v13_4d = icmp eq i32 %v3_e, 2
  %v1_51 = icmp eq i1 %v13_4d, false
  br i1 %v1_51, label %dec_label_pc_73, label %dec_label_pc_53

dec_label_pc_53:                                  ; preds = %dec_label_pc_4c
  %v0_53 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_53 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_53 = fpext double %v3_53 to x86_fp80
  %v5_53 = add i3 %v0_53, -1
  store x86_fp80 %v4_53, x86_fp80* %st7.global-to-local, align 4
  %v3_55 = add i32 %v3_b, -16
  %v4_55 = inttoptr i32 %v3_55 to double*
  %v5_55 = load double, double* %v4_55, align 4
  %v6_55 = fpext double %v5_55 to x86_fp80
  %v7_55 = fsub x86_fp80 %v4_53, %v6_55
  %v3_58 = fmul x86_fp80 %v7_55, %v7_55
  store x86_fp80 %v3_58, x86_fp80* %st7.global-to-local, align 4
  %v3_5a = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_5a = fpext double %v3_5a to x86_fp80
  store x86_fp80 %v4_5a, x86_fp80* %st6.global-to-local, align 4
  %v3_5c = add i32 %v3_b, -24
  %v4_5c = inttoptr i32 %v3_5c to double*
  %v5_5c = load double, double* %v4_5c, align 4
  %v6_5c = fpext double %v5_5c to x86_fp80
  %v7_5c = fsub x86_fp80 %v4_5a, %v6_5c
  %v3_5f = fmul x86_fp80 %v7_5c, %v7_5c
  %v4_61 = fadd x86_fp80 %v3_58, %v3_5f
  store x86_fp80 %v4_61, x86_fp80* %st7.global-to-local, align 4
  %v3_63 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_63 = fpext double %v3_63 to x86_fp80
  store x86_fp80 %v4_63, x86_fp80* %st6.global-to-local, align 4
  %v3_65 = add i32 %v3_b, -32
  %v4_65 = inttoptr i32 %v3_65 to double*
  %v5_65 = load double, double* %v4_65, align 4
  %v6_65 = fpext double %v5_65 to x86_fp80
  %v7_65 = fsub x86_fp80 %v4_63, %v6_65
  %v3_68 = fmul x86_fp80 %v7_65, %v7_65
  store x86_fp80 %v3_68, x86_fp80* %st6.global-to-local, align 4
  %v4_6a = fdiv x86_fp80 %v4_61, %v3_68
  store i3 %v5_53, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_6c = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_6a)
  store x86_fp80 %v2_6c, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_164

dec_label_pc_73:                                  ; preds = %dec_label_pc_4c
  %v13_74 = icmp eq i32 %v3_e, 3
  %v1_78 = icmp eq i1 %v13_74, false
  br i1 %v1_78, label %dec_label_pc_91, label %dec_label_pc_7a

dec_label_pc_7a:                                  ; preds = %dec_label_pc_73
  %v0_7a = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_7a = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_7a = fpext double %v3_7a to x86_fp80
  %v5_7a = add i3 %v0_7a, -1
  store x86_fp80 %v4_7a, x86_fp80* %st7.global-to-local, align 4
  %v3_7c = add i32 %v3_b, -16
  %v4_7c = inttoptr i32 %v3_7c to double*
  %v5_7c = load double, double* %v4_7c, align 4
  %v6_7c = fpext double %v5_7c to x86_fp80
  %v7_7c = fsub x86_fp80 %v4_7a, %v6_7c
  %v3_7f = fmul x86_fp80 %v7_7c, %v7_7c
  store x86_fp80 %v3_7f, x86_fp80* %st7.global-to-local, align 4
  %v3_81 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_81 = fpext double %v3_81 to x86_fp80
  store x86_fp80 %v4_81, x86_fp80* %st6.global-to-local, align 4
  %v3_83 = add i32 %v3_b, -24
  %v4_83 = inttoptr i32 %v3_83 to double*
  %v5_83 = load double, double* %v4_83, align 4
  %v6_83 = fpext double %v5_83 to x86_fp80
  %v7_83 = fsub x86_fp80 %v4_81, %v6_83
  %v3_86 = fmul x86_fp80 %v7_83, %v7_83
  store x86_fp80 %v3_86, x86_fp80* %st6.global-to-local, align 4
  %v4_88 = fadd x86_fp80 %v3_7f, %v3_86
  store i3 %v5_7a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_8a = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_88)
  store x86_fp80 %v2_8a, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_164

dec_label_pc_91:                                  ; preds = %dec_label_pc_73
  %v13_92 = icmp eq i32 %v3_e, -2
  %v1_96 = icmp eq i1 %v13_92, false
  br i1 %v1_96, label %dec_label_pc_cd, label %dec_label_pc_98

dec_label_pc_98:                                  ; preds = %dec_label_pc_91
  %v3_98 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_98 = fpext double %v3_98 to x86_fp80
  store x86_fp80 %v4_98, x86_fp80* %st7.global-to-local, align 4
  %v3_9a = add i32 %v3_b, -32
  %v4_9a = inttoptr i32 %v3_9a to double*
  %v5_9a = load double, double* %v4_9a, align 4
  %v6_9a = fpext double %v5_9a to x86_fp80
  %v7_9a = fsub x86_fp80 %v4_98, %v6_9a
  store x86_fp80 %v7_9a, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v0_a1 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_a1 = call i16 @__asm_fnstsw(i32 %v0_a1)
  %v2_a1 = sext i16 %v1_a1 to i32
  %v3_a1 = load i32, i32* @eax, align 8
  %v4_a1 = and i32 %v3_a1, -65536
  %v1_a3 = udiv i32 %v2_a1, 256
  %v2_a3 = trunc i32 %v1_a3 to i8
  %v3_a3 = and i8 %v2_a3, 65
  %v4_a3 = icmp eq i8 %v3_a3, 0
  %v9_a3 = zext i8 %v3_a3 to i32
  %v11_a3 = mul i32 %v9_a3, 256
  %v2_a1.masked = and i32 %v2_a1, -65281
  %v12_a3 = or i32 %v4_a1, %v2_a1.masked
  %v13_a3 = or i32 %v12_a3, %v11_a3
  store i32 %v13_a3, i32* @eax, align 8
  %v0_c6 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v4_a3, label %dec_label_pc_c6, label %dec_label_pc_a8

dec_label_pc_a8:                                  ; preds = %dec_label_pc_98
  %v3_a8 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_a8 = fpext double %v3_a8 to x86_fp80
  %v5_a8 = add i3 %v0_c6, -1
  store x86_fp80 %v4_a8, x86_fp80* %st7.global-to-local, align 4
  %v2_aa = load i32, i32* %edi.global-to-local, align 4
  %v3_aa = add i32 %v2_aa, -16
  %v4_aa = inttoptr i32 %v3_aa to double*
  %v5_aa = load double, double* %v4_aa, align 4
  %v6_aa = fpext double %v5_aa to x86_fp80
  %v7_aa = fsub x86_fp80 %v4_a8, %v6_aa
  %v3_ad = fmul x86_fp80 %v7_aa, %v7_aa
  store x86_fp80 %v3_ad, x86_fp80* %st7.global-to-local, align 4
  %v3_af = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_af = fpext double %v3_af to x86_fp80
  store x86_fp80 %v4_af, x86_fp80* %st6.global-to-local, align 4
  %v3_b1 = add i32 %v2_aa, -24
  %v4_b1 = inttoptr i32 %v3_b1 to double*
  %v5_b1 = load double, double* %v4_b1, align 4
  %v6_b1 = fpext double %v5_b1 to x86_fp80
  %v7_b1 = fsub x86_fp80 %v4_af, %v6_b1
  %v3_b4 = fmul x86_fp80 %v7_b1, %v7_b1
  %v4_b6 = fadd x86_fp80 %v3_ad, %v3_b4
  %v2_b8 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_b6)
  store x86_fp80 %v2_b8, x86_fp80* %st7.global-to-local, align 4
  %v3_ba = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_ba = fpext double %v3_ba to x86_fp80
  store x86_fp80 %v4_ba, x86_fp80* %st6.global-to-local, align 4
  %v3_bc = add i32 %v2_aa, -32
  %v4_bc = inttoptr i32 %v3_bc to double*
  %v5_bc = load double, double* %v4_bc, align 4
  %v6_bc = fpext double %v5_bc to x86_fp80
  %v7_bc = fsub x86_fp80 %v4_ba, %v6_bc
  store x86_fp80 %v7_bc, x86_fp80* %st6.global-to-local, align 4
  %v4_bf = fdiv x86_fp80 %v2_b8, %v7_bc
  store x86_fp80 %v4_bf, x86_fp80* %st7.global-to-local, align 4
  store i3 %v5_a8, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_164

dec_label_pc_c6:                                  ; preds = %dec_label_pc_98
  %v1_c6 = add i3 %v0_c6, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v1_c6, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_167

dec_label_pc_cd:                                  ; preds = %dec_label_pc_91
  %v13_ce = icmp eq i32 %v3_e, 4
  %v1_d2 = icmp eq i1 %v13_ce, false
  br i1 %v1_d2, label %dec_label_pc_ff, label %dec_label_pc_d4

dec_label_pc_d4:                                  ; preds = %dec_label_pc_cd
  %v0_d4 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_d4 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_d4 = fpext double %v3_d4 to x86_fp80
  store x86_fp80 %v4_d4, x86_fp80* %st7.global-to-local, align 4
  %v3_d6 = add i32 %v3_b, -16
  %v4_d6 = inttoptr i32 %v3_d6 to double*
  %v5_d6 = load double, double* %v4_d6, align 4
  %v6_d6 = fpext double %v5_d6 to x86_fp80
  %v7_d6 = fsub x86_fp80 %v4_d4, %v6_d6
  %v2_d9 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_d6)
  store x86_fp80 %v2_d9, x86_fp80* %st7.global-to-local, align 4
  %v3_db = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_db = fpext double %v3_db to x86_fp80
  %v5_db = add i3 %v0_d4, -2
  store i3 %v5_db, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_db, x86_fp80* %st6.global-to-local, align 4
  %v3_dd = add i32 %v3_b, -24
  %v4_dd = inttoptr i32 %v3_dd to double*
  %v5_dd = load double, double* %v4_dd, align 4
  %v6_dd = fpext double %v5_dd to x86_fp80
  %v7_dd = fsub x86_fp80 %v4_db, %v6_dd
  %v2_e0 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_dd)
  store x86_fp80 %v2_e0, x86_fp80* %st6.global-to-local, align 4
  %v0_e4 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_e4 = call i16 @__asm_fnstsw(i32 %v0_e4)
  %v2_e4 = sext i16 %v1_e4 to i32
  %v3_e4 = load i32, i32* @eax, align 8
  %v4_e4 = and i32 %v3_e4, -65536
  %v1_e6 = udiv i32 %v2_e4, 256
  %v2_e6 = trunc i32 %v1_e6 to i8
  %v3_e6 = and i8 %v2_e6, 65
  %v4_e6 = icmp eq i8 %v3_e6, 0
  %v9_e6 = zext i8 %v3_e6 to i32
  %v11_e6 = mul i32 %v9_e6, 256
  %v2_e4.masked = and i32 %v2_e4, -65281
  %v12_e6 = or i32 %v4_e4, %v2_e4.masked
  %v13_e6 = or i32 %v12_e6, %v11_e6
  store i32 %v13_e6, i32* @eax, align 8
  %v0_eb = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v4_e6, label %dec_label_pc_eb, label %dec_label_pc_d4.dec_label_pc_f1_crit_edge

dec_label_pc_d4.dec_label_pc_f1_crit_edge:        ; preds = %dec_label_pc_d4
  %v3_f8.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f1

dec_label_pc_eb:                                  ; preds = %dec_label_pc_d4
  %v1_eb = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v1_eb, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f1

dec_label_pc_f1:                                  ; preds = %dec_label_pc_d4.dec_label_pc_f1_crit_edge, %dec_label_pc_eb
  %v3_f8 = phi x86_fp80 [ %v3_f8.pre, %dec_label_pc_d4.dec_label_pc_f1_crit_edge ], [ %v1_eb, %dec_label_pc_eb ]
  %storemerge12 = add i3 %v0_eb, 1
  %v3_f1 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_f1 = fpext double %v3_f1 to x86_fp80
  store x86_fp80 %v4_f1, x86_fp80* %st6.global-to-local, align 4
  %v2_f3 = load i32, i32* %edi.global-to-local, align 4
  %v3_f3 = add i32 %v2_f3, -32
  %v4_f3 = inttoptr i32 %v3_f3 to double*
  %v5_f3 = load double, double* %v4_f3, align 4
  %v6_f3 = fpext double %v5_f3 to x86_fp80
  %v7_f3 = fsub x86_fp80 %v4_f1, %v6_f3
  %v2_f6 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_f3)
  store x86_fp80 %v2_f6, x86_fp80* %st6.global-to-local, align 4
  %v4_f8 = fdiv x86_fp80 %v3_f8, %v2_f6
  store x86_fp80 %v4_f8, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge12, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_164

dec_label_pc_ff:                                  ; preds = %dec_label_pc_cd
  %v13_100 = icmp eq i32 %v3_e, -4
  %v1_104 = icmp eq i1 %v13_100, false
  br i1 %v1_104, label %dec_label_pc_149, label %dec_label_pc_106

dec_label_pc_106:                                 ; preds = %dec_label_pc_ff
  %v3_106 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_106 = fpext double %v3_106 to x86_fp80
  store x86_fp80 %v4_106, x86_fp80* %st7.global-to-local, align 4
  %v3_108 = add i32 %v3_b, -32
  %v4_108 = inttoptr i32 %v3_108 to double*
  %v5_108 = load double, double* %v4_108, align 4
  %v6_108 = fpext double %v5_108 to x86_fp80
  %v7_108 = fsub x86_fp80 %v4_106, %v6_108
  store x86_fp80 %v7_108, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v0_10f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_10f = call i16 @__asm_fnstsw(i32 %v0_10f)
  %v2_10f = sext i16 %v1_10f to i32
  %v3_10f = load i32, i32* @eax, align 8
  %v4_10f = and i32 %v3_10f, -65536
  %v1_111 = udiv i32 %v2_10f, 256
  %v2_111 = trunc i32 %v1_111 to i8
  %v3_111 = and i8 %v2_111, 65
  %v4_111 = icmp eq i8 %v3_111, 0
  %v9_111 = zext i8 %v3_111 to i32
  %v11_111 = mul i32 %v9_111, 256
  %v2_10f.masked = and i32 %v2_10f, -65281
  %v12_111 = or i32 %v4_10f, %v2_10f.masked
  %v13_111 = or i32 %v12_111, %v11_111
  store i32 %v13_111, i32* @eax, align 8
  %v0_141 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v4_111, label %dec_label_pc_141, label %dec_label_pc_116

dec_label_pc_116:                                 ; preds = %dec_label_pc_106
  %v3_116 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_116 = fpext double %v3_116 to x86_fp80
  store x86_fp80 %v4_116, x86_fp80* %st7.global-to-local, align 4
  %v2_118 = load i32, i32* %edi.global-to-local, align 4
  %v3_118 = add i32 %v2_118, -16
  %v4_118 = inttoptr i32 %v3_118 to double*
  %v5_118 = load double, double* %v4_118, align 4
  %v6_118 = fpext double %v5_118 to x86_fp80
  %v7_118 = fsub x86_fp80 %v4_116, %v6_118
  %v2_11b = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_118)
  store x86_fp80 %v2_11b, x86_fp80* %st7.global-to-local, align 4
  %v3_11d = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_11d = fpext double %v3_11d to x86_fp80
  %v5_11d = add i3 %v0_141, -2
  store i3 %v5_11d, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_11d, x86_fp80* %st6.global-to-local, align 4
  %v3_11f = add i32 %v2_118, -24
  %v4_11f = inttoptr i32 %v3_11f to double*
  %v5_11f = load double, double* %v4_11f, align 4
  %v6_11f = fpext double %v5_11f to x86_fp80
  %v7_11f = fsub x86_fp80 %v4_11d, %v6_11f
  %v2_122 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_11f)
  store x86_fp80 %v2_122, x86_fp80* %st6.global-to-local, align 4
  %v0_126 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_126 = call i16 @__asm_fnstsw(i32 %v0_126)
  %v2_126 = sext i16 %v1_126 to i32
  %v3_126 = load i32, i32* @eax, align 8
  %v4_126 = and i32 %v3_126, -65536
  %v3_128 = and i32 %v2_126, 16640
  %v2_126.masked = and i32 %v2_126, -65281
  %v12_128 = or i32 %v4_126, %v2_126.masked
  %v13_128 = or i32 %v12_128, %v3_128
  store i32 %v13_128, i32* @eax, align 8
  %storemerge14.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge14 = add i3 %storemerge14.in, 1
  %v3_133 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_133 = fpext double %v3_133 to x86_fp80
  store x86_fp80 %v4_133, x86_fp80* %st7.global-to-local, align 4
  %v2_135 = load i32, i32* %edi.global-to-local, align 4
  %v3_135 = add i32 %v2_135, -32
  %v4_135 = inttoptr i32 %v3_135 to double*
  %v5_135 = load double, double* %v4_135, align 4
  %v6_135 = fpext double %v5_135 to x86_fp80
  %v7_135 = fsub x86_fp80 %v4_133, %v6_135
  %v2_138 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_135)
  %v4_13a = fdiv x86_fp80 %v2_138, %v2_138
  store x86_fp80 %v4_13a, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge14, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_164

dec_label_pc_141:                                 ; preds = %dec_label_pc_106
  %v1_141 = add i3 %v0_141, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v1_141, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_167

dec_label_pc_149:                                 ; preds = %dec_label_pc_ff
  %v0_149 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_149 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_149 = fpext double %v3_149 to x86_fp80
  %v5_149 = add i3 %v0_149, -1
  store x86_fp80 %v4_149, x86_fp80* %st7.global-to-local, align 4
  %v3_14b = add i32 %v3_b, -16
  %v4_14b = inttoptr i32 %v3_14b to double*
  %v5_14b = load double, double* %v4_14b, align 4
  %v6_14b = fpext double %v5_14b to x86_fp80
  %v7_14b = fsub x86_fp80 %v4_149, %v6_14b
  %v3_14e = fmul x86_fp80 %v7_14b, %v7_14b
  store x86_fp80 %v3_14e, x86_fp80* %st7.global-to-local, align 4
  %v3_150 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_150 = fpext double %v3_150 to x86_fp80
  store x86_fp80 %v4_150, x86_fp80* %st6.global-to-local, align 4
  %v3_152 = add i32 %v3_b, -24
  %v4_152 = inttoptr i32 %v3_152 to double*
  %v5_152 = load double, double* %v4_152, align 4
  %v6_152 = fpext double %v5_152 to x86_fp80
  %v7_152 = fsub x86_fp80 %v4_150, %v6_152
  %v3_155 = fmul x86_fp80 %v7_152, %v7_152
  store x86_fp80 %v3_155, x86_fp80* %st6.global-to-local, align 4
  %v3_157 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_157 = fpext double %v3_157 to x86_fp80
  %v3_159 = add i32 %v3_b, -32
  %v4_159 = inttoptr i32 %v3_159 to double*
  %v5_159 = load double, double* %v4_159, align 4
  %v6_159 = fpext double %v5_159 to x86_fp80
  %v7_159 = fsub x86_fp80 %v4_157, %v6_159
  %v3_15c = fmul x86_fp80 %v7_159, %v7_159
  %v4_15e = fadd x86_fp80 %v3_155, %v3_15c
  store x86_fp80 %v4_15e, x86_fp80* %st6.global-to-local, align 4
  %v4_160 = fadd x86_fp80 %v3_14e, %v4_15e
  store i3 %v5_149, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_162 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_160)
  store x86_fp80 %v2_162, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_164

dec_label_pc_164:                                 ; preds = %dec_label_pc_149, %dec_label_pc_116, %dec_label_pc_f1, %dec_label_pc_a8, %dec_label_pc_7a, %dec_label_pc_53, %dec_label_pc_14
  %v0_17242 = phi i3 [ %v5_149, %dec_label_pc_149 ], [ %storemerge14, %dec_label_pc_116 ], [ %storemerge12, %dec_label_pc_f1 ], [ %v5_a8, %dec_label_pc_a8 ], [ %v5_7a, %dec_label_pc_7a ], [ %v5_53, %dec_label_pc_53 ], [ %storemerge7, %dec_label_pc_14 ]
  %v2_164 = phi i32 [ %v3_b, %dec_label_pc_149 ], [ %v2_135, %dec_label_pc_116 ], [ %v2_f3, %dec_label_pc_f1 ], [ %v2_aa, %dec_label_pc_a8 ], [ %v3_b, %dec_label_pc_7a ], [ %v3_b, %dec_label_pc_53 ], [ %v2_164.pre, %dec_label_pc_14 ]
  %v1_164 = phi x86_fp80 [ %v2_162, %dec_label_pc_149 ], [ %v4_13a, %dec_label_pc_116 ], [ %v4_f8, %dec_label_pc_f1 ], [ %v4_bf, %dec_label_pc_a8 ], [ %v2_8a, %dec_label_pc_7a ], [ %v2_6c, %dec_label_pc_53 ], [ %v1_164.pre, %dec_label_pc_14 ]
  %v3_164 = add i32 %v2_164, -40
  %v4_164 = inttoptr i32 %v3_164 to double*
  %v5_164 = load double, double* %v4_164, align 4
  %v6_164 = fpext double %v5_164 to x86_fp80
  %v7_164 = fdiv x86_fp80 %v1_164, %v6_164
  store x86_fp80 %v7_164, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_167

dec_label_pc_167:                                 ; preds = %dec_label_pc_164, %dec_label_pc_141, %dec_label_pc_c6
  %v0_172 = phi i3 [ %v0_17242, %dec_label_pc_164 ], [ %v1_141, %dec_label_pc_141 ], [ %v1_c6, %dec_label_pc_c6 ]
  %v0_167 = load i32, i32* %edi.global-to-local, align 4
  %v1_167 = add i32 %v0_167, -76
  %v2_167 = inttoptr i32 %v1_167 to i32*
  %v3_167 = load i32, i32* %v2_167, align 4
  %v13_167 = icmp eq i32 %v3_167, 1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_172, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_177 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_177 = call i16 @__asm_fnstsw(i32 %v0_177)
  %v2_177 = sext i16 %v1_177 to i32
  %v3_177 = load i32, i32* @eax, align 8
  %v4_177 = and i32 %v3_177, -65536
  %v1_179 = udiv i32 %v2_177, 256
  %v2_179 = trunc i32 %v1_179 to i8
  %v3_179 = and i8 %v2_179, 65
  %v4_179 = icmp eq i8 %v3_179, 0
  %v9_179 = zext i8 %v3_179 to i32
  %v11_179 = mul i32 %v9_179, 256
  %v2_177.masked = and i32 %v2_177, -65281
  %v12_179 = or i32 %v4_177, %v2_177.masked
  %v13_179 = or i32 %v12_179, %v11_179
  store i32 %v13_179, i32* @eax, align 8
  br i1 %v13_167, label %dec_label_pc_172, label %dec_label_pc_216

dec_label_pc_172:                                 ; preds = %dec_label_pc_167
  br i1 %v4_179, label %dec_label_pc_17e, label %dec_label_pc_172.dec_label_pc_1eb_crit_edge

dec_label_pc_172.dec_label_pc_1eb_crit_edge:      ; preds = %dec_label_pc_172
  %v0_1eb.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_1eb

dec_label_pc_17e:                                 ; preds = %dec_label_pc_172
  %v1_17e = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_17e = load i32, i32* %edi.global-to-local, align 4
  %v3_17e = add i32 %v2_17e, -48
  %v4_17e = inttoptr i32 %v3_17e to double*
  %v5_17e = load double, double* %v4_17e, align 4
  %v6_17e = fpext double %v5_17e to x86_fp80
  %v7_17e = fsub x86_fp80 %v1_17e, %v6_17e
  store x86_fp80 %v7_17e, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v0_186 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_186 = call i16 @__asm_fnstsw(i32 %v0_186)
  %v2_186 = sext i16 %v1_186 to i32
  %v3_186 = load i32, i32* @eax, align 8
  %v4_186 = and i32 %v3_186, -65536
  %v1_188 = udiv i32 %v2_186, 256
  %v2_188 = trunc i32 %v1_188 to i8
  %v3_188 = and i8 %v2_188, 65
  %v4_188 = icmp eq i8 %v3_188, 0
  %v9_188 = zext i8 %v3_188 to i32
  %v11_188 = mul i32 %v9_188, 256
  %v2_186.masked = and i32 %v2_186, -65281
  %v12_188 = or i32 %v4_186, %v2_186.masked
  %v13_188 = or i32 %v12_188, %v11_188
  store i32 %v13_188, i32* @eax, align 8
  %v0_1f8 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v4_188, label %dec_label_pc_1f8, label %dec_label_pc_18d

dec_label_pc_18d:                                 ; preds = %dec_label_pc_17e
  %v1_18d = add i3 %v0_1f8, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v2_18f = load i32, i32* %edi.global-to-local, align 4
  %v3_18f = add i32 %v2_18f, -48
  %v4_18f = inttoptr i32 %v3_18f to double*
  %v5_18f = load double, double* %v4_18f, align 4
  %v6_18f = fpext double %v5_18f to x86_fp80
  %v7_18f = fsub x86_fp80 0xK3FFF8000000000000000, %v6_18f
  %v3_192 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_192 = fdiv x86_fp80 %v3_192, %v7_18f
  store x86_fp80 %v4_192, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_192, x86_fp80* %st6.global-to-local, align 4
  %v2_196 = load i32, i32* %esi.global-to-local, align 4
  %v3_196 = add i32 %v2_196, 24
  %v4_196 = inttoptr i32 %v3_196 to double*
  %v5_196 = load double, double* %v4_196, align 4
  %v6_196 = fpext double %v5_196 to x86_fp80
  %v7_196 = fmul x86_fp80 %v4_192, %v6_196
  store x86_fp80 %v7_196, x86_fp80* %st6.global-to-local, align 4
  %v4_19b = fsub x86_fp80 0xK3FFF8000000000000000, %v4_192
  %v3_19d = add i32 %v2_18f, -56
  %v4_19d = inttoptr i32 %v3_19d to double*
  %v5_19d = load double, double* %v4_19d, align 4
  %v6_19d = fpext double %v5_19d to x86_fp80
  %v7_19d = fmul x86_fp80 %v4_19b, %v6_19d
  %v4_1a0 = fadd x86_fp80 %v7_196, %v7_19d
  %v4_1a2 = fptrunc x86_fp80 %v4_1a0 to double
  store double %v4_1a2, double* %v4_196, align 4
  %v1_1a5 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v1_1a5, x86_fp80* %st6.global-to-local, align 4
  %v3_1a7 = add i32 %v2_196, 32
  %v4_1a7 = inttoptr i32 %v3_1a7 to double*
  %v5_1a7 = load double, double* %v4_1a7, align 4
  %v6_1a7 = fpext double %v5_1a7 to x86_fp80
  %v7_1a7 = fmul x86_fp80 %v1_1a5, %v6_1a7
  store x86_fp80 %v7_1a7, x86_fp80* %st6.global-to-local, align 4
  %v4_1ac = fsub x86_fp80 0xK3FFF8000000000000000, %v1_1a5
  %v3_1ae = add i32 %v2_18f, -64
  %v4_1ae = inttoptr i32 %v3_1ae to double*
  %v5_1ae = load double, double* %v4_1ae, align 4
  %v6_1ae = fpext double %v5_1ae to x86_fp80
  %v7_1ae = fmul x86_fp80 %v4_1ac, %v6_1ae
  %v4_1b1 = fadd x86_fp80 %v7_1a7, %v7_1ae
  %v4_1b3 = fptrunc x86_fp80 %v4_1b1 to double
  store double %v4_1b3, double* %v4_1a7, align 4
  %v1_1b6 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v1_1b6, x86_fp80* %st6.global-to-local, align 4
  %v3_1b8 = add i32 %v2_196, 40
  %v4_1b8 = inttoptr i32 %v3_1b8 to double*
  %v5_1b8 = load double, double* %v4_1b8, align 4
  %v6_1b8 = fpext double %v5_1b8 to x86_fp80
  %v7_1b8 = fmul x86_fp80 %v1_1b6, %v6_1b8
  store x86_fp80 %v7_1b8, x86_fp80* %st6.global-to-local, align 4
  %v4_1bd = fsub x86_fp80 0xK3FFF8000000000000000, %v1_1b6
  %v3_1bf = add i32 %v2_18f, -72
  %v4_1bf = inttoptr i32 %v3_1bf to double*
  %v5_1bf = load double, double* %v4_1bf, align 4
  %v6_1bf = fpext double %v5_1bf to x86_fp80
  %v7_1bf = fmul x86_fp80 %v4_1bd, %v6_1bf
  %v4_1c2 = fadd x86_fp80 %v7_1b8, %v7_1bf
  store x86_fp80 %v4_1c2, x86_fp80* %st6.global-to-local, align 4
  store i3 %v1_18d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_1c4 = fptrunc x86_fp80 %v4_1c2 to double
  store double %v4_1c4, double* %v4_1b8, align 4
  %.pre59 = add i32 %v2_18f, -84
  %.pre60 = inttoptr i32 %.pre59 to double*
  br label %dec_label_pc_1c7

dec_label_pc_1c7:                                 ; preds = %dec_label_pc_245, %dec_label_pc_18d
  %v4_1cb.pre-phi = phi double* [ %v3_258, %dec_label_pc_245 ], [ %.pre60, %dec_label_pc_18d ]
  %v2_1cb = phi i32 [ %v2_247, %dec_label_pc_245 ], [ %v2_18f, %dec_label_pc_18d ]
  %storemerge3 = phi i3 [ %v0_2a9, %dec_label_pc_245 ], [ %v0_1f8, %dec_label_pc_18d ]
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v3_1c9 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_1c9 = fsub x86_fp80 0xK3FFF8000000000000000, %v3_1c9
  store x86_fp80 %v4_1c9, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_1cb = load double, double* %v4_1cb.pre-phi, align 4
  %v6_1cb = fpext double %v5_1cb to x86_fp80
  %v7_1cb = fmul x86_fp80 %v4_1c9, %v6_1cb
  br label %dec_label_pc_1cf

dec_label_pc_1cf:                                 ; preds = %dec_label_pc_20a, %dec_label_pc_1c7
  %v1_1e1 = phi i32 [ %v1_20c, %dec_label_pc_20a ], [ %v2_1cb, %dec_label_pc_1c7 ]
  %v0_1cf = phi i3 [ %storemerge4, %dec_label_pc_20a ], [ %storemerge3, %dec_label_pc_1c7 ]
  %storemerge = phi x86_fp80 [ %v5_20c, %dec_label_pc_20a ], [ %v7_1cb, %dec_label_pc_1c7 ]
  store x86_fp80 %storemerge, x86_fp80* %st7.global-to-local, align 4
  %v2_1cf = add i32 %v1_1e1, -16
  %v3_1cf = inttoptr i32 %v2_1cf to double*
  %v4_1cf = load double, double* %v3_1cf, align 4
  %v5_1cf = fpext double %v4_1cf to x86_fp80
  %v4_1d2 = fmul x86_fp80 %v5_1cf, %v5_1cf
  %v4_1d4 = load double, double* bitcast (i32* @eax to double*), align 8
  %v5_1d4 = fpext double %v4_1d4 to x86_fp80
  %v6_1d4 = fsub x86_fp80 %v5_1d4, %v4_1d2
  store x86_fp80 %v6_1d4, x86_fp80* %st7.global-to-local, align 4
  %v2_1d6 = load i32, i32* %ebx.global-to-local, align 4
  %v3_1d6 = fptrunc x86_fp80 %v6_1d4 to double
  %v4_1d6 = inttoptr i32 %v2_1d6 to double*
  store double %v3_1d6, double* %v4_1d6, align 4
  %v2_1d8 = add i32 %v1_1e1, -24
  %v3_1d8 = inttoptr i32 %v2_1d8 to double*
  %v4_1d8 = load double, double* %v3_1d8, align 4
  %v5_1d8 = fpext double %v4_1d8 to x86_fp80
  %v4_1db = fmul x86_fp80 %v5_1d8, %v5_1d8
  %v4_1dd = load double, double* bitcast (i32* @edx to double*), align 8
  %v5_1dd = fpext double %v4_1dd to x86_fp80
  %v6_1dd = fsub x86_fp80 %v5_1dd, %v4_1db
  store x86_fp80 %v6_1dd, x86_fp80* %st7.global-to-local, align 4
  %tmp305 = bitcast double %v4_1dd to i64
  %tmp306 = trunc i64 %tmp305 to i32
  %v3_1df = fptrunc x86_fp80 %v6_1dd to double
  %v4_1df = inttoptr i32 %tmp306 to double*
  store double %v3_1df, double* %v4_1df, align 4
  %v2_1e1 = add i32 %v1_1e1, -32
  %v3_1e1 = inttoptr i32 %v2_1e1 to double*
  %v4_1e1 = load double, double* %v3_1e1, align 4
  %v5_1e1 = fpext double %v4_1e1 to x86_fp80
  %v4_1e4 = fmul x86_fp80 %v5_1e1, %v5_1e1
  %v4_1e6 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v5_1e6 = fpext double %v4_1e6 to x86_fp80
  %v6_1e6 = fsub x86_fp80 %v5_1e6, %v4_1e4
  store x86_fp80 %v6_1e6, x86_fp80* %st7.global-to-local, align 4
  %tmp307 = bitcast double %v4_1e6 to i64
  %tmp308 = trunc i64 %tmp307 to i32
  %v3_1e8 = fptrunc x86_fp80 %v6_1e6 to double
  %v4_1e8 = inttoptr i32 %tmp308 to double*
  store double %v3_1e8, double* %v4_1e8, align 4
  store i3 %v0_1cf, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_1eb

dec_label_pc_1eb:                                 ; preds = %dec_label_pc_172.dec_label_pc_1eb_crit_edge, %dec_label_pc_222, %dec_label_pc_1cf
  %v0_1eb = phi i3 [ %v0_1eb.pre, %dec_label_pc_172.dec_label_pc_1eb_crit_edge ], [ %v0_222, %dec_label_pc_222 ], [ %v0_1cf, %dec_label_pc_1cf ]
  %v4_1eb = add i3 %v0_1eb, 1
  store i3 %v4_1eb, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1ed = load i32, i32* %ebx.global-to-local, align 4
  store i32 %v0_1ed, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v0_1ed

dec_label_pc_1f8:                                 ; preds = %dec_label_pc_17e
  %v1_1f8 = load i32, i32* %edi.global-to-local, align 4
  %v2_1f8 = add i32 %v1_1f8, -56
  %v3_1f8 = inttoptr i32 %v2_1f8 to double*
  %v4_1f8 = load double, double* %v3_1f8, align 4
  %v5_1f8 = fpext double %v4_1f8 to x86_fp80
  %v6_1f8 = add i3 %v0_1f8, -1
  store x86_fp80 %v5_1f8, x86_fp80* %st6.global-to-local, align 4
  %v2_1fb = load i32, i32* %esi.global-to-local, align 4
  %v3_1fb = add i32 %v2_1fb, 24
  %v5_1fb = inttoptr i32 %v3_1fb to double*
  store double %v4_1f8, double* %v5_1fb, align 4
  %v2_1fe = add i32 %v1_1f8, -64
  %v3_1fe = inttoptr i32 %v2_1fe to double*
  %v4_1fe = load double, double* %v3_1fe, align 4
  %v5_1fe = fpext double %v4_1fe to x86_fp80
  store x86_fp80 %v5_1fe, x86_fp80* %st6.global-to-local, align 4
  %v3_201 = add i32 %v2_1fb, 32
  %v5_201 = inttoptr i32 %v3_201 to double*
  store double %v4_1fe, double* %v5_201, align 4
  %v2_204 = add i32 %v1_1f8, -72
  %v3_204 = inttoptr i32 %v2_204 to double*
  %v4_204 = load double, double* %v3_204, align 4
  %v5_204 = fpext double %v4_204 to x86_fp80
  store i3 %v6_1f8, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_204, x86_fp80* %st6.global-to-local, align 4
  %v3_207 = add i32 %v2_1fb, 40
  %v5_207 = inttoptr i32 %v3_207 to double*
  store double %v4_204, double* %v5_207, align 4
  %.pre = add i32 %v1_1f8, -84
  %.pre57 = inttoptr i32 %.pre to double*
  br label %dec_label_pc_20a

dec_label_pc_20a:                                 ; preds = %dec_label_pc_2a8, %dec_label_pc_1f8
  %v3_20c.pre-phi = phi double* [ %v3_2ac, %dec_label_pc_2a8 ], [ %.pre57, %dec_label_pc_1f8 ]
  %v1_20c = phi i32 [ %v1_2ac, %dec_label_pc_2a8 ], [ %v1_1f8, %dec_label_pc_1f8 ]
  %storemerge4 = phi i3 [ %v0_2a9, %dec_label_pc_2a8 ], [ %v0_1f8, %dec_label_pc_1f8 ]
  %v4_20c = load double, double* %v3_20c.pre-phi, align 4
  %v5_20c = fpext double %v4_20c to x86_fp80
  store i3 %storemerge4, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_1cf

dec_label_pc_216:                                 ; preds = %dec_label_pc_167
  br i1 %v4_179, label %dec_label_pc_236, label %dec_label_pc_222

dec_label_pc_222:                                 ; preds = %dec_label_pc_216
  %v0_222 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_222 = load i32, i32* %edi.global-to-local, align 4
  %v2_222 = add i32 %v1_222, -56
  %v3_222 = inttoptr i32 %v2_222 to double*
  %v4_222 = load double, double* %v3_222, align 4
  %v5_222 = fpext double %v4_222 to x86_fp80
  store x86_fp80 %v5_222, x86_fp80* %st7.global-to-local, align 4
  %v2_225 = load i32, i32* %esi.global-to-local, align 4
  %v3_225 = add i32 %v2_225, 24
  %v5_225 = inttoptr i32 %v3_225 to double*
  store double %v4_222, double* %v5_225, align 4
  %v2_228 = add i32 %v1_222, -64
  %v3_228 = inttoptr i32 %v2_228 to double*
  %v4_228 = load double, double* %v3_228, align 4
  %v5_228 = fpext double %v4_228 to x86_fp80
  store x86_fp80 %v5_228, x86_fp80* %st7.global-to-local, align 4
  %v3_22b = add i32 %v2_225, 32
  %v5_22b = inttoptr i32 %v3_22b to double*
  store double %v4_228, double* %v5_22b, align 4
  %v2_22e = add i32 %v1_222, -72
  %v3_22e = inttoptr i32 %v2_22e to double*
  %v4_22e = load double, double* %v3_22e, align 4
  %v5_22e = fpext double %v4_22e to x86_fp80
  store x86_fp80 %v5_22e, x86_fp80* %st7.global-to-local, align 4
  %v3_231 = add i32 %v2_225, 40
  %v5_231 = inttoptr i32 %v3_231 to double*
  store double %v4_22e, double* %v5_231, align 4
  br label %dec_label_pc_1eb

dec_label_pc_236:                                 ; preds = %dec_label_pc_216
  %v1_236 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_236 = load i32, i32* %edi.global-to-local, align 4
  %v3_236 = add i32 %v2_236, -48
  %v4_236 = inttoptr i32 %v3_236 to double*
  %v5_236 = load double, double* %v4_236, align 4
  %v6_236 = fpext double %v5_236 to x86_fp80
  %v7_236 = fsub x86_fp80 %v1_236, %v6_236
  store x86_fp80 %v7_236, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v0_23e = load i32, i32* %fpsw.global-to-local, align 4
  %v1_23e = call i16 @__asm_fnstsw(i32 %v0_23e)
  %v2_23e = sext i16 %v1_23e to i32
  %v3_23e = load i32, i32* @eax, align 8
  %v4_23e = and i32 %v3_23e, -65536
  %v1_240 = udiv i32 %v2_23e, 256
  %v2_240 = trunc i32 %v1_240 to i8
  %v3_240 = and i8 %v2_240, 65
  %v4_240 = icmp eq i8 %v3_240, 0
  %v9_240 = zext i8 %v3_240 to i32
  %v11_240 = mul i32 %v9_240, 256
  %v2_23e.masked = and i32 %v2_23e, -65281
  %v12_240 = or i32 %v4_23e, %v2_23e.masked
  %v13_240 = or i32 %v12_240, %v11_240
  store i32 %v13_240, i32* @eax, align 8
  %v0_2a9 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v4_240, label %dec_label_pc_2a8, label %dec_label_pc_245

dec_label_pc_245:                                 ; preds = %dec_label_pc_236
  %v1_245 = add i3 %v0_2a9, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st6.global-to-local, align 4
  %v2_247 = load i32, i32* %edi.global-to-local, align 4
  %v3_247 = add i32 %v2_247, -48
  %v4_247 = inttoptr i32 %v3_247 to double*
  %v5_247 = load double, double* %v4_247, align 4
  %v6_247 = fpext double %v5_247 to x86_fp80
  %v7_247 = fsub x86_fp80 0xK3FFF8000000000000000, %v6_247
  %v3_24a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_24a = fdiv x86_fp80 %v3_24a, %v7_247
  store x86_fp80 %v4_24a, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_24a, x86_fp80* %st6.global-to-local, align 4
  %v3_24e = add i32 %v2_247, -56
  %v4_24e = inttoptr i32 %v3_24e to double*
  %v5_24e = load double, double* %v4_24e, align 4
  %v6_24e = fpext double %v5_24e to x86_fp80
  %v7_24e = fmul x86_fp80 %v4_24a, %v6_24e
  store x86_fp80 %v7_24e, x86_fp80* %st6.global-to-local, align 4
  %v4_253 = fsub x86_fp80 0xK3FFF8000000000000000, %v4_24a
  %v1_255 = load i32, i32* %esi.global-to-local, align 4
  %v2_255 = add i32 %v1_255, 24
  %v3_255 = inttoptr i32 %v2_255 to double*
  %v4_255 = load double, double* %v3_255, align 4
  %v5_255 = fpext double %v4_255 to x86_fp80
  %v2_258 = add i32 %v2_247, -84
  %v3_258 = inttoptr i32 %v2_258 to double*
  %v4_258 = load double, double* %v3_258, align 4
  %v5_258 = fpext double %v4_258 to x86_fp80
  %v3_25b = add i32 %v2_247, -16
  %v4_25b = inttoptr i32 %v3_25b to double*
  %v5_25b = load double, double* %v4_25b, align 4
  %v6_25b = fpext double %v5_25b to x86_fp80
  %v7_25b = fmul x86_fp80 %v5_258, %v6_25b
  %v4_260 = fsub x86_fp80 %v5_255, %v7_25b
  %v4_262 = fmul x86_fp80 %v4_253, %v4_260
  %v4_264 = fadd x86_fp80 %v7_24e, %v4_262
  %v4_266 = fptrunc x86_fp80 %v4_264 to double
  store double %v4_266, double* %v3_255, align 4
  %v1_269 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v1_269, x86_fp80* %st6.global-to-local, align 4
  %v3_26b = add i32 %v2_247, -64
  %v4_26b = inttoptr i32 %v3_26b to double*
  %v5_26b = load double, double* %v4_26b, align 4
  %v6_26b = fpext double %v5_26b to x86_fp80
  %v7_26b = fmul x86_fp80 %v1_269, %v6_26b
  store x86_fp80 %v7_26b, x86_fp80* %st6.global-to-local, align 4
  %v4_270 = fsub x86_fp80 0xK3FFF8000000000000000, %v1_269
  %v2_272 = add i32 %v1_255, 32
  %v3_272 = inttoptr i32 %v2_272 to double*
  %v4_272 = load double, double* %v3_272, align 4
  %v5_272 = fpext double %v4_272 to x86_fp80
  %v4_275 = load double, double* %v3_258, align 4
  %v5_275 = fpext double %v4_275 to x86_fp80
  %v3_278 = add i32 %v2_247, -24
  %v4_278 = inttoptr i32 %v3_278 to double*
  %v5_278 = load double, double* %v4_278, align 4
  %v6_278 = fpext double %v5_278 to x86_fp80
  %v7_278 = fmul x86_fp80 %v5_275, %v6_278
  %v4_27d = fsub x86_fp80 %v5_272, %v7_278
  %v4_27f = fmul x86_fp80 %v4_270, %v4_27d
  %v4_281 = fadd x86_fp80 %v7_26b, %v4_27f
  %v4_283 = fptrunc x86_fp80 %v4_281 to double
  store double %v4_283, double* %v3_272, align 4
  %v1_286 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v1_286, x86_fp80* %st6.global-to-local, align 4
  %v3_288 = add i32 %v2_247, -72
  %v4_288 = inttoptr i32 %v3_288 to double*
  %v5_288 = load double, double* %v4_288, align 4
  %v6_288 = fpext double %v5_288 to x86_fp80
  %v7_288 = fmul x86_fp80 %v1_286, %v6_288
  store x86_fp80 %v7_288, x86_fp80* %st6.global-to-local, align 4
  %v4_28d = fsub x86_fp80 0xK3FFF8000000000000000, %v1_286
  %v2_28f = add i32 %v1_255, 40
  %v3_28f = inttoptr i32 %v2_28f to double*
  %v4_28f = load double, double* %v3_28f, align 4
  %v5_28f = fpext double %v4_28f to x86_fp80
  %v4_292 = load double, double* %v3_258, align 4
  %v5_292 = fpext double %v4_292 to x86_fp80
  %v3_295 = add i32 %v2_247, -32
  %v4_295 = inttoptr i32 %v3_295 to double*
  %v5_295 = load double, double* %v4_295, align 4
  %v6_295 = fpext double %v5_295 to x86_fp80
  %v7_295 = fmul x86_fp80 %v5_292, %v6_295
  %v4_29a = fsub x86_fp80 %v5_28f, %v7_295
  %v4_29c = fmul x86_fp80 %v4_28d, %v4_29a
  %v4_29e = fadd x86_fp80 %v7_288, %v4_29c
  store x86_fp80 %v4_29e, x86_fp80* %st6.global-to-local, align 4
  store i3 %v1_245, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_2a0 = fptrunc x86_fp80 %v4_29e to double
  store double %v4_2a0, double* %v3_28f, align 4
  br label %dec_label_pc_1c7

dec_label_pc_2a8:                                 ; preds = %dec_label_pc_236
  %v1_2a9 = load i32, i32* %esi.global-to-local, align 4
  %v2_2a9 = add i32 %v1_2a9, 24
  %v3_2a9 = inttoptr i32 %v2_2a9 to double*
  %v4_2a9 = load double, double* %v3_2a9, align 4
  %v5_2a9 = fpext double %v4_2a9 to x86_fp80
  store x86_fp80 %v5_2a9, x86_fp80* %st6.global-to-local, align 4
  %v1_2ac = load i32, i32* %edi.global-to-local, align 4
  %v2_2ac = add i32 %v1_2ac, -84
  %v3_2ac = inttoptr i32 %v2_2ac to double*
  %v4_2ac = load double, double* %v3_2ac, align 4
  %v5_2ac = fpext double %v4_2ac to x86_fp80
  %v3_2af = add i32 %v1_2ac, -16
  %v4_2af = inttoptr i32 %v3_2af to double*
  %v5_2af = load double, double* %v4_2af, align 4
  %v6_2af = fpext double %v5_2af to x86_fp80
  %v7_2af = fmul x86_fp80 %v5_2ac, %v6_2af
  %v4_2b4 = fsub x86_fp80 %v5_2a9, %v7_2af
  store x86_fp80 %v4_2b4, x86_fp80* %st6.global-to-local, align 4
  %v7_2b4 = add i3 %v0_2a9, -1
  %v4_2b6 = fptrunc x86_fp80 %v4_2b4 to double
  store double %v4_2b6, double* %v3_2a9, align 4
  %v2_2b9 = add i32 %v1_2a9, 32
  %v3_2b9 = inttoptr i32 %v2_2b9 to double*
  %v4_2b9 = load double, double* %v3_2b9, align 4
  %v5_2b9 = fpext double %v4_2b9 to x86_fp80
  store x86_fp80 %v5_2b9, x86_fp80* %st6.global-to-local, align 4
  %v4_2bc = load double, double* %v3_2ac, align 4
  %v5_2bc = fpext double %v4_2bc to x86_fp80
  %v3_2bf = add i32 %v1_2ac, -24
  %v4_2bf = inttoptr i32 %v3_2bf to double*
  %v5_2bf = load double, double* %v4_2bf, align 4
  %v6_2bf = fpext double %v5_2bf to x86_fp80
  %v7_2bf = fmul x86_fp80 %v5_2bc, %v6_2bf
  %v4_2c4 = fsub x86_fp80 %v5_2b9, %v7_2bf
  store x86_fp80 %v4_2c4, x86_fp80* %st6.global-to-local, align 4
  %v4_2c6 = fptrunc x86_fp80 %v4_2c4 to double
  store double %v4_2c6, double* %v3_2b9, align 4
  %v2_2c9 = add i32 %v1_2a9, 40
  %v3_2c9 = inttoptr i32 %v2_2c9 to double*
  %v4_2c9 = load double, double* %v3_2c9, align 4
  %v5_2c9 = fpext double %v4_2c9 to x86_fp80
  store x86_fp80 %v5_2c9, x86_fp80* %st6.global-to-local, align 4
  %v4_2cc = load double, double* %v3_2ac, align 4
  %v5_2cc = fpext double %v4_2cc to x86_fp80
  %v3_2cf = add i32 %v1_2ac, -32
  %v4_2cf = inttoptr i32 %v3_2cf to double*
  %v5_2cf = load double, double* %v4_2cf, align 4
  %v6_2cf = fpext double %v5_2cf to x86_fp80
  %v7_2cf = fmul x86_fp80 %v5_2cc, %v6_2cf
  %v4_2d4 = fsub x86_fp80 %v5_2c9, %v7_2cf
  store x86_fp80 %v4_2d4, x86_fp80* %st6.global-to-local, align 4
  store i3 %v7_2b4, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_2d6 = fptrunc x86_fp80 %v4_2d4 to double
  store double %v4_2d6, double* %v3_2c9, align 4
  br label %dec_label_pc_20a
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

attributes #0 = { nounwind readnone speculatable }
