source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp252 = call double @__decompiler_undefined_function_2()
  %stack_var_-28 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-28, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_4b = load double, double* %stack_var_-28, align 8
  %v8_4b = fpext double %v3_4b to x86_fp80
  %v9_4b = add i3 %v0_4b, -1
  %v3_4e = fmul x86_fp80 %v8_4b, %v8_4b
  %tmp257 = fptrunc x86_fp80 %v3_4e to double
  store double %tmp257, double* %stack_var_-28, align 8
  %v5_53 = fpext double %tmp252 to x86_fp80
  %v3_57 = fmul x86_fp80 %v5_53, %v5_53
  %v7_5d = fpext double %v6_45 to x86_fp80
  %v3_61 = fmul x86_fp80 %v7_5d, %v7_5d
  %v7_6a = fadd x86_fp80 %v3_4e, %v3_57
  store x86_fp80 %v7_6a, x86_fp80* %st7.global-to-local, align 4
  %v2_6e = load i32, i32* %edi.global-to-local, align 8
  %v3_6e = add i32 %v2_6e, -16
  %v4_6e = inttoptr i32 %v3_6e to double*
  %v5_6e = load double, double* %v4_6e, align 4
  %v6_6e = fpext double %v5_6e to x86_fp80
  %v7_6e = fsub x86_fp80 %v7_6a, %v6_6e
  %v3_71 = fmul x86_fp80 %v7_6e, %v7_6e
  store x86_fp80 %v3_71, x86_fp80* %st7.global-to-local, align 4
  %v3_77 = add i32 %v2_6e, -72
  %v4_77 = inttoptr i32 %v3_77 to double*
  %v5_77 = load double, double* %v4_77, align 4
  %v6_77 = fpext double %v5_77 to x86_fp80
  %v7_77 = fsub x86_fp80 %v3_61, %v6_77
  %v3_7a = fmul x86_fp80 %v7_77, %v7_77
  %v4_7c = fadd x86_fp80 %v3_71, %v3_7a
  store x86_fp80 %v4_7c, x86_fp80* %st7.global-to-local, align 4
  %v10_81 = fadd x86_fp80 %v3_4e, %v3_61
  %v5_85 = load double, double* %v4_6e, align 4
  %v6_85 = fpext double %v5_85 to x86_fp80
  %v7_85 = fsub x86_fp80 %v10_81, %v6_85
  %v3_88 = fmul x86_fp80 %v7_85, %v7_85
  %v5_8e = load double, double* %v4_77, align 4
  %v6_8e = fpext double %v5_8e to x86_fp80
  %v7_8e = fsub x86_fp80 %v3_57, %v6_8e
  %v3_91 = fmul x86_fp80 %v7_8e, %v7_8e
  %v4_93 = fadd x86_fp80 %v3_88, %v3_91
  %v7_99 = fadd x86_fp80 %v3_61, %v3_57
  %v7_9d = fsub x86_fp80 %v7_99, %v6_85
  %v3_a0 = fmul x86_fp80 %v7_9d, %v7_9d
  %v7_a5 = fsub x86_fp80 %v3_4e, %v6_8e
  %v3_a8 = fmul x86_fp80 %v7_a5, %v7_a5
  %v4_aa = fadd x86_fp80 %v3_a0, %v3_a8
  %v4_ac = fmul x86_fp80 %v4_93, %v4_aa
  %v4_ae = fmul x86_fp80 %v4_7c, %v4_ac
  %v2_b0 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_ae)
  %v2_b2 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_b0)
  store x86_fp80 %v2_b2, x86_fp80* %st7.global-to-local, align 4
  %v3_b4 = add i32 %v2_6e, -84
  %v4_b4 = inttoptr i32 %v3_b4 to double*
  %v5_b4 = load double, double* %v4_b4, align 4
  %v6_b4 = fpext double %v5_b4 to x86_fp80
  %v7_b4 = fsub x86_fp80 %v2_b2, %v6_b4
  store x86_fp80 %v7_b4, x86_fp80* %st7.global-to-local, align 4
  store i3 %v9_4b, i3* %fpu_stat_TOP.global-to-local, align 1
  %v12_bc = call i32 @__asm_wait(x86_fp80 %v3_4e, x86_fp80 %v3_57, x86_fp80 %v3_61)
  %v0_bd = load i32, i32* %fpsw.global-to-local, align 4
  %v1_bd = call i16 @__asm_fnstsw(i32 %v0_bd)
  %v2_bd = sext i16 %v1_bd to i32
  %v4_bd = and i32 %v12_bc, -65536
  %tmp260 = udiv i32 %v2_bd, 2
  %v12_bf = and i32 %tmp260, 32512
  %v2_bd.masked = and i32 %v2_bd, -65281
  %v13_bf = or i32 %v4_bd, %v2_bd.masked
  %v14_bf = or i32 %v13_bf, %v12_bf
  %v15_bf6 = and i32 %v2_bd, 256
  %v16_bf = icmp ne i32 %v15_bf6, 0
  %v1_c1 = icmp eq i1 %v16_bf, false
  br i1 %v1_c1, label %dec_label_pc_40.dec_label_pc_d2_crit_edge, label %dec_label_pc_c3

dec_label_pc_40.dec_label_pc_d2_crit_edge:        ; preds = %dec_label_pc_40
  %v1_dc.pre.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_d2

dec_label_pc_c3:                                  ; preds = %dec_label_pc_40
  %v10_cc = fadd x86_fp80 %v3_61, %v7_6a
  %v2_d0 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v10_cc)
  store x86_fp80 %v2_d0, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_d2

dec_label_pc_d2:                                  ; preds = %dec_label_pc_40.dec_label_pc_d2_crit_edge, %dec_label_pc_c3
  %v1_dc.pre = phi x86_fp80 [ %v1_dc.pre.pre, %dec_label_pc_40.dec_label_pc_d2_crit_edge ], [ %v2_d0, %dec_label_pc_c3 ]
  %v0_d3 = load i32, i32* %edi.global-to-local, align 8
  %v1_d3 = add i32 %v0_d3, -76
  %v2_d3 = inttoptr i32 %v1_d3 to i32*
  %v3_d3 = load i32, i32* %v2_d3, align 4
  %v10_d3 = icmp eq i32 %v3_d3, 0
  %v1_d7 = icmp eq i1 %v10_d3, false
  br i1 %v1_d7, label %dec_label_pc_dc, label %dec_label_pc_d9

dec_label_pc_d9:                                  ; preds = %dec_label_pc_d2
  %v3_d9 = add i32 %v0_d3, -32
  %v4_d9 = inttoptr i32 %v3_d9 to double*
  %v5_d9 = load double, double* %v4_d9, align 4
  %v6_d9 = fpext double %v5_d9 to x86_fp80
  %v7_d9 = fdiv x86_fp80 %v1_dc.pre, %v6_d9
  store x86_fp80 %v7_d9, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_dc

dec_label_pc_dc:                                  ; preds = %dec_label_pc_d2, %dec_label_pc_d9
  %v1_dc = phi x86_fp80 [ %v7_d9, %dec_label_pc_d9 ], [ %v1_dc.pre, %dec_label_pc_d2 ]
  %v0_dc = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_dc = load i32, i32* %esi.global-to-local, align 4
  %v3_dc = add i32 %v2_dc, -32
  %v4_dc = fptrunc x86_fp80 %v1_dc to double
  %v5_dc = inttoptr i32 %v3_dc to double*
  store double %v4_dc, double* %v5_dc, align 4
  %v6_dc = add i3 %v0_dc, 1
  store i3 %v6_dc, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_bf
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_wait(x86_fp80, x86_fp80, x86_fp80) local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_2() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
