source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %ebx.global-to-local, align 4
  %v0_4 = load i32, i32* %esi.global-to-local, align 4
  %v0_5 = load i32, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  %v0_d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_d = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_d = fpext double %v3_d to x86_fp80
  store x86_fp80 %v4_d, x86_fp80* %st7.global-to-local, align 4
  %v3_f = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_f = fpext double %v3_f to x86_fp80
  store x86_fp80 %v4_f, x86_fp80* %st6.global-to-local, align 4
  %v3_11 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_11 = fpext double %v3_11 to x86_fp80
  store x86_fp80 %v4_11, x86_fp80* %st5.global-to-local, align 4
  %v3_15 = add i32 %v3_a, -68
  %v4_15 = inttoptr i32 %v3_15 to float*
  %v5_15 = load float, float* %v4_15, align 4
  %v6_15 = fpext float %v5_15 to x86_fp80
  %v7_15 = fmul x86_fp80 %v4_11, %v6_15
  %v3_1a = add i32 %v3_a, -72
  %v4_1a = inttoptr i32 %v3_1a to float*
  %v5_1a = load float, float* %v4_1a, align 4
  %v6_1a = fpext float %v5_1a to x86_fp80
  %v7_1a = fmul x86_fp80 %v4_f, %v6_1a
  %v4_1d = fadd x86_fp80 %v7_15, %v7_1a
  %v3_21 = add i32 %v3_a, -76
  %v4_21 = inttoptr i32 %v3_21 to float*
  %v5_21 = load float, float* %v4_21, align 4
  %v6_21 = fpext float %v5_21 to x86_fp80
  %v7_21 = fmul x86_fp80 %v4_d, %v6_21
  %v4_24 = fadd x86_fp80 %v7_21, %v4_1d
  %v3_28 = add i32 %v3_a, -44
  %v4_28 = inttoptr i32 %v3_28 to float*
  %v5_28 = load float, float* %v4_28, align 4
  %v6_28 = fpext float %v5_28 to x86_fp80
  %v7_28 = fmul x86_fp80 %v4_11, %v6_28
  %v3_2d = add i32 %v3_a, -48
  %v4_2d = inttoptr i32 %v3_2d to float*
  %v5_2d = load float, float* %v4_2d, align 4
  %v6_2d = fpext float %v5_2d to x86_fp80
  %v7_2d = fmul x86_fp80 %v4_f, %v6_2d
  %v4_30 = fadd x86_fp80 %v7_28, %v7_2d
  %v3_34 = add i32 %v3_a, -52
  %v4_34 = inttoptr i32 %v3_34 to float*
  %v5_34 = load float, float* %v4_34, align 4
  %v6_34 = fpext float %v5_34 to x86_fp80
  %v7_34 = fmul x86_fp80 %v4_d, %v6_34
  %v4_37 = fadd x86_fp80 %v4_30, %v7_34
  store x86_fp80 %v4_37, x86_fp80* %st5.global-to-local, align 4
  %v3_3b = add i32 %v3_a, -56
  %v4_3b = inttoptr i32 %v3_3b to float*
  %v5_3b = load float, float* %v4_3b, align 4
  %v6_3b = fpext float %v5_3b to x86_fp80
  %v7_3b = fmul x86_fp80 %v4_11, %v6_3b
  store x86_fp80 %v7_3b, x86_fp80* %st6.global-to-local, align 4
  %v3_40 = add i32 %v3_a, -60
  %v4_40 = inttoptr i32 %v3_40 to float*
  %v5_40 = load float, float* %v4_40, align 4
  %v6_40 = fpext float %v5_40 to x86_fp80
  %v7_40 = fmul x86_fp80 %v4_f, %v6_40
  %v4_43 = fadd x86_fp80 %v7_3b, %v7_40
  store x86_fp80 %v4_43, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_24, x86_fp80* %st7.global-to-local, align 4
  %v3_47 = add i32 %v3_a, -64
  %v4_47 = inttoptr i32 %v3_47 to float*
  %v5_47 = load float, float* %v4_47, align 4
  %v6_47 = fpext float %v5_47 to x86_fp80
  %v7_47 = fmul x86_fp80 %v4_d, %v6_47
  %v4_4a = fadd x86_fp80 %v4_43, %v7_47
  store x86_fp80 %v4_4a, x86_fp80* %st6.global-to-local, align 4
  %v7_4a = add i3 %v0_d, -3
  store i3 %v7_4a, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_4c = fsub x86_fp80 0xK80000000000000000000, %v4_37
  store x86_fp80 %v2_4c, x86_fp80* %st5.global-to-local, align 4
  %v0_50 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_50 = call i16 @__asm_fnstsw(i32 %v0_50)
  %v2_50 = sext i16 %v1_50 to i32
  %v3_50 = load i32, i32* @eax, align 8
  %v4_50 = and i32 %v3_50, -65536
  %tmp262 = udiv i32 %v2_50, 2
  %v12_52 = and i32 %tmp262, 32512
  %v2_50.masked = and i32 %v2_50, -65281
  %v13_52 = or i32 %v4_50, %v2_50.masked
  %v14_52 = or i32 %v13_52, %v12_52
  store i32 %v14_52, i32* @eax, align 8
  %v15_5223 = and i32 %v2_50, 256
  %v16_52 = icmp eq i32 %v15_5223, 0
  br i1 %v16_52, label %dec_label_pc_56, label %dec_label_pc_58

dec_label_pc_56:                                  ; preds = %dec_label_pc_0
  %v2_56 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_56 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_56, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v2_56, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_58

dec_label_pc_58:                                  ; preds = %dec_label_pc_0, %dec_label_pc_56
  %v0_5a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_5a = call i16 @__asm_fnstsw(i32 %v0_5a)
  %v2_5a = sext i16 %v1_5a to i32
  %v3_5a = load i32, i32* @eax, align 8
  %v4_5a = and i32 %v3_5a, -65536
  %tmp263 = udiv i32 %v2_5a, 2
  %v12_5c = and i32 %tmp263, 32512
  %v2_5a.masked = and i32 %v2_5a, -65281
  %v13_5c = or i32 %v4_5a, %v2_5a.masked
  %v14_5c = or i32 %v13_5c, %v12_5c
  store i32 %v14_5c, i32* @eax, align 8
  %v0_6a = load i32, i32* %fpsw.global-to-local, align 4
  %v1_6a = call i16 @__asm_fnstsw(i32 %v0_6a)
  %v2_6a = sext i16 %v1_6a to i32
  %v3_6a = load i32, i32* @eax, align 8
  %v4_6a = and i32 %v3_6a, -65536
  %tmp264 = udiv i32 %v2_6a, 2
  %v12_6c = and i32 %tmp264, 32512
  %v2_6a.masked = and i32 %v2_6a, -65281
  %v13_6c = or i32 %v4_6a, %v2_6a.masked
  %v14_6c = or i32 %v13_6c, %v12_6c
  store i32 %v14_6c, i32* @eax, align 8
  %v1_72 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_72 = fsub x86_fp80 0xK80000000000000000000, %v1_72
  store x86_fp80 %v2_72, x86_fp80* %st7.global-to-local, align 4
  %v0_78 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_78 = load i32, i32* %esi.global-to-local, align 4
  %v2_78 = add i32 %v1_78, -120
  %v3_78 = inttoptr i32 %v2_78 to double*
  %v4_78 = load double, double* %v3_78, align 4
  %v5_78 = fpext double %v4_78 to x86_fp80
  %v6_78 = add i3 %v0_78, -1
  store x86_fp80 %v5_78, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st5.global-to-local, align 4
  store i3 %v6_78, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_7f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_7f = call i16 @__asm_fnstsw(i32 %v0_7f)
  %v2_7f = sext i16 %v1_7f to i32
  %v3_7f = load i32, i32* @eax, align 8
  %v4_7f = and i32 %v3_7f, -65536
  %tmp265 = udiv i32 %v2_7f, 2
  %v12_81 = and i32 %tmp265, 32512
  %v2_7f.masked = and i32 %v2_7f, -65281
  %v13_81 = or i32 %v4_7f, %v2_7f.masked
  %v14_81 = or i32 %v13_81, %v12_81
  store i32 %v14_81, i32* @eax, align 8
  %v15_8126 = and i32 %v2_7f, 256
  %v16_81 = icmp ne i32 %v15_8126, 0
  %v1_83 = icmp eq i1 %v16_81, false
  br i1 %v1_83, label %dec_label_pc_58.dec_label_pc_90_crit_edge, label %dec_label_pc_85

dec_label_pc_58.dec_label_pc_90_crit_edge:        ; preds = %dec_label_pc_58
  %v1_94.pre = load i32, i32* %esi.global-to-local, align 4
  br label %dec_label_pc_90

dec_label_pc_85:                                  ; preds = %dec_label_pc_58
  %v2_85 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_85 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_85 = fsub x86_fp80 %v2_85, %v3_85
  store x86_fp80 %v4_85, x86_fp80* %st6.global-to-local, align 4
  %v2_87 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v3_85)
  %v2_89 = fsub x86_fp80 0xK80000000000000000000, %v2_87
  store x86_fp80 %v2_89, x86_fp80* %st7.global-to-local, align 4
  %v2_8b = load i32, i32* %esi.global-to-local, align 4
  %v3_8b = add i32 %v2_8b, -120
  %v4_8b = inttoptr i32 %v3_8b to double*
  %v5_8b = load double, double* %v4_8b, align 4
  %v6_8b = fpext double %v5_8b to x86_fp80
  %v7_8b = fsub x86_fp80 %v6_8b, %v2_87
  store x86_fp80 %v7_8b, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_90

dec_label_pc_90:                                  ; preds = %dec_label_pc_58.dec_label_pc_90_crit_edge, %dec_label_pc_85
  %v1_94 = phi i32 [ %v1_94.pre, %dec_label_pc_58.dec_label_pc_90_crit_edge ], [ %v2_8b, %dec_label_pc_85 ]
  %v2_94 = add i32 %v1_94, -128
  %v3_94 = inttoptr i32 %v2_94 to double*
  %v4_94 = load double, double* %v3_94, align 4
  %v5_94 = fpext double %v4_94 to x86_fp80
  store x86_fp80 %v5_94, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 0xK00000000000000000000, x86_fp80* %st5.global-to-local, align 4
  %v0_9b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_9b = call i16 @__asm_fnstsw(i32 %v0_9b)
  %v2_9b = sext i16 %v1_9b to i32
  %v3_9b = load i32, i32* @eax, align 8
  %v4_9b = and i32 %v3_9b, -65536
  %tmp266 = udiv i32 %v2_9b, 2
  %v12_9d = and i32 %tmp266, 32512
  %v2_9b.masked = and i32 %v2_9b, -65281
  %v13_9d = or i32 %v4_9b, %v2_9b.masked
  %v14_9d = or i32 %v13_9d, %v12_9d
  store i32 %v14_9d, i32* @eax, align 8
  %v15_9d27 = and i32 %v2_9b, 256
  %v16_9d = icmp ne i32 %v15_9d27, 0
  %v1_9f = icmp eq i1 %v16_9d, false
  br i1 %v1_9f, label %dec_label_pc_90.dec_label_pc_ac_crit_edge, label %dec_label_pc_a1

dec_label_pc_90.dec_label_pc_ac_crit_edge:        ; preds = %dec_label_pc_90
  %v1_b2.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_b4.pre = load i32, i32* %esi.global-to-local, align 4
  br label %dec_label_pc_ac

dec_label_pc_a1:                                  ; preds = %dec_label_pc_90
  %v2_a1 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_a1 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_a1 = fsub x86_fp80 %v2_a1, %v3_a1
  %v2_a3 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_a1)
  %v2_a5 = fsub x86_fp80 0xK80000000000000000000, %v2_a3
  store x86_fp80 %v2_a5, x86_fp80* %st6.global-to-local, align 4
  %v2_a7 = load i32, i32* %esi.global-to-local, align 4
  %v3_a7 = add i32 %v2_a7, -128
  %v4_a7 = inttoptr i32 %v3_a7 to double*
  %v5_a7 = load double, double* %v4_a7, align 4
  %v6_a7 = fpext double %v5_a7 to x86_fp80
  %v7_a7 = fsub x86_fp80 %v6_a7, %v2_a3
  store x86_fp80 %v3_a1, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v7_a7, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_ac

dec_label_pc_ac:                                  ; preds = %dec_label_pc_90.dec_label_pc_ac_crit_edge, %dec_label_pc_a1
  %v2_102 = phi i32 [ %v2_b4.pre, %dec_label_pc_90.dec_label_pc_ac_crit_edge ], [ %v2_a7, %dec_label_pc_a1 ]
  %v3_d8 = phi x86_fp80 [ %v1_b2.pre, %dec_label_pc_90.dec_label_pc_ac_crit_edge ], [ %v7_a7, %dec_label_pc_a1 ]
  %v0_ac = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v3_d8, x86_fp80* %st6.global-to-local, align 4
  %v3_b4 = add i32 %v2_102, -104
  %v4_b4 = inttoptr i32 %v3_b4 to float*
  %v5_b4 = load float, float* %v4_b4, align 4
  %v6_b4 = fpext float %v5_b4 to x86_fp80
  %v7_b4 = fmul x86_fp80 %v3_d8, %v6_b4
  store x86_fp80 %v7_b4, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_d8, x86_fp80* %st5.global-to-local, align 4
  %v3_b9 = add i32 %v2_102, -108
  %v4_b9 = inttoptr i32 %v3_b9 to float*
  %v5_b9 = load float, float* %v4_b9, align 4
  %v6_b9 = fpext float %v5_b9 to x86_fp80
  %v7_b9 = fmul x86_fp80 %v3_d8, %v6_b9
  %v4_bc = fadd x86_fp80 %v7_b4, %v7_b9
  store x86_fp80 %v4_bc, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_d8, x86_fp80* %st5.global-to-local, align 4
  %v3_c0 = add i32 %v2_102, -112
  %v4_c0 = inttoptr i32 %v3_c0 to float*
  %v5_c0 = load float, float* %v4_c0, align 4
  %v6_c0 = fpext float %v5_c0 to x86_fp80
  %v7_c0 = fmul x86_fp80 %v3_d8, %v6_c0
  %v4_c3 = fadd x86_fp80 %v4_bc, %v7_c0
  store x86_fp80 %v4_c3, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v3_d8, x86_fp80* %st5.global-to-local, align 4
  %v3_c7 = add i32 %v2_102, -80
  %v4_c7 = inttoptr i32 %v3_c7 to float*
  %v5_c7 = load float, float* %v4_c7, align 4
  %v6_c7 = fpext float %v5_c7 to x86_fp80
  %v7_c7 = fmul x86_fp80 %v3_d8, %v6_c7
  store x86_fp80 %v7_c7, x86_fp80* %st5.global-to-local, align 4
  %v3_cc = add i32 %v2_102, -84
  %v4_cc = inttoptr i32 %v3_cc to float*
  %v5_cc = load float, float* %v4_cc, align 4
  %v6_cc = fpext float %v5_cc to x86_fp80
  %v7_cc = fmul x86_fp80 %v3_d8, %v6_cc
  %v4_cf = fadd x86_fp80 %v7_c7, %v7_cc
  store x86_fp80 %v4_cf, x86_fp80* %st5.global-to-local, align 4
  %v3_d3 = add i32 %v2_102, -88
  %v4_d3 = inttoptr i32 %v3_d3 to float*
  %v5_d3 = load float, float* %v4_d3, align 4
  %v6_d3 = fpext float %v5_d3 to x86_fp80
  %v7_d3 = fmul x86_fp80 %v3_d8, %v6_d3
  %v4_d6 = fadd x86_fp80 %v4_cf, %v7_d3
  store x86_fp80 %v3_d8, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v4_d6, x86_fp80* %st7.global-to-local, align 4
  %v3_da = add i32 %v2_102, -92
  %v4_da = inttoptr i32 %v3_da to float*
  %v5_da = load float, float* %v4_da, align 4
  %v6_da = fpext float %v5_da to x86_fp80
  %v7_da = fmul x86_fp80 %v3_d8, %v6_da
  store x86_fp80 %v4_d6, x86_fp80* %st5.global-to-local, align 4
  store x86_fp80 %v7_da, x86_fp80* %st7.global-to-local, align 4
  %v3_df = add i32 %v2_102, -96
  %v4_df = inttoptr i32 %v3_df to float*
  %v5_df = load float, float* %v4_df, align 4
  %v6_df = fpext float %v5_df to x86_fp80
  %v7_df = fmul x86_fp80 %v7_da, %v6_df
  %v4_e2 = fadd x86_fp80 %v7_df, %v7_df
  store x86_fp80 %v4_e2, x86_fp80* %st7.global-to-local, align 4
  %v3_e6 = add i32 %v2_102, -100
  %v4_e6 = inttoptr i32 %v3_e6 to float*
  %v5_e6 = load float, float* %v4_e6, align 4
  %v6_e6 = fpext float %v5_e6 to x86_fp80
  %v7_e6 = fmul x86_fp80 %v4_e2, %v6_e6
  %v4_e9 = fadd x86_fp80 %v7_e6, %v7_e6
  store x86_fp80 %v4_e9, x86_fp80* %st7.global-to-local, align 4
  %v2_eb = add i32 %v2_102, -16
  %v3_eb = inttoptr i32 %v2_eb to double*
  %v4_eb = load double, double* %v3_eb, align 4
  %v5_eb = fpext double %v4_eb to x86_fp80
  store x86_fp80 %v5_eb, x86_fp80* %st7.global-to-local, align 4
  %v1_ee = load i32, i32* @ecx, align 8
  %v2_ee = add i32 %v1_ee, 8
  %v3_ee = inttoptr i32 %v2_ee to double*
  %v4_ee = load double, double* %v3_ee, align 4
  %v5_ee = fpext double %v4_ee to x86_fp80
  %v4_f1 = fmul x86_fp80 %v5_eb, %v5_ee
  %v4_f3 = fptrunc x86_fp80 %v4_f1 to double
  store double %v4_f3, double* %v3_ee, align 4
  %v2_f6 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_f6 = fmul x86_fp80 %v2_f6, %v2_f6
  %v4_f8 = fmul x86_fp80 %v4_f6, %v4_f6
  %v4_fa = fmul x86_fp80 %v4_f8, %v4_f8
  %v4_fe = fadd x86_fp80 %v4_fa, 0xKBFFF8000000000000000
  store x86_fp80 %v4_fe, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_fe, x86_fp80* %st6.global-to-local, align 4
  %v3_102 = add i32 %v2_102, -40
  %v4_102 = inttoptr i32 %v3_102 to double*
  %v5_102 = load double, double* %v4_102, align 4
  %v6_102 = fpext double %v5_102 to x86_fp80
  %v7_102 = fmul x86_fp80 %v4_fe, %v6_102
  %v4_105 = fsub x86_fp80 %v4_fe, %v7_102
  store x86_fp80 %v4_105, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_105, x86_fp80* %st6.global-to-local, align 4
  %v3_109 = add i32 %v2_102, -32
  %v4_109 = inttoptr i32 %v3_109 to double*
  %v5_109 = load double, double* %v4_109, align 4
  %v6_109 = fpext double %v5_109 to x86_fp80
  %v7_109 = fmul x86_fp80 %v4_105, %v6_109
  store x86_fp80 %v7_109, x86_fp80* %st6.global-to-local, align 4
  %v4_10c = fsub x86_fp80 %v4_105, %v7_109
  store x86_fp80 %v4_10c, x86_fp80* %st7.global-to-local, align 4
  %v3_10e = add i32 %v2_102, -24
  %v4_10e = inttoptr i32 %v3_10e to double*
  %v5_10e = load double, double* %v4_10e, align 4
  %v6_10e = fpext double %v5_10e to x86_fp80
  %v7_10e = fmul x86_fp80 %v4_10c, %v6_10e
  %v4_111 = fsub x86_fp80 %v7_10e, %v7_10e
  store x86_fp80 %v4_111, x86_fp80* %st7.global-to-local, align 4
  %v2_113 = load i32, i32* %ebx.global-to-local, align 4
  %v3_113 = fptrunc x86_fp80 %v4_111 to double
  %v4_113 = inttoptr i32 %v2_113 to double*
  store double %v3_113, double* %v4_113, align 4
  %v1_115 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_115 = load i32, i32* @edx, align 8
  %v3_115 = fptrunc x86_fp80 %v1_115 to double
  %v4_115 = inttoptr i32 %v2_115 to double*
  store double %v3_115, double* %v4_115, align 4
  %v1_117 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_117 = load i32, i32* @ecx, align 8
  %v3_117 = fptrunc x86_fp80 %v1_117 to double
  %v4_117 = inttoptr i32 %v2_117 to double*
  store double %v3_117, double* %v4_117, align 4
  %v5_117 = xor i3 %v0_ac, -4
  store i3 %v5_117, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_113, i32* @eax, align 8
  store i32 %v0_4, i32* %esi.global-to-local, align 4
  store i32 %v0_3, i32* %ebx.global-to-local, align 4
  ret i32 %v2_113
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

attributes #0 = { nounwind readnone speculatable }
