source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_8 = load i32, i32* @eax, align 8
  store i32 %v0_8, i32* %ebx.global-to-local, align 4
  %v1_a = add i32 %arg1, 48
  %v2_a = inttoptr i32 %v1_a to i32*
  %v3_a = load i32, i32* %v2_a, align 4
  store i32 %v3_a, i32* %esi.global-to-local, align 4
  %v0_d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_d = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_d = fpext double %v3_d to x86_fp80
  %v5_d = add i3 %v0_d, -1
  store x86_fp80 %v4_d, x86_fp80* %st7.global-to-local, align 4
  %v3_f = add i32 %v3_a, -32
  %v4_f = inttoptr i32 %v3_f to double*
  %v5_f = load double, double* %v4_f, align 4
  %v6_f = fpext double %v5_f to x86_fp80
  %v7_f = fmul x86_fp80 %v4_d, %v6_f
  store x86_fp80 %v7_f, x86_fp80* %st7.global-to-local, align 4
  %v3_12 = add i32 %v3_a, -16
  %v4_12 = inttoptr i32 %v3_12 to double*
  %v5_12 = load double, double* %v4_12, align 4
  %v6_12 = fpext double %v5_12 to x86_fp80
  %v7_12 = fadd x86_fp80 %v7_f, %v6_12
  store x86_fp80 %v7_12, x86_fp80* %st7.global-to-local, align 4
  store i3 %v5_d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_1b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1b = call i16 @__asm_fnstsw(i32 %v0_1b)
  %v2_1b = sext i16 %v1_1b to i32
  %v3_1b = load i32, i32* @eax, align 8
  %v4_1b = and i32 %v3_1b, -65536
  %v1_1d = udiv i32 %v2_1b, 256
  %v2_1d = trunc i32 %v1_1d to i8
  %v3_1d = and i8 %v2_1d, 65
  %v4_1d = icmp eq i8 %v3_1d, 0
  %v9_1d = zext i8 %v3_1d to i32
  %v11_1d = mul i32 %v9_1d, 256
  %v2_1b.masked = and i32 %v2_1b, -65281
  %v12_1d = or i32 %v4_1b, %v2_1b.masked
  %v13_1d = or i32 %v12_1d, %v11_1d
  store i32 %v13_1d, i32* @eax, align 8
  %v4_20 = icmp eq i1 %v4_1d, false
  %v0_2f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_2f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v1_31 = load i32, i32* %esi.global-to-local, align 4
  %v2_31 = add i32 %v1_31, -24
  %v3_31 = inttoptr i32 %v2_31 to double*
  %v4_31 = load double, double* %v3_31, align 4
  %v5_31 = fpext double %v4_31 to x86_fp80
  %v4_36 = fsub x86_fp80 %v1_2f, %v5_31
  %v4_29 = fsub x86_fp80 %v5_31, %v1_2f
  %storemerge5 = select i1 %v4_20, x86_fp80 %v4_36, x86_fp80 %v4_29
  %storemerge = fmul x86_fp80 %v1_2f, %storemerge5
  store x86_fp80 %storemerge, x86_fp80* %st7.global-to-local, align 4
  %v3_3a = add i32 %v1_31, -40
  %v4_3a = inttoptr i32 %v3_3a to double*
  %v5_3a = load double, double* %v4_3a, align 4
  %v6_3a = fpext double %v5_3a to x86_fp80
  %v7_3a = fdiv x86_fp80 %storemerge, %v6_3a
  store x86_fp80 %v7_3a, x86_fp80* %st7.global-to-local, align 4
  %v3_3d = add i32 %v1_31, -16
  %v4_3d = inttoptr i32 %v3_3d to double*
  %v5_3d = load double, double* %v4_3d, align 4
  %v6_3d = fpext double %v5_3d to x86_fp80
  %v7_3d = fsub x86_fp80 %v7_3a, %v6_3d
  store x86_fp80 %v7_3d, x86_fp80* %st7.global-to-local, align 4
  %v2_40 = load i32, i32* %ebx.global-to-local, align 4
  %v3_40 = fptrunc x86_fp80 %v7_3d to double
  %v4_40 = inttoptr i32 %v2_40 to double*
  store double %v3_40, double* %v4_40, align 4
  %v5_40 = add i3 %v0_2f, 1
  store i3 %v5_40, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_40, i32* @eax, align 8
  store i32 %v0_4, i32* %ebx.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v2_40
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr
