source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp260 = call double @__decompiler_undefined_function_3()
  %stack_var_-50 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-50, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_51 = load i32, i32* %edi.global-to-local, align 4
  %v1_51 = add i32 %v0_51, -44
  store i32 %v1_51, i32* %edi.global-to-local, align 4
  %v7_54 = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_54, x86_fp80* %st7.global-to-local, align 4
  %v5_58 = fpext double %tmp260 to x86_fp80
  %v3_5c = load double, double* %stack_var_-50, align 8
  %v8_5c = fpext double %v3_5c to x86_fp80
  %v3_61 = add i32 %v0_51, -104
  %v4_61 = inttoptr i32 %v3_61 to float*
  %v5_61 = load float, float* %v4_61, align 4
  %v6_61 = fpext float %v5_61 to x86_fp80
  %v7_61 = fmul x86_fp80 %v8_5c, %v6_61
  %v3_66 = add i32 %v0_51, -108
  %v4_66 = inttoptr i32 %v3_66 to float*
  %v5_66 = load float, float* %v4_66, align 4
  %v6_66 = fpext float %v5_66 to x86_fp80
  %v7_66 = fmul x86_fp80 %v5_58, %v6_66
  %v4_69 = fadd x86_fp80 %v7_61, %v7_66
  %v3_6d = add i32 %v0_51, -112
  %v4_6d = inttoptr i32 %v3_6d to float*
  %v5_6d = load float, float* %v4_6d, align 4
  %v6_6d = fpext float %v5_6d to x86_fp80
  %v7_6d = fmul x86_fp80 %v7_54, %v6_6d
  %v4_70 = fadd x86_fp80 %v7_6d, %v4_69
  %v3_74 = add i32 %v0_51, -80
  %v4_74 = inttoptr i32 %v3_74 to float*
  %v5_74 = load float, float* %v4_74, align 4
  %v6_74 = fpext float %v5_74 to x86_fp80
  %v7_74 = fmul x86_fp80 %v8_5c, %v6_74
  %v3_79 = add i32 %v0_51, -84
  %v4_79 = inttoptr i32 %v3_79 to float*
  %v5_79 = load float, float* %v4_79, align 4
  %v6_79 = fpext float %v5_79 to x86_fp80
  %v7_79 = fmul x86_fp80 %v5_58, %v6_79
  %v4_7c = fadd x86_fp80 %v7_74, %v7_79
  %v3_80 = add i32 %v0_51, -88
  %v4_80 = inttoptr i32 %v3_80 to float*
  %v5_80 = load float, float* %v4_80, align 4
  %v6_80 = fpext float %v5_80 to x86_fp80
  %v7_80 = fmul x86_fp80 %v7_54, %v6_80
  %v4_83 = fadd x86_fp80 %v4_7c, %v7_80
  %v3_87 = add i32 %v0_51, -92
  %v4_87 = inttoptr i32 %v3_87 to float*
  %v5_87 = load float, float* %v4_87, align 4
  %v6_87 = fpext float %v5_87 to x86_fp80
  %v7_87 = fmul x86_fp80 %v8_5c, %v6_87
  %v3_8c = add i32 %v0_51, -96
  %v4_8c = inttoptr i32 %v3_8c to float*
  %v5_8c = load float, float* %v4_8c, align 4
  %v6_8c = fpext float %v5_8c to x86_fp80
  %v7_8c = fmul x86_fp80 %v5_58, %v6_8c
  %v4_8f = fadd x86_fp80 %v7_87, %v7_8c
  store x86_fp80 %v4_70, x86_fp80* %st7.global-to-local, align 4
  %v3_93 = add i32 %v0_51, -100
  %v4_93 = inttoptr i32 %v3_93 to float*
  %v5_93 = load float, float* %v4_93, align 4
  %v6_93 = fpext float %v5_93 to x86_fp80
  %v7_93 = fmul x86_fp80 %v7_54, %v6_93
  %v4_96 = fadd x86_fp80 %v4_8f, %v7_93
  %tmp266 = fptrunc x86_fp80 %v4_83 to double
  store double %tmp266, double* %stack_var_-50, align 8
  store i32 %v0_51, i32* %edi.global-to-local, align 4
  store x86_fp80 %v4_96, x86_fp80* %st7.global-to-local, align 4
  %v3_aa = add i32 %v0_51, 8
  %v4_aa = inttoptr i32 %v3_aa to double*
  %v5_aa = load double, double* %v4_aa, align 4
  %v6_aa = fpext double %v5_aa to x86_fp80
  %v7_aa = fmul x86_fp80 %v4_96, %v6_aa
  %v2_ad = call x86_fp80 @llvm.round.f80(x86_fp80 %v7_aa)
  store x86_fp80 %v2_ad, x86_fp80* %st7.global-to-local, align 4
  %v3_af = inttoptr i32 %v0_51 to double*
  %v4_af = load double, double* %v3_af, align 4
  %v5_af = fpext double %v4_af to x86_fp80
  %v6_af = fmul x86_fp80 %v2_ad, %v5_af
  %v7_b1 = fadd x86_fp80 %v6_af, %v4_96
  %v2_b5 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_b1)
  store x86_fp80 %v2_b5, x86_fp80* %st7.global-to-local, align 4
  %v5_bb = load double, double* %v4_aa, align 4
  %v6_bb = fpext double %v5_bb to x86_fp80
  %v7_bb = fmul x86_fp80 %v2_b5, %v6_bb
  store x86_fp80 %v7_bb, x86_fp80* %st7.global-to-local, align 4
  %v9_be = add i3 %v0_4b, -2
  %v3_c1 = add i32 %v0_51, 32
  %v4_c1 = inttoptr i32 %v3_c1 to double*
  %v5_c1 = load double, double* %v4_c1, align 4
  %v6_c1 = fpext double %v5_c1 to x86_fp80
  %v7_c1 = fmul x86_fp80 %v4_83, %v6_c1
  %v2_c4 = call x86_fp80 @llvm.round.f80(x86_fp80 %v7_c1)
  %v3_c6 = add i32 %v0_51, 24
  %v4_c6 = inttoptr i32 %v3_c6 to double*
  %v5_c6 = load double, double* %v4_c6, align 4
  %v6_c6 = fpext double %v5_c6 to x86_fp80
  %v7_c6 = fmul x86_fp80 %v2_c4, %v6_c6
  %v3_cc = add i32 %v0_51, 16
  %v4_cc = inttoptr i32 %v3_cc to double*
  %v5_cc = load double, double* %v4_cc, align 4
  %v6_cc = fpext double %v5_cc to x86_fp80
  %v7_cc = fmul x86_fp80 %v4_83, %v6_cc
  %v4_cf = fadd x86_fp80 %v7_cc, %v7_c6
  %v2_d1 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_cf)
  %v4_d3 = fadd x86_fp80 %v7_bb, %v2_d1
  store x86_fp80 %v4_d3, x86_fp80* %st7.global-to-local, align 4
  store i3 %v9_be, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_db = call i32 @__asm_wait()
  %v0_dc = load i32, i32* %fpsw.global-to-local, align 4
  %v1_dc = call i16 @__asm_fnstsw(i32 %v0_dc)
  %v2_e8 = load i32, i32* %edi.global-to-local, align 4
  %v3_e8 = add i32 %v2_e8, -72
  %v4_e8 = inttoptr i32 %v3_e8 to double*
  %v5_e8 = load double, double* %v4_e8, align 4
  %v6_e8 = fpext double %v5_e8 to x86_fp80
  %v7_e8 = fsub x86_fp80 %v4_d3, %v6_e8
  store x86_fp80 %v7_e8, x86_fp80* %st7.global-to-local, align 4
  %v0_f4 = call i32 @__asm_wait()
  %v0_f5 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_f5 = call i16 @__asm_fnstsw(i32 %v0_f5)
  %v2_f5 = sext i16 %v1_f5 to i32
  %v4_f5 = and i32 %v0_f4, -65536
  %tmp269 = udiv i32 %v2_f5, 2
  %v12_f7 = and i32 %tmp269, 32512
  %v2_f5.masked = and i32 %v2_f5, -65281
  %v13_f7 = or i32 %v4_f5, %v2_f5.masked
  %v14_f7 = or i32 %v13_f7, %v12_f7
  %v1_ff = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  %v3_101 = fmul x86_fp80 %v1_ff, %v1_ff
  %v3_107 = fmul x86_fp80 %v4_70, %v4_70
  %v4_109 = fadd x86_fp80 %v3_107, %v3_101
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_10b = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_109)
  store x86_fp80 %v2_10b, x86_fp80* %st7.global-to-local, align 4
  %v2_10d = load i32, i32* %edi.global-to-local, align 4
  %v3_10d = add i32 %v2_10d, -16
  %v4_10d = inttoptr i32 %v3_10d to double*
  %v5_10d = load double, double* %v4_10d, align 4
  %v6_10d = fpext double %v5_10d to x86_fp80
  %v7_10d = fsub x86_fp80 %v2_10b, %v6_10d
  store x86_fp80 %v7_10d, x86_fp80* %st7.global-to-local, align 4
  %v1_110 = add i32 %v2_10d, -76
  %v2_110 = inttoptr i32 %v1_110 to i32*
  %v3_110 = load i32, i32* %v2_110, align 4
  %v10_110 = icmp eq i32 %v3_110, 0
  %v1_114 = icmp eq i1 %v10_110, false
  br i1 %v1_114, label %dec_label_pc_119, label %dec_label_pc_116

dec_label_pc_116:                                 ; preds = %dec_label_pc_40
  %v3_116 = add i32 %v2_10d, -32
  %v4_116 = inttoptr i32 %v3_116 to double*
  %v5_116 = load double, double* %v4_116, align 4
  %v6_116 = fpext double %v5_116 to x86_fp80
  %v7_116 = fdiv x86_fp80 %v7_10d, %v6_116
  store x86_fp80 %v7_116, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_119

dec_label_pc_119:                                 ; preds = %dec_label_pc_116, %dec_label_pc_40
  %v1_119 = phi x86_fp80 [ %v7_116, %dec_label_pc_116 ], [ %v7_10d, %dec_label_pc_40 ]
  %v2_119 = load i32, i32* %esi.global-to-local, align 4
  %v3_119 = add i32 %v2_119, -32
  %v4_119 = fptrunc x86_fp80 %v1_119 to double
  %v5_119 = inttoptr i32 %v3_119 to double*
  store double %v4_119, double* %v5_119, align 4
  %v6_119 = add i3 %storemerge.in, 2
  store i3 %v6_119, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_f7
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
