source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp260 = call double @__decompiler_undefined_function_3()
  %stack_var_-50 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-50, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_4b = load double, double* %stack_var_-50, align 8
  %v8_4b = fpext double %v3_4b to x86_fp80
  store x86_fp80 %v8_4b, x86_fp80* %st7.global-to-local, align 4
  %v5_4e = fpext double %tmp260 to x86_fp80
  %v6_4e = add i3 %v0_4b, -2
  store i3 %v6_4e, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_4e, x86_fp80* %st6.global-to-local, align 4
  %v3_52 = call i32 @__asm_fpatan(i32 %v1_45)
  %v2_54 = load i32, i32* @edi, align 8
  %v3_54 = add i32 %v2_54, -84
  %v4_54 = inttoptr i32 %v3_54 to i32*
  %v5_54 = load i32, i32* %v4_54, align 4
  %v6_54 = sitofp i32 %v5_54 to x86_fp80
  %v7_54 = fmul x86_fp80 %v5_4e, %v6_54
  %v4_57 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_57 = fpext double %v4_57 to x86_fp80
  %v6_57 = fmul x86_fp80 %v7_54, %v5_57
  store x86_fp80 %v6_57, x86_fp80* %st6.global-to-local, align 4
  %v2_59 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v6_57)
  %v3_59 = fcmp olt x86_fp80 %v2_59, 0xK403E8000000000000000
  %tmp265 = bitcast double %v4_57 to i64
  %tmp266 = trunc i64 %tmp265 to i32
  %v0_59 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v3_59, label %bb, label %dec_label_pc_40._crit_edge

bb:                                               ; preds = %dec_label_pc_40
  %v4_59 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v6_57)
  store x86_fp80 %v4_59, x86_fp80* %st6.global-to-local, align 4
  %v8_59 = add i3 %v0_59, -1
  store i3 %v8_59, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_40._crit_edge

dec_label_pc_40._crit_edge:                       ; preds = %dec_label_pc_40, %bb
  %v0_5b = phi i3 [ %v8_59, %bb ], [ %v0_59, %dec_label_pc_40 ]
  %v1_5b = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v6_5b = add i3 %v0_5b, 1
  %v3_63 = load double, double* %stack_var_-50, align 8
  %v8_63 = fpext double %v3_63 to x86_fp80
  store x86_fp80 %v8_63, x86_fp80* %st7.global-to-local, align 4
  %v3_66 = add i32 %tmp266, -92
  %v4_66 = inttoptr i32 %v3_66 to double*
  %v5_66 = load double, double* %v4_66, align 4
  %v6_66 = fpext double %v5_66 to x86_fp80
  %v7_66 = fmul x86_fp80 %v8_63, %v6_66
  store x86_fp80 %v7_66, x86_fp80* %st7.global-to-local, align 4
  %tmp267 = fptrunc x86_fp80 %v7_66 to double
  store double %tmp267, double* %stack_var_-50, align 8
  %v1_6c = add i32 %tmp266, -80
  %v2_6c = inttoptr i32 %v1_6c to i32*
  %v3_6c = load i32, i32* %v2_6c, align 4
  %v10_6c = icmp eq i32 %v3_6c, 0
  %v1_70 = icmp eq i1 %v10_6c, false
  store i3 %v6_5b, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_66, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_70, label %dec_label_pc_83, label %dec_label_pc_72

dec_label_pc_72:                                  ; preds = %dec_label_pc_40._crit_edge
  %v3_75 = fmul x86_fp80 %v7_66, %v7_66
  %v3_7b = fmul x86_fp80 %v5_4e, %v5_4e
  store x86_fp80 %v3_7b, x86_fp80* %st6.global-to-local, align 4
  %v4_7d = fadd x86_fp80 %v3_7b, %v3_75
  store i3 %v6_5b, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_7f = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_7d)
  store x86_fp80 %v2_7f, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_9d

dec_label_pc_83:                                  ; preds = %dec_label_pc_40._crit_edge
  %v2_86 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_66)
  store x86_fp80 %v2_86, x86_fp80* %st7.global-to-local, align 4
  store i3 %v0_5b, i3* %fpu_stat_TOP.global-to-local, align 1
  %tmp268 = call double @llvm.fabs.f64(double %tmp260)
  %v2_8c = fpext double %tmp268 to x86_fp80
  store x86_fp80 %v2_8c, x86_fp80* %st6.global-to-local, align 4
  %v5_90 = call i32 @__asm_wait(x86_fp80 %v7_66)
  %v0_91 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_91 = call i16 @__asm_fnstsw(i32 %v0_91)
  %v2_91 = sext i16 %v1_91 to i32
  %v4_91 = and i32 %v5_90, -65536
  %tmp273 = udiv i32 %v2_91, 2
  %v12_93 = and i32 %tmp273, 32512
  %v2_91.masked = and i32 %v2_91, -65281
  %v13_93 = or i32 %v4_91, %v2_91.masked
  %v14_93 = or i32 %v13_93, %v12_93
  %v15_936 = and i32 %v2_91, 256
  %v16_93 = icmp ne i32 %v15_936, 0
  %v1_95 = icmp eq i1 %v16_93, false
  %v0_9b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_95, label %dec_label_pc_9b, label %dec_label_pc_97

dec_label_pc_97:                                  ; preds = %dec_label_pc_83
  %v4_97 = add i3 %v0_9b, 1
  store i3 %v4_97, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_9d.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_9d

dec_label_pc_9b:                                  ; preds = %dec_label_pc_83
  %v1_9b = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v1_9b, x86_fp80* %st7.global-to-local, align 4
  %v5_9b = add i3 %v0_9b, 1
  store i3 %v5_9b, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_9d

dec_label_pc_9d:                                  ; preds = %dec_label_pc_9b, %dec_label_pc_97, %dec_label_pc_72
  %v0_f9 = phi i32 [ %v14_93, %dec_label_pc_9b ], [ %v14_93, %dec_label_pc_97 ], [ %v3_52, %dec_label_pc_72 ]
  %v0_f3 = phi i3 [ %v5_9b, %dec_label_pc_9b ], [ %v4_97, %dec_label_pc_97 ], [ %v6_5b, %dec_label_pc_72 ]
  %v1_9d = phi x86_fp80 [ %v1_9b, %dec_label_pc_9b ], [ %v1_9d.pre, %dec_label_pc_97 ], [ %v2_7f, %dec_label_pc_72 ]
  %v2_9d = load i32, i32* @edi, align 8
  %v3_9d = add i32 %v2_9d, -16
  %v4_9d = inttoptr i32 %v3_9d to double*
  %v5_9d = load double, double* %v4_9d, align 4
  %v6_9d = fpext double %v5_9d to x86_fp80
  %v7_9d = fsub x86_fp80 %v1_9d, %v6_9d
  %tmp270 = fptrunc x86_fp80 %v7_9d to double
  store double %tmp270, double* %stack_var_-50, align 8
  %v7_a6 = fmul x86_fp80 %v1_5b, %v7_9d
  %v7_aa = fpext double %v6_45 to x86_fp80
  %v7_ae = fmul x86_fp80 %v1_5b, %v7_aa
  %v4_b4 = fsub x86_fp80 %v7_a6, %v7_ae
  %v4_c5 = fadd x86_fp80 %v7_ae, %v7_a6
  %v3_cd = fmul x86_fp80 %v4_c5, %v4_c5
  %v3_d1 = fmul x86_fp80 %v3_cd, %v3_cd
  %v4_d7 = fsub x86_fp80 %v3_d1, %v3_cd
  %v3_dd = fmul x86_fp80 %v4_b4, %v4_b4
  store x86_fp80 %v3_dd, x86_fp80* %st6.global-to-local, align 4
  %v4_df = fadd x86_fp80 %v4_d7, %v3_dd
  store i3 %v0_f3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_e1 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_df)
  %v2_e3 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_e1)
  %v4_e5 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_e5 = fpext double %v4_e5 to x86_fp80
  %v6_e5 = fmul x86_fp80 %v2_e3, %v5_e5
  store x86_fp80 %v6_e5, x86_fp80* %st7.global-to-local, align 4
  %tmp271 = bitcast double %v4_e5 to i64
  %tmp272 = trunc i64 %tmp271 to i32
  %v3_e7 = add i32 %tmp272, -72
  %v4_e7 = inttoptr i32 %v3_e7 to double*
  %v5_e7 = load double, double* %v4_e7, align 4
  %v6_e7 = fpext double %v5_e7 to x86_fp80
  %v7_e7 = fsub x86_fp80 %v6_e5, %v6_e7
  store x86_fp80 %v7_e7, x86_fp80* %st7.global-to-local, align 4
  %v1_ea = add i32 %tmp272, -76
  %v2_ea = inttoptr i32 %v1_ea to i32*
  %v3_ea = load i32, i32* %v2_ea, align 4
  %v10_ea = icmp eq i32 %v3_ea, 0
  %v1_ee = icmp eq i1 %v10_ea, false
  br i1 %v1_ee, label %dec_label_pc_f3, label %dec_label_pc_f0

dec_label_pc_f0:                                  ; preds = %dec_label_pc_9d
  %v3_f0 = add i32 %tmp272, -32
  %v4_f0 = inttoptr i32 %v3_f0 to double*
  %v5_f0 = load double, double* %v4_f0, align 4
  %v6_f0 = fpext double %v5_f0 to x86_fp80
  %v7_f0 = fdiv x86_fp80 %v7_e7, %v6_f0
  store x86_fp80 %v7_f0, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_f3

dec_label_pc_f3:                                  ; preds = %dec_label_pc_f0, %dec_label_pc_9d
  %v1_f3 = phi x86_fp80 [ %v7_f0, %dec_label_pc_f0 ], [ %v7_e7, %dec_label_pc_9d ]
  %v2_f3 = load i32, i32* %esi.global-to-local, align 4
  %v3_f3 = add i32 %v2_f3, -32
  %v4_f3 = fptrunc x86_fp80 %v1_f3 to double
  %v5_f3 = inttoptr i32 %v3_f3 to double*
  store double %v4_f3, double* %v5_f3, align 4
  %v6_f3 = add i3 %v0_f3, 1
  store i3 %v6_f3, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v0_f9
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_fpatan(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_wait(x86_fp80) local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
