source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %ecx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %esp.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  store i32 0, i32* %esp.global-to-local, align 4
  %stack_var_-36 = alloca i32, align 4
  %v0_0 = load i32, i32* %ecx.global-to-local, align 4
  %v15_1 = ptrtoint i32* %stack_var_-36 to i32
  %v0_4 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_4 = load i32, i32* %esi.global-to-local, align 4
  %v2_4 = add i32 %v1_4, -104
  %v3_4 = inttoptr i32 %v2_4 to double*
  %v4_4 = load double, double* %v3_4, align 4
  %v5_4 = fpext double %v4_4 to x86_fp80
  store x86_fp80 %v5_4, x86_fp80* %st7.global-to-local, align 4
  %v2_7 = add i32 %v1_4, -112
  %v3_7 = inttoptr i32 %v2_7 to double*
  %v4_7 = load double, double* %v3_7, align 4
  %v5_7 = fpext double %v4_7 to x86_fp80
  store x86_fp80 %v5_7, x86_fp80* %st6.global-to-local, align 4
  %v2_a = add i32 %v1_4, -120
  %v3_a = inttoptr i32 %v2_a to double*
  %v4_a = load double, double* %v3_a, align 4
  %v5_a = fpext double %v4_a to x86_fp80
  store x86_fp80 %v5_a, x86_fp80* %st5.global-to-local, align 4
  %v2_f = load i32, i32* %edi.global-to-local, align 4
  %v3_f = add i32 %v2_f, -64
  %v4_f = inttoptr i32 %v3_f to float*
  %v5_f = load float, float* %v4_f, align 4
  %v6_f = fpext float %v5_f to x86_fp80
  %v7_f = fmul x86_fp80 %v5_a, %v6_f
  %v3_14 = add i32 %v2_f, -68
  %v4_14 = inttoptr i32 %v3_14 to float*
  %v5_14 = load float, float* %v4_14, align 4
  %v6_14 = fpext float %v5_14 to x86_fp80
  %v7_14 = fmul x86_fp80 %v5_7, %v6_14
  %v4_17 = fadd x86_fp80 %v7_f, %v7_14
  %v3_1b = add i32 %v2_f, -72
  %v4_1b = inttoptr i32 %v3_1b to float*
  %v5_1b = load float, float* %v4_1b, align 4
  %v6_1b = fpext float %v5_1b to x86_fp80
  %v7_1b = fmul x86_fp80 %v5_4, %v6_1b
  %v4_1e = fadd x86_fp80 %v7_1b, %v4_17
  %v3_22 = add i32 %v2_f, -40
  %v4_22 = inttoptr i32 %v3_22 to float*
  %v5_22 = load float, float* %v4_22, align 4
  %v6_22 = fpext float %v5_22 to x86_fp80
  %v7_22 = fmul x86_fp80 %v5_a, %v6_22
  %v3_27 = add i32 %v2_f, -44
  %v4_27 = inttoptr i32 %v3_27 to float*
  %v5_27 = load float, float* %v4_27, align 4
  %v6_27 = fpext float %v5_27 to x86_fp80
  %v7_27 = fmul x86_fp80 %v5_7, %v6_27
  %v4_2a = fadd x86_fp80 %v7_22, %v7_27
  %v3_2e = add i32 %v2_f, -48
  %v4_2e = inttoptr i32 %v3_2e to float*
  %v5_2e = load float, float* %v4_2e, align 4
  %v6_2e = fpext float %v5_2e to x86_fp80
  %v7_2e = fmul x86_fp80 %v5_4, %v6_2e
  %v4_31 = fadd x86_fp80 %v4_2a, %v7_2e
  store x86_fp80 %v4_31, x86_fp80* %st5.global-to-local, align 4
  %v3_35 = add i32 %v2_f, -52
  %v4_35 = inttoptr i32 %v3_35 to float*
  %v5_35 = load float, float* %v4_35, align 4
  %v6_35 = fpext float %v5_35 to x86_fp80
  %v7_35 = fmul x86_fp80 %v5_a, %v6_35
  store x86_fp80 %v7_35, x86_fp80* %st6.global-to-local, align 4
  %v3_3a = add i32 %v2_f, -56
  %v4_3a = inttoptr i32 %v3_3a to float*
  %v5_3a = load float, float* %v4_3a, align 4
  %v6_3a = fpext float %v5_3a to x86_fp80
  %v7_3a = fmul x86_fp80 %v5_7, %v6_3a
  %v4_3d = fadd x86_fp80 %v7_35, %v7_3a
  store x86_fp80 %v4_3d, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_1e, x86_fp80* %st7.global-to-local, align 4
  %v3_41 = add i32 %v2_f, -60
  %v4_41 = inttoptr i32 %v3_41 to float*
  %v5_41 = load float, float* %v4_41, align 4
  %v6_41 = fpext float %v5_41 to x86_fp80
  %v7_41 = fmul x86_fp80 %v5_4, %v6_41
  %v4_44 = fadd x86_fp80 %v4_3d, %v7_41
  store x86_fp80 %v4_44, x86_fp80* %st6.global-to-local, align 4
  %v8_60 = add i3 %v0_4, -3
  store i3 %v8_60, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_62 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_62 = call i16 @__asm_fnstsw(i32 %v0_62)
  %v2_62 = sext i16 %v1_62 to i32
  %v3_62 = load i32, i32* %eax.global-to-local, align 4
  %v4_62 = and i32 %v3_62, -65536
  %tmp241 = udiv i32 %v2_62, 2
  %v12_64 = and i32 %tmp241, 32512
  %v2_62.masked = and i32 %v2_62, -65281
  %v13_64 = or i32 %v4_62, %v2_62.masked
  %v14_64 = or i32 %v13_64, %v12_64
  store i32 %v14_64, i32* %eax.global-to-local, align 4
  %v15_647 = and i32 %v2_62, 256
  %v16_64 = icmp ne i32 %v15_647, 0
  %v1_66 = icmp eq i1 %v16_64, false
  br i1 %v1_66, label %dec_label_pc_7d, label %dec_label_pc_68

dec_label_pc_68:                                  ; preds = %dec_label_pc_0
  %v0_68 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_6a = load i32, i32* %edi.global-to-local, align 4
  %v2_6a = add i32 %v1_6a, -8
  %v3_6a = inttoptr i32 %v2_6a to double*
  %v4_6a = load double, double* %v3_6a, align 4
  %v5_6a = fpext double %v4_6a to x86_fp80
  store x86_fp80 %v5_6a, x86_fp80* %st6.global-to-local, align 4
  %v3_6d = add i32 %v1_6a, -36
  %v4_6d = inttoptr i32 %v3_6d to float*
  %v5_6d = load float, float* %v4_6d, align 4
  %v6_6d = fpext float %v5_6d to x86_fp80
  %v7_6d = fmul x86_fp80 %v5_6a, %v6_6d
  store x86_fp80 %v7_6d, x86_fp80* %st6.global-to-local, align 4
  %v3_70 = add i32 %v1_6a, -24
  %v4_70 = inttoptr i32 %v3_70 to float*
  %v5_70 = load float, float* %v4_70, align 4
  %v6_70 = fpext float %v5_70 to x86_fp80
  %v7_70 = fsub x86_fp80 %v7_6d, %v6_70
  store x86_fp80 %v7_70, x86_fp80* %st6.global-to-local, align 4
  %v3_73 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_73 = fsub x86_fp80 %v7_70, %v3_73
  store x86_fp80 %v4_73, x86_fp80* %st7.global-to-local, align 4
  %v2_75 = load i32, i32* %esi.global-to-local, align 4
  %v3_75 = add i32 %v2_75, -32
  %v4_75 = fptrunc x86_fp80 %v4_73 to double
  %v5_75 = inttoptr i32 %v3_75 to double*
  store double %v4_75, double* %v5_75, align 4
  %v6_75 = add i3 %v0_68, 3
  store i3 %v6_75, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_0, i32* %ecx.global-to-local, align 4
  ret i32 %v14_64

dec_label_pc_7d:                                  ; preds = %dec_label_pc_0
  %v1_7d = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v2_7d = load i32, i32* %edi.global-to-local, align 4
  %v3_7d = add i32 %v2_7d, -28
  %v4_7d = inttoptr i32 %v3_7d to float*
  %v5_7d = load float, float* %v4_7d, align 4
  %v6_7d = fpext float %v5_7d to x86_fp80
  %v7_7d = fmul x86_fp80 %v1_7d, %v6_7d
  store x86_fp80 %v7_7d, x86_fp80* %st5.global-to-local, align 4
  %v3_80 = add i32 %v2_7d, -16
  %v4_80 = inttoptr i32 %v3_80 to float*
  %v5_80 = load float, float* %v4_80, align 4
  %v6_80 = fpext float %v5_80 to x86_fp80
  %v7_80 = fsub x86_fp80 %v7_7d, %v6_80
  store x86_fp80 %v7_80, x86_fp80* %st5.global-to-local, align 4
  %v0_83 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_83 = fptrunc x86_fp80 %v7_80 to float
  %v5_83 = bitcast float %v4_83 to i32
  store i32 %v5_83, i32* %stack_var_-36, align 4
  %v1_86 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_86 = add i32 %v2_7d, -32
  %v4_86 = inttoptr i32 %v3_86 to float*
  %v5_86 = load float, float* %v4_86, align 4
  %v6_86 = fpext float %v5_86 to x86_fp80
  %v7_86 = fmul x86_fp80 %v1_86, %v6_86
  store x86_fp80 %v7_86, x86_fp80* %st6.global-to-local, align 4
  %v3_89 = add i32 %v2_7d, -20
  %v4_89 = inttoptr i32 %v3_89 to float*
  %v5_89 = load float, float* %v4_89, align 4
  %v6_89 = fpext float %v5_89 to x86_fp80
  %v7_89 = fsub x86_fp80 %v7_86, %v6_89
  store x86_fp80 %v7_89, x86_fp80* %st6.global-to-local, align 4
  %v1_90 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v6_90 = add i3 %v0_83, 3
  store i32 %v15_1, i32* %eax.global-to-local, align 4
  store i32 %v15_1, i32* %ecx.global-to-local, align 4
  %v1_a1 = add i32 %v2_7d, -76
  %v2_a1 = inttoptr i32 %v1_a1 to i32*
  %v3_a1 = load i32, i32* %v2_a1, align 4
  %v1_a4 = urem i32 %v3_a1, 4
  store i32 %v1_a4, i32* %ecx.global-to-local, align 4
  %v1_a7 = load i32, i32* %esp.global-to-local, align 4
  %v3_a7 = mul i32 %v1_a4, 8
  %v4_a7 = add i32 %v1_a7, %v3_a7
  %v5_a7 = inttoptr i32 %v4_a7 to double*
  %v6_a7 = load double, double* %v5_a7, align 4
  %v7_a7 = fpext double %v6_a7 to x86_fp80
  store x86_fp80 %v7_a7, x86_fp80* %st7.global-to-local, align 4
  %v3_aa = add i32 %v2_7d, -36
  %v4_aa = inttoptr i32 %v3_aa to float*
  %v5_aa = load float, float* %v4_aa, align 4
  %v6_aa = fpext float %v5_aa to x86_fp80
  %v7_aa = fmul x86_fp80 %v7_a7, %v6_aa
  store x86_fp80 %v7_aa, x86_fp80* %st7.global-to-local, align 4
  %v3_ad = add i32 %v2_7d, -24
  %v4_ad = inttoptr i32 %v3_ad to float*
  %v5_ad = load float, float* %v4_ad, align 4
  %v6_ad = fpext float %v5_ad to x86_fp80
  %v7_ad = fsub x86_fp80 %v7_aa, %v6_ad
  %v7_b0 = fsub x86_fp80 %v7_ad, %v1_90
  store x86_fp80 %v7_b0, x86_fp80* %st7.global-to-local, align 4
  %v2_b4 = load i32, i32* %esi.global-to-local, align 4
  %v3_b4 = add i32 %v2_b4, -32
  %v4_b4 = fptrunc x86_fp80 %v7_b0 to double
  %v5_b4 = inttoptr i32 %v3_b4 to double*
  store double %v4_b4, double* %v5_b4, align 4
  %v1_b7 = add i32 %v2_7d, -80
  %v2_b7 = inttoptr i32 %v1_b7 to i32*
  %v3_b7 = load i32, i32* %v2_b7, align 4
  %v1_ba = urem i32 %v3_b7, 4
  store i32 %v1_ba, i32* %ecx.global-to-local, align 4
  %v3_bd = mul i32 %v1_ba, 8
  %v4_bd = add i32 %v3_bd, %v1_a7
  %v5_bd = inttoptr i32 %v4_bd to double*
  %v6_bd = load double, double* %v5_bd, align 4
  %v7_bd = fpext double %v6_bd to x86_fp80
  store x86_fp80 %v7_bd, x86_fp80* %st7.global-to-local, align 4
  %v3_c0 = add i32 %v2_7d, -84
  %v4_c0 = inttoptr i32 %v3_c0 to float*
  %v5_c0 = load float, float* %v4_c0, align 4
  %v6_c0 = fpext float %v5_c0 to x86_fp80
  %v7_c0 = fadd x86_fp80 %v7_bd, %v6_c0
  store x86_fp80 %v7_c0, x86_fp80* %st7.global-to-local, align 4
  %v3_c3 = add i32 %v2_7d, -88
  %v4_c3 = inttoptr i32 %v3_c3 to float*
  %v5_c3 = load float, float* %v4_c3, align 4
  %v6_c3 = fpext float %v5_c3 to x86_fp80
  %v7_c3 = fmul x86_fp80 %v7_c0, %v6_c3
  store x86_fp80 %v7_c3, x86_fp80* %st7.global-to-local, align 4
  %v3_c6 = add i32 %v2_b4, 128
  %v4_c6 = fptrunc x86_fp80 %v7_c3 to double
  %v5_c6 = inttoptr i32 %v3_c6 to double*
  store double %v4_c6, double* %v5_c6, align 4
  store i3 %v6_90, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_0, i32* %ecx.global-to-local, align 4
  ret i32 %v15_1
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr
