source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %esp.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  store i32 0, i32* %esp.global-to-local, align 4
  %tmp276 = call double @__decompiler_undefined_function_3()
  %stack_var_-28 = alloca i128, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load i128, i128* %stack_var_-28, align 8
  call void @__asm_movupd.1(i128 %v2_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v0_4b = load i32, i32* @edi, align 8
  %v1_4b = add i32 %v0_4b, -84
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v1_4e = mul i32 %v3_4b, 16
  %v2_51 = and i32 %v1_4e, 16
  store i32 %v2_51, i32* %edx.global-to-local, align 4
  %v2_54 = add i32 %v0_4b, -80
  %v3_54 = inttoptr i32 %v2_54 to i32*
  %v4_54 = load i32, i32* %v3_54, align 4
  %v5_54 = sitofp i32 %v4_54 to x86_fp80
  store x86_fp80 %v5_54, x86_fp80* %st7.global-to-local, align 4
  %v1_5c = load i32, i32* %esp.global-to-local, align 4
  %v4_5c = add nuw nsw i32 %v2_51, 16
  %v5_5c = add i32 %v4_5c, %v1_5c
  %v6_5c = inttoptr i32 %v5_5c to double*
  %v7_5c = load double, double* %v6_5c, align 4
  %tmp283 = call double @llvm.fabs.f64(double %v7_5c)
  %v2_60 = fpext double %tmp283 to x86_fp80
  store x86_fp80 %v2_60, x86_fp80* %st7.global-to-local, align 4
  %v2_62 = add i32 %v0_4b, -72
  %v3_62 = inttoptr i32 %v2_62 to double*
  %v4_62 = load double, double* %v3_62, align 4
  %tmp284 = call double @llvm.fabs.f64(double %v4_62)
  %v2_65 = fpext double %tmp284 to x86_fp80
  store x86_fp80 %v2_65, x86_fp80* %st6.global-to-local, align 4
  %v3_67 = add i32 %v0_4b, 8
  %v4_67 = inttoptr i32 %v3_67 to double*
  %v5_67 = load double, double* %v4_67, align 4
  %v6_67 = fpext double %v5_67 to x86_fp80
  %v7_67 = fadd x86_fp80 %v2_65, %v6_67
  %v4_6a = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_6a = fpext double %v4_6a to x86_fp80
  %v6_6a = fmul x86_fp80 %v7_67, %v5_6a
  store x86_fp80 %v6_6a, x86_fp80* %st6.global-to-local, align 4
  %v2_6c = load i32, i32* %esi.global-to-local, align 4
  %v3_6c = add i32 %v2_6c, -136
  %v4_6c = inttoptr i32 %v3_6c to double*
  %v5_6c = load double, double* %v4_6c, align 4
  %v6_6c = fpext double %v5_6c to x86_fp80
  %v7_6c = fadd x86_fp80 %v6_6a, %v6_6c
  store x86_fp80 %v7_6c, x86_fp80* %st6.global-to-local, align 4
  %v0_74 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_74 = call i16 @__asm_fnstsw(i32 %v0_74)
  %v2_74 = sext i16 %v1_74 to i32
  %v3_74 = load i32, i32* %eax.global-to-local, align 4
  %v4_74 = and i32 %v3_74, -65536
  %tmp291 = udiv i32 %v2_74, 2
  %v12_76 = and i32 %tmp291, 32512
  %v2_74.masked = and i32 %v2_74, -65281
  %v13_76 = or i32 %v4_74, %v2_74.masked
  %v14_76 = or i32 %v13_76, %v12_76
  store i32 %v14_76, i32* %eax.global-to-local, align 4
  %v15_76289 = and i32 %v2_74, 256
  %v16_76 = icmp ne i32 %v15_76289, 0
  %v1_78 = icmp eq i1 %v16_76, false
  %v0_85 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_78, label %dec_label_pc_85, label %dec_label_pc_7a

dec_label_pc_7a:                                  ; preds = %dec_label_pc_40
  %v1_7a = load i32, i32* %esp.global-to-local, align 4
  %v2_7a = load i32, i32* %edx.global-to-local, align 4
  %v4_7a = add i32 %v1_7a, 16
  %v5_7a = add i32 %v4_7a, %v2_7a
  %v6_7a = inttoptr i32 %v5_7a to double*
  %v7_7a = load double, double* %v6_7a, align 4
  %v8_7a = fpext double %v7_7a to x86_fp80
  %v9_7a = add i3 %v0_85, -1
  store i3 %v9_7a, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v8_7a, x86_fp80* %st7.global-to-local, align 4
  %v2_7e = fsub x86_fp80 0xK80000000000000000000, %v8_7a
  %v0_11e.pre = load i32, i32* @edi, align 8
  br label %dec_label_pc_11e

dec_label_pc_85:                                  ; preds = %dec_label_pc_40
  %v5_85 = fpext double %tmp276 to x86_fp80
  store x86_fp80 %v5_85, x86_fp80* %st7.global-to-local, align 4
  %v1_89 = load i32, i32* %esp.global-to-local, align 4
  %v2_89 = load i32, i32* %edx.global-to-local, align 4
  %v4_89 = add i32 %v2_89, %v1_89
  %v5_89 = inttoptr i32 %v4_89 to double*
  %v6_89 = load double, double* %v5_89, align 4
  %v7_89 = fpext double %v6_89 to x86_fp80
  %v8_89 = add i3 %v0_85, -2
  store i3 %v8_89, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_89, x86_fp80* %st6.global-to-local, align 4
  %v2_90.pre = load i32, i32* @edi, align 8
  %v3_90 = add i32 %v2_90.pre, -16
  %v4_90 = inttoptr i32 %v3_90 to double*
  %v3_95 = add i32 %v2_90.pre, -92
  %v4_95 = inttoptr i32 %v3_95 to double*
  %v3_9e = add i32 %v2_90.pre, -108
  %v4_9e = inttoptr i32 %v3_9e to double*
  %v3_a5 = add i32 %v2_90.pre, -100
  %v4_a5 = inttoptr i32 %v3_a5 to double*
  br label %dec_label_pc_8c

dec_label_pc_8c:                                  ; preds = %dec_label_pc_8c, %dec_label_pc_85
  %v2_9a = phi x86_fp80 [ %v5_85, %dec_label_pc_85 ], [ %v4_c8, %dec_label_pc_8c ]
  %stack_var_-4.0 = phi i32 [ %v4_54, %dec_label_pc_85 ], [ %v4_ce, %dec_label_pc_8c ]
  %v4_9c = fsub x86_fp80 %v2_9a, %v2_9a
  store x86_fp80 %v4_9c, x86_fp80* %st7.global-to-local, align 4
  %v5_9e = load double, double* %v4_9e, align 4
  %v6_9e = fpext double %v5_9e to x86_fp80
  %v7_9e = fmul x86_fp80 %v4_9c, %v6_9e
  %v4_a1 = fadd x86_fp80 %v7_9e, %v7_9e
  %v2_a3 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_a1)
  %v3_a3 = fcmp olt x86_fp80 %v2_a3, 0xK403E8000000000000000
  %v4_a3 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_a1)
  %storemerge18 = select i1 %v3_a3, x86_fp80 %v4_a3, x86_fp80 %v4_a1
  store x86_fp80 %storemerge18, x86_fp80* %st7.global-to-local, align 4
  %v5_a5 = load double, double* %v4_a5, align 4
  %v6_a5 = fpext double %v5_a5 to x86_fp80
  %v7_a5 = fmul x86_fp80 %storemerge18, %v6_a5
  %v4_a8 = fadd x86_fp80 %v7_a5, %v7_a5
  store x86_fp80 %v4_a8, x86_fp80* %st7.global-to-local, align 4
  %v2_ae = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_a8)
  %v3_ae = fcmp olt x86_fp80 %v2_ae, 0xK403E8000000000000000
  %v4_ae = call x86_fp80 @llvm.cos.f80(x86_fp80 %v4_a8)
  %storemerge13 = select i1 %v3_ae, x86_fp80 %v4_ae, x86_fp80 %v4_a8
  store x86_fp80 %storemerge13, x86_fp80* %st6.global-to-local, align 4
  %v5_b0 = load double, double* %v4_90, align 4
  %v6_b0 = fpext double %v5_b0 to x86_fp80
  %v7_b0 = fmul x86_fp80 %v4_a8, %v6_b0
  %v4_b3 = fadd x86_fp80 %v7_b0, %v7_b0
  store x86_fp80 %v4_b3, x86_fp80* %st7.global-to-local, align 4
  %v5_b5 = load double, double* %v4_95, align 4
  %v6_b5 = fpext double %v5_b5 to x86_fp80
  %v7_b5 = fmul x86_fp80 %v4_b3, %v6_b5
  %v2_b8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_b5)
  %v3_b8 = fcmp olt x86_fp80 %v2_b8, 0xK403E8000000000000000
  %v4_b8 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_b5)
  %storemerge12 = select i1 %v3_b8, x86_fp80 %v4_b8, x86_fp80 %v7_b5
  store x86_fp80 %storemerge12, x86_fp80* %st7.global-to-local, align 4
  %v4_bc = fadd x86_fp80 %storemerge12, %storemerge12
  store x86_fp80 %v4_bc, x86_fp80* %st6.global-to-local, align 4
  %v5_be = load double, double* %v4_9e, align 4
  %v6_be = fpext double %v5_be to x86_fp80
  %v7_be = fmul x86_fp80 %storemerge12, %v6_be
  %v4_c1 = fadd x86_fp80 %v7_be, %v7_be
  %v2_c3 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_c1)
  %v3_c3 = fcmp olt x86_fp80 %v2_c3, 0xK403E8000000000000000
  %v4_c3 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_c1)
  %storemerge17 = select i1 %v3_c3, x86_fp80 %v4_c3, x86_fp80 %v4_c1
  store x86_fp80 %storemerge17, x86_fp80* %st7.global-to-local, align 4
  %v5_c5 = load double, double* %v4_a5, align 4
  %v6_c5 = fpext double %v5_c5 to x86_fp80
  %v7_c5 = fmul x86_fp80 %storemerge17, %v6_c5
  %v4_c8 = fadd x86_fp80 %v7_c5, %v7_c5
  store x86_fp80 %v4_c8, x86_fp80* %st7.global-to-local, align 4
  %v4_ce = add i32 %stack_var_-4.0, -1
  %v8_d2 = icmp sgt i32 %stack_var_-4.0, 1
  br i1 %v8_d2, label %dec_label_pc_8c, label %dec_label_pc_d4

dec_label_pc_d4:                                  ; preds = %dec_label_pc_8c
  %v3_d4 = fmul x86_fp80 %v4_c8, %v4_c8
  %v3_d8 = fmul x86_fp80 %v3_d4, %v3_d4
  %v4_da = fadd x86_fp80 %v3_d8, %v3_d8
  %v2_dc = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_da)
  store x86_fp80 %v2_dc, x86_fp80* %st7.global-to-local, align 4
  %v3_e2 = fmul x86_fp80 %v5_85, %v5_85
  store x86_fp80 %v3_e2, x86_fp80* %st6.global-to-local, align 4
  %v6_e4 = load double, double* %v5_89, align 4
  %v7_e4 = fpext double %v6_e4 to x86_fp80
  %v3_e7 = fmul x86_fp80 %v7_e4, %v7_e4
  %v4_e9 = fadd x86_fp80 %v3_e2, %v3_e7
  %v2_eb = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_e9)
  %v4_ef = fsub x86_fp80 %v2_dc, %v2_eb
  store x86_fp80 %v4_ef, x86_fp80* %st7.global-to-local, align 4
  %v1_f1 = sub i32 0, %v2_89
  store i32 %v1_f1, i32* %edx.global-to-local, align 4
  store x86_fp80 %v4_ef, x86_fp80* %st6.global-to-local, align 4
  store i3 %v8_89, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_fc = load i32, i32* %fpsw.global-to-local, align 4
  %v1_fc = call i16 @__asm_fnstsw(i32 %v0_fc)
  %v2_fc = sext i16 %v1_fc to i32
  %v3_fc = load i32, i32* %eax.global-to-local, align 4
  %v4_fc = and i32 %v3_fc, -65536
  %tmp292 = udiv i32 %v2_fc, 2
  %v12_fe = and i32 %tmp292, 32512
  %v2_fc.masked = and i32 %v2_fc, -65281
  %v13_fe = or i32 %v4_fc, %v2_fc.masked
  %v14_fe = or i32 %v13_fe, %v12_fe
  store i32 %v14_fe, i32* %eax.global-to-local, align 4
  %v15_fe290 = and i32 %v2_fc, 256
  %v16_fe = icmp eq i32 %v15_fe290, 0
  br i1 %v16_fe, label %dec_label_pc_102, label %dec_label_pc_d4.dec_label_pc_10c_crit_edge

dec_label_pc_d4.dec_label_pc_10c_crit_edge:       ; preds = %dec_label_pc_d4
  %v1_10c.pre = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v0_111.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_10c

dec_label_pc_102:                                 ; preds = %dec_label_pc_d4
  %v0_102 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_104 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_104 = fadd x86_fp80 %v2_104, 0xK3FFF8000000000000000
  %v4_106 = fadd x86_fp80 %v4_104, 0xK3FFF8000000000000000
  %v2_108 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_106)
  %v2_10a = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_108)
  store x86_fp80 %v2_10a, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_10c

dec_label_pc_10c:                                 ; preds = %dec_label_pc_d4.dec_label_pc_10c_crit_edge, %dec_label_pc_102
  %v0_111 = phi i3 [ %v0_111.pre, %dec_label_pc_d4.dec_label_pc_10c_crit_edge ], [ %v0_102, %dec_label_pc_102 ]
  %v1_10c = phi x86_fp80 [ %v1_10c.pre, %dec_label_pc_d4.dec_label_pc_10c_crit_edge ], [ %v2_10a, %dec_label_pc_102 ]
  %v2_10c = load i32, i32* @edi, align 8
  %v3_10c = add i32 %v2_10c, -116
  %v4_10c = inttoptr i32 %v3_10c to double*
  %v5_10c = load double, double* %v4_10c, align 4
  %v6_10c = fpext double %v5_10c to x86_fp80
  %v7_10c = fmul x86_fp80 %v1_10c, %v6_10c
  %v2_10f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_10c)
  store x86_fp80 %v2_10f, x86_fp80* %st6.global-to-local, align 4
  %v2_111 = load i32, i32* %esi.global-to-local, align 4
  %v3_111 = add i32 %v2_111, 128
  %tmp287 = fptrunc x86_fp80 %v7_10c to double
  %v4_111 = call double @llvm.fabs.f64(double %tmp287)
  %v5_111 = inttoptr i32 %v3_111 to double*
  store double %v4_111, double* %v5_111, align 4
  %v6_111 = add i3 %v0_111, 1
  store i3 %v6_111, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_117 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_117 = load i32, i32* @edi, align 8
  %v3_117 = add i32 %v2_117, -72
  %v4_117 = inttoptr i32 %v3_117 to double*
  %v5_117 = load double, double* %v4_117, align 4
  %v6_117 = fpext double %v5_117 to x86_fp80
  %v7_117 = fmul x86_fp80 %v1_117, %v6_117
  store x86_fp80 %v7_117, x86_fp80* %st7.global-to-local, align 4
  %v2_11a = load i32, i32* %esp.global-to-local, align 4
  %v3_11a = load i32, i32* %edx.global-to-local, align 4
  %v5_11a = add i32 %v2_11a, 16
  %v6_11a = add i32 %v5_11a, %v3_11a
  %v7_11a = inttoptr i32 %v6_11a to double*
  %v8_11a = load double, double* %v7_11a, align 4
  %v9_11a = fpext double %v8_11a to x86_fp80
  %v10_11a = fsub x86_fp80 %v7_117, %v9_11a
  br label %dec_label_pc_11e

dec_label_pc_11e:                                 ; preds = %dec_label_pc_10c, %dec_label_pc_7a
  %v0_12d = phi i32 [ %v14_76, %dec_label_pc_7a ], [ %v14_fe, %dec_label_pc_10c ]
  %v0_127 = phi i3 [ %v9_7a, %dec_label_pc_7a ], [ %v6_111, %dec_label_pc_10c ]
  %v2_124 = phi i32 [ %v0_11e.pre, %dec_label_pc_7a ], [ %v2_117, %dec_label_pc_10c ]
  %v1_124 = phi x86_fp80 [ %v2_7e, %dec_label_pc_7a ], [ %v10_11a, %dec_label_pc_10c ]
  store x86_fp80 %v1_124, x86_fp80* %st7.global-to-local, align 4
  %v1_11e = add i32 %v2_124, -76
  %v2_11e = inttoptr i32 %v1_11e to i32*
  %v3_11e = load i32, i32* %v2_11e, align 4
  %v10_11e = icmp eq i32 %v3_11e, 0
  %v1_122 = icmp eq i1 %v10_11e, false
  br i1 %v1_122, label %dec_label_pc_127, label %dec_label_pc_124

dec_label_pc_124:                                 ; preds = %dec_label_pc_11e
  %v3_124 = add i32 %v2_124, -32
  %v4_124 = inttoptr i32 %v3_124 to double*
  %v5_124 = load double, double* %v4_124, align 4
  %v6_124 = fpext double %v5_124 to x86_fp80
  %v7_124 = fdiv x86_fp80 %v1_124, %v6_124
  store x86_fp80 %v7_124, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_127

dec_label_pc_127:                                 ; preds = %dec_label_pc_124, %dec_label_pc_11e
  %v1_127 = phi x86_fp80 [ %v7_124, %dec_label_pc_124 ], [ %v1_124, %dec_label_pc_11e ]
  %v2_127 = load i32, i32* %esi.global-to-local, align 4
  %v3_127 = add i32 %v2_127, -32
  %v4_127 = fptrunc x86_fp80 %v1_127 to double
  %v5_127 = inttoptr i32 %v3_127 to double*
  store double %v4_127, double* %v5_127, align 4
  %v6_127 = add i3 %v0_127, 1
  store i3 %v6_127, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v0_12d
}

define i32 @function_12e() local_unnamed_addr {
dec_label_pc_12e:
  %eax.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %v1_12e = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_12e = load i32, i32* @edi, align 8
  %v3_12e = add i32 %v2_12e, -32
  %v4_12e = inttoptr i32 %v3_12e to double*
  %v5_12e = load double, double* %v4_12e, align 4
  %v6_12e = fpext double %v5_12e to x86_fp80
  %v7_12e = fdiv x86_fp80 %v1_12e, %v6_12e
  store x86_fp80 %v7_12e, x86_fp80* %st7.global-to-local, align 4
  %v0_131 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_131 = load i32, i32* %esi.global-to-local, align 4
  %v3_131 = add i32 %v2_131, -32
  %v4_131 = fptrunc x86_fp80 %v7_12e to double
  %v5_131 = inttoptr i32 %v3_131 to double*
  store double %v4_131, double* %v5_131, align 4
  %v6_131 = add i3 %v0_131, 1
  store i3 %v6_131, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_137 = load i32, i32* %eax.global-to-local, align 4
  ret i32 %v0_137
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
