source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st3.global-to-local = alloca x86_fp80, align 4
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %edi.global-to-local, align 4
  %v0_e = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_e = add i32 %v3_b, -40
  %v3_e = inttoptr i32 %v2_e to double*
  %v4_e = load double, double* %v3_e, align 4
  %v5_e = fpext double %v4_e to x86_fp80
  store x86_fp80 %v5_e, x86_fp80* %st7.global-to-local, align 4
  %v3_11 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_11 = fpext double %v3_11 to x86_fp80
  %v4_15 = fsub x86_fp80 %v4_11, %v5_e
  %v2_17 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_15)
  %v4_19 = fadd x86_fp80 %v2_17, %v4_11
  %v4_1d = fadd x86_fp80 %v5_e, %v4_11
  %v2_1f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_1d)
  %v4_21 = fsub x86_fp80 %v2_1f, %v4_19
  store x86_fp80 %v4_21, x86_fp80* %st6.global-to-local, align 4
  %v3_23 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_23 = fpext double %v3_23 to x86_fp80
  %v4_27 = fsub x86_fp80 %v4_23, %v5_e
  %v2_29 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_27)
  %v4_2b = fadd x86_fp80 %v2_29, %v4_23
  %v4_2f = fadd x86_fp80 %v5_e, %v4_23
  %v2_31 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_2f)
  %v4_33 = fsub x86_fp80 %v2_31, %v4_2b
  store x86_fp80 %v4_33, x86_fp80* %st5.global-to-local, align 4
  %v2_35 = add i32 %v3_b, -48
  %v3_35 = inttoptr i32 %v2_35 to double*
  %v4_35 = load double, double* %v3_35, align 4
  %v5_35 = fpext double %v4_35 to x86_fp80
  store x86_fp80 %v5_35, x86_fp80* %st7.global-to-local, align 4
  %v3_3c = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_3c = fpext double %v3_3c to x86_fp80
  %v2_3e = add i3 %v0_e, 3
  %v4_40 = fsub x86_fp80 %v4_3c, %v5_35
  %v2_42 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_40)
  %v4_44 = fadd x86_fp80 %v2_42, %v4_3c
  %v4_48 = fadd x86_fp80 %v5_35, %v4_3c
  %v2_4a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_48)
  %v4_4c = fsub x86_fp80 %v2_4a, %v4_44
  store i3 %v2_3e, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_50 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_4c)
  store x86_fp80 %v2_50, x86_fp80* %st3.global-to-local, align 4
  %v0_55 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_55 = call i16 @__asm_fnstsw(i32 %v0_55)
  %v2_55 = sext i16 %v1_55 to i32
  %v3_55 = load i32, i32* @eax, align 8
  %v4_55 = and i32 %v3_55, -65536
  %v4_571 = udiv i32 %v2_55, 512
  %tmp261 = trunc i32 %v4_571 to i8
  %tmp266 = urem i8 %tmp261, -128
  %v5_57 = icmp eq i8 %tmp266, 0
  %v10_57 = zext i8 %tmp266 to i32
  %v12_57 = mul i32 %v10_57, 256
  %v2_55.masked = and i32 %v2_55, -65281
  %v13_57 = or i32 %v4_55, %v2_55.masked
  %v14_57 = or i32 %v13_57, %v12_57
  store i32 %v14_57, i32* @eax, align 8
  %v15_5717 = and i32 %v2_55, 256
  %v16_57 = icmp ne i32 %v15_5717, 0
  %v2_59 = or i1 %v16_57, %v5_57
  br i1 %v2_59, label %dec_label_pc_70, label %dec_label_pc_5b

dec_label_pc_5b:                                  ; preds = %dec_label_pc_0
  %v1_5b = load x86_fp80, x86_fp80* %st3.global-to-local, align 4
  %v2_5b = load i32, i32* %edi.global-to-local, align 4
  %v3_5b = add i32 %v2_5b, -56
  %v4_5b = inttoptr i32 %v3_5b to double*
  %v5_5b = load double, double* %v4_5b, align 4
  %v6_5b = fpext double %v5_5b to x86_fp80
  %v7_5b = fsub x86_fp80 %v1_5b, %v6_5b
  %v3_5e = fmul x86_fp80 %v7_5b, %v7_5b
  %v0_60 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_60 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_60 = add i3 %v0_60, -1
  %v4_62 = fmul x86_fp80 %v2_60, %v2_60
  %v4_64 = fadd x86_fp80 %v3_5e, %v4_62
  store x86_fp80 %v4_64, x86_fp80* %st3.global-to-local, align 4
  %v2_66 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store i3 %v3_60, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_68 = fmul x86_fp80 %v2_66, %v2_66
  %v4_6a = fadd x86_fp80 %v4_64, %v4_68
  br label %dec_label_pc_7c

dec_label_pc_70:                                  ; preds = %dec_label_pc_0
  %v0_70 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_72 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v4_74 = fmul x86_fp80 %v2_72, %v2_72
  store x86_fp80 %v4_74, x86_fp80* %st3.global-to-local, align 4
  %v2_76 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v3_76 = add i3 %v0_70, -1
  store i3 %v3_76, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_78 = fmul x86_fp80 %v2_76, %v2_76
  %v4_7a = fadd x86_fp80 %v4_74, %v4_78
  br label %dec_label_pc_7c

dec_label_pc_7c:                                  ; preds = %dec_label_pc_70, %dec_label_pc_5b
  %storemerge9.in = phi i3 [ %v3_60, %dec_label_pc_5b ], [ %v3_76, %dec_label_pc_70 ]
  %storemerge15.in.in = phi x86_fp80 [ %v4_6a, %dec_label_pc_5b ], [ %v4_7a, %dec_label_pc_70 ]
  store x86_fp80 %storemerge15.in.in, x86_fp80* %st3.global-to-local, align 4
  %storemerge9 = add i3 %storemerge9.in, 1
  store i3 %storemerge9, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_7f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_7f = call i16 @__asm_fnstsw(i32 %v0_7f)
  %v2_7f = sext i16 %v1_7f to i32
  %v3_7f = load i32, i32* @eax, align 8
  %v4_7f = and i32 %v3_7f, -65536
  %tmp264 = udiv i32 %v2_7f, 2
  %v12_81 = and i32 %tmp264, 32512
  %v2_7f.masked = and i32 %v2_7f, -65281
  %v13_81 = or i32 %v4_7f, %v2_7f.masked
  %v14_81 = or i32 %v13_81, %v12_81
  store i32 %v14_81, i32* @eax, align 8
  %v15_8118 = and i32 %v2_7f, 256
  %v16_81 = icmp ne i32 %v15_8118, 0
  %v1_83 = icmp eq i1 %v16_81, false
  %v0_8c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_83, label %dec_label_pc_8c, label %dec_label_pc_85

dec_label_pc_85:                                  ; preds = %dec_label_pc_7c
  %v1_87 = load i32, i32* %edi.global-to-local, align 4
  %v2_87 = add i32 %v1_87, -24
  %v3_87 = inttoptr i32 %v2_87 to double*
  %v4_87 = load double, double* %v3_87, align 4
  %v5_87 = fpext double %v4_87 to x86_fp80
  store x86_fp80 %v5_87, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_a2

dec_label_pc_8c:                                  ; preds = %dec_label_pc_7c
  %v1_8c = add i3 %v0_8c, -1
  store x86_fp80 0xK3FFF8000000000000000, x86_fp80* %st7.global-to-local, align 4
  store i3 %v1_8c, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_90 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_90 = call i16 @__asm_fnstsw(i32 %v0_90)
  %v2_90 = sext i16 %v1_90 to i32
  %v3_90 = load i32, i32* @eax, align 8
  %v4_90 = and i32 %v3_90, -65536
  %tmp265 = udiv i32 %v2_90, 2
  %v12_92 = and i32 %tmp265, 32512
  %v2_90.masked = and i32 %v2_90, -65281
  %v13_92 = or i32 %v4_90, %v2_90.masked
  %v14_92 = or i32 %v13_92, %v12_92
  store i32 %v14_92, i32* @eax, align 8
  %v15_9219 = and i32 %v2_90, 256
  %v16_92 = icmp eq i32 %v15_9219, 0
  %v0_9d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_96 = add i3 %v0_9d, 1
  br i1 %v16_92, label %dec_label_pc_96, label %dec_label_pc_9d

dec_label_pc_96:                                  ; preds = %dec_label_pc_8c
  %v2_9d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_96, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_98 = load i32, i32* %edi.global-to-local, align 4
  %v3_98 = add i32 %v2_98, -16
  %v4_98 = inttoptr i32 %v3_98 to double*
  %v5_98 = load double, double* %v4_98, align 4
  %v6_98 = fpext double %v5_98 to x86_fp80
  %v7_98 = fdiv x86_fp80 %v6_98, %v2_9d
  store x86_fp80 %v7_98, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_a2

dec_label_pc_9d:                                  ; preds = %dec_label_pc_8c
  %v1_9f = load i32, i32* %edi.global-to-local, align 4
  %v2_9f = add i32 %v1_9f, -16
  %v3_9f = inttoptr i32 %v2_9f to double*
  %v4_9f = load double, double* %v3_9f, align 4
  %v5_9f = fpext double %v4_9f to x86_fp80
  store i3 %v4_96, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_9f, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_a2

dec_label_pc_a2:                                  ; preds = %dec_label_pc_9d, %dec_label_pc_96, %dec_label_pc_85
  %v3_a5 = phi x86_fp80 [ %v5_9f, %dec_label_pc_9d ], [ %v7_98, %dec_label_pc_96 ], [ %v5_87, %dec_label_pc_85 ]
  %v0_a2 = phi i3 [ %v4_96, %dec_label_pc_9d ], [ %v4_96, %dec_label_pc_96 ], [ %v0_8c, %dec_label_pc_85 ]
  %v1_a2 = load i32, i32* @ecx, align 8
  %v2_a2 = add i32 %v1_a2, 8
  %v3_a2 = inttoptr i32 %v2_a2 to double*
  %v4_a2 = load double, double* %v3_a2, align 4
  %v5_a2 = fpext double %v4_a2 to x86_fp80
  %v4_a5 = fmul x86_fp80 %v3_a5, %v5_a2
  store x86_fp80 %v4_a5, x86_fp80* %st6.global-to-local, align 4
  %v4_a7 = fptrunc x86_fp80 %v4_a5 to double
  store double %v4_a7, double* %v3_a2, align 4
  %v2_aa = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_aa = fmul x86_fp80 %v2_aa, %v2_aa
  %v4_ac = fmul x86_fp80 %v4_aa, %v4_aa
  %v4_ae = fmul x86_fp80 %v4_ac, %v4_ac
  store x86_fp80 %v4_ae, x86_fp80* %st7.global-to-local, align 4
  %v2_b0 = load i32, i32* %esi.global-to-local, align 4
  %v3_b0 = add i32 %v2_b0, 40
  %v4_b0 = inttoptr i32 %v3_b0 to double*
  %v5_b0 = load double, double* %v4_b0, align 4
  %v6_b0 = fpext double %v5_b0 to x86_fp80
  %v7_b0 = fadd x86_fp80 %v4_ae, %v6_b0
  store x86_fp80 %v7_b0, x86_fp80* %st7.global-to-local, align 4
  %v2_b3 = load i32, i32* @ecx, align 8
  %v3_b3 = fptrunc x86_fp80 %v7_b0 to double
  %v4_b3 = inttoptr i32 %v2_b3 to double*
  store double %v3_b3, double* %v4_b3, align 4
  %v1_b5 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_b5 = add i32 %v2_b0, 32
  %v4_b5 = inttoptr i32 %v3_b5 to double*
  %v5_b5 = load double, double* %v4_b5, align 4
  %v6_b5 = fpext double %v5_b5 to x86_fp80
  %v7_b5 = fadd x86_fp80 %v1_b5, %v6_b5
  store x86_fp80 %v7_b5, x86_fp80* %st7.global-to-local, align 4
  %v2_b8 = load i32, i32* @edx, align 8
  %v3_b8 = fptrunc x86_fp80 %v7_b5 to double
  %v4_b8 = inttoptr i32 %v2_b8 to double*
  store double %v3_b8, double* %v4_b8, align 4
  %v1_ba = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_ba = add i32 %v2_b0, 24
  %v4_ba = inttoptr i32 %v3_ba to double*
  %v5_ba = load double, double* %v4_ba, align 4
  %v6_ba = fpext double %v5_ba to x86_fp80
  %v7_ba = fadd x86_fp80 %v1_ba, %v6_ba
  store x86_fp80 %v7_ba, x86_fp80* %st7.global-to-local, align 4
  %v2_bd = load i32, i32* %ebx.global-to-local, align 4
  %v3_bd = fptrunc x86_fp80 %v7_ba to double
  %v4_bd = inttoptr i32 %v2_bd to double*
  store double %v3_bd, double* %v4_bd, align 4
  %v4_bf = add i3 %v0_a2, -3
  store i3 %v4_bf, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v2_bd, i32* @eax, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v2_bd
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
