source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %esp.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  store i32 0, i32* %esp.global-to-local, align 4
  %tmp247 = call double @__decompiler_undefined_function_3()
  %stack_var_-32 = alloca i128, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load i128, i128* %stack_var_-32, align 8
  call void @__asm_movupd.1(i128 %v2_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v0_4b = load i32, i32* %edi.global-to-local, align 4
  %v1_4b = add i32 %v0_4b, -84
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v0_51 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_51 = add i32 %v0_4b, -72
  %v3_51 = inttoptr i32 %v2_51 to double*
  %v4_51 = load double, double* %v3_51, align 4
  %v5_51 = fpext double %v4_51 to x86_fp80
  %v6_51 = add i3 %v0_51, -1
  %v1_4e = mul i32 %v3_4b, 16
  %v2_54 = and i32 %v1_4e, 16
  %v1_5b = load i32, i32* %esp.global-to-local, align 4
  %v4_5b = add i32 %v1_5b, %v2_54
  %v5_5b = inttoptr i32 %v4_5b to double*
  %v6_5b = load double, double* %v5_5b, align 4
  %v7_5b = fpext double %v6_5b to x86_fp80
  store i3 %v6_51, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_5e = add i32 %v0_4b, -80
  %v2_5e = inttoptr i32 %v1_5e to i32*
  %v3_5e = load i32, i32* %v2_5e, align 4
  %v10_5e = icmp eq i32 %v3_5e, 0
  br i1 %v10_5e, label %dec_label_pc_89, label %dec_label_pc_64

dec_label_pc_64:                                  ; preds = %dec_label_pc_40
  %v3_64 = fmul x86_fp80 %v7_5b, %v7_5b
  %v5_66 = fpext double %tmp247 to x86_fp80
  %v3_6a = fmul x86_fp80 %v5_66, %v5_66
  %v4_6c = fadd x86_fp80 %v3_6a, %v3_64
  store i3 %v6_51, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_6e = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_6c)
  %v3_70 = add i32 %v0_4b, -16
  %v4_70 = inttoptr i32 %v3_70 to double*
  %v5_70 = load double, double* %v4_70, align 4
  %v6_70 = fpext double %v5_70 to x86_fp80
  %v7_70 = fmul x86_fp80 %v2_6e, %v6_70
  %v1_73 = add i32 %v0_4b, -88
  %v2_73 = inttoptr i32 %v1_73 to i32*
  %v3_73 = load i32, i32* %v2_73, align 4
  %v10_73 = icmp eq i32 %v3_73, 0
  br i1 %v10_73, label %dec_label_pc_85, label %dec_label_pc_79

dec_label_pc_79:                                  ; preds = %dec_label_pc_64
  %v7_7d = fmul x86_fp80 %v5_51, 0xK3FFE8000000000000000
  %v4_81 = fptrunc x86_fp80 %v7_7d to double
  store i3 %v6_51, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_85

dec_label_pc_85:                                  ; preds = %dec_label_pc_79, %dec_label_pc_64
  %v1_85 = phi x86_fp80 [ %v7_70, %dec_label_pc_64 ], [ %v7_7d, %dec_label_pc_79 ]
  %stack_var_-8.0 = phi double [ %v4_51, %dec_label_pc_64 ], [ %v4_81, %dec_label_pc_79 ]
  %v2_85 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v1_85)
  %v3_85 = fcmp olt x86_fp80 %v2_85, 0xK403E8000000000000000
  br i1 %v3_85, label %bb, label %dec_label_pc_99

bb:                                               ; preds = %dec_label_pc_85
  %v4_85 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v1_85)
  br label %dec_label_pc_99

dec_label_pc_89:                                  ; preds = %dec_label_pc_40
  %v3_89 = add i32 %v0_4b, -16
  %v4_89 = inttoptr i32 %v3_89 to double*
  %v5_8e = fpext double %tmp247 to x86_fp80
  %v5_92 = load double, double* %v4_89, align 4
  %v6_92 = fpext double %v5_92 to x86_fp80
  %v7_92 = fmul x86_fp80 %v5_8e, %v6_92
  %v2_95 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_92)
  %v3_95 = fcmp olt x86_fp80 %v2_95, 0xK403E8000000000000000
  %v4_95 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_92)
  %storemerge = select i1 %v3_95, x86_fp80 %v4_95, x86_fp80 %v7_92
  %v4_97 = fadd x86_fp80 %storemerge, %storemerge
  store i3 %v6_51, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_99

dec_label_pc_99:                                  ; preds = %dec_label_pc_85, %bb, %dec_label_pc_89
  %v1_9b = phi x86_fp80 [ %v4_97, %dec_label_pc_89 ], [ %v4_85, %bb ], [ %v1_85, %dec_label_pc_85 ]
  %stack_var_-8.1 = phi double [ %v4_51, %dec_label_pc_89 ], [ %stack_var_-8.0, %bb ], [ %stack_var_-8.0, %dec_label_pc_85 ]
  %v6_9b = fpext double %stack_var_-8.1 to x86_fp80
  %v7_9b = fmul x86_fp80 %v1_9b, %v6_9b
  %v5_9f = sub nsw i32 16, %v2_54
  %v6_9f = add i32 %v5_9f, %v1_5b
  %v7_9f = inttoptr i32 %v6_9f to double*
  %v8_9f = load double, double* %v7_9f, align 4
  %v9_9f = fpext double %v8_9f to x86_fp80
  %v10_9f = fsub x86_fp80 %v7_9b, %v9_9f
  %v1_a3 = add i32 %v0_4b, -76
  %v2_a3 = inttoptr i32 %v1_a3 to i32*
  %v3_a3 = load i32, i32* %v2_a3, align 4
  %v10_a3 = icmp eq i32 %v3_a3, 0
  %v1_a7 = icmp eq i1 %v10_a3, false
  br i1 %v1_a7, label %dec_label_pc_ac, label %dec_label_pc_a9

dec_label_pc_a9:                                  ; preds = %dec_label_pc_99
  %v3_a9 = add i32 %v0_4b, -32
  %v4_a9 = inttoptr i32 %v3_a9 to double*
  %v5_a9 = load double, double* %v4_a9, align 4
  %v6_a9 = fpext double %v5_a9 to x86_fp80
  %v7_a9 = fdiv x86_fp80 %v10_9f, %v6_a9
  br label %dec_label_pc_ac

dec_label_pc_ac:                                  ; preds = %dec_label_pc_a9, %dec_label_pc_99
  %v1_ac = phi x86_fp80 [ %v7_a9, %dec_label_pc_a9 ], [ %v10_9f, %dec_label_pc_99 ]
  %v2_ac = load i32, i32* %esi.global-to-local, align 4
  %v3_ac = add i32 %v2_ac, -32
  %v4_ac = fptrunc x86_fp80 %v1_ac to double
  %v5_ac = inttoptr i32 %v3_ac to double*
  store double %v4_ac, double* %v5_ac, align 4
  store i3 %v0_51, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_b2 = load i32, i32* %eax.global-to-local, align 4
  ret i32 %v0_b2
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
