source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %arg1, i32* %edi.global-to-local, align 4
  %v0_9 = load i32, i32* %eax.global-to-local, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %esi.global-to-local, align 4
  %v1_e = add i32 %arg1, 128
  store i32 %v1_e, i32* %edi.global-to-local, align 4
  %v1_14 = add i32 %arg1, 208
  %v2_14 = inttoptr i32 %v1_14 to i32*
  %v3_14 = load i32, i32* %v2_14, align 4
  %v10_14 = icmp eq i32 %v3_14, 0
  %v11_14 = icmp slt i32 %v3_14, 0
  %v3_18 = icmp eq i1 %v11_14, false
  %v4_18 = icmp eq i1 %v10_14, false
  %v5_18 = icmp eq i1 %v3_18, %v4_18
  br i1 %v5_18, label %dec_label_pc_0.dec_label_pc_23_crit_edge, label %dec_label_pc_1a

dec_label_pc_0.dec_label_pc_23_crit_edge:         ; preds = %dec_label_pc_0
  %v0_23.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %.pre = add i32 %arg1, 200
  %.pre53 = inttoptr i32 %.pre to double*
  %v4_23.pre = load double, double* %.pre53, align 4
  %.pre306 = fpext double %v4_23.pre to x86_fp80
  br label %dec_label_pc_23

dec_label_pc_1a:                                  ; preds = %dec_label_pc_0
  %v4_1a = add i32 %v3_14, 1
  store i32 %v4_1a, i32* %v2_14, align 4
  %v0_1d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_1d = load i32, i32* %esi.global-to-local, align 4
  %v2_1d = add i32 %v1_1d, -16
  %v3_1d = inttoptr i32 %v2_1d to double*
  %v4_1d = load double, double* %v3_1d, align 4
  %v5_1d = fpext double %v4_1d to x86_fp80
  store x86_fp80 %v5_1d, x86_fp80* %st7.global-to-local, align 4
  %v2_20 = load i32, i32* %edi.global-to-local, align 4
  %v3_20 = add i32 %v2_20, 72
  %v5_20 = inttoptr i32 %v3_20 to double*
  store double %v4_1d, double* %v5_20, align 4
  br label %dec_label_pc_23

dec_label_pc_23:                                  ; preds = %dec_label_pc_0.dec_label_pc_23_crit_edge, %dec_label_pc_1a
  %v5_23.pre-phi = phi x86_fp80 [ %.pre306, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_1d, %dec_label_pc_1a ]
  %v3_23.pre-phi = phi double* [ %.pre53, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v5_20, %dec_label_pc_1a ]
  %v1_36 = phi i32 [ %v3_b, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v1_1d, %dec_label_pc_1a ]
  %v0_23 = phi i3 [ %v0_23.pre, %dec_label_pc_0.dec_label_pc_23_crit_edge ], [ %v0_1d, %dec_label_pc_1a ]
  store x86_fp80 %v5_23.pre-phi, x86_fp80* %st7.global-to-local, align 4
  %v2_2a = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v5_23.pre-phi)
  %v4_2c = fadd x86_fp80 %v2_2a, 0xKBFFF8000000000000000
  %v3_2e = add i32 %v1_36, -48
  %v4_2e = inttoptr i32 %v3_2e to double*
  %v5_2e = load double, double* %v4_2e, align 4
  %v6_2e = fpext double %v5_2e to x86_fp80
  %v7_2e = fmul x86_fp80 %v4_2c, %v6_2e
  %v4_31 = fadd x86_fp80 %v7_2e, %v5_23.pre-phi
  store x86_fp80 %v4_31, x86_fp80* %st7.global-to-local, align 4
  %v4_33 = fptrunc x86_fp80 %v4_31 to double
  store double %v4_33, double* %v3_23.pre-phi, align 4
  %v2_36 = add i32 %v1_36, -40
  %v3_36 = inttoptr i32 %v2_36 to double*
  %v4_36 = load double, double* %v3_36, align 4
  %v5_36 = fpext double %v4_36 to x86_fp80
  %v4_3d = fadd x86_fp80 %v5_36, %v5_36
  store x86_fp80 %v4_3d, x86_fp80* %st7.global-to-local, align 4
  %v5_41 = xor i3 %v0_23, -4
  store i3 %v5_41, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_45 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_45 = call i16 @__asm_fnstsw(i32 %v0_45)
  %v2_45 = sext i16 %v1_45 to i32
  %v3_45 = load i32, i32* %eax.global-to-local, align 8
  %v4_45 = and i32 %v3_45, -65536
  %tmp307 = udiv i32 %v2_45, 2
  %v12_47 = and i32 %tmp307, 32512
  %v2_45.masked = and i32 %v2_45, -65281
  %v13_47 = or i32 %v4_45, %v2_45.masked
  %v14_47 = or i32 %v13_47, %v12_47
  store i32 %v14_47, i32* %eax.global-to-local, align 8
  %v15_47297 = and i32 %v2_45, 256
  %v16_47 = icmp eq i32 %v15_47297, 0
  %v2_51 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_47, label %dec_label_pc_4b, label %dec_label_pc_51

dec_label_pc_4b:                                  ; preds = %dec_label_pc_23
  %v2_4b = fsub x86_fp80 0xK80000000000000000000, %v2_51
  %v4_4d = fsub x86_fp80 %v2_4b, %v2_51
  store x86_fp80 %v4_4d, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_5d

dec_label_pc_51:                                  ; preds = %dec_label_pc_23
  %v0_53 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_53 = call i16 @__asm_fnstsw(i32 %v0_53)
  %v2_53 = sext i16 %v1_53 to i32
  %v3_53 = load i32, i32* %eax.global-to-local, align 8
  %v4_53 = and i32 %v3_53, -65536
  %tmp308 = udiv i32 %v2_53, 2
  %v12_55 = and i32 %tmp308, 32512
  %v2_53.masked = and i32 %v2_53, -65281
  %v13_55 = or i32 %v4_53, %v2_53.masked
  %v14_55 = or i32 %v13_55, %v12_55
  store i32 %v14_55, i32* %eax.global-to-local, align 8
  %v15_55298 = and i32 %v2_53, 256
  %v16_55 = icmp ne i32 %v15_55298, 0
  %v1_57 = icmp eq i1 %v16_55, false
  br i1 %v1_57, label %dec_label_pc_5d, label %dec_label_pc_59

dec_label_pc_59:                                  ; preds = %dec_label_pc_51
  %v1_59 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_5b = fsub x86_fp80 %v1_59, %v1_59
  store x86_fp80 %v4_5b, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_5d

dec_label_pc_5d:                                  ; preds = %dec_label_pc_59, %dec_label_pc_51, %dec_label_pc_4b
  %v0_5d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_5d = add i3 %v0_5d, -1
  store i3 %v5_5d, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_61 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_61 = call i16 @__asm_fnstsw(i32 %v0_61)
  %v2_61 = sext i16 %v1_61 to i32
  %v3_61 = load i32, i32* %eax.global-to-local, align 8
  %v4_61 = and i32 %v3_61, -65536
  %tmp309 = udiv i32 %v2_61, 2
  %v12_63 = and i32 %tmp309, 32512
  %v2_61.masked = and i32 %v2_61, -65281
  %v13_63 = or i32 %v4_61, %v2_61.masked
  %v14_63 = or i32 %v13_63, %v12_63
  store i32 %v14_63, i32* %eax.global-to-local, align 8
  %v15_63299 = and i32 %v2_61, 256
  %v16_63 = icmp eq i32 %v15_63299, 0
  %v2_6d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_63, label %dec_label_pc_67, label %dec_label_pc_6d

dec_label_pc_67:                                  ; preds = %dec_label_pc_5d
  %v2_67 = fsub x86_fp80 0xK80000000000000000000, %v2_6d
  %v4_69 = fsub x86_fp80 %v2_67, %v2_6d
  store x86_fp80 %v4_69, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_79

dec_label_pc_6d:                                  ; preds = %dec_label_pc_5d
  %v0_6f = load i32, i32* %fpsw.global-to-local, align 4
  %v1_6f = call i16 @__asm_fnstsw(i32 %v0_6f)
  %v2_6f = sext i16 %v1_6f to i32
  %v3_6f = load i32, i32* %eax.global-to-local, align 8
  %v4_6f = and i32 %v3_6f, -65536
  %tmp310 = udiv i32 %v2_6f, 2
  %v12_71 = and i32 %tmp310, 32512
  %v2_6f.masked = and i32 %v2_6f, -65281
  %v13_71 = or i32 %v4_6f, %v2_6f.masked
  %v14_71 = or i32 %v13_71, %v12_71
  store i32 %v14_71, i32* %eax.global-to-local, align 8
  %v15_71300 = and i32 %v2_6f, 256
  %v16_71 = icmp ne i32 %v15_71300, 0
  %v1_73 = icmp eq i1 %v16_71, false
  br i1 %v1_73, label %dec_label_pc_79, label %dec_label_pc_75

dec_label_pc_75:                                  ; preds = %dec_label_pc_6d
  %v1_75 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_77 = fsub x86_fp80 %v1_75, %v1_75
  store x86_fp80 %v4_77, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_79

dec_label_pc_79:                                  ; preds = %dec_label_pc_75, %dec_label_pc_6d, %dec_label_pc_67
  %v0_79 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v5_79 = add i3 %v0_79, -1
  store i3 %v5_79, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_7d = load i32, i32* %fpsw.global-to-local, align 4
  %v1_7d = call i16 @__asm_fnstsw(i32 %v0_7d)
  %v2_7d = sext i16 %v1_7d to i32
  %v3_7d = load i32, i32* %eax.global-to-local, align 8
  %v4_7d = and i32 %v3_7d, -65536
  %tmp311 = udiv i32 %v2_7d, 2
  %v12_7f = and i32 %tmp311, 32512
  %v2_7d.masked = and i32 %v2_7d, -65281
  %v13_7f = or i32 %v4_7d, %v2_7d.masked
  %v14_7f = or i32 %v13_7f, %v12_7f
  store i32 %v14_7f, i32* %eax.global-to-local, align 8
  %v15_7f301 = and i32 %v2_7d, 256
  %v16_7f = icmp eq i32 %v15_7f301, 0
  %v2_89 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v16_7f, label %dec_label_pc_83, label %dec_label_pc_89

dec_label_pc_83:                                  ; preds = %dec_label_pc_79
  %v2_83 = fsub x86_fp80 0xK80000000000000000000, %v2_89
  %v4_85 = fsub x86_fp80 %v2_83, %v2_89
  store x86_fp80 %v4_85, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_95

dec_label_pc_89:                                  ; preds = %dec_label_pc_79
  %v0_8b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_8b = call i16 @__asm_fnstsw(i32 %v0_8b)
  %v2_8b = sext i16 %v1_8b to i32
  %v3_8b = load i32, i32* %eax.global-to-local, align 8
  %v4_8b = and i32 %v3_8b, -65536
  %tmp312 = udiv i32 %v2_8b, 2
  %v12_8d = and i32 %tmp312, 32512
  %v2_8b.masked = and i32 %v2_8b, -65281
  %v13_8d = or i32 %v4_8b, %v2_8b.masked
  %v14_8d = or i32 %v13_8d, %v12_8d
  store i32 %v14_8d, i32* %eax.global-to-local, align 8
  %v15_8d302 = and i32 %v2_8b, 256
  %v16_8d = icmp ne i32 %v15_8d302, 0
  %v1_8f = icmp eq i1 %v16_8d, false
  %v2_95.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_8f, label %dec_label_pc_95, label %dec_label_pc_91

dec_label_pc_91:                                  ; preds = %dec_label_pc_89
  %v4_93 = fsub x86_fp80 %v2_95.pre, %v2_95.pre
  store x86_fp80 %v4_93, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_95

dec_label_pc_95:                                  ; preds = %dec_label_pc_89, %dec_label_pc_91, %dec_label_pc_83
  %v2_95 = phi x86_fp80 [ %v4_93, %dec_label_pc_91 ], [ %v4_85, %dec_label_pc_83 ], [ %v2_95.pre, %dec_label_pc_89 ]
  %v0_97 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v2_95, x86_fp80* %st7.global-to-local, align 4
  %v0_a1 = load i32, i32* %esi.global-to-local, align 4
  %v1_a1 = add i32 %v0_a1, -84
  %v2_a1 = inttoptr i32 %v1_a1 to i32*
  %v3_a1 = load i32, i32* %v2_a1, align 4
  %v10_a1 = icmp eq i32 %v3_a1, 0
  %v1_a5 = icmp eq i1 %v10_a1, false
  %v2_be = add i3 %v0_97, 2
  store i3 %v2_be, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v2_95, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_a5, label %dec_label_pc_be, label %dec_label_pc_a7

dec_label_pc_a7:                                  ; preds = %dec_label_pc_95
  %v3_a9 = add i32 %v0_a1, -64
  %v4_a9 = inttoptr i32 %v3_a9 to double*
  %v5_a9 = load double, double* %v4_a9, align 4
  %v6_a9 = fpext double %v5_a9 to x86_fp80
  %v7_a9 = fadd x86_fp80 %v2_95, %v6_a9
  %v4_ac = fmul x86_fp80 %v7_a9, %v7_a9
  store x86_fp80 %v4_ac, x86_fp80* %st7.global-to-local, align 4
  %v3_ae = add i3 %v0_97, 1
  %v4_b5 = fadd x86_fp80 %v4_ac, %v4_ac
  store i3 %v3_ae, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_b5, x86_fp80* %st7.global-to-local, align 4
  %v3_b9 = add i32 %v0_a1, -80
  %v4_b9 = inttoptr i32 %v3_b9 to double*
  %v5_b9 = load double, double* %v4_b9, align 4
  %v6_b9 = fpext double %v5_b9 to x86_fp80
  %v7_b9 = fadd x86_fp80 %v4_b5, %v6_b9
  br label %dec_label_pc_d3

dec_label_pc_be:                                  ; preds = %dec_label_pc_95
  %v2_c0 = load i32, i32* %edi.global-to-local, align 4
  %v3_c0 = add i32 %v2_c0, -104
  %v4_c0 = inttoptr i32 %v3_c0 to double*
  %v5_c0 = load double, double* %v4_c0, align 4
  %v6_c0 = fpext double %v5_c0 to x86_fp80
  %v7_c0 = fadd x86_fp80 %v2_95, %v6_c0
  %v4_c3 = fmul x86_fp80 %v7_c0, %v7_c0
  store x86_fp80 %v4_c3, x86_fp80* %st7.global-to-local, align 4
  %v3_c5 = add i3 %v0_97, 1
  %v4_cc = fadd x86_fp80 %v4_c3, %v4_c3
  store i3 %v3_c5, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_cc, x86_fp80* %st7.global-to-local, align 4
  %v3_d0 = add i32 %v0_a1, -88
  %v4_d0 = inttoptr i32 %v3_d0 to double*
  %v5_d0 = load double, double* %v4_d0, align 4
  %v6_d0 = fpext double %v5_d0 to x86_fp80
  %v7_d0 = fadd x86_fp80 %v4_cc, %v6_d0
  br label %dec_label_pc_d3

dec_label_pc_d3:                                  ; preds = %dec_label_pc_be, %dec_label_pc_a7
  %v0_d5 = phi i3 [ %v3_ae, %dec_label_pc_a7 ], [ %v3_c5, %dec_label_pc_be ]
  %storemerge30.in.in = phi x86_fp80 [ %v7_b9, %dec_label_pc_a7 ], [ %v7_d0, %dec_label_pc_be ]
  %v4_d3 = fmul x86_fp80 %storemerge30.in.in, %storemerge30.in.in
  %v4_d5 = fadd x86_fp80 %v4_d3, %v4_d3
  store x86_fp80 %v4_d5, x86_fp80* %st7.global-to-local, align 4
  %v2_d7 = add i32 %v0_a1, -56
  %v3_d7 = inttoptr i32 %v2_d7 to double*
  %v4_d7 = load double, double* %v3_d7, align 4
  %v5_d7 = fpext double %v4_d7 to x86_fp80
  %v1_dc = add i3 %v0_d5, -1
  store i3 %v1_dc, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 0xK3FFEB17217F7D1CF7800, x86_fp80* %st7.global-to-local, align 4
  %v0_e0 = call i32 @__asm_fyl2x()
  store i32 %v0_e0, i32* %eax.global-to-local, align 8
  %v3_e2 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_e4 = fmul x86_fp80 %v3_e2, %v5_d7
  %v4_e8 = fmul x86_fp80 %v4_e4, 0xK3FFFB8AA3B295C17F000
  %v2_ec = call x86_fp80 @llvm.round.f80(x86_fp80 %v4_e8)
  %v4_ee = fsub x86_fp80 %v4_e8, %v2_ec
  store x86_fp80 %v2_ec, x86_fp80* %st7.global-to-local, align 4
  %v0_f2 = call i32 @__asm_f2xm1()
  store i32 %v0_f2, i32* %eax.global-to-local, align 8
  %v4_f6 = fadd x86_fp80 %v4_ee, 0xK3FFF8000000000000000
  %v0_f8 = call i32 @__asm_fscale()
  store i32 %v0_f8, i32* %eax.global-to-local, align 8
  %v0_fa = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_f6, x86_fp80* %st7.global-to-local, align 4
  %v5_fa = add i3 %v0_fa, 1
  store i3 %v5_fa, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ff = load i32, i32* %fpsw.global-to-local, align 4
  %v1_ff = call i16 @__asm_fnstsw(i32 %v0_ff)
  %v2_ff = sext i16 %v1_ff to i32
  %v3_ff = load i32, i32* %eax.global-to-local, align 8
  %v4_ff = and i32 %v3_ff, -65536
  %tmp313 = udiv i32 %v2_ff, 2
  %v12_101 = and i32 %tmp313, 32512
  %v2_ff.masked = and i32 %v2_ff, -65281
  %v13_101 = or i32 %v4_ff, %v2_ff.masked
  %v14_101 = or i32 %v13_101, %v12_101
  store i32 %v14_101, i32* %eax.global-to-local, align 8
  %v15_101303 = and i32 %v2_ff, 256
  %v16_101 = icmp ne i32 %v15_101303, 0
  %v1_103 = icmp eq i1 %v16_101, false
  %v0_10c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_103, label %dec_label_pc_10c, label %dec_label_pc_105

dec_label_pc_105:                                 ; preds = %dec_label_pc_d3
  %v1_107 = load i32, i32* %esi.global-to-local, align 4
  %v2_107 = add i32 %v1_107, -24
  %v3_107 = inttoptr i32 %v2_107 to double*
  %v4_107 = load double, double* %v3_107, align 4
  %v5_107 = fpext double %v4_107 to x86_fp80
  store x86_fp80 %v5_107, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_122

dec_label_pc_10c:                                 ; preds = %dec_label_pc_d3
  %v1_10c = add i3 %v0_10c, -1
  store i3 %v1_10c, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_110 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_110 = call i16 @__asm_fnstsw(i32 %v0_110)
  %v2_110 = sext i16 %v1_110 to i32
  %v3_110 = load i32, i32* %eax.global-to-local, align 8
  %v4_110 = and i32 %v3_110, -65536
  %tmp314 = udiv i32 %v2_110, 2
  %v12_112 = and i32 %tmp314, 32512
  %v2_110.masked = and i32 %v2_110, -65281
  %v13_112 = or i32 %v4_110, %v2_110.masked
  %v14_112 = or i32 %v13_112, %v12_112
  store i32 %v14_112, i32* %eax.global-to-local, align 8
  %v15_112304 = and i32 %v2_110, 256
  %v16_112 = icmp eq i32 %v15_112304, 0
  %v0_11d = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_116 = add i3 %v0_11d, 1
  br i1 %v16_112, label %dec_label_pc_116, label %dec_label_pc_11d

dec_label_pc_116:                                 ; preds = %dec_label_pc_10c
  %v2_11d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  store i3 %v4_116, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_118 = load i32, i32* %edi.global-to-local, align 4
  %v3_118 = add i32 %v2_118, 72
  %v4_118 = inttoptr i32 %v3_118 to double*
  %v5_118 = load double, double* %v4_118, align 4
  %v6_118 = fpext double %v5_118 to x86_fp80
  %v7_118 = fdiv x86_fp80 %v6_118, %v2_11d
  store x86_fp80 %v7_118, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_122

dec_label_pc_11d:                                 ; preds = %dec_label_pc_10c
  %v1_11f = load i32, i32* %edi.global-to-local, align 4
  %v2_11f = add i32 %v1_11f, 72
  %v3_11f = inttoptr i32 %v2_11f to double*
  %v4_11f = load double, double* %v3_11f, align 4
  %v5_11f = fpext double %v4_11f to x86_fp80
  store i3 %v4_116, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_11f, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_122

dec_label_pc_122:                                 ; preds = %dec_label_pc_11d, %dec_label_pc_116, %dec_label_pc_105
  %v3_125 = phi x86_fp80 [ %v5_11f, %dec_label_pc_11d ], [ %v7_118, %dec_label_pc_116 ], [ %v5_107, %dec_label_pc_105 ]
  %v0_122 = phi i3 [ %v4_116, %dec_label_pc_11d ], [ %v4_116, %dec_label_pc_116 ], [ %v0_10c, %dec_label_pc_105 ]
  %v1_122 = load i32, i32* @ecx, align 8
  %v2_122 = add i32 %v1_122, 8
  %v3_122 = inttoptr i32 %v2_122 to double*
  %v4_122 = load double, double* %v3_122, align 4
  %v5_122 = fpext double %v4_122 to x86_fp80
  %v4_125 = fmul x86_fp80 %v3_125, %v5_122
  %v4_127 = fptrunc x86_fp80 %v4_125 to double
  store double %v4_127, double* %v3_122, align 4
  %v2_12a = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_12a = fmul x86_fp80 %v2_12a, %v2_12a
  %v4_12c = fmul x86_fp80 %v4_12a, %v4_12a
  %v4_12e = fmul x86_fp80 %v4_12c, %v4_12c
  store x86_fp80 %v4_12e, x86_fp80* %st7.global-to-local, align 4
  %v7_12e = add i3 %v0_122, 1
  store i3 %v7_12e, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_130 = load i32, i32* %esi.global-to-local, align 4
  %v1_130 = add i32 %v0_130, -84
  %v2_130 = inttoptr i32 %v1_130 to i32*
  %v3_130 = load i32, i32* %v2_130, align 4
  %v10_130 = icmp eq i32 %v3_130, 0
  %v1_134 = icmp eq i1 %v10_130, false
  br i1 %v1_134, label %dec_label_pc_147, label %dec_label_pc_136

dec_label_pc_136:                                 ; preds = %dec_label_pc_122
  %v2_136 = load i32, i32* %edi.global-to-local, align 4
  %v3_136 = add i32 %v2_136, -88
  %v4_136 = inttoptr i32 %v3_136 to double*
  %v5_136 = load double, double* %v4_136, align 4
  %v6_136 = fpext double %v5_136 to x86_fp80
  %v7_136 = fadd x86_fp80 %v4_12e, %v6_136
  store x86_fp80 %v7_136, x86_fp80* %st7.global-to-local, align 4
  %v2_139 = load i32, i32* @ecx, align 8
  %v3_139 = fptrunc x86_fp80 %v7_136 to double
  %v4_139 = inttoptr i32 %v2_139 to double*
  store double %v3_139, double* %v4_139, align 4
  %v1_13b = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_13b = add i32 %v2_136, -96
  %v4_13b = inttoptr i32 %v3_13b to double*
  %v5_13b = load double, double* %v4_13b, align 4
  %v6_13b = fpext double %v5_13b to x86_fp80
  %v7_13b = fadd x86_fp80 %v1_13b, %v6_13b
  store x86_fp80 %v7_13b, x86_fp80* %st7.global-to-local, align 4
  %v2_13e = load i32, i32* @edx, align 8
  %v3_13e = fptrunc x86_fp80 %v7_13b to double
  %v4_13e = inttoptr i32 %v2_13e to double*
  store double %v3_13e, double* %v4_13e, align 4
  %v5_13e = add i3 %v0_122, 3
  store i3 %v5_13e, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_140 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_140 = add i32 %v2_136, -104
  %v4_140 = inttoptr i32 %v3_140 to double*
  %v5_140 = load double, double* %v4_140, align 4
  %v6_140 = fpext double %v5_140 to x86_fp80
  %v7_140 = fadd x86_fp80 %v1_140, %v6_140
  store x86_fp80 %v7_140, x86_fp80* %st7.global-to-local, align 4
  %v2_143 = load i32, i32* %ebx.global-to-local, align 4
  %v3_143 = fptrunc x86_fp80 %v7_140 to double
  %v4_143 = inttoptr i32 %v2_143 to double*
  store double %v3_143, double* %v4_143, align 4
  br label %dec_label_pc_156

dec_label_pc_147:                                 ; preds = %dec_label_pc_122
  %v3_147 = add i32 %v0_130, -80
  %v4_147 = inttoptr i32 %v3_147 to double*
  %v5_147 = load double, double* %v4_147, align 4
  %v6_147 = fpext double %v5_147 to x86_fp80
  %v7_147 = fadd x86_fp80 %v4_12e, %v6_147
  store x86_fp80 %v7_147, x86_fp80* %st7.global-to-local, align 4
  %v2_14a = load i32, i32* @ecx, align 8
  %v3_14a = fptrunc x86_fp80 %v7_147 to double
  %v4_14a = inttoptr i32 %v2_14a to double*
  store double %v3_14a, double* %v4_14a, align 4
  %v1_14c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_14c = add i32 %v0_130, -72
  %v4_14c = inttoptr i32 %v3_14c to double*
  %v5_14c = load double, double* %v4_14c, align 4
  %v6_14c = fpext double %v5_14c to x86_fp80
  %v7_14c = fadd x86_fp80 %v1_14c, %v6_14c
  store x86_fp80 %v7_14c, x86_fp80* %st7.global-to-local, align 4
  %v2_14f = load i32, i32* @edx, align 8
  %v3_14f = fptrunc x86_fp80 %v7_14c to double
  %v4_14f = inttoptr i32 %v2_14f to double*
  store double %v3_14f, double* %v4_14f, align 4
  %v5_14f = add i3 %v0_122, 3
  store i3 %v5_14f, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_151 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_151 = add i32 %v0_130, -64
  %v4_151 = inttoptr i32 %v3_151 to double*
  %v5_151 = load double, double* %v4_151, align 4
  %v6_151 = fpext double %v5_151 to x86_fp80
  %v7_151 = fadd x86_fp80 %v1_151, %v6_151
  store x86_fp80 %v7_151, x86_fp80* %st7.global-to-local, align 4
  %v2_154 = load i32, i32* %ebx.global-to-local, align 4
  %v3_154 = fptrunc x86_fp80 %v7_151 to double
  %v4_154 = inttoptr i32 %v2_154 to double*
  store double %v3_154, double* %v4_154, align 4
  br label %dec_label_pc_156

dec_label_pc_156:                                 ; preds = %dec_label_pc_147, %dec_label_pc_136
  %v0_156 = phi i32 [ %v2_154, %dec_label_pc_147 ], [ %v2_143, %dec_label_pc_136 ]
  %storemerge.in = phi i3 [ %v5_14f, %dec_label_pc_147 ], [ %v5_13e, %dec_label_pc_136 ]
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_156, i32* %eax.global-to-local, align 8
  store i32 %v0_5, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v0_156
}

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare i32 @__asm_fyl2x() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.round.f80(x86_fp80) #0

declare i32 @__asm_f2xm1() local_unnamed_addr

declare i32 @__asm_fscale() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
