source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp271 = call double @__decompiler_undefined_function_4()
  %stack_var_-52 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -68
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-52, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4b = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_4b, x86_fp80* %st7.global-to-local, align 4
  %v5_4f = fpext double %tmp271 to x86_fp80
  %v3_53 = load double, double* %stack_var_-52, align 8
  %v8_53 = fpext double %v3_53 to x86_fp80
  %v2_58 = load i32, i32* @edi, align 8
  %v3_58 = add i32 %v2_58, -112
  %v4_58 = inttoptr i32 %v3_58 to float*
  %v5_58 = load float, float* %v4_58, align 4
  %v6_58 = fpext float %v5_58 to x86_fp80
  %v7_58 = fmul x86_fp80 %v8_53, %v6_58
  %v3_5d = add i32 %v2_58, -116
  %v4_5d = inttoptr i32 %v3_5d to float*
  %v5_5d = load float, float* %v4_5d, align 4
  %v6_5d = fpext float %v5_5d to x86_fp80
  %v7_5d = fmul x86_fp80 %v5_4f, %v6_5d
  %v4_60 = fadd x86_fp80 %v7_58, %v7_5d
  %v3_64 = add i32 %v2_58, -120
  %v4_64 = inttoptr i32 %v3_64 to float*
  %v5_64 = load float, float* %v4_64, align 4
  %v6_64 = fpext float %v5_64 to x86_fp80
  %v7_64 = fmul x86_fp80 %v7_4b, %v6_64
  %v4_67 = fadd x86_fp80 %v4_60, %v7_64
  %v3_6b = add i32 %v2_58, -88
  %v4_6b = inttoptr i32 %v3_6b to float*
  %v5_6b = load float, float* %v4_6b, align 4
  %v6_6b = fpext float %v5_6b to x86_fp80
  %v7_6b = fmul x86_fp80 %v8_53, %v6_6b
  %v3_70 = add i32 %v2_58, -92
  %v4_70 = inttoptr i32 %v3_70 to float*
  %v5_70 = load float, float* %v4_70, align 4
  %v6_70 = fpext float %v5_70 to x86_fp80
  %v7_70 = fmul x86_fp80 %v5_4f, %v6_70
  %v4_73 = fadd x86_fp80 %v7_6b, %v7_70
  %v3_77 = add i32 %v2_58, -96
  %v4_77 = inttoptr i32 %v3_77 to float*
  %v5_77 = load float, float* %v4_77, align 4
  %v6_77 = fpext float %v5_77 to x86_fp80
  %v7_77 = fmul x86_fp80 %v7_4b, %v6_77
  %v4_7a = fadd x86_fp80 %v4_73, %v7_77
  %v3_7e = add i32 %v2_58, -100
  %v4_7e = inttoptr i32 %v3_7e to float*
  %v5_7e = load float, float* %v4_7e, align 4
  %v6_7e = fpext float %v5_7e to x86_fp80
  %v7_7e = fmul x86_fp80 %v8_53, %v6_7e
  %v3_83 = add i32 %v2_58, -104
  %v4_83 = inttoptr i32 %v3_83 to float*
  %v5_83 = load float, float* %v4_83, align 4
  %v6_83 = fpext float %v5_83 to x86_fp80
  %v7_83 = fmul x86_fp80 %v5_4f, %v6_83
  %v4_86 = fadd x86_fp80 %v7_7e, %v7_83
  store x86_fp80 %v4_67, x86_fp80* %st7.global-to-local, align 4
  %v3_8a = add i32 %v2_58, -108
  %v4_8a = inttoptr i32 %v3_8a to float*
  %v5_8a = load float, float* %v4_8a, align 4
  %v6_8a = fpext float %v5_8a to x86_fp80
  %v7_8a = fmul x86_fp80 %v7_4b, %v6_8a
  %v4_8d = fadd x86_fp80 %v4_86, %v7_8a
  %tmp276 = fptrunc x86_fp80 %v4_7a to double
  store double %tmp276, double* %stack_var_-52, align 8
  %v4_9e = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_9e = fpext double %v4_9e to x86_fp80
  %v6_9e = fsub x86_fp80 %v4_67, %v5_9e
  %v2_a0 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v6_9e)
  %v6_a2 = fsub x86_fp80 %v2_a0, %v5_9e
  %v2_a4 = load i32, i32* %esi.global-to-local, align 4
  %v3_a4 = add i32 %v2_a4, -32
  %v4_a4 = fptrunc x86_fp80 %v6_a2 to double
  %v5_a4 = inttoptr i32 %v3_a4 to double*
  store double %v4_a4, double* %v5_a4, align 4
  %v1_ab = add i3 %v0_4b, -2
  %v4_ad = fadd x86_fp80 %v4_67, 0xKBFFF8000000000000000
  store x86_fp80 %v4_ad, x86_fp80* %st7.global-to-local, align 4
  %v1_af = load i32, i32* @edi, align 8
  %v2_af = add i32 %v1_af, -160
  %v3_af = inttoptr i32 %v2_af to double*
  %v4_af = load double, double* %v3_af, align 4
  %v5_af = fpext double %v4_af to x86_fp80
  store i3 %v1_ab, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_af, x86_fp80* %st7.global-to-local, align 4
  %v2_b7 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_ad)
  %v5_b9 = call i32 @__asm_fyl2x(x86_fp80 %v4_7a)
  %v0_bb = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_bd = add i3 %v0_bb, -2
  store i3 %v3_bd, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_bf = call i32 @__asm_fprem()
  %v0_c1 = call i32 @__asm_f2xm1()
  %v0_c3 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_c3 = fadd x86_fp80 %v2_b7, 0xK3FFF8000000000000000
  %v7_c3 = add i3 %v0_c3, 1
  store i3 %v7_c3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_c5 = call i32 @__asm_fscale()
  %v2_cb = fsub x86_fp80 0xK80000000000000000000, %v4_c3
  %v2_d9 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v2_cb)
  %v5_db = call i32 @__asm_fyl2x(x86_fp80 %v2_cb)
  %v0_dd = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_df = add i3 %v0_dd, -2
  store i3 %v3_df, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_e1 = call i32 @__asm_fprem()
  %v0_e3 = call i32 @__asm_f2xm1()
  %v0_e5 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_e5 = fadd x86_fp80 %v2_d9, 0xK3FFF8000000000000000
  %v7_e5 = add i3 %v0_e5, 1
  store i3 %v7_e5, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_e7 = call i32 @__asm_fscale()
  %v0_eb = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_eb = add i3 %v0_eb, 1
  store i3 %v4_eb, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_ed = load i32, i32* @edi, align 8
  %v3_ed = add i32 %v2_ed, -128
  %v4_ed = inttoptr i32 %v3_ed to double*
  %v5_ed = load double, double* %v4_ed, align 4
  %v6_ed = fpext double %v5_ed to x86_fp80
  %v7_ed = fmul x86_fp80 %v4_e5, %v6_ed
  %v2_f0 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_ed)
  %v3_f0 = fcmp olt x86_fp80 %v2_f0, 0xK403E8000000000000000
  br i1 %v3_f0, label %bb, label %dec_label_pc_40._crit_edge

bb:                                               ; preds = %dec_label_pc_40
  store i3 %v0_eb, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_40._crit_edge

dec_label_pc_40._crit_edge:                       ; preds = %dec_label_pc_40, %bb
  %v0_f2 = phi i3 [ %v0_eb, %bb ], [ %v4_eb, %dec_label_pc_40 ]
  %v1_f2 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v7_fd = fmul x86_fp80 %v4_7a, %v1_f2
  %v7_105 = fmul x86_fp80 %v4_8d, %v1_f2
  %v4_10b = fsub x86_fp80 %v7_fd, %v7_105
  %v3_10d = fmul x86_fp80 %v4_10b, %v4_10b
  store x86_fp80 %v3_10d, x86_fp80* %st7.global-to-local, align 4
  %v4_11e = fadd x86_fp80 %v7_fd, %v7_105
  %v3_124 = add i32 %v2_ed, -136
  %v4_124 = inttoptr i32 %v3_124 to double*
  %v5_124 = load double, double* %v4_124, align 4
  %v6_124 = fpext double %v5_124 to x86_fp80
  %v7_124 = fmul x86_fp80 %v2_cb, %v6_124
  %v4_12a = fadd x86_fp80 %v4_11e, %v7_124
  %v3_12c = fmul x86_fp80 %v4_12a, %v4_12a
  %v4_12e = fadd x86_fp80 %v3_10d, %v3_12c
  %v2_130 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_12e)
  store x86_fp80 %v2_130, x86_fp80* %st7.global-to-local, align 4
  %v4_132 = load double, double* %v4_ed, align 4
  store i3 %v0_f2, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_13b = call i32 @__asm_wait()
  %v0_13c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_13c = call i16 @__asm_fnstsw(i32 %v0_13c)
  %tmp283 = and i16 %v1_13c, 256
  %v16_13e = icmp eq i16 %tmp283, 0
  br i1 %v16_13e, label %dec_label_pc_142, label %dec_label_pc_146

dec_label_pc_142:                                 ; preds = %dec_label_pc_40._crit_edge
  %v0_142 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_154.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_14a

dec_label_pc_146:                                 ; preds = %dec_label_pc_40._crit_edge
  %tmp277 = call double @llvm.fabs.f64(double %v4_132)
  %v2_135 = fpext double %tmp277 to x86_fp80
  %v2_146 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_135)
  %v0_148 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_148 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_148 = fdiv x86_fp80 %v3_148, %v2_146
  store x86_fp80 %v4_148, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_14a

dec_label_pc_14a:                                 ; preds = %dec_label_pc_146, %dec_label_pc_142
  %v3_154 = phi x86_fp80 [ %v4_148, %dec_label_pc_146 ], [ %v3_154.pre, %dec_label_pc_142 ]
  %storemerge8.in = phi i3 [ %v0_148, %dec_label_pc_146 ], [ %v0_142, %dec_label_pc_142 ]
  %v2_14e = load i32, i32* @edi, align 8
  %v3_14e = add i32 %v2_14e, -144
  %v4_14e = inttoptr i32 %v3_14e to double*
  %v5_14e = load double, double* %v4_14e, align 4
  %v6_14e = fpext double %v5_14e to x86_fp80
  %v7_14e = fmul x86_fp80 %v2_cb, %v6_14e
  %v4_154 = fadd x86_fp80 %v3_154, %v7_14e
  store x86_fp80 %v4_154, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge8.in, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_15b = call i32 @__asm_wait()
  %v0_15c = load i32, i32* %fpsw.global-to-local, align 4
  %v1_15c = call i16 @__asm_fnstsw(i32 %v0_15c)
  %v2_15c = sext i16 %v1_15c to i32
  %v4_15c = and i32 %v0_15b, -65536
  %tmp279 = udiv i32 %v2_15c, 2
  %v12_15e = and i32 %tmp279, 32512
  %v2_15c.masked = and i32 %v2_15c, -65281
  %v13_15e = or i32 %v4_15c, %v2_15c.masked
  %v14_15e = or i32 %v13_15e, %v12_15e
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_168 = load i32, i32* @edi, align 8
  %v1_168 = add i32 %v0_168, -68
  %v2_168 = inttoptr i32 %v1_168 to i32*
  %v3_168 = load i32, i32* %v2_168, align 4
  %v10_168 = icmp eq i32 %v3_168, 0
  %v1_16c = icmp eq i1 %v10_168, false
  %v1_171.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_16c, label %dec_label_pc_171, label %dec_label_pc_16e

dec_label_pc_16e:                                 ; preds = %dec_label_pc_14a
  %v3_16e = add i32 %v0_168, -32
  %v4_16e = inttoptr i32 %v3_16e to double*
  %v5_16e = load double, double* %v4_16e, align 4
  %v6_16e = fpext double %v5_16e to x86_fp80
  %v7_16e = fdiv x86_fp80 %v1_171.pre, %v6_16e
  store x86_fp80 %v7_16e, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_171

dec_label_pc_171:                                 ; preds = %dec_label_pc_14a, %dec_label_pc_16e
  %v1_171 = phi x86_fp80 [ %v7_16e, %dec_label_pc_16e ], [ %v1_171.pre, %dec_label_pc_14a ]
  %v2_171 = load i32, i32* %esi.global-to-local, align 4
  %v3_171 = add i32 %v2_171, -32
  %v4_171 = fptrunc x86_fp80 %v1_171 to double
  %v5_171 = inttoptr i32 %v3_171 to double*
  store double %v4_171, double* %v5_171, align 4
  %v1_174 = load i32, i32* @edi, align 8
  %v2_174 = add i32 %v1_174, -16
  %v3_174 = inttoptr i32 %v2_174 to double*
  %v4_174 = load double, double* %v3_174, align 4
  %v5_174 = fpext double %v4_174 to x86_fp80
  store x86_fp80 %v5_174, x86_fp80* %st7.global-to-local, align 4
  %v2_177 = add i32 %v2_171, -24
  %v3_177 = inttoptr i32 %v2_177 to i32*
  %v4_177 = load i32, i32* %v3_177, align 4
  %v5_177 = sitofp i32 %v4_177 to x86_fp80
  %v3_17a = add i32 %v1_174, -76
  %v4_17a = inttoptr i32 %v3_17a to double*
  %v5_17a = load double, double* %v4_17a, align 4
  %v6_17a = fpext double %v5_17a to x86_fp80
  %v7_17a = fmul x86_fp80 %v5_177, %v6_17a
  %v4_17d = fadd x86_fp80 %v7_17a, %v5_174
  %v2_17f = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_17d)
  store x86_fp80 %v2_17f, x86_fp80* %st7.global-to-local, align 4
  %v3_181 = add i32 %v2_171, 128
  %tmp280 = fptrunc x86_fp80 %v4_17d to double
  %v4_181 = call double @llvm.fabs.f64(double %tmp280)
  %v5_181 = inttoptr i32 %v3_181 to double*
  store double %v4_181, double* %v5_181, align 4
  %v6_181 = add i3 %storemerge.in, 2
  store i3 %v6_181, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_15e
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_fyl2x(x86_fp80) local_unnamed_addr

declare i32 @__asm_fprem() local_unnamed_addr

declare i32 @__asm_f2xm1() local_unnamed_addr

declare i32 @__asm_fscale() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_4() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
