source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp290 = call double @__decompiler_undefined_function_3()
  %stack_var_-80 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* %edi.global-to-local, align 4
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v2_12 = add i32 %v1_d, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* %edi.global-to-local, align 4
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v2_1c = add i32 %v1_17, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* %edi.global-to-local, align 4
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* %edi.global-to-local, align 4
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-80, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4c = load i32, i32* %edi.global-to-local, align 4
  %v1_4c = add i32 %v0_4c, -44
  store i32 %v1_4c, i32* %edi.global-to-local, align 4
  %v0_4f = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v7_4f = fpext double %v6_45 to x86_fp80
  store x86_fp80 %v7_4f, x86_fp80* %st7.global-to-local, align 4
  %v5_53 = fpext double %tmp290 to x86_fp80
  store x86_fp80 %v5_53, x86_fp80* %st6.global-to-local, align 4
  %v3_57 = load double, double* %stack_var_-80, align 8
  %v8_57 = fpext double %v3_57 to x86_fp80
  store x86_fp80 %v8_57, x86_fp80* %st5.global-to-local, align 4
  %v3_5c = add i32 %v0_4c, -104
  %v4_5c = inttoptr i32 %v3_5c to float*
  %v5_5c = load float, float* %v4_5c, align 4
  %v6_5c = fpext float %v5_5c to x86_fp80
  %v7_5c = fmul x86_fp80 %v8_57, %v6_5c
  %v3_61 = add i32 %v0_4c, -108
  %v4_61 = inttoptr i32 %v3_61 to float*
  %v5_61 = load float, float* %v4_61, align 4
  %v6_61 = fpext float %v5_61 to x86_fp80
  %v7_61 = fmul x86_fp80 %v5_53, %v6_61
  %v4_64 = fadd x86_fp80 %v7_5c, %v7_61
  %v3_68 = add i32 %v0_4c, -112
  %v4_68 = inttoptr i32 %v3_68 to float*
  %v5_68 = load float, float* %v4_68, align 4
  %v6_68 = fpext float %v5_68 to x86_fp80
  %v7_68 = fmul x86_fp80 %v7_4f, %v6_68
  %v4_6b = fadd x86_fp80 %v7_68, %v4_64
  %v3_6f = add i32 %v0_4c, -80
  %v4_6f = inttoptr i32 %v3_6f to float*
  %v5_6f = load float, float* %v4_6f, align 4
  %v6_6f = fpext float %v5_6f to x86_fp80
  %v7_6f = fmul x86_fp80 %v8_57, %v6_6f
  %v3_74 = add i32 %v0_4c, -84
  %v4_74 = inttoptr i32 %v3_74 to float*
  %v5_74 = load float, float* %v4_74, align 4
  %v6_74 = fpext float %v5_74 to x86_fp80
  %v7_74 = fmul x86_fp80 %v5_53, %v6_74
  %v4_77 = fadd x86_fp80 %v7_6f, %v7_74
  %v3_7b = add i32 %v0_4c, -88
  %v4_7b = inttoptr i32 %v3_7b to float*
  %v5_7b = load float, float* %v4_7b, align 4
  %v6_7b = fpext float %v5_7b to x86_fp80
  %v7_7b = fmul x86_fp80 %v7_4f, %v6_7b
  %v4_7e = fadd x86_fp80 %v7_7b, %v4_77
  store x86_fp80 %v4_7e, x86_fp80* %st5.global-to-local, align 4
  %v3_82 = add i32 %v0_4c, -92
  %v4_82 = inttoptr i32 %v3_82 to float*
  %v5_82 = load float, float* %v4_82, align 4
  %v6_82 = fpext float %v5_82 to x86_fp80
  %v7_82 = fmul x86_fp80 %v8_57, %v6_82
  store x86_fp80 %v7_82, x86_fp80* %st6.global-to-local, align 4
  %v3_87 = add i32 %v0_4c, -96
  %v4_87 = inttoptr i32 %v3_87 to float*
  %v5_87 = load float, float* %v4_87, align 4
  %v6_87 = fpext float %v5_87 to x86_fp80
  %v7_87 = fmul x86_fp80 %v5_53, %v6_87
  %v4_8a = fadd x86_fp80 %v7_82, %v7_87
  store x86_fp80 %v4_8a, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v4_6b, x86_fp80* %st7.global-to-local, align 4
  %v3_8e = add i32 %v0_4c, -100
  %v4_8e = inttoptr i32 %v3_8e to float*
  %v5_8e = load float, float* %v4_8e, align 4
  %v6_8e = fpext float %v5_8e to x86_fp80
  %v7_8e = fmul x86_fp80 %v7_4f, %v6_8e
  %v4_91 = fadd x86_fp80 %v4_8a, %v7_8e
  store x86_fp80 %v4_91, x86_fp80* %st6.global-to-local, align 4
  %tmp295 = fptrunc x86_fp80 %v4_7e to double
  store double %tmp295, double* %stack_var_-80, align 8
  %v4_96 = fptrunc x86_fp80 %v4_91 to double
  %v6_96 = add i3 %v0_4f, -1
  %v4_9a = fptrunc x86_fp80 %v4_6b to double
  store i32 %v0_4c, i32* %edi.global-to-local, align 4
  store i3 %v6_96, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_6b, x86_fp80* %st7.global-to-local, align 4
  %v3_a5 = add i32 %v0_4c, -72
  %v4_a5 = inttoptr i32 %v3_a5 to double*
  %v5_a5 = load double, double* %v4_a5, align 4
  %v6_a5 = fpext double %v5_a5 to x86_fp80
  %v7_a5 = fmul x86_fp80 %v4_6b, %v6_a5
  store x86_fp80 %v7_a5, x86_fp80* %st7.global-to-local, align 4
  %v2_a8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_a5)
  %v3_a8 = fcmp olt x86_fp80 %v2_a8, 0xK403E8000000000000000
  br i1 %v3_a8, label %bb, label %bb296

bb:                                               ; preds = %dec_label_pc_40
  %v4_a8 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_a5)
  store x86_fp80 %v4_a8, x86_fp80* %st7.global-to-local, align 4
  %v7_a8 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_a5)
  %v8_a8 = add i3 %v0_4f, -2
  store i3 %v8_a8, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_a8, x86_fp80* %st6.global-to-local, align 4
  br label %bb296

bb296:                                            ; preds = %dec_label_pc_40, %bb
  %v1_c329 = phi x86_fp80 [ %v4_91, %dec_label_pc_40 ], [ %v7_a8, %bb ]
  %v0_aa = phi i3 [ %v6_96, %dec_label_pc_40 ], [ %v8_a8, %bb ]
  %v6_aa = add i3 %v0_aa, -1
  store i3 %v6_aa, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_91, x86_fp80* %st7.global-to-local, align 4
  %v5_ae = load double, double* %v4_a5, align 4
  %v6_ae = fpext double %v5_ae to x86_fp80
  %v7_ae = fmul x86_fp80 %v4_91, %v6_ae
  store x86_fp80 %v7_ae, x86_fp80* %st7.global-to-local, align 4
  %v2_b1 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_ae)
  %v3_b1 = fcmp olt x86_fp80 %v2_b1, 0xK403E8000000000000000
  br i1 %v3_b1, label %bb297, label %bb298

bb297:                                            ; preds = %bb296
  %v4_b1 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_ae)
  store x86_fp80 %v4_b1, x86_fp80* %st7.global-to-local, align 4
  %v7_b1 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_ae)
  %v8_b1 = add i3 %v0_aa, -2
  store i3 %v8_b1, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_b1, x86_fp80* %st6.global-to-local, align 4
  br label %bb298

bb298:                                            ; preds = %bb296, %bb297
  %v1_c7 = phi x86_fp80 [ %v7_ae, %bb296 ], [ %v4_b1, %bb297 ]
  %v1_c3 = phi x86_fp80 [ %v1_c329, %bb296 ], [ %v7_b1, %bb297 ]
  %v0_b3 = phi i3 [ %v6_aa, %bb296 ], [ %v8_b1, %bb297 ]
  %v9_b3 = add i3 %v0_b3, -1
  store i3 %v9_b3, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_7e, x86_fp80* %st5.global-to-local, align 4
  %v5_b6 = load double, double* %v4_a5, align 4
  %v6_b6 = fpext double %v5_b6 to x86_fp80
  %v7_b6 = fmul x86_fp80 %v4_7e, %v6_b6
  store x86_fp80 %v7_b6, x86_fp80* %st5.global-to-local, align 4
  %v2_b9 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_b6)
  %v3_b9 = fcmp olt x86_fp80 %v2_b9, 0xK403E8000000000000000
  br i1 %v3_b9, label %bb299, label %bb300

bb299:                                            ; preds = %bb298
  %v4_b9 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_b6)
  store x86_fp80 %v4_b9, x86_fp80* %st5.global-to-local, align 4
  %v7_b9 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v7_b6)
  %v8_b9 = add i3 %v0_b3, -2
  store i3 %v8_b9, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %bb300

bb300:                                            ; preds = %bb298, %bb299
  %v1_bf = phi x86_fp80 [ %v7_b6, %bb298 ], [ %v4_b9, %bb299 ]
  %v1_bb = phi x86_fp80 [ %v7_8e, %bb298 ], [ %v7_b9, %bb299 ]
  %v0_bb = phi i3 [ %v9_b3, %bb298 ], [ %v8_b9, %bb299 ]
  %v6_cb = add i3 %v0_bb, -3
  store i3 %v6_cb, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_6b, x86_fp80* %st7.global-to-local, align 4
  %v2_d7 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_6b)
  %v3_d7 = fcmp olt x86_fp80 %v2_d7, 0xK403E8000000000000000
  br i1 %v3_d7, label %bb301, label %bb302

bb301:                                            ; preds = %bb300
  %v4_d7 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_6b)
  store x86_fp80 %v4_d7, x86_fp80* %st7.global-to-local, align 4
  %v7_d7 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v4_6b)
  %v8_d7 = xor i3 %v0_bb, -4
  store i3 %v8_d7, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_d7, x86_fp80* %st6.global-to-local, align 4
  br label %bb302

bb302:                                            ; preds = %bb300, %bb301
  %v3_f4 = phi x86_fp80 [ %v4_6b, %bb300 ], [ %v4_d7, %bb301 ]
  %v3_ee = phi x86_fp80 [ %v1_c3, %bb300 ], [ %v7_d7, %bb301 ]
  %v0_d9 = phi i3 [ %v6_cb, %bb300 ], [ %v8_d7, %bb301 ]
  %v6_d9 = add i3 %v0_d9, -1
  store i3 %v6_d9, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_91, x86_fp80* %st5.global-to-local, align 4
  %v2_dd = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_91)
  %v3_dd = fcmp olt x86_fp80 %v2_dd, 0xK403E8000000000000000
  br i1 %v3_dd, label %bb303, label %bb304

bb303:                                            ; preds = %bb302
  %v4_dd = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_91)
  store x86_fp80 %v4_dd, x86_fp80* %st5.global-to-local, align 4
  %v7_dd = call x86_fp80 @llvm.cos.f80(x86_fp80 %v4_91)
  %v8_dd = add i3 %v0_d9, -2
  store i3 %v8_dd, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %bb304

bb304:                                            ; preds = %bb302, %bb303
  %v1_f0 = phi x86_fp80 [ %v1_bb, %bb302 ], [ %v7_dd, %bb303 ]
  %v3_e8 = phi x86_fp80 [ %v4_91, %bb302 ], [ %v4_dd, %bb303 ]
  %v0_df = phi i3 [ %v6_d9, %bb302 ], [ %v8_dd, %bb303 ]
  %v9_df = add i3 %v0_df, -1
  %v2_e2 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_7e)
  %v3_e2 = fcmp olt x86_fp80 %v2_e2, 0xK403E8000000000000000
  br i1 %v3_e2, label %bb305, label %dec_label_pc_14c

bb305:                                            ; preds = %bb304
  %v4_e2 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_7e)
  %v7_e2 = call x86_fp80 @llvm.cos.f80(x86_fp80 %v4_7e)
  %v8_e2 = add i3 %v0_df, -2
  br label %dec_label_pc_14c

dec_label_pc_14c:                                 ; preds = %bb304, %bb305
  %storemerge313 = phi i3 [ %v8_e2, %bb305 ], [ %v9_df, %bb304 ]
  %v1_ea = phi x86_fp80 [ %v4_e2, %bb305 ], [ %v4_7e, %bb304 ]
  %v1_e4 = phi x86_fp80 [ %v7_e2, %bb305 ], [ %v7_7b, %bb304 ]
  %v7_e4 = fmul x86_fp80 %v1_e4, %v1_bf
  %v4_e8 = fmul x86_fp80 %v3_e8, %v7_e4
  store x86_fp80 %v4_e8, x86_fp80* %st5.global-to-local, align 4
  %v7_ea = fmul x86_fp80 %v1_ea, %v1_c7
  %v4_ee = fmul x86_fp80 %v3_ee, %v7_ea
  store x86_fp80 %v4_ee, x86_fp80* %st6.global-to-local, align 4
  %v7_f0 = fmul x86_fp80 %v1_f0, %v1_c7
  %v4_f4 = fmul x86_fp80 %v3_f4, %v7_f0
  store x86_fp80 %v4_f4, x86_fp80* %st7.global-to-local, align 4
  %v4_f8 = fsub x86_fp80 %v4_e8, %v4_ee
  %v4_fa = fsub x86_fp80 %v4_f8, %v4_f4
  %v3_fc = add i32 %v0_4c, -120
  %v4_fc = inttoptr i32 %v3_fc to double*
  %v5_fc = load double, double* %v4_fc, align 4
  %v6_fc = fpext double %v5_fc to x86_fp80
  %v7_fc = fmul x86_fp80 %v4_fa, %v6_fc
  %v2_101 = load i32, i32* %esi.global-to-local, align 4
  %v3_101 = add i32 %v2_101, 128
  %tmp306 = fptrunc x86_fp80 %v7_fc to double
  %v4_101 = call double @llvm.fabs.f64(double %tmp306)
  %v5_101 = inttoptr i32 %v3_101 to double*
  store double %v4_101, double* %v5_101, align 4
  %v2_107 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v3_107 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_107 = fadd x86_fp80 %v2_107, %v3_107
  %v3_109 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_109 = fadd x86_fp80 %v4_107, %v3_109
  %v7_10f = fmul x86_fp80 %v1_c3, %v1_bb
  %v7_117 = fmul x86_fp80 %v1_c7, %v1_c3
  %v7_11f = fmul x86_fp80 %v1_c7, %v1_bb
  %v4_123 = fadd x86_fp80 %v7_117, %v7_11f
  store x86_fp80 %v4_123, x86_fp80* %st5.global-to-local, align 4
  %v4_125 = fadd x86_fp80 %v7_10f, %v4_123
  %v2_127 = fsub x86_fp80 0xK80000000000000000000, %v4_125
  store x86_fp80 %v2_127, x86_fp80* %st6.global-to-local, align 4
  %v4_129 = fsub x86_fp80 %v4_109, %v4_125
  store x86_fp80 %v4_129, x86_fp80* %st7.global-to-local, align 4
  %v3_12b = inttoptr i32 %v0_4c to double*
  %v4_12b = load double, double* %v3_12b, align 4
  %v5_12b = fpext double %v4_12b to x86_fp80
  %v6_12b = fmul x86_fp80 %v4_129, %v5_12b
  store x86_fp80 %v6_12b, x86_fp80* %st7.global-to-local, align 4
  %v3_12d = add i32 %v0_4c, 8
  %v4_12d = inttoptr i32 %v3_12d to double*
  %v5_12d = load double, double* %v4_12d, align 4
  %v6_12d = fpext double %v5_12d to x86_fp80
  %v7_12d = fadd x86_fp80 %v6_12b, %v6_12d
  store x86_fp80 %v7_12d, x86_fp80* %st7.global-to-local, align 4
  %tmp307 = call double @llvm.fabs.f64(double %v4_9a)
  %v2_135 = fpext double %tmp307 to x86_fp80
  store x86_fp80 %v2_135, x86_fp80* %st6.global-to-local, align 4
  %v6_137 = add i3 %storemerge313, 3
  store i3 %v6_137, i3* %fpu_stat_TOP.global-to-local, align 1
  %tmp308 = call double @llvm.fabs.f64(double %v4_96)
  %v2_13b = fpext double %tmp308 to x86_fp80
  store x86_fp80 %v2_13b, x86_fp80* %st5.global-to-local, align 4
  %v0_13f = call i32 @__asm_wait()
  %v0_140 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_140 = call i16 @__asm_fnstsw(i32 %v0_140)
  %v3_14c = load double, double* %stack_var_-80, align 8
  %tmp310 = call double @llvm.fabs.f64(double %v3_14c)
  %v2_150 = fpext double %tmp310 to x86_fp80
  store x86_fp80 %v2_150, x86_fp80* %st7.global-to-local, align 4
  %v0_154 = call i32 @__asm_wait()
  %v0_155 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_155 = call i16 @__asm_fnstsw(i32 %v0_155)
  %v1_15b = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %storemerge10.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge10 = add i3 %storemerge10.in, 1
  store i3 %storemerge10, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_161 = load i32, i32* %edi.global-to-local, align 4
  %v3_161 = add i32 %v2_161, -16
  %v4_161 = inttoptr i32 %v3_161 to double*
  %v5_161 = load double, double* %v4_161, align 4
  %v6_161 = fpext double %v5_161 to x86_fp80
  %v7_161 = fsub x86_fp80 %v1_15b, %v6_161
  store x86_fp80 %v7_161, x86_fp80* %st7.global-to-local, align 4
  %v0_166 = call i32 @__asm_wait()
  %v0_167 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_167 = call i16 @__asm_fnstsw(i32 %v0_167)
  %v2_167 = sext i16 %v1_167 to i32
  %v4_167 = and i32 %v0_166, -65536
  %tmp312 = udiv i32 %v2_167, 2
  %v12_169 = and i32 %tmp312, 32512
  %v2_167.masked = and i32 %v2_167, -65281
  %v13_169 = or i32 %v4_167, %v2_167.masked
  %v14_169 = or i32 %v13_169, %v12_169
  %v1_16d = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_173 = load i32, i32* %edi.global-to-local, align 4
  %v3_173 = add i32 %v2_173, -72
  %v4_173 = inttoptr i32 %v3_173 to double*
  %v5_173 = load double, double* %v4_173, align 4
  %v6_173 = fpext double %v5_173 to x86_fp80
  %v7_173 = fdiv x86_fp80 %v1_16d, %v6_173
  store x86_fp80 %v7_173, x86_fp80* %st7.global-to-local, align 4
  %v1_176 = add i32 %v2_173, -76
  %v2_176 = inttoptr i32 %v1_176 to i32*
  %v3_176 = load i32, i32* %v2_176, align 4
  %v10_176 = icmp eq i32 %v3_176, 0
  %v1_17a = icmp eq i1 %v10_176, false
  br i1 %v1_17a, label %dec_label_pc_17f, label %dec_label_pc_17c

dec_label_pc_17c:                                 ; preds = %dec_label_pc_14c
  %v3_17c = add i32 %v2_173, -32
  %v4_17c = inttoptr i32 %v3_17c to double*
  %v5_17c = load double, double* %v4_17c, align 4
  %v6_17c = fpext double %v5_17c to x86_fp80
  %v7_17c = fdiv x86_fp80 %v7_173, %v6_17c
  store x86_fp80 %v7_17c, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_17f

dec_label_pc_17f:                                 ; preds = %dec_label_pc_17c, %dec_label_pc_14c
  %v1_17f = phi x86_fp80 [ %v7_17c, %dec_label_pc_17c ], [ %v7_173, %dec_label_pc_14c ]
  %v2_17f = load i32, i32* %esi.global-to-local, align 4
  %v3_17f = add i32 %v2_17f, -32
  %v4_17f = fptrunc x86_fp80 %v1_17f to double
  %v5_17f = inttoptr i32 %v3_17f to double*
  store double %v4_17f, double* %v5_17f, align 4
  %v6_17f = add i3 %storemerge.in, 2
  store i3 %v6_17f, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_169
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
