source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebp.global-to-local = alloca i32, align 4
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %stack_var_-16 = alloca i32, align 4
  %v0_0 = load i32, i32* %ebp.global-to-local, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %ebx.global-to-local, align 4
  store i32 %v0_5, i32* %stack_var_-16, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v0_9 = load i32, i32* @eax, align 8
  store i32 %v0_9, i32* %ebx.global-to-local, align 4
  %v1_b = add i32 %arg1, 48
  %v2_b = inttoptr i32 %v1_b to i32*
  %v3_b = load i32, i32* %v2_b, align 4
  store i32 %v3_b, i32* %edi.global-to-local, align 4
  %v0_11 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_11 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_11 = fpext double %v3_11 to x86_fp80
  store x86_fp80 %v4_11, x86_fp80* %st7.global-to-local, align 4
  %v3_13 = add i32 %v3_b, -40
  %v4_13 = inttoptr i32 %v3_13 to double*
  %v5_13 = load double, double* %v4_13, align 4
  %v6_13 = fpext double %v5_13 to x86_fp80
  %v7_13 = fadd x86_fp80 %v4_11, %v6_13
  store x86_fp80 %v7_13, x86_fp80* %st7.global-to-local, align 4
  %tmp239 = bitcast double %v3_11 to i64
  %tmp240 = trunc i64 %tmp239 to i32
  %v3_16 = fptrunc x86_fp80 %v7_13 to double
  %v4_16 = inttoptr i32 %tmp240 to double*
  store double %v3_16, double* %v4_16, align 4
  %v3_18 = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_18 = fpext double %v3_18 to x86_fp80
  %v5_18 = add i3 %v0_11, -2
  store i3 %v5_18, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_18, x86_fp80* %st6.global-to-local, align 4
  %v3_1a = add i32 %v3_b, -32
  %v4_1a = inttoptr i32 %v3_1a to double*
  %v5_1a = load double, double* %v4_1a, align 4
  %v6_1a = fpext double %v5_1a to x86_fp80
  %v7_1a = fadd x86_fp80 %v4_18, %v6_1a
  store x86_fp80 %v7_1a, x86_fp80* %st6.global-to-local, align 4
  %v3_1d = fptrunc x86_fp80 %v7_1a to double
  %v4_1d = inttoptr i32 %v0_9 to double*
  store double %v3_1d, double* %v4_1d, align 4
  %v4_1f = call i32 @__asm_fpatan(i32 %v0_5, i32 %v0_4, i32 %v0_3, i32 %v0_0)
  store i32 %v4_1f, i32* @eax, align 8
  %v0_21 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_21 = load i32, i32* %edi.global-to-local, align 4
  %v2_21 = add i32 %v1_21, -48
  %v3_21 = inttoptr i32 %v2_21 to double*
  %v4_21 = load double, double* %v3_21, align 4
  %v5_21 = fpext double %v4_21 to x86_fp80
  %v6_21 = add i3 %v0_21, -1
  %v3_24 = add i32 %v1_21, -24
  %v4_24 = inttoptr i32 %v3_24 to double*
  %v5_24 = load double, double* %v4_24, align 4
  %v6_24 = fpext double %v5_24 to x86_fp80
  %v7_24 = fadd x86_fp80 %v5_21, %v6_24
  %v3_27 = add i32 %v1_21, 8
  %v4_27 = inttoptr i32 %v3_27 to double*
  %v5_27 = load double, double* %v4_27, align 4
  %v6_27 = fpext double %v5_27 to x86_fp80
  %v7_27 = fmul x86_fp80 %v7_24, %v6_27
  %v3_2a = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_2a = fadd x86_fp80 %v3_2a, %v7_27
  store x86_fp80 %v4_2a, x86_fp80* %st6.global-to-local, align 4
  %v3_2c = inttoptr i32 %v1_21 to double*
  %v4_2c = load double, double* %v3_2c, align 4
  %v5_2c = fpext double %v4_2c to x86_fp80
  %v6_2c = fdiv x86_fp80 %v4_2a, %v5_2c
  store x86_fp80 %v6_2c, x86_fp80* %st6.global-to-local, align 4
  %v3_2e = add i32 %v1_21, -16
  %v4_2e = inttoptr i32 %v3_2e to double*
  %v5_2e = load double, double* %v4_2e, align 4
  %v6_2e = fpext double %v5_2e to x86_fp80
  %v7_2e = fmul x86_fp80 %v6_2c, %v6_2e
  %v2_37 = fptosi x86_fp80 %v7_2e to i32
  %v2_3d = fsub x86_fp80 0xK80000000000000000000, %v7_2e
  store x86_fp80 %v2_3d, x86_fp80* %st6.global-to-local, align 4
  %v5_3f = load double, double* %v4_2e, align 4
  %v6_3f = fpext double %v5_3f to x86_fp80
  %v7_3f = fdiv x86_fp80 %v2_3d, %v6_3f
  store x86_fp80 %v7_3f, x86_fp80* %st6.global-to-local, align 4
  %v4_42 = load double, double* %v3_2c, align 4
  %v5_42 = fpext double %v4_42 to x86_fp80
  %v6_42 = fmul x86_fp80 %v7_3f, %v5_42
  store x86_fp80 %v6_42, x86_fp80* %st6.global-to-local, align 4
  %v4_44 = load double, double* %v4_24, align 4
  %v5_44 = fpext double %v4_44 to x86_fp80
  %v5_47 = load double, double* %v4_27, align 4
  %v6_47 = fpext double %v5_47 to x86_fp80
  %v7_47 = fmul x86_fp80 %v5_44, %v6_47
  %v4_4a = fadd x86_fp80 %v6_42, %v7_47
  store x86_fp80 %v4_4a, x86_fp80* %st6.global-to-local, align 4
  %v2_4c = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_4a)
  %v3_4c = fcmp olt x86_fp80 %v2_4c, 0xK403E8000000000000000
  br i1 %v3_4c, label %bb, label %bb241

bb:                                               ; preds = %dec_label_pc_0
  %v4_4c = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_4a)
  store x86_fp80 %v4_4c, x86_fp80* %st6.global-to-local, align 4
  store i3 %v6_21, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %bb241

bb241:                                            ; preds = %dec_label_pc_0, %bb
  %v0_50 = phi i3 [ %v0_21, %dec_label_pc_0 ], [ %v6_21, %bb ]
  %v3_54 = load double, double* bitcast (i32* @edx to double*), align 8
  %v5_54 = add i3 %v0_50, -2
  store i3 %v5_54, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_5f = add i32 %v1_21, -52
  %v2_5f = inttoptr i32 %v1_5f to i32*
  %v3_5f = load i32, i32* %v2_5f, align 4
  store i32 %v3_5f, i32* @eax, align 8
  %v1_62 = icmp eq i32 %v3_5f, 0
  %v1_64 = icmp eq i1 %v1_62, false
  %tmp242 = bitcast double %v3_54 to i64
  %tmp243 = trunc i64 %tmp242 to i32
  br i1 %v1_64, label %.dec_label_pc_77_crit_edge, label %dec_label_pc_66

.dec_label_pc_77_crit_edge:                       ; preds = %bb241
  %v1_7a.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_77

dec_label_pc_66:                                  ; preds = %bb241
  %v4_6b = fsub x86_fp80 %v2_3d, %v7_2e
  store x86_fp80 %v4_6b, x86_fp80* %st7.global-to-local, align 4
  store i3 %v5_54, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_70 = urem i32 %v2_37, 2
  %v2_70 = icmp eq i32 %v1_70, 0
  store i32 %v1_70, i32* @eax, align 8
  %v1_73 = icmp eq i1 %v2_70, false
  br i1 %v1_73, label %dec_label_pc_77, label %dec_label_pc_75

dec_label_pc_75:                                  ; preds = %dec_label_pc_66
  %v2_75 = fsub x86_fp80 0xK80000000000000000000, %v4_6b
  store x86_fp80 %v2_75, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_77

dec_label_pc_77:                                  ; preds = %.dec_label_pc_77_crit_edge, %dec_label_pc_75, %dec_label_pc_66
  %v1_7a = phi x86_fp80 [ %v1_7a.pre, %.dec_label_pc_77_crit_edge ], [ %v2_75, %dec_label_pc_75 ], [ %v4_6b, %dec_label_pc_66 ]
  %v5_7a = load double, double* %v4_2e, align 4
  %v6_7a = fpext double %v5_7a to x86_fp80
  %v7_7a = fdiv x86_fp80 %v1_7a, %v6_7a
  store x86_fp80 %v7_7a, x86_fp80* %st7.global-to-local, align 4
  %v4_7d = load double, double* %v3_2c, align 4
  %v5_7d = fpext double %v4_7d to x86_fp80
  %v6_7d = fmul x86_fp80 %v7_7a, %v5_7d
  store x86_fp80 %v6_7d, x86_fp80* %st7.global-to-local, align 4
  %v3_7f = add i32 %v1_21, -40
  %v4_7f = inttoptr i32 %v3_7f to double*
  %v5_7f = load double, double* %v4_7f, align 4
  %v6_7f = fpext double %v5_7f to x86_fp80
  %v7_7f = fsub x86_fp80 %v6_7d, %v6_7f
  store x86_fp80 %v7_7f, x86_fp80* %st7.global-to-local, align 4
  %v3_82 = fptrunc x86_fp80 %v7_7f to double
  %v4_82 = inttoptr i32 %tmp243 to double*
  store double %v3_82, double* %v4_82, align 4
  %v1_84 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v3_84 = add i32 %v1_21, -32
  %v4_84 = inttoptr i32 %v3_84 to double*
  %v5_84 = load double, double* %v4_84, align 4
  %v6_84 = fpext double %v5_84 to x86_fp80
  %v7_84 = fsub x86_fp80 %v1_84, %v6_84
  store x86_fp80 %v7_84, x86_fp80* %st7.global-to-local, align 4
  %v2_87 = load i32, i32* %ebx.global-to-local, align 4
  %v3_87 = fptrunc x86_fp80 %v7_84 to double
  %v4_87 = inttoptr i32 %v2_87 to double*
  store double %v3_87, double* %v4_87, align 4
  %v4_8b = add i3 %v0_50, 2
  store i3 %v4_8b, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_90 = load i32, i32* %stack_var_-16, align 4
  store i32 %v2_90, i32* %ebx.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  %v0_94 = load i32, i32* @eax, align 8
  ret i32 %v0_94
}

declare i32 @__asm_fpatan(i32, i32, i32, i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

attributes #0 = { nounwind readnone speculatable }
