source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@eax = internal unnamed_addr global i32 0, align 8
@ecx = internal unnamed_addr global i32 0, align 8
@edx = internal unnamed_addr global i32 0, align 8

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %ebx.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %v0_6 = load i32, i32* %ebx.global-to-local, align 4
  %v0_7 = load i32, i32* %esi.global-to-local, align 4
  %v0_8 = load i32, i32* %edi.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_c = add i32 %arg1, 48
  %v2_c = inttoptr i32 %v1_c to i32*
  %v3_c = load i32, i32* %v2_c, align 4
  store i32 %v3_c, i32* %ebx.global-to-local, align 4
  %v3_f = load double, double* bitcast (i32* @eax to double*), align 8
  %v4_f = fpext double %v3_f to x86_fp80
  %v6_11 = fmul x86_fp80 %v4_f, %v4_f
  %v0_16 = call i32 @__asm_wait()
  store i32 %v0_16, i32* @eax, align 8
  %v7_1a = fmul x86_fp80 %v6_11, %v6_11
  %v0_20 = call i32 @__asm_wait()
  store i32 %v0_20, i32* @eax, align 8
  %v3_21 = load double, double* bitcast (i32* @edx to double*), align 8
  %v4_21 = fpext double %v3_21 to x86_fp80
  %v6_23 = fmul x86_fp80 %v4_21, %v4_21
  %v0_28 = call i32 @__asm_wait()
  store i32 %v0_28, i32* @eax, align 8
  %v7_2c = fmul x86_fp80 %v6_23, %v6_23
  %v0_32 = call i32 @__asm_wait()
  store i32 %v0_32, i32* @eax, align 8
  %v3_33 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v4_33 = fpext double %v3_33 to x86_fp80
  %v6_35 = fmul x86_fp80 %v4_33, %v4_33
  %v0_3a = call i32 @__asm_wait()
  store i32 %v0_3a, i32* @eax, align 8
  %v7_3e = fmul x86_fp80 %v6_35, %v6_35
  %v0_44 = call i32 @__asm_wait()
  store i32 %v0_44, i32* @eax, align 8
  %v1_45 = load i32, i32* %ebx.global-to-local, align 4
  %v2_45 = inttoptr i32 %v1_45 to double*
  %v3_45 = load double, double* %v2_45, align 4
  %v4_45 = fpext double %v3_45 to x86_fp80
  %v4_47 = load double, double* bitcast (i32* @eax to double*), align 8
  %v5_47 = fpext double %v4_47 to x86_fp80
  %v6_47 = fmul x86_fp80 %v4_45, %v5_47
  %v2_49 = add i32 %v1_45, 8
  %v3_49 = inttoptr i32 %v2_49 to double*
  %v4_49 = load double, double* %v3_49, align 4
  %v5_49 = fpext double %v4_49 to x86_fp80
  %v7_4c = fmul x86_fp80 %v7_2c, %v5_49
  %v7_4f = fmul x86_fp80 %v7_4c, %v6_23
  %v2_52 = add i32 %v1_45, 16
  %v3_52 = inttoptr i32 %v2_52 to double*
  %v4_52 = load double, double* %v3_52, align 4
  %v5_52 = fpext double %v4_52 to x86_fp80
  %v7_55 = fmul x86_fp80 %v7_3e, %v5_52
  %v7_58 = fmul x86_fp80 %v7_55, %v6_35
  %v4_5b = fadd x86_fp80 %v7_4f, %v7_58
  %v2_5d = add i32 %v1_45, 24
  %v3_5d = inttoptr i32 %v2_5d to double*
  %v4_5d = load double, double* %v3_5d, align 4
  %v5_5d = fpext double %v4_5d to x86_fp80
  %v7_60 = fmul x86_fp80 %v7_2c, %v5_5d
  %v7_63 = fmul x86_fp80 %v7_60, %v6_35
  %v4_66 = fsub x86_fp80 %v4_5b, %v7_63
  %v2_68 = add i32 %v1_45, 32
  %v3_68 = inttoptr i32 %v2_68 to double*
  %v4_68 = load double, double* %v3_68, align 4
  %v5_68 = fpext double %v4_68 to x86_fp80
  %v7_6b = fmul x86_fp80 %v6_23, %v5_68
  %v7_6e = fmul x86_fp80 %v7_6b, %v7_3e
  %v4_71 = fsub x86_fp80 %v4_66, %v7_6e
  %v2_73 = add i32 %v1_45, 88
  %v3_73 = inttoptr i32 %v2_73 to double*
  %v4_73 = load double, double* %v3_73, align 4
  %v5_73 = fpext double %v4_73 to x86_fp80
  %v7_76 = fmul x86_fp80 %v6_11, %v5_73
  %v2_79 = add i32 %v1_45, 56
  %v3_79 = inttoptr i32 %v2_79 to double*
  %v4_79 = load double, double* %v3_79, align 4
  %v5_79 = fpext double %v4_79 to x86_fp80
  %v7_7c = fmul x86_fp80 %v7_2c, %v5_79
  %v2_7f = add i32 %v1_45, 64
  %v3_7f = inttoptr i32 %v2_7f to double*
  %v4_7f = load double, double* %v3_7f, align 4
  %v5_7f = fpext double %v4_7f to x86_fp80
  %v7_82 = fmul x86_fp80 %v7_3e, %v5_7f
  %v4_85 = fadd x86_fp80 %v7_7c, %v7_82
  %v2_87 = add i32 %v1_45, 96
  %v3_87 = inttoptr i32 %v2_87 to double*
  %v4_87 = load double, double* %v3_87, align 4
  %v5_87 = fpext double %v4_87 to x86_fp80
  %v7_8a = fmul x86_fp80 %v6_23, %v5_87
  %v7_8d = fmul x86_fp80 %v7_8a, %v6_35
  %v4_90 = fsub x86_fp80 %v4_85, %v7_8d
  %v4_92 = fmul x86_fp80 %v7_76, %v4_90
  %v4_94 = fsub x86_fp80 %v4_71, %v4_92
  %v2_96 = add i32 %v1_45, 80
  %v3_96 = inttoptr i32 %v2_96 to double*
  %v4_96 = load double, double* %v3_96, align 4
  %v5_96 = fpext double %v4_96 to x86_fp80
  %v7_99 = fmul x86_fp80 %v7_1a, %v5_96
  %v2_9c = add i32 %v1_45, 48
  %v3_9c = inttoptr i32 %v2_9c to double*
  %v4_9c = load double, double* %v3_9c, align 4
  %v5_9c = fpext double %v4_9c to x86_fp80
  %v7_9f = fmul x86_fp80 %v6_23, %v5_9c
  %v2_a2 = add i32 %v1_45, 40
  %v3_a2 = inttoptr i32 %v2_a2 to double*
  %v4_a2 = load double, double* %v3_a2, align 4
  %v5_a2 = fpext double %v4_a2 to x86_fp80
  %v7_a5 = fmul x86_fp80 %v6_35, %v5_a2
  %v4_a8 = fadd x86_fp80 %v7_9f, %v7_a5
  %v4_aa = fmul x86_fp80 %v7_99, %v4_a8
  %v4_ac = fsub x86_fp80 %v4_94, %v4_aa
  %v2_ae = add i32 %v1_45, 72
  %v3_ae = inttoptr i32 %v2_ae to double*
  %v4_ae = load double, double* %v3_ae, align 4
  %v5_ae = fpext double %v4_ae to x86_fp80
  %v7_b1 = fmul x86_fp80 %v7_1a, %v5_ae
  %v7_b4 = fmul x86_fp80 %v7_b1, %v6_11
  %v4_b7 = fadd x86_fp80 %v7_b4, %v4_ac
  %v4_b9 = fmul x86_fp80 %v6_47, %v4_b7
  %v0_bb = load i32, i32* %esi.global-to-local, align 4
  %v1_bd = add i32 %v0_bb, 24
  store i32 %v1_bd, i32* %edi.global-to-local, align 4
  %v3_c0 = inttoptr i32 %v1_bd to double*
  %v4_c0 = load double, double* %v3_c0, align 4
  %v5_c0 = fpext double %v4_c0 to x86_fp80
  %v6_c0 = fadd x86_fp80 %v4_b9, %v5_c0
  %v0_c5 = call i32 @__asm_wait()
  store i32 %v0_c5, i32* @eax, align 8
  %v1_c6 = load i32, i32* %ebx.global-to-local, align 4
  %v2_c6 = inttoptr i32 %v1_c6 to double*
  %v3_c6 = load double, double* %v2_c6, align 4
  %v4_c6 = fpext double %v3_c6 to x86_fp80
  %v4_c8 = load double, double* bitcast (i32* @edx to double*), align 8
  %v5_c8 = fpext double %v4_c8 to x86_fp80
  %v6_c8 = fmul x86_fp80 %v4_c6, %v5_c8
  %v2_ca = add i32 %v1_c6, 8
  %v3_ca = inttoptr i32 %v2_ca to double*
  %v4_ca = load double, double* %v3_ca, align 4
  %v5_ca = fpext double %v4_ca to x86_fp80
  %v7_cd = fmul x86_fp80 %v7_3e, %v5_ca
  %v7_d0 = fmul x86_fp80 %v7_cd, %v6_35
  %v2_d3 = add i32 %v1_c6, 16
  %v3_d3 = inttoptr i32 %v2_d3 to double*
  %v4_d3 = load double, double* %v3_d3, align 4
  %v5_d3 = fpext double %v4_d3 to x86_fp80
  %v7_d6 = fmul x86_fp80 %v7_1a, %v5_d3
  %v7_d9 = fmul x86_fp80 %v7_d6, %v6_11
  %v4_dc = fadd x86_fp80 %v7_d0, %v7_d9
  %v2_de = add i32 %v1_c6, 24
  %v3_de = inttoptr i32 %v2_de to double*
  %v4_de = load double, double* %v3_de, align 4
  %v5_de = fpext double %v4_de to x86_fp80
  %v7_e1 = fmul x86_fp80 %v7_3e, %v5_de
  %v7_e4 = fmul x86_fp80 %v7_e1, %v6_11
  %v4_e7 = fsub x86_fp80 %v4_dc, %v7_e4
  %v2_e9 = add i32 %v1_c6, 32
  %v3_e9 = inttoptr i32 %v2_e9 to double*
  %v4_e9 = load double, double* %v3_e9, align 4
  %v5_e9 = fpext double %v4_e9 to x86_fp80
  %v7_ec = fmul x86_fp80 %v6_35, %v5_e9
  %v7_ef = fmul x86_fp80 %v7_ec, %v7_1a
  %v4_f2 = fsub x86_fp80 %v4_e7, %v7_ef
  %v2_f4 = add i32 %v1_c6, 88
  %v3_f4 = inttoptr i32 %v2_f4 to double*
  %v4_f4 = load double, double* %v3_f4, align 4
  %v5_f4 = fpext double %v4_f4 to x86_fp80
  %v7_f7 = fmul x86_fp80 %v6_23, %v5_f4
  %v2_fa = add i32 %v1_c6, 56
  %v3_fa = inttoptr i32 %v2_fa to double*
  %v4_fa = load double, double* %v3_fa, align 4
  %v5_fa = fpext double %v4_fa to x86_fp80
  %v7_fd = fmul x86_fp80 %v7_3e, %v5_fa
  %v2_100 = add i32 %v1_c6, 64
  %v3_100 = inttoptr i32 %v2_100 to double*
  %v4_100 = load double, double* %v3_100, align 4
  %v5_100 = fpext double %v4_100 to x86_fp80
  %v7_103 = fmul x86_fp80 %v7_1a, %v5_100
  %v4_106 = fadd x86_fp80 %v7_fd, %v7_103
  %v2_108 = add i32 %v1_c6, 96
  %v3_108 = inttoptr i32 %v2_108 to double*
  %v4_108 = load double, double* %v3_108, align 4
  %v5_108 = fpext double %v4_108 to x86_fp80
  %v7_10b = fmul x86_fp80 %v6_35, %v5_108
  %v7_10e = fmul x86_fp80 %v7_10b, %v6_11
  %v4_111 = fsub x86_fp80 %v4_106, %v7_10e
  %v4_113 = fmul x86_fp80 %v7_f7, %v4_111
  %v4_115 = fsub x86_fp80 %v4_f2, %v4_113
  %v2_117 = add i32 %v1_c6, 80
  %v3_117 = inttoptr i32 %v2_117 to double*
  %v4_117 = load double, double* %v3_117, align 4
  %v5_117 = fpext double %v4_117 to x86_fp80
  %v7_11a = fmul x86_fp80 %v7_2c, %v5_117
  %v2_11d = add i32 %v1_c6, 48
  %v3_11d = inttoptr i32 %v2_11d to double*
  %v4_11d = load double, double* %v3_11d, align 4
  %v5_11d = fpext double %v4_11d to x86_fp80
  %v7_120 = fmul x86_fp80 %v6_35, %v5_11d
  %v2_123 = add i32 %v1_c6, 40
  %v3_123 = inttoptr i32 %v2_123 to double*
  %v4_123 = load double, double* %v3_123, align 4
  %v5_123 = fpext double %v4_123 to x86_fp80
  %v7_126 = fmul x86_fp80 %v6_11, %v5_123
  %v4_129 = fadd x86_fp80 %v7_120, %v7_126
  %v4_12b = fmul x86_fp80 %v7_11a, %v4_129
  %v4_12d = fsub x86_fp80 %v4_115, %v4_12b
  %v2_12f = add i32 %v1_c6, 72
  %v3_12f = inttoptr i32 %v2_12f to double*
  %v4_12f = load double, double* %v3_12f, align 4
  %v5_12f = fpext double %v4_12f to x86_fp80
  %v7_132 = fmul x86_fp80 %v7_2c, %v5_12f
  %v7_135 = fmul x86_fp80 %v7_132, %v6_23
  %v4_138 = fadd x86_fp80 %v7_135, %v4_12d
  %v4_13a = fmul x86_fp80 %v6_c8, %v4_138
  %v0_13c = load i32, i32* %esi.global-to-local, align 4
  %v1_13e = add i32 %v0_13c, 32
  store i32 %v1_13e, i32* %edi.global-to-local, align 4
  %v3_141 = inttoptr i32 %v1_13e to double*
  %v4_141 = load double, double* %v3_141, align 4
  %v5_141 = fpext double %v4_141 to x86_fp80
  %v6_141 = fadd x86_fp80 %v4_13a, %v5_141
  %v5_143 = fptrunc x86_fp80 %v6_141 to float
  %v6_143 = bitcast float %v5_143 to i32
  %v0_146 = call i32 @__asm_wait()
  store i32 %v0_146, i32* @eax, align 8
  %v1_147 = load i32, i32* %ebx.global-to-local, align 4
  %v2_147 = inttoptr i32 %v1_147 to double*
  %v3_147 = load double, double* %v2_147, align 4
  %v4_147 = fpext double %v3_147 to x86_fp80
  %v4_149 = load double, double* bitcast (i32* @ecx to double*), align 8
  %v5_149 = fpext double %v4_149 to x86_fp80
  %v6_149 = fmul x86_fp80 %v4_147, %v5_149
  %v2_14b = add i32 %v1_147, 8
  %v3_14b = inttoptr i32 %v2_14b to double*
  %v4_14b = load double, double* %v3_14b, align 4
  %v5_14b = fpext double %v4_14b to x86_fp80
  %v7_14e = fmul x86_fp80 %v7_1a, %v5_14b
  %v7_151 = fmul x86_fp80 %v7_14e, %v6_11
  %v2_154 = add i32 %v1_147, 16
  %v3_154 = inttoptr i32 %v2_154 to double*
  %v4_154 = load double, double* %v3_154, align 4
  %v5_154 = fpext double %v4_154 to x86_fp80
  %v7_157 = fmul x86_fp80 %v7_2c, %v5_154
  %v7_15a = fmul x86_fp80 %v7_157, %v6_23
  %v4_15d = fadd x86_fp80 %v7_151, %v7_15a
  %v2_15f = add i32 %v1_147, 24
  %v3_15f = inttoptr i32 %v2_15f to double*
  %v4_15f = load double, double* %v3_15f, align 4
  %v5_15f = fpext double %v4_15f to x86_fp80
  %v7_162 = fmul x86_fp80 %v7_1a, %v5_15f
  %v7_165 = fmul x86_fp80 %v7_162, %v6_23
  %v4_168 = fsub x86_fp80 %v4_15d, %v7_165
  %v2_16a = add i32 %v1_147, 32
  %v3_16a = inttoptr i32 %v2_16a to double*
  %v4_16a = load double, double* %v3_16a, align 4
  %v5_16a = fpext double %v4_16a to x86_fp80
  %v7_16d = fmul x86_fp80 %v6_11, %v5_16a
  %v7_170 = fmul x86_fp80 %v7_16d, %v7_2c
  %v4_173 = fsub x86_fp80 %v4_168, %v7_170
  %v2_175 = add i32 %v1_147, 88
  %v3_175 = inttoptr i32 %v2_175 to double*
  %v4_175 = load double, double* %v3_175, align 4
  %v5_175 = fpext double %v4_175 to x86_fp80
  %v7_178 = fmul x86_fp80 %v6_35, %v5_175
  %v2_17b = add i32 %v1_147, 56
  %v3_17b = inttoptr i32 %v2_17b to double*
  %v4_17b = load double, double* %v3_17b, align 4
  %v5_17b = fpext double %v4_17b to x86_fp80
  %v7_17e = fmul x86_fp80 %v7_1a, %v5_17b
  %v2_181 = add i32 %v1_147, 64
  %v3_181 = inttoptr i32 %v2_181 to double*
  %v4_181 = load double, double* %v3_181, align 4
  %v5_181 = fpext double %v4_181 to x86_fp80
  %v7_184 = fmul x86_fp80 %v7_2c, %v5_181
  %v4_187 = fadd x86_fp80 %v7_17e, %v7_184
  %v2_189 = add i32 %v1_147, 96
  %v3_189 = inttoptr i32 %v2_189 to double*
  %v4_189 = load double, double* %v3_189, align 4
  %v5_189 = fpext double %v4_189 to x86_fp80
  %v7_18c = fmul x86_fp80 %v6_11, %v5_189
  %v7_18f = fmul x86_fp80 %v7_18c, %v6_23
  %v4_192 = fsub x86_fp80 %v4_187, %v7_18f
  %v4_194 = fmul x86_fp80 %v7_178, %v4_192
  %v4_196 = fsub x86_fp80 %v4_173, %v4_194
  %v2_198 = add i32 %v1_147, 80
  %v3_198 = inttoptr i32 %v2_198 to double*
  %v4_198 = load double, double* %v3_198, align 4
  %v5_198 = fpext double %v4_198 to x86_fp80
  %v7_19b = fmul x86_fp80 %v7_3e, %v5_198
  %v2_19e = add i32 %v1_147, 48
  %v3_19e = inttoptr i32 %v2_19e to double*
  %v4_19e = load double, double* %v3_19e, align 4
  %v5_19e = fpext double %v4_19e to x86_fp80
  %v7_1a1 = fmul x86_fp80 %v6_11, %v5_19e
  %v2_1a4 = add i32 %v1_147, 40
  %v3_1a4 = inttoptr i32 %v2_1a4 to double*
  %v4_1a4 = load double, double* %v3_1a4, align 4
  %v5_1a4 = fpext double %v4_1a4 to x86_fp80
  %v7_1a7 = fmul x86_fp80 %v6_23, %v5_1a4
  %v4_1aa = fadd x86_fp80 %v7_1a1, %v7_1a7
  %v4_1ac = fmul x86_fp80 %v7_19b, %v4_1aa
  %v4_1ae = fsub x86_fp80 %v4_196, %v4_1ac
  %v2_1b0 = add i32 %v1_147, 72
  %v3_1b0 = inttoptr i32 %v2_1b0 to double*
  %v4_1b0 = load double, double* %v3_1b0, align 4
  %v5_1b0 = fpext double %v4_1b0 to x86_fp80
  %v7_1b3 = fmul x86_fp80 %v7_3e, %v5_1b0
  %v7_1b6 = fmul x86_fp80 %v7_1b3, %v6_35
  %v4_1b9 = fadd x86_fp80 %v7_1b6, %v4_1ae
  %v4_1bb = fmul x86_fp80 %v6_149, %v4_1b9
  %v0_1bd = load i32, i32* %esi.global-to-local, align 4
  %v1_1bd = add i32 %v0_1bd, 40
  store i32 %v1_1bd, i32* %esi.global-to-local, align 4
  %v3_1c0 = inttoptr i32 %v1_1bd to double*
  %v4_1c0 = load double, double* %v3_1c0, align 4
  %v5_1c0 = fpext double %v4_1c0 to x86_fp80
  %v6_1c0 = fadd x86_fp80 %v4_1bb, %v5_1c0
  %tmp242 = bitcast double %v4_149 to i64
  %tmp243 = trunc i64 %tmp242 to i32
  %v3_1c2 = fptrunc x86_fp80 %v6_1c0 to double
  %v4_1c2 = inttoptr i32 %tmp243 to double*
  store double %v3_1c2, double* %v4_1c2, align 4
  %v0_1c4 = call i32 @__asm_wait()
  store i32 %v0_1c4, i32* @eax, align 8
  %tmp244 = fptrunc x86_fp80 %v6_c0 to float
  %v5_1c5 = bitcast float %tmp244 to i32
  %v2_1c8 = inttoptr i32 %v0_1c4 to i32*
  store i32 %v5_1c5, i32* %v2_1c8, align 4
  %v1_1cd = load i32, i32* @eax, align 8
  %v2_1cd = add i32 %v1_1cd, 4
  %v3_1cd = inttoptr i32 %v2_1cd to i32*
  %v1_1d3 = load i32, i32* @edx, align 8
  %v2_1d3 = inttoptr i32 %v1_1d3 to i32*
  store i32 %v6_143, i32* %v2_1d3, align 4
  %v1_1d8 = load i32, i32* @edx, align 8
  %v2_1d8 = add i32 %v1_1d8, 4
  %v3_1d8 = inttoptr i32 %v2_1d8 to i32*
  store i32 %v0_8, i32* %edi.global-to-local, align 4
  store i32 %v0_7, i32* %esi.global-to-local, align 4
  store i32 %v0_6, i32* %ebx.global-to-local, align 4
  %v0_1e1 = load i32, i32* @eax, align 8
  ret i32 %v0_1e1
}

declare i32 @__asm_wait() local_unnamed_addr
