source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st5.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp284 = call double @__decompiler_undefined_function_1()
  %stack_var_-70 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-70, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %tmp292 = zext i32 %v1_45 to i80
  %v7_45 = bitcast i80 %tmp292 to x86_fp80
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_4b = load i32, i32* @edi, align 8
  %v2_4b = add i32 %v1_4b, 16
  %v3_4b = inttoptr i32 %v2_4b to double*
  %v4_4b = load double, double* %v3_4b, align 4
  %v5_4b = fpext double %v4_4b to x86_fp80
  store x86_fp80 %v5_4b, x86_fp80* %st7.global-to-local, align 4
  %v1_52 = add i32 %v1_4b, -96
  %v2_52 = inttoptr i32 %v1_52 to i32*
  %v3_52 = load i32, i32* %v2_52, align 4
  %v13_52 = icmp eq i32 %v3_52, 1
  %v1_56 = icmp eq i1 %v13_52, false
  br i1 %v1_56, label %dec_label_pc_66, label %dec_label_pc_58

dec_label_pc_58:                                  ; preds = %dec_label_pc_40
  %v3_58 = load double, double* %stack_var_-70, align 8
  %v8_58 = fpext double %v3_58 to x86_fp80
  store x86_fp80 %v8_58, x86_fp80* %st7.global-to-local, align 4
  %tmp293 = fptrunc x86_fp80 %v7_45 to double
  store double %tmp293, double* %stack_var_-70, align 8
  %v3_66.pre = load i32, i32* %v2_52, align 4
  br label %dec_label_pc_66

dec_label_pc_66:                                  ; preds = %dec_label_pc_58, %dec_label_pc_40
  %v3_66 = phi i32 [ %v3_52, %dec_label_pc_40 ], [ %v3_66.pre, %dec_label_pc_58 ]
  %stack_var_-54.0 = phi x86_fp80 [ %v7_45, %dec_label_pc_40 ], [ %v8_58, %dec_label_pc_58 ]
  %v13_66 = icmp eq i32 %v3_66, -1
  %v1_6a = icmp eq i1 %v13_66, false
  br i1 %v1_6a, label %dec_label_pc_7c, label %dec_label_pc_6c

dec_label_pc_6c:                                  ; preds = %dec_label_pc_66
  %v5_6c = fpext double %tmp284 to x86_fp80
  store x86_fp80 %v5_6c, x86_fp80* %st7.global-to-local, align 4
  %v4_74 = fptrunc x86_fp80 %stack_var_-54.0 to double
  br label %dec_label_pc_7c

dec_label_pc_7c:                                  ; preds = %dec_label_pc_6c, %dec_label_pc_66
  %stack_var_-62.0 = phi double [ %tmp284, %dec_label_pc_66 ], [ %v4_74, %dec_label_pc_6c ]
  %stack_var_-54.1 = phi x86_fp80 [ %stack_var_-54.0, %dec_label_pc_66 ], [ %v5_6c, %dec_label_pc_6c ]
  %v1_7c = add i32 %v1_4b, -100
  %v2_7c = inttoptr i32 %v1_7c to i32*
  %v3_7c = load i32, i32* %v2_7c, align 4
  %v10_7c = icmp eq i32 %v3_7c, 0
  br i1 %v10_7c, label %dec_label_pc_8c, label %dec_label_pc_82

dec_label_pc_82:                                  ; preds = %dec_label_pc_7c
  %v2_86 = fsub x86_fp80 0xK80000000000000000000, %stack_var_-54.1
  store x86_fp80 %v2_86, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_8c

dec_label_pc_8c:                                  ; preds = %dec_label_pc_82, %dec_label_pc_7c
  %stack_var_-54.2 = phi x86_fp80 [ %stack_var_-54.1, %dec_label_pc_7c ], [ %v2_86, %dec_label_pc_82 ]
  store i32 3, i32* %edx.global-to-local, align 4
  %v3_9b.pre = load double, double* %stack_var_-70, align 8
  br label %dec_label_pc_91

dec_label_pc_91:                                  ; preds = %dec_label_pc_91, %dec_label_pc_8c
  %v4_af = phi double [ %v3_9b.pre, %dec_label_pc_8c ], [ %v4_a0, %dec_label_pc_91 ]
  %v0_91 = phi i3 [ %v0_4b, %dec_label_pc_8c ], [ %storemerge, %dec_label_pc_91 ]
  %stack_var_-62.1 = phi double [ %stack_var_-62.0, %dec_label_pc_8c ], [ %v4_97, %dec_label_pc_91 ]
  %stack_var_-30.0 = phi double [ %v4_4b, %dec_label_pc_8c ], [ %stack_var_-30.1, %dec_label_pc_91 ]
  %stack_var_-54.3 = phi x86_fp80 [ %stack_var_-54.2, %dec_label_pc_8c ], [ %v4_17c, %dec_label_pc_91 ]
  %v5_91 = fpext double %stack_var_-62.1 to x86_fp80
  %v4_97 = fsub double -0.000000e+00, %stack_var_-62.1
  %v8_9b = fpext double %v4_af to x86_fp80
  %v4_a0 = fsub double -0.000000e+00, %v4_af
  %v10_a8 = fsub x86_fp80 %v5_91, %v8_9b
  store x86_fp80 %v10_a8, x86_fp80* %st7.global-to-local, align 4
  %v6_ab = add i3 %v0_91, -2
  store i3 %v6_ab, i3* %fpu_stat_TOP.global-to-local, align 1
  %v10_af = fadd x86_fp80 %v8_9b, %v5_91
  %v5_b2 = call i32 @__asm_fpatan(x86_fp80 %stack_var_-54.3)
  %v2_b4 = load i32, i32* @edi, align 8
  %v3_b4 = add i32 %v2_b4, -108
  %v4_b4 = inttoptr i32 %v3_b4 to double*
  %v5_b4 = load double, double* %v4_b4, align 4
  %v6_b4 = fpext double %v5_b4 to x86_fp80
  %v7_b4 = fmul x86_fp80 %v10_af, %v6_b4
  %v0_b7 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_bb = load double, double* %stack_var_-70, align 8
  %v8_bb = fpext double %v3_bb to x86_fp80
  %v3_be = fmul x86_fp80 %v8_bb, %v8_bb
  %v3_c4 = fmul x86_fp80 %v5_91, %v5_91
  store x86_fp80 %v3_c4, x86_fp80* %st5.global-to-local, align 4
  %v4_c6 = fadd x86_fp80 %v3_c4, %v3_be
  %v2_cc = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_c6)
  %tmp294 = fptrunc x86_fp80 %v2_cc to double
  store double %tmp294, double* %stack_var_-70, align 8
  %v2_d1 = add i32 %v2_b4, -16
  %v3_d1 = inttoptr i32 %v2_d1 to double*
  %v4_d1 = load double, double* %v3_d1, align 4
  %v5_d1 = fpext double %v4_d1 to x86_fp80
  %v3_d4 = fmul x86_fp80 %v5_d1, %v5_d1
  %v7_d6 = fsub x86_fp80 %v3_d4, %v4_c6
  %v2_dc = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_d6)
  %v4_de = fadd x86_fp80 %v7_d6, %v2_dc
  %v2_e0 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_de)
  store x86_fp80 %v2_e0, x86_fp80* %st5.global-to-local, align 4
  %v5_e4 = load double, double* %v3_d1, align 4
  %v6_e4 = fpext double %v5_e4 to x86_fp80
  %v7_e4 = fadd x86_fp80 %v2_e0, %v6_e4
  %v10_e7 = fdiv x86_fp80 %v7_e4, %v2_cc
  %v1_ea = add i3 %v0_b7, -2
  store i3 %v1_ea, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 0xK3FFEB17217F7D1CF7800, x86_fp80* %st5.global-to-local, align 4
  %v7_ee = call i32 @__asm_fyl2x(x86_fp80 %v2_cc, x86_fp80 %v4_c6)
  %v2_f0 = load i32, i32* @edi, align 8
  %v3_f0 = add i32 %v2_f0, -16
  %v4_f0 = inttoptr i32 %v3_f0 to double*
  %v5_f0 = load double, double* %v4_f0, align 4
  %v6_f0 = fpext double %v5_f0 to x86_fp80
  %v7_f0 = fmul x86_fp80 %v10_e7, %v6_f0
  %v3_f3 = load x86_fp80, x86_fp80* %st5.global-to-local, align 4
  %v4_f7 = fsub x86_fp80 %v7_f0, %v3_f3
  %v7_f9 = fsub x86_fp80 %v4_f7, %v7_b4
  %v10_fd = fsub x86_fp80 %v7_f9, %stack_var_-54.3
  %v2_101 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v10_fd)
  store x86_fp80 %v2_101, x86_fp80* %st5.global-to-local, align 4
  %v3_103 = add i32 %v2_f0, -84
  %v4_103 = inttoptr i32 %v3_103 to double*
  %v5_103 = load double, double* %v4_103, align 4
  %v6_103 = fpext double %v5_103 to x86_fp80
  %v7_103 = fsub x86_fp80 %v2_101, %v6_103
  store x86_fp80 %v7_103, x86_fp80* %st5.global-to-local, align 4
  %v4_109 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_109 = fpext double %v4_109 to x86_fp80
  %v6_109 = fmul x86_fp80 %v2_cc, %v5_109
  %tmp295 = bitcast double %v4_109 to i64
  %tmp296 = trunc i64 %tmp295 to i32
  %v3_10b = add i32 %tmp296, 8
  %v4_10b = inttoptr i32 %v3_10b to double*
  %v5_10b = load double, double* %v4_10b, align 4
  %v6_10b = fpext double %v5_10b to x86_fp80
  %v7_10b = fadd x86_fp80 %v6_109, %v6_10b
  %v2_10e = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_10b)
  %v4_110 = fmul x86_fp80 %v7_103, %v2_10e
  store x86_fp80 %v4_110, x86_fp80* %st5.global-to-local, align 4
  %v0_11a = call i32 @__asm_wait()
  %v0_11b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_11b = call i16 @__asm_fnstsw(i32 %v0_11b)
  store x86_fp80 %v2_cc, x86_fp80* %st7.global-to-local, align 4
  %v2_12a = load i32, i32* @edi, align 8
  %v3_12a = add i32 %v2_12a, -92
  %v4_12a = inttoptr i32 %v3_12a to double*
  %v5_12a = load double, double* %v4_12a, align 4
  %v6_12a = fpext double %v5_12a to x86_fp80
  %v7_12a = fsub x86_fp80 %v6_12a, %v2_cc
  store x86_fp80 %v7_12a, x86_fp80* %st7.global-to-local, align 4
  %v0_12f = call i32 @__asm_wait()
  %v0_130 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_130 = call i16 @__asm_fnstsw(i32 %v0_130)
  %v5_13c = fpext double %v4_97 to x86_fp80
  store x86_fp80 %v5_13c, x86_fp80* %st7.global-to-local, align 4
  %v0_142 = call i32 @__asm_wait()
  %v1_143 = call i16 @__asm_fnstsw(i32 %v0_130)
  %storemerge12.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge12 = add i3 %storemerge12.in, 1
  store i3 %storemerge12, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_153 = call i32 @__asm_wait()
  %v0_154 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_154 = call i16 @__asm_fnstsw(i32 %v0_154)
  %v2_154 = sext i16 %v1_154 to i32
  %v4_154 = and i32 %v0_153, -65536
  %tmp300 = udiv i32 %v2_154, 2
  %v12_156 = and i32 %tmp300, 32512
  %v2_154.masked = and i32 %v2_154, -65281
  %v13_156 = or i32 %v4_154, %v2_154.masked
  %v14_156 = or i32 %v13_156, %v12_156
  %v15_15629 = and i32 %v2_154, 256
  %v16_156 = icmp ne i32 %v15_15629, 0
  %v1_158 = icmp eq i1 %v16_156, false
  %v0_160 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_160 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v4_15a = fptrunc x86_fp80 %v1_160 to double
  %stack_var_-30.1 = select i1 %v1_158, double %stack_var_-30.0, double %v4_15a
  %storemerge = add i3 %v0_160, 1
  store double %v4_a0, double* %stack_var_-70, align 8
  store x86_fp80 %stack_var_-54.3, x86_fp80* %st7.global-to-local, align 4
  %v1_175 = load i32, i32* @edi, align 8
  %v2_175 = add i32 %v1_175, -108
  %v3_175 = inttoptr i32 %v2_175 to double*
  %v4_175 = load double, double* %v3_175, align 4
  %v5_175 = fpext double %v4_175 to x86_fp80
  store x86_fp80 0xK4000C90FDAA22168C000, x86_fp80* %st5.global-to-local, align 4
  %v4_17a = fmul x86_fp80 %v5_175, 0xK4000C90FDAA22168C000
  %v4_17c = fadd x86_fp80 %stack_var_-54.3, %v4_17a
  store x86_fp80 %v4_17c, x86_fp80* %st7.global-to-local, align 4
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_182 = load i32, i32* %edx.global-to-local, align 4
  %v1_182 = add i32 %v0_182, -1
  store i32 %v1_182, i32* %edx.global-to-local, align 4
  %v8_183 = icmp sgt i32 %v0_182, 1
  br i1 %v8_183, label %dec_label_pc_91, label %dec_label_pc_189

dec_label_pc_189:                                 ; preds = %dec_label_pc_91
  %v5_189 = fpext double %stack_var_-30.1 to x86_fp80
  store i3 %v0_160, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v5_189, x86_fp80* %st7.global-to-local, align 4
  %v1_18d = add i32 %v1_175, -76
  %v2_18d = inttoptr i32 %v1_18d to i32*
  %v3_18d = load i32, i32* %v2_18d, align 4
  %v10_18d = icmp eq i32 %v3_18d, 0
  %v1_191 = icmp eq i1 %v10_18d, false
  br i1 %v1_191, label %dec_label_pc_196, label %dec_label_pc_193

dec_label_pc_193:                                 ; preds = %dec_label_pc_189
  %v3_193 = add i32 %v1_175, -32
  %v4_193 = inttoptr i32 %v3_193 to double*
  %v5_193 = load double, double* %v4_193, align 4
  %v6_193 = fpext double %v5_193 to x86_fp80
  %v7_193 = fdiv x86_fp80 %v5_189, %v6_193
  store x86_fp80 %v7_193, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_196

dec_label_pc_196:                                 ; preds = %dec_label_pc_193, %dec_label_pc_189
  %v1_196 = phi x86_fp80 [ %v7_193, %dec_label_pc_193 ], [ %v5_189, %dec_label_pc_189 ]
  %v2_196 = load i32, i32* %esi.global-to-local, align 4
  %v3_196 = add i32 %v2_196, -32
  %v4_196 = fptrunc x86_fp80 %v1_196 to double
  %v5_196 = inttoptr i32 %v3_196 to double*
  store double %v4_196, double* %v5_196, align 4
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_156
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

declare i32 @__asm_fpatan(x86_fp80) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i32 @__asm_fyl2x(x86_fp80, x86_fp80) local_unnamed_addr

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_1() local_unnamed_addr

attributes #0 = { nounwind readnone speculatable }
