source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edx.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %esp.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  store i32 0, i32* %esp.global-to-local, align 4
  %tmp280 = call double @__decompiler_undefined_function_3()
  %stack_var_-28 = alloca i128, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load i128, i128* %stack_var_-28, align 8
  call void @__asm_movupd.1(i128 %v2_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v0_4b = load i32, i32* @edi, align 8
  %v1_4b = add i32 %v0_4b, -84
  %v2_4b = inttoptr i32 %v1_4b to i32*
  %v3_4b = load i32, i32* %v2_4b, align 4
  %v1_4e = mul i32 %v3_4b, 16
  %v2_51 = and i32 %v1_4e, 16
  store i32 %v2_51, i32* %edx.global-to-local, align 4
  %v2_54 = add i32 %v0_4b, -80
  %v3_54 = inttoptr i32 %v2_54 to i32*
  %v4_54 = load i32, i32* %v3_54, align 4
  %v5_54 = sitofp i32 %v4_54 to x86_fp80
  store x86_fp80 %v5_54, x86_fp80* %st7.global-to-local, align 4
  %v1_5c = load i32, i32* %esp.global-to-local, align 4
  %v4_5c = add nuw nsw i32 %v2_51, 16
  %v5_5c = add i32 %v4_5c, %v1_5c
  %v6_5c = inttoptr i32 %v5_5c to double*
  %v7_5c = load double, double* %v6_5c, align 4
  %tmp287 = call double @llvm.fabs.f64(double %v7_5c)
  %v2_60 = fpext double %tmp287 to x86_fp80
  store x86_fp80 %v2_60, x86_fp80* %st7.global-to-local, align 4
  %v2_62 = add i32 %v0_4b, -72
  %v3_62 = inttoptr i32 %v2_62 to double*
  %v4_62 = load double, double* %v3_62, align 4
  %tmp288 = call double @llvm.fabs.f64(double %v4_62)
  %v2_65 = fpext double %tmp288 to x86_fp80
  store x86_fp80 %v2_65, x86_fp80* %st6.global-to-local, align 4
  %v3_67 = add i32 %v0_4b, 8
  %v4_67 = inttoptr i32 %v3_67 to double*
  %v5_67 = load double, double* %v4_67, align 4
  %v6_67 = fpext double %v5_67 to x86_fp80
  %v7_67 = fadd x86_fp80 %v2_65, %v6_67
  %v4_6a = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_6a = fpext double %v4_6a to x86_fp80
  %v6_6a = fmul x86_fp80 %v7_67, %v5_6a
  store x86_fp80 %v6_6a, x86_fp80* %st6.global-to-local, align 4
  %v2_6c = load i32, i32* %esi.global-to-local, align 4
  %v3_6c = add i32 %v2_6c, -136
  %v4_6c = inttoptr i32 %v3_6c to double*
  %v5_6c = load double, double* %v4_6c, align 4
  %v6_6c = fpext double %v5_6c to x86_fp80
  %v7_6c = fadd x86_fp80 %v6_6a, %v6_6c
  store x86_fp80 %v7_6c, x86_fp80* %st6.global-to-local, align 4
  %v0_74 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_74 = call i16 @__asm_fnstsw(i32 %v0_74)
  %v2_74 = sext i16 %v1_74 to i32
  %v3_74 = load i32, i32* %eax.global-to-local, align 4
  %v4_74 = and i32 %v3_74, -65536
  %tmp295 = udiv i32 %v2_74, 2
  %v12_76 = and i32 %tmp295, 32512
  %v2_74.masked = and i32 %v2_74, -65281
  %v13_76 = or i32 %v4_74, %v2_74.masked
  %v14_76 = or i32 %v13_76, %v12_76
  store i32 %v14_76, i32* %eax.global-to-local, align 4
  %v15_76293 = and i32 %v2_74, 256
  %v16_76 = icmp ne i32 %v15_76293, 0
  %v1_78 = icmp eq i1 %v16_76, false
  %v0_85 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br i1 %v1_78, label %dec_label_pc_85, label %dec_label_pc_7a

dec_label_pc_7a:                                  ; preds = %dec_label_pc_40
  %v1_7a = load i32, i32* %esp.global-to-local, align 4
  %v2_7a = load i32, i32* %edx.global-to-local, align 4
  %v4_7a = add i32 %v1_7a, 16
  %v5_7a = add i32 %v4_7a, %v2_7a
  %v6_7a = inttoptr i32 %v5_7a to double*
  %v7_7a = load double, double* %v6_7a, align 4
  %v8_7a = fpext double %v7_7a to x86_fp80
  %v9_7a = add i3 %v0_85, -1
  store i3 %v9_7a, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v8_7a, x86_fp80* %st7.global-to-local, align 4
  %v2_7e = fsub x86_fp80 0xK80000000000000000000, %v8_7a
  %v0_128.pre = load i32, i32* @edi, align 8
  br label %dec_label_pc_128

dec_label_pc_85:                                  ; preds = %dec_label_pc_40
  %v5_85 = fpext double %tmp280 to x86_fp80
  store x86_fp80 %v5_85, x86_fp80* %st7.global-to-local, align 4
  %v1_89 = load i32, i32* %esp.global-to-local, align 4
  %v2_89 = load i32, i32* %edx.global-to-local, align 4
  %v4_89 = add i32 %v2_89, %v1_89
  %v5_89 = inttoptr i32 %v4_89 to double*
  %v6_89 = load double, double* %v5_89, align 4
  %v7_89 = fpext double %v6_89 to x86_fp80
  %v8_89 = add i3 %v0_85, -2
  store i3 %v8_89, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v7_89, x86_fp80* %st6.global-to-local, align 4
  %v2_8e.pre = load i32, i32* @edi, align 8
  %v3_8e = add i32 %v2_8e.pre, -16
  %v4_8e = inttoptr i32 %v3_8e to double*
  %v3_97 = add i32 %v2_8e.pre, -92
  %v4_97 = inttoptr i32 %v3_97 to double*
  %v3_aa = add i32 %v2_8e.pre, -100
  %v4_aa = inttoptr i32 %v3_aa to double*
  %v3_cf = add i32 %v2_8e.pre, -108
  %v4_cf = inttoptr i32 %v3_cf to double*
  br label %dec_label_pc_8c

dec_label_pc_8c:                                  ; preds = %dec_label_pc_8c, %dec_label_pc_85
  %v1_97 = phi x86_fp80 [ %v5_85, %dec_label_pc_85 ], [ %v4_d2, %dec_label_pc_8c ]
  %stack_var_-4.0 = phi i32 [ %v4_54, %dec_label_pc_85 ], [ %v4_d8, %dec_label_pc_8c ]
  %v5_97 = load double, double* %v4_97, align 4
  %v6_97 = fpext double %v5_97 to x86_fp80
  %v7_97 = fmul x86_fp80 %v1_97, %v6_97
  %v2_9a = fsub x86_fp80 0xK80000000000000000000, %v7_97
  %v2_a0 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v2_9a)
  %v2_a2 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_a0)
  %v4_a4 = fmul x86_fp80 %v2_a2, %v2_9a
  store x86_fp80 %v4_a4, x86_fp80* %st6.global-to-local, align 4
  %v4_a6 = fsub x86_fp80 %v4_a4, %v7_97
  %v2_a8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_a6)
  %v3_a8 = fcmp olt x86_fp80 %v2_a8, 0xK403E8000000000000000
  %v4_a8 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_a6)
  %storemerge18 = select i1 %v3_a8, x86_fp80 %v4_a8, x86_fp80 %v4_a6
  store x86_fp80 %storemerge18, x86_fp80* %st7.global-to-local, align 4
  %v5_aa = load double, double* %v4_aa, align 4
  %v6_aa = fpext double %v5_aa to x86_fp80
  %v7_aa = fmul x86_fp80 %storemerge18, %v6_aa
  %v2_ad = fsub x86_fp80 0xK80000000000000000000, %v7_aa
  %v4_af = fsub x86_fp80 %v2_ad, %v7_aa
  store x86_fp80 %v4_af, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v4_af, x86_fp80* %st6.global-to-local, align 4
  %v5_b5 = load double, double* %v4_8e, align 4
  %v6_b5 = fpext double %v5_b5 to x86_fp80
  %v7_b5 = fmul x86_fp80 %v4_af, %v6_b5
  %v2_b8 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_b5)
  %v3_b8 = fcmp olt x86_fp80 %v2_b8, 0xK403E8000000000000000
  %v4_b8 = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_b5)
  %storemerge13 = select i1 %v3_b8, x86_fp80 %v4_b8, x86_fp80 %v7_b5
  store x86_fp80 %storemerge13, x86_fp80* %st6.global-to-local, align 4
  %v4_ba = fadd x86_fp80 %v4_af, %v4_af
  store x86_fp80 %v4_ba, x86_fp80* %st7.global-to-local, align 4
  %v5_bc = load double, double* %v4_97, align 4
  %v6_bc = fpext double %v5_bc to x86_fp80
  %v7_bc = fmul x86_fp80 %v4_ba, %v6_bc
  %v2_bf = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_bc)
  %v3_bf = fcmp olt x86_fp80 %v2_bf, 0xK403E8000000000000000
  %v4_bf = call x86_fp80 @llvm.sin.f80(x86_fp80 %v7_bc)
  %storemerge12 = select i1 %v3_bf, x86_fp80 %v4_bf, x86_fp80 %v7_bc
  %v2_c5 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %storemerge12)
  %v2_c7 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_c5)
  %v4_c9 = fmul x86_fp80 %storemerge12, %v2_c7
  store x86_fp80 %v4_c9, x86_fp80* %st6.global-to-local, align 4
  %v4_cb = fadd x86_fp80 %storemerge12, %v4_c9
  %v2_cd = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_cb)
  %v3_cd = fcmp olt x86_fp80 %v2_cd, 0xK403E8000000000000000
  %v4_cd = call x86_fp80 @llvm.sin.f80(x86_fp80 %v4_cb)
  %storemerge17 = select i1 %v3_cd, x86_fp80 %v4_cd, x86_fp80 %v4_cb
  store x86_fp80 %storemerge17, x86_fp80* %st7.global-to-local, align 4
  %v5_cf = load double, double* %v4_cf, align 4
  %v6_cf = fpext double %v5_cf to x86_fp80
  %v7_cf = fmul x86_fp80 %storemerge17, %v6_cf
  %v4_d2 = fadd x86_fp80 %v7_cf, %v7_cf
  store x86_fp80 %v4_d2, x86_fp80* %st7.global-to-local, align 4
  %v4_d8 = add i32 %stack_var_-4.0, -1
  %v8_dc = icmp sgt i32 %stack_var_-4.0, 1
  br i1 %v8_dc, label %dec_label_pc_8c, label %dec_label_pc_de

dec_label_pc_de:                                  ; preds = %dec_label_pc_8c
  %v3_de = fmul x86_fp80 %v4_d2, %v4_d2
  %v3_e2 = fmul x86_fp80 %v3_de, %v3_de
  %v4_e4 = fadd x86_fp80 %v3_e2, %v3_e2
  %v2_e6 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_e4)
  store x86_fp80 %v2_e6, x86_fp80* %st7.global-to-local, align 4
  %v3_ec = fmul x86_fp80 %v5_85, %v5_85
  store x86_fp80 %v3_ec, x86_fp80* %st6.global-to-local, align 4
  %v6_ee = load double, double* %v5_89, align 4
  %v7_ee = fpext double %v6_ee to x86_fp80
  %v3_f1 = fmul x86_fp80 %v7_ee, %v7_ee
  %v4_f3 = fadd x86_fp80 %v3_ec, %v3_f1
  %v2_f5 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_f3)
  %v4_f9 = fsub x86_fp80 %v2_e6, %v2_f5
  store x86_fp80 %v4_f9, x86_fp80* %st7.global-to-local, align 4
  %v1_fb = sub i32 0, %v2_89
  store i32 %v1_fb, i32* %edx.global-to-local, align 4
  store x86_fp80 %v4_f9, x86_fp80* %st6.global-to-local, align 4
  store i3 %v8_89, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_106 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_106 = call i16 @__asm_fnstsw(i32 %v0_106)
  %v2_106 = sext i16 %v1_106 to i32
  %v3_106 = load i32, i32* %eax.global-to-local, align 4
  %v4_106 = and i32 %v3_106, -65536
  %tmp296 = udiv i32 %v2_106, 2
  %v12_108 = and i32 %tmp296, 32512
  %v2_106.masked = and i32 %v2_106, -65281
  %v13_108 = or i32 %v4_106, %v2_106.masked
  %v14_108 = or i32 %v13_108, %v12_108
  store i32 %v14_108, i32* %eax.global-to-local, align 4
  %v15_108294 = and i32 %v2_106, 256
  %v16_108 = icmp eq i32 %v15_108294, 0
  br i1 %v16_108, label %dec_label_pc_10c, label %dec_label_pc_de.dec_label_pc_116_crit_edge

dec_label_pc_de.dec_label_pc_116_crit_edge:       ; preds = %dec_label_pc_de
  %v1_116.pre = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v0_11b.pre = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  br label %dec_label_pc_116

dec_label_pc_10c:                                 ; preds = %dec_label_pc_de
  %v0_10c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_10e = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %v4_10e = fadd x86_fp80 %v2_10e, 0xK3FFF8000000000000000
  %v4_110 = fadd x86_fp80 %v4_10e, 0xK3FFF8000000000000000
  %v2_112 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_110)
  %v2_114 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_112)
  store x86_fp80 %v2_114, x86_fp80* %st6.global-to-local, align 4
  br label %dec_label_pc_116

dec_label_pc_116:                                 ; preds = %dec_label_pc_de.dec_label_pc_116_crit_edge, %dec_label_pc_10c
  %v0_11b = phi i3 [ %v0_11b.pre, %dec_label_pc_de.dec_label_pc_116_crit_edge ], [ %v0_10c, %dec_label_pc_10c ]
  %v1_116 = phi x86_fp80 [ %v1_116.pre, %dec_label_pc_de.dec_label_pc_116_crit_edge ], [ %v2_114, %dec_label_pc_10c ]
  %v2_116 = load i32, i32* @edi, align 8
  %v3_116 = add i32 %v2_116, -116
  %v4_116 = inttoptr i32 %v3_116 to double*
  %v5_116 = load double, double* %v4_116, align 4
  %v6_116 = fpext double %v5_116 to x86_fp80
  %v7_116 = fmul x86_fp80 %v1_116, %v6_116
  %v2_119 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v7_116)
  store x86_fp80 %v2_119, x86_fp80* %st6.global-to-local, align 4
  %v2_11b = load i32, i32* %esi.global-to-local, align 4
  %v3_11b = add i32 %v2_11b, 128
  %tmp291 = fptrunc x86_fp80 %v7_116 to double
  %v4_11b = call double @llvm.fabs.f64(double %tmp291)
  %v5_11b = inttoptr i32 %v3_11b to double*
  store double %v4_11b, double* %v5_11b, align 4
  %v6_11b = add i3 %v0_11b, 1
  store i3 %v6_11b, i3* %fpu_stat_TOP.global-to-local, align 1
  %v1_121 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_121 = load i32, i32* @edi, align 8
  %v3_121 = add i32 %v2_121, -72
  %v4_121 = inttoptr i32 %v3_121 to double*
  %v5_121 = load double, double* %v4_121, align 4
  %v6_121 = fpext double %v5_121 to x86_fp80
  %v7_121 = fmul x86_fp80 %v1_121, %v6_121
  store x86_fp80 %v7_121, x86_fp80* %st7.global-to-local, align 4
  %v2_124 = load i32, i32* %esp.global-to-local, align 4
  %v3_124 = load i32, i32* %edx.global-to-local, align 4
  %v5_124 = add i32 %v2_124, 16
  %v6_124 = add i32 %v5_124, %v3_124
  %v7_124 = inttoptr i32 %v6_124 to double*
  %v8_124 = load double, double* %v7_124, align 4
  %v9_124 = fpext double %v8_124 to x86_fp80
  %v10_124 = fsub x86_fp80 %v7_121, %v9_124
  br label %dec_label_pc_128

dec_label_pc_128:                                 ; preds = %dec_label_pc_116, %dec_label_pc_7a
  %v0_137 = phi i32 [ %v14_76, %dec_label_pc_7a ], [ %v14_108, %dec_label_pc_116 ]
  %v0_131 = phi i3 [ %v9_7a, %dec_label_pc_7a ], [ %v6_11b, %dec_label_pc_116 ]
  %v2_12e = phi i32 [ %v0_128.pre, %dec_label_pc_7a ], [ %v2_121, %dec_label_pc_116 ]
  %v1_12e = phi x86_fp80 [ %v2_7e, %dec_label_pc_7a ], [ %v10_124, %dec_label_pc_116 ]
  store x86_fp80 %v1_12e, x86_fp80* %st7.global-to-local, align 4
  %v1_128 = add i32 %v2_12e, -76
  %v2_128 = inttoptr i32 %v1_128 to i32*
  %v3_128 = load i32, i32* %v2_128, align 4
  %v10_128 = icmp eq i32 %v3_128, 0
  %v1_12c = icmp eq i1 %v10_128, false
  br i1 %v1_12c, label %dec_label_pc_131, label %dec_label_pc_12e

dec_label_pc_12e:                                 ; preds = %dec_label_pc_128
  %v3_12e = add i32 %v2_12e, -32
  %v4_12e = inttoptr i32 %v3_12e to double*
  %v5_12e = load double, double* %v4_12e, align 4
  %v6_12e = fpext double %v5_12e to x86_fp80
  %v7_12e = fdiv x86_fp80 %v1_12e, %v6_12e
  store x86_fp80 %v7_12e, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_131

dec_label_pc_131:                                 ; preds = %dec_label_pc_12e, %dec_label_pc_128
  %v1_131 = phi x86_fp80 [ %v7_12e, %dec_label_pc_12e ], [ %v1_12e, %dec_label_pc_128 ]
  %v2_131 = load i32, i32* %esi.global-to-local, align 4
  %v3_131 = add i32 %v2_131, -32
  %v4_131 = fptrunc x86_fp80 %v1_131 to double
  %v5_131 = inttoptr i32 %v3_131 to double*
  store double %v4_131, double* %v5_131, align 4
  %v6_131 = add i3 %v0_131, 1
  store i3 %v6_131, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v0_137
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sin.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
