source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

@edi = internal unnamed_addr global i32 0, align 8

define i32 @function_0() local_unnamed_addr {
dec_label_pc_0:
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st6.global-to-local = alloca x86_fp80, align 4
  %st7.global-to-local = alloca x86_fp80, align 4
  %tmp268 = call double @__decompiler_undefined_function_3()
  %stack_var_-38 = alloca double, align 8
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v1_3 = add i32 %v0_3, -120
  %v2_3 = inttoptr i32 %v1_3 to i128*
  %v3_3 = load i128, i128* %v2_3, align 4
  %v4_3 = call i128 @__asm_movupd(i128 %v3_3)
  %v1_8 = add i32 %v0_3, -104
  %v2_8 = inttoptr i32 %v1_8 to i64*
  %v3_8 = load i64, i64* %v2_8, align 4
  %v4_8 = call i128 @__asm_movsd(i64 %v3_8)
  %v1_d = load i32, i32* @edi, align 8
  %v2_d = add i32 %v1_d, -32
  %v3_d = inttoptr i32 %v2_d to i128*
  %v4_d = load i128, i128* %v3_d, align 4
  %v5_d = call i128 @__asm_mulpd(i128 %v4_3, i128 %v4_d)
  %v1_12 = load i32, i32* @edi, align 8
  %v2_12 = add i32 %v1_12, -32
  %v3_12 = inttoptr i32 %v2_12 to i64*
  %v4_12 = load i64, i64* %v3_12, align 4
  %v5_12 = call i128 @__asm_mulsd(i128 %v4_8, i64 %v4_12)
  %v1_17 = load i32, i32* @edi, align 8
  %v2_17 = add i32 %v1_17, -64
  %v3_17 = inttoptr i32 %v2_17 to i128*
  %v4_17 = load i128, i128* %v3_17, align 4
  %v5_17 = call i128 @__asm_addpd(i128 %v5_d, i128 %v4_17)
  %v1_1c = load i32, i32* @edi, align 8
  %v2_1c = add i32 %v1_1c, -48
  %v3_1c = inttoptr i32 %v2_1c to i64*
  %v4_1c = load i64, i64* %v3_1c, align 4
  %v5_1c = call i128 @__asm_addsd(i128 %v5_12, i64 %v4_1c)
  %v0_21 = load i32, i32* @edi, align 8
  %v1_21 = add i32 %v0_21, -76
  %v2_21 = inttoptr i32 %v1_21 to i32*
  %v3_21 = load i32, i32* %v2_21, align 4
  %v10_21 = icmp eq i32 %v3_21, 0
  br i1 %v10_21, label %dec_label_pc_40, label %dec_label_pc_27

dec_label_pc_27:                                  ; preds = %dec_label_pc_0
  %v0_27 = load i32, i32* %esi.global-to-local, align 4
  %v1_27 = add i32 %v0_27, 112
  %v2_27 = inttoptr i32 %v1_27 to i64*
  %v3_27 = load i64, i64* %v2_27, align 4
  %v4_27 = call i128 @__asm_movsd(i64 %v3_27)
  %v1_2c = load i32, i32* @edi, align 8
  %v2_2c = add i32 %v1_2c, -32
  %v3_2c = inttoptr i32 %v2_2c to i64*
  %v4_2c = load i64, i64* %v3_2c, align 4
  %v5_2c = call i128 @__asm_mulsd(i128 %v4_27, i64 %v4_2c)
  %v0_31 = load i32, i32* %esi.global-to-local, align 4
  %v1_31 = add i32 %v0_31, -120
  %v2_31 = inttoptr i32 %v1_31 to i128*
  %v3_31 = load i128, i128* %v2_31, align 4
  call void @__asm_movupd.1(i128 %v3_31, i128 %v5_17)
  %v1_36 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v3_36 = add i32 %v0_31, -104
  %v4_36 = sext i32 %v1_36 to i64
  %v5_36 = inttoptr i32 %v3_36 to i64*
  store i64 %v4_36, i64* %v5_36, align 4
  %v1_3b = call i32 @__asm_movsd.2(i128 %v5_2c)
  %v2_3b = load i32, i32* %esi.global-to-local, align 4
  %v3_3b = add i32 %v2_3b, 112
  %v4_3b = sext i32 %v1_3b to i64
  %v5_3b = inttoptr i32 %v3_3b to i64*
  store i64 %v4_3b, i64* %v5_3b, align 4
  br label %dec_label_pc_40

dec_label_pc_40:                                  ; preds = %dec_label_pc_27, %dec_label_pc_0
  %v2_40 = load double, double* %stack_var_-38, align 8
  %v3_40 = fptrunc double %v2_40 to float
  %v4_40 = bitcast float %v3_40 to i32
  %v5_40 = sext i32 %v4_40 to i128
  call void @__asm_movupd.1(i128 %v5_40, i128 %v5_17)
  %v1_45 = call i32 @__asm_movsd.2(i128 %v5_1c)
  %v4_45 = sext i32 %v1_45 to i64
  %v6_45 = bitcast i64 %v4_45 to double
  %v0_4b = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_4b = load double, double* %stack_var_-38, align 8
  %v8_4b = fpext double %v3_4b to x86_fp80
  %v3_4e = fmul x86_fp80 %v8_4b, %v8_4b
  %v5_50 = fpext double %tmp268 to x86_fp80
  %v3_54 = fmul x86_fp80 %v5_50, %v5_50
  %v4_56 = fadd x86_fp80 %v3_54, %v3_4e
  %v2_58 = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v4_56)
  %v2_5a = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %v2_58)
  store x86_fp80 %v2_5a, x86_fp80* %st7.global-to-local, align 4
  store x86_fp80 %v5_50, x86_fp80* %st6.global-to-local, align 4
  %v9_60 = add i3 %v0_4b, -3
  store i3 %v9_60, i3* %fpu_stat_TOP.global-to-local, align 1
  %v3_63 = call i32 @__asm_fpatan(i32 %v1_45)
  %v2_65 = load i32, i32* @edi, align 8
  %v3_65 = add i32 %v2_65, -80
  %v4_65 = inttoptr i32 %v3_65 to i32*
  %v5_65 = load i32, i32* %v4_65, align 4
  %v6_65 = sitofp i32 %v5_65 to x86_fp80
  %v7_65 = fmul x86_fp80 %v8_4b, %v6_65
  %v2_68 = add i32 %v2_65, -72
  %v3_68 = inttoptr i32 %v2_68 to double*
  %v4_68 = load double, double* %v3_68, align 4
  %v5_68 = fpext double %v4_68 to x86_fp80
  %v3_6b = add i32 %v2_65, 8
  %v4_6b = inttoptr i32 %v3_6b to double*
  %v5_6b = load double, double* %v4_6b, align 4
  %v6_6b = fpext double %v5_6b to x86_fp80
  %v7_6b = fmul x86_fp80 %v5_68, %v6_6b
  %v4_6e = fadd x86_fp80 %v7_65, %v7_6b
  %v4_70 = load double, double* bitcast (i32* @edi to double*), align 8
  %v5_70 = fpext double %v4_70 to x86_fp80
  %v6_70 = fmul x86_fp80 %v4_6e, %v5_70
  %v2_72 = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  %tmp273 = bitcast double %v4_70 to i64
  %tmp274 = trunc i64 %tmp273 to i32
  %v3_74 = add i32 %tmp274, -96
  %v4_74 = inttoptr i32 %v3_74 to double*
  %v5_74 = load double, double* %v4_74, align 4
  %v6_74 = fpext double %v5_74 to x86_fp80
  %v7_74 = fmul x86_fp80 %v2_72, %v6_74
  %v4_77 = fadd x86_fp80 %v6_70, %v7_74
  %v2_79 = call x86_fp80 @llvm.fabs.f80(x86_fp80 %v4_77)
  %v3_79 = fcmp olt x86_fp80 %v2_79, 0xK403E8000000000000000
  br i1 %v3_79, label %bb, label %bb275

bb:                                               ; preds = %dec_label_pc_40
  br label %bb275

bb275:                                            ; preds = %dec_label_pc_40, %bb
  %v4_7d = fmul x86_fp80 %v2_5a, %v2_5a
  store x86_fp80 %v4_7d, x86_fp80* %st7.global-to-local, align 4
  %v3_7f = add i32 %tmp274, -88
  %v4_7f = inttoptr i32 %v3_7f to double*
  %v5_7f = load double, double* %v4_7f, align 4
  %v6_7f = fpext double %v5_7f to x86_fp80
  %v7_7f = fmul x86_fp80 %v4_7d, %v6_7f
  %v8_84 = fpext double %v6_45 to x86_fp80
  %v9_84 = fadd x86_fp80 %v7_7f, %v8_84
  store x86_fp80 %v9_84, x86_fp80* %st7.global-to-local, align 4
  %v9_8a = fsub x86_fp80 %v7_7f, %v8_84
  store x86_fp80 %v9_8a, x86_fp80* %st6.global-to-local, align 4
  %v0_90 = call i32 @__asm_wait()
  %v0_91 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_91 = call i16 @__asm_fnstsw(i32 %v0_91)
  %tmp285 = and i16 %v1_91, 256
  %v16_93 = icmp ne i16 %tmp285, 0
  %v1_95 = icmp eq i1 %v16_93, false
  br i1 %v1_95, label %.dec_label_pc_9d_crit_edge, label %dec_label_pc_97

.dec_label_pc_9d_crit_edge:                       ; preds = %bb275
  %v1_9d.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_9d

dec_label_pc_97:                                  ; preds = %bb275
  %v1_9b = load x86_fp80, x86_fp80* %st6.global-to-local, align 4
  store x86_fp80 %v1_9b, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_9d

dec_label_pc_9d:                                  ; preds = %.dec_label_pc_9d_crit_edge, %dec_label_pc_97
  %v1_9d = phi x86_fp80 [ %v1_9d.pre, %.dec_label_pc_9d_crit_edge ], [ %v1_9b, %dec_label_pc_97 ]
  %v2_9d = fsub x86_fp80 0xK80000000000000000000, %v1_9d
  store x86_fp80 %v2_9d, x86_fp80* %st7.global-to-local, align 4
  %v3_9f = load double, double* %stack_var_-38, align 8
  %tmp277 = call double @llvm.fabs.f64(double %v3_9f)
  %v2_a2 = fpext double %tmp277 to x86_fp80
  store x86_fp80 %v2_a2, x86_fp80* %st6.global-to-local, align 4
  %v2_a4 = load i32, i32* @edi, align 8
  %v3_a4 = add i32 %v2_a4, -16
  %v4_a4 = inttoptr i32 %v3_a4 to double*
  %v5_a4 = load double, double* %v4_a4, align 4
  %v6_a4 = fpext double %v5_a4 to x86_fp80
  %v7_a4 = fsub x86_fp80 %v2_a2, %v6_a4
  store x86_fp80 %v7_a4, x86_fp80* %st6.global-to-local, align 4
  %v0_a9 = call i32 @__asm_wait()
  %v0_aa = load i32, i32* %fpsw.global-to-local, align 4
  %v1_aa = call i16 @__asm_fnstsw(i32 %v0_aa)
  %tmp279 = call double @llvm.fabs.f64(double %tmp268)
  %v2_ba = fpext double %tmp279 to x86_fp80
  store x86_fp80 %v2_ba, x86_fp80* %st7.global-to-local, align 4
  %v2_bc = load i32, i32* @edi, align 8
  %v3_bc = add i32 %v2_bc, -16
  %v4_bc = inttoptr i32 %v3_bc to double*
  %v5_bc = load double, double* %v4_bc, align 4
  %v6_bc = fpext double %v5_bc to x86_fp80
  %v7_bc = fsub x86_fp80 %v2_ba, %v6_bc
  store x86_fp80 %v7_bc, x86_fp80* %st7.global-to-local, align 4
  %v0_c1 = call i32 @__asm_wait()
  %v0_c2 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_c2 = call i16 @__asm_fnstsw(i32 %v0_c2)
  %v2_c2 = sext i16 %v1_c2 to i32
  %v4_c2 = and i32 %v0_c1, -65536
  %tmp280 = udiv i32 %v2_c2, 2
  %v12_c4 = and i32 %tmp280, 32512
  %v2_c2.masked = and i32 %v2_c2, -65281
  %v13_c4 = or i32 %v4_c2, %v2_c2.masked
  %v14_c4 = or i32 %v13_c4, %v12_c4
  %storemerge.in = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %storemerge = add i3 %storemerge.in, 1
  store i3 %storemerge, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_ce = load i32, i32* @edi, align 8
  %v1_ce = add i32 %v0_ce, -76
  %v2_ce = inttoptr i32 %v1_ce to i32*
  %v3_ce = load i32, i32* %v2_ce, align 4
  %v10_ce = icmp eq i32 %v3_ce, 0
  %v1_d2 = icmp eq i1 %v10_ce, false
  %v1_d7.pre = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  br i1 %v1_d2, label %dec_label_pc_d7, label %dec_label_pc_d4

dec_label_pc_d4:                                  ; preds = %dec_label_pc_9d
  %v3_d4 = add i32 %v0_ce, -32
  %v4_d4 = inttoptr i32 %v3_d4 to double*
  %v5_d4 = load double, double* %v4_d4, align 4
  %v6_d4 = fpext double %v5_d4 to x86_fp80
  %v7_d4 = fdiv x86_fp80 %v1_d7.pre, %v6_d4
  store x86_fp80 %v7_d4, x86_fp80* %st7.global-to-local, align 4
  br label %dec_label_pc_d7

dec_label_pc_d7:                                  ; preds = %dec_label_pc_9d, %dec_label_pc_d4
  %v1_d7 = phi x86_fp80 [ %v7_d4, %dec_label_pc_d4 ], [ %v1_d7.pre, %dec_label_pc_9d ]
  %v2_d7 = load i32, i32* %esi.global-to-local, align 4
  %v3_d7 = add i32 %v2_d7, -32
  %v4_d7 = fptrunc x86_fp80 %v1_d7 to double
  %v5_d7 = inttoptr i32 %v3_d7 to double*
  store double %v4_d7, double* %v5_d7, align 4
  %v6_d7 = add i3 %storemerge.in, 2
  store i3 %v6_d7, i3* %fpu_stat_TOP.global-to-local, align 1
  ret i32 %v14_c4
}

declare i128 @__asm_movupd(i128) local_unnamed_addr

declare i128 @__asm_movsd(i64) local_unnamed_addr

declare i128 @__asm_mulpd(i128, i128) local_unnamed_addr

declare i128 @__asm_mulsd(i128, i64) local_unnamed_addr

declare i128 @__asm_addpd(i128, i128) local_unnamed_addr

declare i128 @__asm_addsd(i128, i64) local_unnamed_addr

declare void @__asm_movupd.1(i128, i128) local_unnamed_addr

declare i32 @__asm_movsd.2(i128) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.sqrt.f80(x86_fp80) #0

declare i32 @__asm_fpatan(i32) local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.fabs.f80(x86_fp80) #0

; Function Attrs: nounwind readnone speculatable
declare x86_fp80 @llvm.cos.f80(x86_fp80) #0

declare i32 @__asm_wait() local_unnamed_addr

declare i16 @__asm_fnstsw(i32) local_unnamed_addr

declare double @__decompiler_undefined_function_3() local_unnamed_addr

; Function Attrs: nounwind readnone speculatable
declare double @llvm.fabs.f64(double) #0

attributes #0 = { nounwind readnone speculatable }
