source_filename = "test"
target datalayout = "e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"

define i32 @function_0(i32 %arg1) local_unnamed_addr {
dec_label_pc_0:
  %eax.global-to-local = alloca i32, align 4
  %edi.global-to-local = alloca i32, align 4
  %esi.global-to-local = alloca i32, align 4
  %fpsw.global-to-local = alloca i32, align 4
  %fpu_stat_TOP.global-to-local = alloca i3, align 1
  %st7.global-to-local = alloca x86_fp80, align 4
  %v0_3 = load i32, i32* %esi.global-to-local, align 4
  %v0_4 = load i32, i32* %edi.global-to-local, align 4
  %v0_5 = load i32, i32* %eax.global-to-local, align 4
  store i32 %arg1, i32* %esi.global-to-local, align 4
  %v1_9 = add i32 %arg1, 48
  %v2_9 = inttoptr i32 %v1_9 to i32*
  %v3_9 = load i32, i32* %v2_9, align 4
  store i32 %v3_9, i32* %edi.global-to-local, align 4
  %v0_c = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v2_c = inttoptr i32 %arg1 to double*
  %v3_c = load double, double* %v2_c, align 4
  %v4_c = fpext double %v3_c to x86_fp80
  %v5_c = add i3 %v0_c, -1
  store i3 %v5_c, i3* %fpu_stat_TOP.global-to-local, align 1
  store x86_fp80 %v4_c, x86_fp80* %st7.global-to-local, align 4
  %v0_11 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_11 = call i16 @__asm_fnstsw(i32 %v0_11)
  %v2_11 = sext i16 %v1_11 to i32
  %v3_11 = load i32, i32* %eax.global-to-local, align 4
  %v4_11 = and i32 %v3_11, -65536
  %v1_13 = udiv i32 %v2_11, 256
  %v2_13 = trunc i32 %v1_13 to i8
  %v3_13 = and i8 %v2_13, 65
  %v4_13 = icmp eq i8 %v3_13, 0
  %v9_13 = zext i8 %v3_13 to i32
  %v11_13 = mul i32 %v9_13, 256
  %v2_11.masked = and i32 %v2_11, -65281
  %v12_13 = or i32 %v4_11, %v2_11.masked
  %v13_13 = or i32 %v12_13, %v11_13
  store i32 %v13_13, i32* %eax.global-to-local, align 4
  br i1 %v4_13, label %dec_label_pc_22, label %dec_label_pc_18

dec_label_pc_18:                                  ; preds = %dec_label_pc_0
  %v0_1b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_1b = call i16 @__asm_fnstsw(i32 %v0_1b)
  %v2_1b = sext i16 %v1_1b to i32
  %v3_1b = load i32, i32* %eax.global-to-local, align 4
  %v4_1b = and i32 %v3_1b, -65536
  %v1_1d = udiv i32 %v2_1b, 256
  %v2_1d = trunc i32 %v1_1d to i8
  %v3_1d = and i8 %v2_1d, 65
  %v4_1d = icmp eq i8 %v3_1d, 0
  %v9_1d = zext i8 %v3_1d to i32
  %v11_1d = mul i32 %v9_1d, 256
  %v2_1b.masked = and i32 %v2_1b, -65281
  %v12_1d = or i32 %v4_1b, %v2_1b.masked
  %v13_1d = or i32 %v12_1d, %v11_1d
  store i32 %v13_1d, i32* %eax.global-to-local, align 4
  br i1 %v4_1d, label %dec_label_pc_28, label %dec_label_pc_22

dec_label_pc_22:                                  ; preds = %dec_label_pc_18, %dec_label_pc_0
  %v1_22 = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_22 = load i32, i32* %edi.global-to-local, align 4
  %v3_22 = add i32 %v2_22, -32
  %v4_22 = inttoptr i32 %v3_22 to double*
  %v5_22 = load double, double* %v4_22, align 4
  %v6_22 = fpext double %v5_22 to x86_fp80
  %v7_22 = fadd x86_fp80 %v1_22, %v6_22
  store x86_fp80 %v7_22, x86_fp80* %st7.global-to-local, align 4
  %v2_25 = load i32, i32* %esi.global-to-local, align 4
  %v3_25 = add i32 %v2_25, 24
  %v4_25 = fptrunc x86_fp80 %v7_22 to double
  %v5_25 = inttoptr i32 %v3_25 to double*
  store double %v4_25, double* %v5_25, align 4
  br label %dec_label_pc_28

dec_label_pc_28:                                  ; preds = %dec_label_pc_22, %dec_label_pc_18
  %v0_28 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_28 = add i3 %v0_28, -1
  store i3 %v6_28, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_2e = load i32, i32* %fpsw.global-to-local, align 4
  %v1_2e = call i16 @__asm_fnstsw(i32 %v0_2e)
  %v2_2e = sext i16 %v1_2e to i32
  %v3_2e = load i32, i32* %eax.global-to-local, align 4
  %v4_2e = and i32 %v3_2e, -65536
  %v1_30 = udiv i32 %v2_2e, 256
  %v2_30 = trunc i32 %v1_30 to i8
  %v3_30 = and i8 %v2_30, 65
  %v4_30 = icmp eq i8 %v3_30, 0
  %v9_30 = zext i8 %v3_30 to i32
  %v11_30 = mul i32 %v9_30, 256
  %v2_2e.masked = and i32 %v2_2e, -65281
  %v12_30 = or i32 %v4_2e, %v2_2e.masked
  %v13_30 = or i32 %v12_30, %v11_30
  store i32 %v13_30, i32* %eax.global-to-local, align 4
  br i1 %v4_30, label %dec_label_pc_3f, label %dec_label_pc_35

dec_label_pc_35:                                  ; preds = %dec_label_pc_28
  %v0_38 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_38 = call i16 @__asm_fnstsw(i32 %v0_38)
  %v2_38 = sext i16 %v1_38 to i32
  %v3_38 = load i32, i32* %eax.global-to-local, align 4
  %v4_38 = and i32 %v3_38, -65536
  %v1_3a = udiv i32 %v2_38, 256
  %v2_3a = trunc i32 %v1_3a to i8
  %v3_3a = and i8 %v2_3a, 65
  %v4_3a = icmp eq i8 %v3_3a, 0
  %v9_3a = zext i8 %v3_3a to i32
  %v11_3a = mul i32 %v9_3a, 256
  %v2_38.masked = and i32 %v2_38, -65281
  %v12_3a = or i32 %v4_38, %v2_38.masked
  %v13_3a = or i32 %v12_3a, %v11_3a
  store i32 %v13_3a, i32* %eax.global-to-local, align 4
  br i1 %v4_3a, label %dec_label_pc_45, label %dec_label_pc_3f

dec_label_pc_3f:                                  ; preds = %dec_label_pc_35, %dec_label_pc_28
  %v1_3f = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_3f = load i32, i32* %edi.global-to-local, align 4
  %v3_3f = add i32 %v2_3f, -56
  %v4_3f = inttoptr i32 %v3_3f to double*
  %v5_3f = load double, double* %v4_3f, align 4
  %v6_3f = fpext double %v5_3f to x86_fp80
  %v7_3f = fadd x86_fp80 %v1_3f, %v6_3f
  store x86_fp80 %v7_3f, x86_fp80* %st7.global-to-local, align 4
  %v2_42 = load i32, i32* %esi.global-to-local, align 4
  %v3_42 = add i32 %v2_42, 32
  %v4_42 = fptrunc x86_fp80 %v7_3f to double
  %v5_42 = inttoptr i32 %v3_42 to double*
  store double %v4_42, double* %v5_42, align 4
  br label %dec_label_pc_45

dec_label_pc_45:                                  ; preds = %dec_label_pc_3f, %dec_label_pc_35
  %v0_45 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v6_45 = add i3 %v0_45, -1
  store i3 %v6_45, i3* %fpu_stat_TOP.global-to-local, align 1
  %v0_4b = load i32, i32* %fpsw.global-to-local, align 4
  %v1_4b = call i16 @__asm_fnstsw(i32 %v0_4b)
  %v2_4b = sext i16 %v1_4b to i32
  %v3_4b = load i32, i32* %eax.global-to-local, align 4
  %v4_4b = and i32 %v3_4b, -65536
  %v1_4d = udiv i32 %v2_4b, 256
  %v2_4d = trunc i32 %v1_4d to i8
  %v3_4d = and i8 %v2_4d, 65
  %v4_4d = icmp eq i8 %v3_4d, 0
  %v9_4d = zext i8 %v3_4d to i32
  %v11_4d = mul i32 %v9_4d, 256
  %v2_4b.masked = and i32 %v2_4b, -65281
  %v12_4d = or i32 %v4_4b, %v2_4b.masked
  %v13_4d = or i32 %v12_4d, %v11_4d
  store i32 %v13_4d, i32* %eax.global-to-local, align 4
  br i1 %v4_4d, label %dec_label_pc_5c, label %dec_label_pc_52

dec_label_pc_52:                                  ; preds = %dec_label_pc_45
  %v0_55 = load i32, i32* %fpsw.global-to-local, align 4
  %v1_55 = call i16 @__asm_fnstsw(i32 %v0_55)
  %v2_55 = sext i16 %v1_55 to i32
  %v3_55 = load i32, i32* %eax.global-to-local, align 4
  %v4_55 = and i32 %v3_55, -65536
  %v1_57 = udiv i32 %v2_55, 256
  %v2_57 = trunc i32 %v1_57 to i8
  %v3_57 = and i8 %v2_57, 65
  %v4_57 = icmp eq i8 %v3_57, 0
  %v9_57 = zext i8 %v3_57 to i32
  %v11_57 = mul i32 %v9_57, 256
  %v2_55.masked = and i32 %v2_55, -65281
  %v12_57 = or i32 %v4_55, %v2_55.masked
  %v13_57 = or i32 %v12_57, %v11_57
  store i32 %v13_57, i32* %eax.global-to-local, align 4
  br i1 %v4_57, label %dec_label_pc_62, label %dec_label_pc_5c

dec_label_pc_5c:                                  ; preds = %dec_label_pc_52, %dec_label_pc_45
  %v1_5c = load x86_fp80, x86_fp80* %st7.global-to-local, align 4
  %v2_5c = load i32, i32* %edi.global-to-local, align 4
  %v3_5c = add i32 %v2_5c, -80
  %v4_5c = inttoptr i32 %v3_5c to double*
  %v5_5c = load double, double* %v4_5c, align 4
  %v6_5c = fpext double %v5_5c to x86_fp80
  %v7_5c = fadd x86_fp80 %v1_5c, %v6_5c
  store x86_fp80 %v7_5c, x86_fp80* %st7.global-to-local, align 4
  %v2_5f = load i32, i32* %esi.global-to-local, align 4
  %v3_5f = add i32 %v2_5f, 40
  %v4_5f = fptrunc x86_fp80 %v7_5c to double
  %v5_5f = inttoptr i32 %v3_5f to double*
  store double %v4_5f, double* %v5_5f, align 4
  br label %dec_label_pc_62

dec_label_pc_62:                                  ; preds = %dec_label_pc_5c, %dec_label_pc_52
  %v0_62 = load i3, i3* %fpu_stat_TOP.global-to-local, align 1
  %v4_64 = add i3 %v0_62, 3
  store i3 %v4_64, i3* %fpu_stat_TOP.global-to-local, align 1
  store i32 %v0_5, i32* %eax.global-to-local, align 4
  store i32 %v0_4, i32* %edi.global-to-local, align 4
  store i32 %v0_3, i32* %esi.global-to-local, align 4
  ret i32 %v0_5
}

declare i16 @__asm_fnstsw(i32) local_unnamed_addr
